CN116544327B - Light-emitting diode and preparation method thereof - Google Patents
Light-emitting diode and preparation method thereof Download PDFInfo
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- CN116544327B CN116544327B CN202310761558.0A CN202310761558A CN116544327B CN 116544327 B CN116544327 B CN 116544327B CN 202310761558 A CN202310761558 A CN 202310761558A CN 116544327 B CN116544327 B CN 116544327B
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- 238000002360 preparation method Methods 0.000 title abstract description 6
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims abstract description 242
- 229910052799 carbon Inorganic materials 0.000 claims abstract description 242
- 239000012535 impurity Substances 0.000 claims abstract description 210
- 230000001105 regulatory effect Effects 0.000 claims abstract description 135
- 239000000758 substrate Substances 0.000 claims abstract description 48
- 230000000903 blocking effect Effects 0.000 claims abstract description 16
- 230000001276 controlling effect Effects 0.000 claims description 47
- 238000000151 deposition Methods 0.000 claims description 29
- 238000000034 method Methods 0.000 claims description 22
- 238000004519 manufacturing process Methods 0.000 claims description 10
- 229910002601 GaN Inorganic materials 0.000 description 84
- 230000008021 deposition Effects 0.000 description 21
- 230000035882 stress Effects 0.000 description 15
- 239000013078 crystal Substances 0.000 description 13
- 229910052594 sapphire Inorganic materials 0.000 description 13
- 239000010980 sapphire Substances 0.000 description 13
- 230000006798 recombination Effects 0.000 description 11
- 238000005215 recombination Methods 0.000 description 11
- 239000000463 material Substances 0.000 description 9
- 230000007547 defect Effects 0.000 description 8
- 239000000203 mixture Substances 0.000 description 7
- 230000008569 process Effects 0.000 description 7
- 230000004888 barrier function Effects 0.000 description 6
- 230000000694 effects Effects 0.000 description 6
- 239000007789 gas Substances 0.000 description 6
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 4
- 230000008901 benefit Effects 0.000 description 4
- 230000000052 comparative effect Effects 0.000 description 4
- 239000011777 magnesium Substances 0.000 description 4
- 230000005855 radiation Effects 0.000 description 4
- RGGPNXQUMRMPRA-UHFFFAOYSA-N triethylgallium Chemical compound CC[Ga](CC)CC RGGPNXQUMRMPRA-UHFFFAOYSA-N 0.000 description 4
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical compound C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 description 4
- 229910002704 AlGaN Inorganic materials 0.000 description 3
- 230000008859 change Effects 0.000 description 3
- 230000006911 nucleation Effects 0.000 description 3
- 238000005240 physical vapour deposition Methods 0.000 description 3
- 230000005428 wave function Effects 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 2
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- 239000002131 composite material Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000002019 doping agent Substances 0.000 description 2
- 229910052733 gallium Inorganic materials 0.000 description 2
- 238000005121 nitriding Methods 0.000 description 2
- 238000010899 nucleation Methods 0.000 description 2
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 2
- 229910010271 silicon carbide Inorganic materials 0.000 description 2
- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 description 2
- IBEFSUTVZWZJEL-UHFFFAOYSA-N trimethylindium Chemical compound C[In](C)C IBEFSUTVZWZJEL-UHFFFAOYSA-N 0.000 description 2
- 239000011787 zinc oxide Substances 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- 230000005699 Stark effect Effects 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 239000012159 carrier gas Substances 0.000 description 1
- 239000013256 coordination polymer Substances 0.000 description 1
- UOSXPFXWANTMIZ-UHFFFAOYSA-N cyclopenta-1,3-diene;magnesium Chemical compound [Mg].C1C=CC=C1.C1C=CC=C1 UOSXPFXWANTMIZ-UHFFFAOYSA-N 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000004020 luminiscence type Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 230000005622 photoelectricity Effects 0.000 description 1
- 230000010287 polarization Effects 0.000 description 1
- 238000007781 pre-processing Methods 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/12—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
- H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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Abstract
The application provides a light-emitting diode and a preparation method thereof, wherein the light-emitting diode comprises a substrate, and a buffer layer, an undoped GaN layer, an N-type GaN layer, a carbon impurity regulating layer, an active layer, an electron blocking layer and a P-type GaN layer which are sequentially deposited on the substrate; the carbon impurity regulating layer comprises a first carbon impurity regulating layer and a stacking layer, wherein the first carbon impurity regulating layer is deposited on the N-type GaN layer, and the stacking layer comprises a second carbon impurity regulating layer and a third carbon impurity regulating layer which are alternately stacked on the first carbon impurity regulating layer according to a preset period. According to the application, the carbon impurity regulating layer is inserted between the N-type GaN layer and the active layer, so that the two-dimensional electron cloud generated by energy band distortion at the interface of the N-type GaN layer and the active layer is reduced, and the luminous efficiency is improved.
Description
Technical Field
The application relates to the technical field of photoelectricity, in particular to a light-emitting diode and a preparation method thereof.
Background
The active layer of the GaN-based light emitting diode includes a quantum well layer and a quantum barrier layer, in which a forbidden bandwidth is different due to a difference in composition between a well material and a barrier material, and a confinement effect on carriers is formed in a vertical direction, such that electrons and holes are confined in the active layer, and an overlapping rate of wave functions of the electrons and the holes is increased, and thus the active layer has been receiving a great deal of attention as a key for improving light emitting efficiency of the light emitting diode.
At present, an InGaN/GaN layer is usually deposited on an N-type GaN layer as an active layer, however, due to polarization effect generated by lattice mismatch of the InGaN layer and the N-type GaN layer, energy bands are inclined to spatially separate wave functions of electron holes, thereby greatly reducing radiation recombination probability and influencing luminous efficiency of an epitaxial layer.
Disclosure of Invention
Based on this, the present application aims to provide a light emitting diode manufacturing method and a diode, so as to solve the problems existing in the prior art.
The application provides a light-emitting diode, which comprises a substrate, and a buffer layer, an undoped GaN layer, an N-type GaN layer, a carbon impurity regulating layer, an active layer, an electron blocking layer and a P-type GaN layer which are sequentially deposited on the substrate;
the carbon impurity regulating layer comprises a first carbon impurity regulating layer and a stacking layer, wherein the first carbon impurity regulating layer and the stacking layer are deposited on the N-type GaN layer, the stacking layer comprises a second carbon impurity regulating layer and a third carbon impurity regulating layer which are alternately stacked on the first carbon impurity regulating layer according to a preset period, the carbon impurity concentration of the first carbon impurity regulating layer is lower than that of the second carbon impurity regulating layer, and the lattice constant of the second carbon impurity regulating layer is smaller than that of the third carbon impurity regulating layer.
The beneficial effects of the application are as follows: the application provides a light-emitting diode, which is characterized in that a carbon impurity regulating layer is added between an N-type GaN layer and an active layer; the lattice mismatch between the N-type GaN layer and the InGaN quantum well layer in the active layer can be effectively regulated, the generation of a two-dimensional electron cloud area caused by energy band distortion at the interface of the InGaN layer and the N-type GaN layer is reduced, the invalid recombination of electrons and holes is reduced, and the luminous efficiency is improved; further, the carbon impurity regulating layer comprises a first carbon impurity regulating layer and a stacking layer, the stacking layer comprises a second carbon impurity regulating layer and a third carbon impurity regulating layer which are alternately stacked on the first carbon impurity regulating layer according to a preset period, and the carbon impurity concentration of the first carbon impurity regulating layer is lower than that of the second carbon impurity regulating layer; the carbon impurity concentration of the first carbon impurity regulating layer is smaller than that of the second carbon impurity regulating layer, so that the fermi energy level of the first carbon impurity regulating layer is smaller than that of the second carbon impurity regulating layer, multistage fermi energy level change is generated through the carbon impurity regulating layer, energy bands at the interface of the InGaN quantum well layer in the N-type GaN layer and the active layer are regulated, energy band distortion is reduced, furthermore, the lattice constant of the second carbon impurity regulating layer is smaller than that of the third carbon impurity regulating layer, the compressive stress and tensile stress applied to the epitaxial layer by the alternately grown superlattice stacking layers are repeatedly changed, the stress accumulated between the whole epitaxial layer and the substrate is effectively released, the crystal quality of the active layer is improved, and the non-radiative recombination efficiency of the active layer is reduced.
Preferably, the first carbon impurity regulating layer is a carbon doped SiGaN layer, the second carbon impurity regulating layer is a carbon doped BGaN layer, and the third carbon impurity regulating layer is a carbon doped ScInGaN layer.
Preferably, the Si component in the carbon doped SiGaN layer is 0.01-0.1, the B component in the carbon doped BGaN layer is 0.01-0.5, the Sc component in the carbon doped ScInGaN layer is 0.01-0.1, and the in component is 0.01-0.5.
Preferably, the thickness of the first carbon impurity regulating layer is 1 nm-100 nm, the thickness of the second carbon impurity regulating layer is 1 nm-200 nm, and the thickness of the third carbon impurity regulating layer is 1 nm-50 nm.
Preferably, the concentration of carbon impurities in the first carbon impurity control layer is 5E+16atoms/cm 3 ~5E+17atoms/cm 3 The concentration of the carbon impurities in the second carbon impurity regulating layer is 5E+17atoms/cm 3 ~5E+18atoms/cm 3 。
Preferably, the preset period is 1-10.
In another aspect, the present application provides a method for preparing a light emitting diode as described above, the method comprising:
providing a substrate;
sequentially depositing a buffer layer, an undoped GaN layer, an N-type GaN layer, a carbon impurity regulating layer, an active layer, an electron blocking layer and a P-type GaN layer on the substrate;
the carbon impurity regulating layer comprises a first carbon impurity regulating layer and a stacking layer, wherein the first carbon impurity regulating layer and the stacking layer are deposited on the N-type GaN layer, the stacking layer comprises a second carbon impurity regulating layer and a third carbon impurity regulating layer which are alternately stacked on the first carbon impurity regulating layer according to a preset period, the carbon impurity concentration of the first carbon impurity regulating layer is lower than that of the second carbon impurity regulating layer, and the lattice constant of the second carbon impurity regulating layer is smaller than that of the third carbon impurity regulating layer.
Preferably, the deposition growth temperature of the first carbon impurity regulating layer is 900-1100 ℃, and the deposition growth temperature of the stacked layer is 850-1050 ℃.
Preferably, the growth atmosphere in the deposition growth process of the carbon impurity regulating layer is N 2 /NH 3 The component ratio of the mixed gas is 1:1-1:10.
Preferably, the atmosphere pressure for deposition growth of the carbon impurity regulating layer is 50-500 torr.
Additional aspects and advantages of the application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the application.
Drawings
FIG. 1 is a schematic diagram of a light emitting diode according to the present application;
FIG. 2 is a schematic structural diagram of the carbon impurity controlling layer of FIG. 1;
fig. 3 is a flowchart of a method for manufacturing a light emitting diode according to the present application.
Description of main reference numerals:
10. a substrate; 20. a buffer layer; 30. an undoped GaN layer; 40. an N-type GaN layer; 50. a carbon impurity control layer; 51. a first carbon impurity control layer; 52. stacking layers; 521. a second carbon impurity controlling layer; 522. a third carbon impurity controlling layer; 60. an active layer; 70. an electron blocking layer; 80. and a P-type GaN layer.
The application will be further described in the following detailed description in conjunction with the above-described figures.
Detailed Description
In order that the application may be readily understood, a more complete description of the application will be rendered by reference to the appended drawings. Several embodiments of the application are presented in the figures. This application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
It will be understood that when an element is referred to as being "mounted" on another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. The terms "vertical," "horizontal," "left," "right," and the like are used herein for illustrative purposes only.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
Referring to fig. 1 and 2, the light emitting diode provided by the embodiment of the application comprises a substrate 10, and a buffer layer 20, an undoped GaN layer 30, an N-type GaN layer 40, a carbon impurity controlling layer 50, an active layer 60, an electron blocking layer 70 and a P-type GaN layer 80 which are sequentially deposited on the substrate 10; the carbon impurity controlling layer 50 includes a first carbon impurity controlling layer 51 and a stacking layer 52 deposited on the N-type GaN layer 40, and the stacking layer 52 includes a second carbon impurity controlling layer 521 and a third carbon impurity controlling layer 522 alternately stacked on the first carbon impurity controlling layer 51 at a preset period, the first carbon impurity controlling layer 51 having a carbon impurity concentration lower than that of the second carbon impurity controlling layer 521, and the second carbon impurity controlling layer 521 having a lattice constant smaller than that of the third carbon impurity controlling layer 522.
Specifically, the substrate 10 may be a sapphire substrate or SiO 2 One of a sapphire composite substrate, a silicon carbide substrate, a gallium nitride substrate and a zinc oxide substrate; the sapphire substrate has the advantages of mature preparation process, high cost performance, easy cleaning and processing, good stability at high temperature and wide application range. Therefore, a sapphire substrate is selected, however, the surface of the sapphire substrate has very large defects, and the defects of the epitaxial layer deposited directly on the substrate are easy to extendAs far as the active layer is an active layer of a light emitting diode, defects extending to the active layer directly affect the light emitting effect, and therefore, before depositing an epitaxial layer on the substrate, it is necessary to deposit a buffer layer 20 on the substrate 10 to reduce defects on the surface of the sapphire substrate to a certain extent, and specifically, the buffer layer 20 may be an AlN buffer layer with a thickness of 10-15 nm.
The undoped GaN layer 30 is deposited on the buffer layer 20, the thickness of the undoped GaN layer 30 is 1-5 um, and the thicker undoped GaN layer 30 can reduce the effective release of the compressive stress between the light emitting diodes, improve the crystal quality and reduce the reverse leakage. However, the increase of the thickness of the GaN layer consumes a large amount of Ga source material, which greatly increases the epitaxial cost of a Light Emitting Diode (LED), so further, in order to achieve both the quality and the production cost of the LED, the undoped GaN layer 30 is preferably 2-3 um.
The main function of the N-type GaN layer 40 in the LED is to further reduce defects between crystals and provide enough electrons for the LED to emit light and to allow the electrons to smoothly move to the active layer 60, and to undergo radiative recombination with holes in the active layer 60; further reducing the defect of the crystal can improve the quality of the crystal, providing enough electrons to be combined with holes in the active layer can effectively improve the overall luminous efficiency of the LED, and the more electrons and holes are combined in radiation, the better the luminous effect of the LED is. Specifically, the thickness of the N-type GaN layer 40 is 2 um-3 um, and the N-type GaN layer can effectively release stress, so as to improve the light emitting efficiency of the light emitting diode.
The active layer 60 mainly includes an InGaN quantum well layer and a GaN quantum barrier layer sequentially deposited on the N-type GaN layer 40, however, due to a high lattice mismatch between the InGaN quantum well layer and the N-type GaN layer 40, energy band distortion is easily caused, a region of the generated two-dimensional electron cloud is increased, and non-radiative recombination efficiency is increased; therefore, in the present embodiment, the carbon impurity controlling layer 50 is deposited between the N-type GaN layer 40 and the active layer 60, so that the generation of a two-dimensional electron cloud region due to the energy band distortion at the interface between the N-type GaN layer and the InGaN layer is reduced, the ineffective recombination of electrons and holes is reduced, and the light emitting efficiency is improved. Specifically, the carbon impurity controlling layer 50 includes a first carbon impurity controlling layer 51 and a stacking layer 52 deposited on the N-type GaN layer, the stacking layer 52 includes a second carbon impurity controlling layer 521 and a third carbon impurity controlling layer 522 alternately stacked on the first carbon impurity controlling layer 51 at a preset period, and the carbon impurity concentration of the first carbon impurity controlling layer is lower than that of the second carbon impurity controlling layer; the carbon impurity concentration of the first carbon impurity regulating layer 51 is smaller than that of the second carbon impurity regulating layer 521, so that the fermi energy level of the first carbon impurity regulating layer 51 is smaller than that of the second carbon impurity regulating layer 521, multistage fermi energy level change is generated through the carbon impurity regulating layer, energy bands at the interface of the N-type GaN layer and the InGaN quantum well layer in the active layer are regulated, energy band distortion is reduced, generation of a two-dimensional electron cloud area is reduced, invalid recombination of electrons and holes is reduced, and luminous efficiency is improved. Further, the lattice constant of the second carbon impurity regulating layer 521 is smaller than that of the third carbon impurity regulating layer 522, the compressive stress and the tensile stress applied to the epitaxial layer by the grown superlattice stacking layer are repeatedly changed, so that the stress accumulated by the lattice mismatch/thermal mismatch of the whole epitaxial layer and the substrate is effectively released, the crystal quality of the active layer is improved, and the non-radiative recombination efficiency of the active layer is reduced. The crystal quality of the active layer is improved.
Optionally, the first carbon impurity controlling layer 51 is a carbon doped SiGaN layer, wherein the Si component in the carbon doped SiGaN layer is 0.01-0.1, preferably, the Si component in the carbon doped SiGaN layer is 0.05; the carbon doped SiGaN layer can effectively shield a piezoelectric field caused by mismatch stress, alleviate adverse effects of Quantum Confinement Stark Effect (QCSE) effect, and improve radiation recombination efficiency. The second carbon impurity regulating layer is a carbon-doped BGaN layer, the B component of the carbon-doped BGaN layer is 0.01-0.5, and preferably, the B component of the carbon-doped BGaN layer is 0.1; the third carbon impurity regulating layer is a carbon-doped ScInGaN layer, the Sc component in the carbon-doped ScInGaN layer is 0.01-0.1, the in component is 0.01-0.5, preferably, the Sc component in the carbon-doped ScInGaN layer is 0.05, and the in component is 0.1. Optionally, the thickness of the first carbon impurity controlling layer 51 is 1nm to 100nm, and preferably, the thickness of the first carbon impurity controlling layer 51 is 50nm; the thickness of the second carbon impurity controlling layer 521 is 1nm to 200nm, and preferably, the thickness of the second carbon impurity controlling layer 521 is 150nm; the thickness of the third carbon impurity controlling layer 522 is 1nm to 50nm, preferably, the third carbonThe thickness of the impurity controlling layer 522 is 10nm. Alternatively, the concentration of carbon impurities in the first carbon impurity controlling layer 51 is 5E+16atoms/cm 3 ~5E+17atoms/cm 3 Preferably, the concentration of carbon impurities in the first carbon impurity controlling layer 51 is 1E+17atoms/cm 3 The method comprises the steps of carrying out a first treatment on the surface of the The concentration of carbon impurities in the second carbon impurity controlling layer 521 is 5E+17atoms/cm 3 ~5E+18atoms/cm 3 Preferably, the concentration of carbon impurities in the second carbon impurity controlling layer 521 is 1E+18atoms/cm 3 . The period of the second and third carbon impurity controlling layers 521 and 522 alternately stacked on the first carbon impurity controlling layer 51 is 1 to 10, and preferably, the period of the second and third carbon impurity controlling layers 521 and 522 alternately stacked is 6.
The electron blocking layer 70 is Al a In b The GaN layer has a thickness of 10 nm-40 nm, wherein the value of a is Fan Wei 0.005.005-0.1, and the value of b is Fan Wei 0.01.01-0.2; the thickness of the P-type GaN layer 80 is 10 nm-50 nm, mg can be adopted for doping, and the doping concentration of the Mg is 1E+19 atoms/cm 3 ~1E+21atoms/cm 3 。
Referring to fig. 3, a method for manufacturing a light emitting diode according to an embodiment of the application, specifically, the method for manufacturing a light emitting diode provided by the application includes steps S10 to S90.
Step S10, providing a substrate;
specifically, the substrate can be sapphire substrate or SiO 2 One of a sapphire composite substrate, a silicon carbide substrate, a gallium nitride substrate and a zinc oxide substrate. Sapphire is the most commonly used GaN-based LED substrate material at present, and the sapphire substrate has the greatest advantages of mature technology, good stability, easy cleaning and processing and low production cost. Therefore, in this embodiment mode, sapphire is used as a substrate.
Step S20, depositing a buffer layer on a substrate;
specifically, physical vapor deposition (Physical Vapor Deposition, PVD) can be adopted to deposit a buffer layer on the substrate, the thickness of the buffer layer is 15-20 nm, in the embodiment, an AlN buffer layer is adopted, the AlN buffer layer provides a nucleation center with the same orientation as the substrate, stress generated by lattice mismatch between an epitaxial GaN material and the substrate and thermal stress generated by thermal expansion coefficient mismatch are released, a flat nucleation surface is provided for epitaxial growth, and the contact angle of nucleation growth is reduced to enable island-shaped GaN grains to be connected into a plane in a smaller thickness, so that the island-shaped GaN grains are converted into two-dimensional epitaxial growth.
Step S30, preprocessing the substrate on which the buffer layer is deposited.
Specifically, the sapphire substrate on which the buffer layer has been deposited is transferred to a Metal-organic vapor deposition (MOCVD) device, wherein high-purity H can be adopted in the MOCVD device 2 (Hydrogen), high purity N 2 (Nitrogen) high purity H 2 And high purity N 2 Is used as carrier gas, high-purity NH 3 As N source, trimethylgallium (TMGa) and triethylgallium (TEGa) as gallium source, trimethylindium (TMIn) as indium source, trimethylaluminum (TMAL) as aluminum source, silane (SiH) 4 ) As an N-type dopant, magnesium dicyclopentadiene (CP 2 Mg) as P-type dopant.
Specifically, the substrate on which the buffer layer has been deposited is subjected to a process of H 2 The atmosphere is treated for 1-10 min, the treatment temperature is 1000-1200 ℃, and then nitriding treatment is carried out on the GaN epitaxial layer, so that the crystal quality of the buffer layer is improved, and the crystal quality of the GaN epitaxial layer deposited subsequently can be effectively improved.
In step S40, an undoped GaN layer is deposited on the buffer layer.
After nitriding the substrate on which the buffer layer is deposited, depositing an undoped GaN layer in MOCVD equipment by adopting high-purity NH 3 As an N source, trimethylgallium (TMGa) and triethylgallium (TEGa) as a gallium source; the growth temperature of the undoped GaN layer is 1050-1200 ℃, the pressure is 50-500 torr, and the thickness is 1-5 um; preferably, the growth temperature of the undoped GaN layer is 1100 ℃, the growth pressure is 150 torr, the growth temperature of the undoped GaN layer is higher, the pressure is lower, the quality of the prepared GaN crystal is better, and as the thickness of GaN is increased, the compressive stress in the undoped GaN layer can be released through stacking faults, so that the line defect is reduced, the quality of the crystal is improved, the reverse leakage current is reduced, but the method is improvedThe high GaN layer thickness consumes more Ga source material, greatly improves the epitaxial cost of the LED, and preferably, the undoped GaN layer has the growth thickness of 2-3 um, so that the production cost is saved, and the GaN material has higher crystal quality.
And S50, depositing an N-type GaN layer on the undoped GaN layer.
Specifically, after the undoped GaN layer is deposited, the N-type GaN layer is continuously deposited in MOCVD equipment, optionally, the growth temperature of the N-type GaN layer is 1050 ℃ -1200 ℃, the pressure is 100-600 torr, the thickness is 2-3 um, and the Si doping concentration is 1E+19 atoms/cm 3 ~5E+19atoms/cm 3 . Preferably, the growth temperature of the N-type GaN layer is 1120 ℃, the growth pressure is 100torr, the growth thickness is 2.5um, and the doping concentration of Si is 2.5E+19 atoms/cm 3 Firstly, the N-type GaN layer provides sufficient electrons for LED luminescence, and secondly, the resistivity of the N-type GaN layer is higher than that of the transparent electrode on the p-GaN layer, so that the resistivity of the N-type GaN layer can be effectively reduced due to sufficient Si doping, the N-type GaN layer can effectively release stress, and the luminous efficiency of the LED is improved.
And step S60, depositing a carbon impurity regulating layer on the N-type GaN layer.
Specifically, the carbon impurity regulating layer comprises a first carbon impurity regulating layer and a stacked layer deposited on the N-type GaN layer, preferably, the thickness of the first carbon impurity regulating layer is 1-100 nm, and the concentration of carbon impurities is 5E+16atoms/cm 3 ~5E+17atoms/cm 3 The first carbon impurity regulating layer is a carbon doped SiGaN layer, and the Si component in the carbon doped SiGaN layer is 0.01-0.1; the stacking layer comprises a second carbon impurity regulating layer and a third carbon impurity regulating layer which are alternately stacked on the first carbon impurity regulating layer according to a preset period, the carbon impurity concentration of the first carbon impurity regulating layer is lower than that of the second carbon impurity regulating layer, and the lattice constant of the second carbon impurity regulating layer is lower than that of the third carbon impurity regulating layer; the thickness of the second carbon impurity regulating layer is 1 nm-200 nm, and the concentration of carbon impurities is 5E+17atoms/cm 3 ~5E+18atoms/cm 3 The second carbon impurity regulating layer is a carbon-doped BGaN layer, and the component B of the carbon-doped BGaN layer is 0.01-0.5; the thickness of the third carbon impurity regulating layer is 1-50 nm, and the third carbon impurity regulating layer is carbon doped ScInGaNThe Sc component in the carbon-doped ScInGaN layer is 0.01-0.1, and the in component is 0.01-0.5; the period of alternately stacking the second carbon impurity regulating layer and the third carbon impurity regulating layer is 1-10.
Further, in this embodiment, the temperature of the deposition growth of the first carbon impurity controlling layer is 900 ℃ to 1100 ℃, preferably, the temperature of the deposition growth of the first carbon impurity controlling layer is 950 ℃; the deposition growth temperature of the stacked layers is 850-1050 ℃, preferably 900 ℃. The growth atmosphere in the deposition growth process of the carbon impurity regulating layer is N 2 /NH 3 The mixed gas with the component ratio of 1:1-1:10 is preferably N in the growth atmosphere in the deposition growth process of the carbon impurity regulating layer 2 /NH 3 A mixed gas with the component ratio of 2:3. The atmosphere pressure for the deposition and growth of the carbon impurity regulating layer is 50-500 torr, preferably 200torr.
Further, in the preparation method provided by the embodiment, after the growth of the N-type GaN layer is finished, the carbon impurity regulating layer is deposited on the N-type GaN layer, so that the energy band distortion at the interface of the N-type GaN layer and the InGaN layer is reduced, the generation of a two-dimensional electron cloud area is reduced, the invalid recombination of electrons and holes is reduced, and the luminous efficiency is improved. Further, the carbon impurity regulating layer comprises a first carbon impurity regulating layer deposited on the N-type GaN layer, and a second carbon impurity regulating layer and a third carbon impurity regulating layer which are alternately deposited on the first carbon impurity regulating layer, wherein the carbon impurity concentration of the first carbon impurity regulating layer is lower than that of the second carbon impurity regulating layer, so that the fermi energy level of the first carbon impurity regulating layer is smaller than that of the second carbon impurity regulating layer, multistage fermi energy level change is generated through the carbon impurity regulating layer, the energy band at the interface of the InGaN quantum well layer in the N-type GaN layer and the active layer is regulated, the energy band distortion is reduced, furthermore, the lattice constant of the second carbon impurity regulating layer is smaller than that of the third carbon impurity regulating layer, the compressive stress and the tensile stress applied on the epitaxial layer by the alternately grown superlattice stack layer are repeatedly changed, and the stress accumulated between the whole epitaxial layer and the substrate is effectively released.
Step S70, depositing an active layer on the carbon impurity controlling layer.
Specifically, the active layer is an InGaN quantum well layer and an AlGaN quantum barrier layer which are alternately deposited, the deposition cycle number is 6-12, and preferably, the deposition cycle is 10. The growth temperature of the InGaN quantum well layer is 790-810 ℃, the thickness is 2-nm-5 nm, the growth pressure is 50-300 torr, and the in component is 0.15-0.3; preferably, the growth temperature of the InGaN quantum well layer is 795 ℃, the thickness is 3.5nm, the growth pressure is 200torr, and the in component is 0.22. The growth temperature of the AlGaN quantum barrier layer is 800-900 ℃, the thickness is 5-nm-15 nm, the growth pressure is 50-300 torr, and the Al component is 0.01-0.1; preferably, the AlGaN quantum barrier layer has a growth temperature of 855 ℃, a thickness of 9.8nm, a growth pressure of 200torr and an Al composition of 0.05. The active layer is an area where electrons and holes are combined by radiation, and the overlapping degree of the electron and hole wave functions can be remarkably increased by reasonable structural design, so that the luminous efficiency of the LED device is improved.
In step S80, an electron blocking layer is deposited on the active layer.
Specifically, the electron blocking layer is Al a In b The thickness of the GaN layer is 10 nm-40 nm, the growth deposition temperature is 900-1000 ℃, the pressure is 100-300 torr, the Al component is 0.005-0.1, and the in component is 0.01-0.2. Preferably, the electron blocking layer has a thickness of 15. 15nm, a growth deposition temperature of 965 ℃ and a pressure of 200torr, an Al composition gradually changes from 0.01 to 0.05 along the growth direction of the epitaxial layer, and an in composition of 0.01. The electron blocking layer can not only effectively limit electron overflow, but also reduce blocking of holes, improve injection efficiency of holes to the quantum well, reduce carrier auger recombination, and improve luminous efficiency of the light emitting diode.
In step S90, a P-type GaN layer is deposited on the electron blocking layer.
Specifically, the P-type GaN layer mainly functions to provide holes to the active layer, so that electrons and holes are radiative-recombined in the active layer to emit light. The growth temperature of the P-type GaN layer is 900-1050 ℃, the thickness is 10-50 nm, the growth pressure is 100-600 torr, mg is adopted for doping, and the doping concentration is 1E+19 atoms/cm 3 ~1E+21 atoms/cm 3 Too high a Mg doping concentration can damage crystal quality, while too low a doping concentration can affect hole concentration. Preferably, the P-type GaN layer is grownThe temperature is 985 ℃, the thickness is 15nm, the growth pressure is 200torr, and the doping concentration of Mg is 2E+20 atoms/cm 3 . Meanwhile, for the LED structure with the V-shaped pits, the higher growth temperature of the P-type GaN layer is favorable for combining the V-shaped pits, so that the LED epitaxial wafer with a smooth surface is obtained.
Example 1
In this embodiment, a sapphire substrate is used. The first carbon impurity regulating layer is a carbon doped SiGaN layer, the Si component in the carbon doped SiGaN layer is 0.01, the thickness is 100nm, and the concentration of carbon impurities is 5E+16atoms/cm 3 The deposition growth temperature is 900 ℃; the second carbon impurity regulating layer is a carbon doped BGaN layer, the B component of the carbon doped BGaN layer is 0.01, the thickness is 1nm, and the concentration of carbon impurities is 5E+17atoms/cm 3 The method comprises the steps of carrying out a first treatment on the surface of the The third carbon impurity regulating layer is a carbon-doped ScInGaN layer, wherein the Sc component in the carbon-doped ScInGaN layer is 0.01, the in component is 0.01, and the thickness is 1nm; the stacking preset period of the stacking layers is 10, and the growth temperature is 850 ℃; the growth atmosphere in the deposition growth process of the carbon impurity regulating layer is N 2 /NH 3 The composition ratio of the mixed gas is 1:1, and the deposition and growth atmosphere pressure is 50torr.
Example 2
The light emitting diode in this embodiment is different from the light emitting diode in embodiment 1 in that the Si component in the carbon doped SiGaN layer is 0.05, the B component in the carbon doped BGaN layer is 0.1, the Sc component in the carbon doped scin layer is 0.05, the in component is 0.1, and the thicknesses of the first/second/third carbon impurity adjustment layers are 1nm/150nm/10nm, respectively.
Example 3
The light emitting diode in this embodiment is different from the light emitting diode in embodiment 1 in that the Si component in the carbon doped SiGaN layer is 0.1, the B component in the carbon doped BGaN layer is 0.5, the Sc component in the carbon doped scin layer is 0.1, the in component is 0.5, and the thicknesses of the first/second/third carbon impurity adjustment layers are 50nm/200nm/50nm, respectively.
Example 4
The light emitting diode in this embodiment is different from the light emitting diode in embodiment 1 in that the first/second carbon impurity controlling layer has carbon impurity concentrations of 5e+17at, respectivelyoms/cm 3 /1E+18atoms/cm 3 The preset period is 6.
Example 5
The light emitting diode in this embodiment is different from the light emitting diode in embodiment 1 in that the first/second carbon impurity controlling layer has carbon impurity concentrations of 5E+17atoms/cm, respectively 3 /1E+18atoms/cm 3 The preset period is 1.
Example 6
The light emitting diode in this embodiment is different from the light emitting diode in embodiment 1 in that the temperature at which the first carbon impurity controlling layer is grown is 1100 c and the stacked layer growth temperature is 900 c.
Example 7
The light emitting diode in this embodiment is different from the light emitting diode in embodiment 1 in that the temperature at which the first carbon impurity controlling layer is grown is 950 c and the stacked layer growth temperature is 1050 c.
Example 8
The light emitting diode in this embodiment is different from the light emitting diode in embodiment 1 in that the growth atmosphere in the deposition and growth process of the carbon impurity-controlling layer is N 2 /NH 3 The composition ratio of the mixed gas is 2:3, and the deposition and growth atmosphere pressure is 500torr.
Example 9
The light emitting diode in this embodiment is different from the light emitting diode in embodiment 1 in that the growth atmosphere in the deposition and growth process of the impurity-controlling layer is N 2 /NH 3 The composition ratio of the mixed gas is 1:10, and the deposition and growth atmosphere pressure is 200torr.
Comparative example
The light emitting diode in this comparative example is different from the light emitting diode in embodiment 1 in that there is no P-type defect blocking layer between the electron blocking layer and the P-type GaN layer in this comparative example.
Referring to table 1, the results of comparing the parameters and the corresponding light transmittance of the above examples and comparative examples are shown.
TABLE 1
As can be seen from Table 1, the light-emitting diode epitaxial wafer provided by the application has the advantage that the photoelectric efficiency is improved by 0.5% -3.5% compared with the light-emitting diode epitaxial wafer prepared by mass production at present.
It should be noted that the foregoing implementation procedure is only for illustrating the feasibility of the present application, but this does not represent that the light emitting diode of the present application has only a few implementation procedures, and may be incorporated into the feasible embodiments of the present application as long as the light emitting diode of the present application can be implemented. In addition, in the embodiment of the present application, the structural part of the light emitting diode corresponds to the part of the method for manufacturing the light emitting diode according to the present application, and the specific implementation details thereof are the same, which is not described herein again.
In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present application. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
The foregoing examples illustrate only a few embodiments of the application, which are described in detail and are not to be construed as limiting the scope of the application. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the application, which are all within the scope of the application. Accordingly, the scope of protection of the present application is to be determined by the appended claims.
Claims (9)
1. The light-emitting diode is characterized by comprising a substrate, and a buffer layer, an undoped GaN layer, an N-type GaN layer, a carbon impurity regulating layer, an active layer, an electron blocking layer and a P-type GaN layer which are sequentially deposited on the substrate;
the carbon impurity regulating layer comprises a first carbon impurity regulating layer and a stacking layer, wherein the first carbon impurity regulating layer and the stacking layer are deposited on the N-type GaN layer, the stacking layer comprises a second carbon impurity regulating layer and a third carbon impurity regulating layer which are alternately stacked on the first carbon impurity regulating layer according to a preset period, the carbon impurity concentration of the first carbon impurity regulating layer is lower than that of the second carbon impurity regulating layer, the lattice constant of the second carbon impurity regulating layer is lower than that of the third carbon impurity regulating layer, the first carbon impurity regulating layer is a carbon doped SiGaN layer, the second carbon impurity regulating layer is a carbon doped BGaN layer, and the third carbon impurity regulating layer is a carbon doped ScInGaN layer.
2. The led of claim 1, wherein the Si component of the carbon doped SiGaN layer is 0.01-0.1, the B component of the carbon doped BGaN layer is 0.01-0.5, the Sc component of the carbon doped ScInGaN layer is 0.01-0.1, and the in component is 0.01-0.5.
3. The light-emitting diode according to claim 1, wherein the first carbon impurity controlling layer has a thickness of 1nm to 100nm, the second carbon impurity controlling layer has a thickness of 1nm to 200nm, and the third carbon impurity controlling layer has a thickness of 1nm to 50nm.
4. The led of claim 1, wherein the concentration of carbon impurities in the first carbon impurity adjustment layer is 5e+16atoms/cm 3 ~5E+17atoms/cm 3 The concentration of the carbon impurities in the second carbon impurity regulating layer is 5E+17atoms/cm 3 ~5E+18atoms/cm 3 。
5. The led of claim 1, wherein the predetermined period is 1-10.
6. A method for manufacturing a light emitting diode according to any one of claims 1 to 5, comprising:
providing a substrate;
sequentially depositing a buffer layer, an undoped GaN layer, an N-type GaN layer, a carbon impurity regulating layer, an active layer, an electron blocking layer and a P-type GaN layer on the substrate;
the carbon impurity regulating layer comprises a first carbon impurity regulating layer and a stacking layer, wherein the first carbon impurity regulating layer and the stacking layer are deposited on the N-type GaN layer, the stacking layer comprises a second carbon impurity regulating layer and a third carbon impurity regulating layer which are alternately stacked on the first carbon impurity regulating layer according to a preset period, the carbon impurity concentration of the first carbon impurity regulating layer is lower than that of the second carbon impurity regulating layer, the lattice constant of the second carbon impurity regulating layer is lower than that of the third carbon impurity regulating layer, the first carbon impurity regulating layer is a carbon doped SiGaN layer, the second carbon impurity regulating layer is a carbon doped BGaN layer, and the third carbon impurity regulating layer is a carbon doped ScInGaN layer.
7. The method according to claim 6, wherein the first carbon impurity controlling layer is deposited at a temperature of 900 ℃ to 1100 ℃ and the stacked layer is deposited at a temperature of 850 ℃ to 1050 ℃.
8. The method according to claim 6, wherein the carbon impurity controlling layer is deposited and grown in a growth atmosphere of N 2 /NH 3 The component ratio of the mixed gas is 1:1-1:10.
9. The method of claim 6, wherein the carbon impurity control layer is deposited and grown at an atmosphere pressure of 50torr to 500torr.
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