CN116711066A - 半导体封装及其制造方法 - Google Patents
半导体封装及其制造方法 Download PDFInfo
- Publication number
- CN116711066A CN116711066A CN202280009620.4A CN202280009620A CN116711066A CN 116711066 A CN116711066 A CN 116711066A CN 202280009620 A CN202280009620 A CN 202280009620A CN 116711066 A CN116711066 A CN 116711066A
- Authority
- CN
- China
- Prior art keywords
- circuit board
- printed circuit
- chip
- semiconductor package
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 38
- 238000004519 manufacturing process Methods 0.000 title claims description 27
- 229910000679 solder Inorganic materials 0.000 claims abstract description 40
- 229920005992 thermoplastic resin Polymers 0.000 claims abstract description 30
- 229920005989 resin Polymers 0.000 claims abstract description 29
- 239000011347 resin Substances 0.000 claims abstract description 29
- 229920001187 thermosetting polymer Polymers 0.000 claims abstract description 27
- 239000012790 adhesive layer Substances 0.000 claims abstract description 24
- 239000003822 epoxy resin Substances 0.000 claims description 7
- 239000000463 material Substances 0.000 claims description 7
- 229920000647 polyepoxide Polymers 0.000 claims description 7
- 238000007639 printing Methods 0.000 claims description 7
- 239000004814 polyurethane Substances 0.000 claims description 5
- 229920002635 polyurethane Polymers 0.000 claims description 5
- 239000010410 layer Substances 0.000 claims 1
- 239000000853 adhesive Substances 0.000 abstract description 3
- 230000001070 adhesive effect Effects 0.000 abstract description 3
- 238000000034 method Methods 0.000 description 22
- 230000008569 process Effects 0.000 description 21
- 230000004048 modification Effects 0.000 description 6
- 238000012986 modification Methods 0.000 description 6
- 239000004593 Epoxy Substances 0.000 description 4
- 230000008901 benefit Effects 0.000 description 4
- 230000004907 flux Effects 0.000 description 4
- 230000007547 defect Effects 0.000 description 3
- 239000006071 cream Substances 0.000 description 2
- 238000007598 dipping method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- RSWGJHLUYNHPMX-UHFFFAOYSA-N Abietic-Saeure Natural products C12CCC(C(C)C)=CC2=CCC2C1(C)CCCC2(C)C(O)=O RSWGJHLUYNHPMX-UHFFFAOYSA-N 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- KHPCPRHQVVSZAH-HUOMCSJISA-N Rosin Natural products O(C/C=C/c1ccccc1)[C@H]1[C@H](O)[C@@H](O)[C@@H](O)[C@@H](CO)O1 KHPCPRHQVVSZAH-HUOMCSJISA-N 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 239000013256 coordination polymer Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005470 impregnation Methods 0.000 description 1
- 230000008595 infiltration Effects 0.000 description 1
- 238000001764 infiltration Methods 0.000 description 1
- 239000004850 liquid epoxy resins (LERs) Substances 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000010309 melting process Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000008439 repair process Effects 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- KHPCPRHQVVSZAH-UHFFFAOYSA-N trans-cinnamyl beta-D-glucopyranoside Natural products OC1C(O)C(O)C(CO)OC1OCC=CC1=CC=CC=C1 KHPCPRHQVVSZAH-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
- H01L23/293—Organic, e.g. plastic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/492—Bases or plates or solder therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
- H01L24/92—Specific sequence of method steps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/113—Manufacturing methods by local deposition of the material of the bump connector
- H01L2224/1131—Manufacturing methods by local deposition of the material of the bump connector in liquid form
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/273—Manufacturing methods by local deposition of the material of the layer connector
- H01L2224/2731—Manufacturing methods by local deposition of the material of the layer connector in liquid form
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/2901—Shape
- H01L2224/29012—Shape in top view
- H01L2224/29015—Shape in top view comprising protrusions or indentations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81192—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/812—Applying energy for connecting
- H01L2224/8121—Applying energy for connecting using a reflow oven
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/81395—Bonding interfaces outside the semiconductor or solid-state body having an external coating, e.g. protective bond-through coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/81399—Material
- H01L2224/814—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/81438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/81447—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/81399—Material
- H01L2224/8149—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81801—Soldering or alloying
- H01L2224/81815—Reflow soldering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/8185—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
- H01L2224/81855—Hardening the adhesive by curing, i.e. thermosetting
- H01L2224/81862—Heat curing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/81905—Combinations of bonding methods provided for in at least two different groups from H01L2224/818 - H01L2224/81904
- H01L2224/81906—Specific sequence of method steps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
- H01L2224/83102—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus using surface energy, e.g. capillary forces
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83191—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/832—Applying energy for connecting
- H01L2224/8321—Applying energy for connecting using a reflow oven
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
- H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
- H01L2224/83862—Heat curing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/921—Connecting a surface with connectors of different types
- H01L2224/9211—Parallel connecting processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/0665—Epoxy resin
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/069—Polyurethane
Abstract
一种半导体封装,包括:印刷电路板,该印刷电路板包括连接部;IC芯片,该IC芯片布置在所述印刷电路板上;焊料部,该焊料部布置在所述IC芯片的下表面上并且联接到所述连接部;粘合层,该粘合层布置在所述焊料部与所述连接部之间;以及底部填充胶,该底部填充胶布置在所述IC芯片与所述印刷电路板之间,其中,所述粘合层包括热固性树脂,并且所述底部填充胶包括热塑性树脂。
Description
技术领域
本实施例涉及一种半导体封装及其制造方法。
背景技术
通常,SMT设备是这样一种设备:其中,在印刷电路板的焊盘(land)上印刷焊料之后,表面安装器件的引线被对准并安装在印刷有乳状焊料的焊盘上,并且通过向安装有所述表面安装器件的印刷电路板施加红外辐射热,焊料被熔化并附接,以将表面安装器件的引线和印刷电路板的焊盘连接。
一种用于将表面安装部件组装在印刷电路板上的生产线由数种类型的装置构成。具体而言,表面安装(SMT)线配置有:电路板装载器,其用于将印刷电路板供应到所述线;丝网印刷机,其用于在安装部件之前将焊膏施加在图案上;表面安装器,其用于从表面安装部件供应卷轴装置(进料器或料盒)接收表面安装部件并将它们安装在电路板上;回流焊炉,其用于通过熔化在表面安装器将所有部件安装在电路板上之后施加的焊膏来连接部件和图案;焊料检查器,其用于检查安装状态;分类器,其用于对完成表面安装的印刷电路板进行分类;以及卸载器,其用于从所述线移除分类后的电路板。
当如上所述在表面安装装配线中完成了表面安装时,底部填充工艺对于提高芯片与电路板之间的粘附性是必要的,并且通过将完成了如上所述的表面安装的电路板转移到底部填充线(underfill line)来执行该底部填充工艺。也就是说,表面安装工艺和底部填充工艺是分离的并且在单独的线上执行。
以这种方式,传统上,当通过表面安装方法将部件安装在印刷电路板上时,因为在其中部件被表面安装的表面安装工艺之后、在芯片和电路板之间施加底部填充树脂并使其固化的底部填充工艺线被单独配置,所以设备和操作成本变高,并且因为表面安装有部件的电路板被转移到底部填充线,所以关注与该转移相关的各种问题。
发明内容
技术主题
本实施例的目的是提供一种半导体封装及其制造方法,它能够根据制造工艺的数量的减少来提高生产效率。
技术方案
根据实施例的半导体封装包括:印刷电路板,其包括连接部;IC芯片,其布置在印刷电路板上;焊料部,其布置在IC芯片的下表面上并且联接到连接部;粘合层,其布置在焊料部和连接部之间;以及底部填充胶(underfill),其布置在IC芯片和印刷电路板之间,其中,该粘合层包括热固性树脂,并且其中,底部填充胶包括热塑性树脂。
粘合层的材料可以是环氧树脂。
底部填充胶的材料可以是聚氨酯。
粘合层在上下方向上的厚度可以小于焊料部在上下方向上的厚度的一半。
底部填充胶在上下方向上的厚度可以大于焊料部在上下方向上的厚度。
根据实施例的制造半导体封装的方法包括以下步骤:(a)供应印刷电路板;(b)将热固性树脂印刷在印刷电路板上;(c)将焊膏施加到印刷电路板;(d)将IC芯片安装在印刷电路板上并且在IC芯片周围施加热塑性树脂;以及(e)固化该热固性树脂和热塑性树脂。
该热塑性树脂包括聚氨酯,并且该热固性树脂可以包括环氧树脂。
在步骤(e)之后,可以包括检查IC芯片的安装状态的步骤。
在步骤(c)之后,可以包括将IC芯片浸渍在环氧树脂中的步骤。
根据另一实施例的制造半导体封装的方法包括以下步骤:(a)供应印刷电路板;(b)将焊膏施加到印刷电路板;(c)将IC芯片浸渍在热固性树脂中;(d)将IC芯片安装在印刷电路板上并且在IC芯片周围施加热塑性树脂;以及(e)固化热固性树脂和热塑性树脂。
有利效果
通过本实施例,因为传统的底部填充工艺在半导体封装件的制造工艺中没有单独执行,所以具有生产率提高、成本降低、缺陷率降低和修复可能性的优点。
附图说明
图1是根据本发明的实施例的半导体封装的截面图。
图2是示出了根据本发明的实施例的制造半导体封装的方法的流程图。
图3是示出了根据本发明的实施例的其中在印刷电路板上形成粘合层的状态的视图。
图4是示出了根据本发明的实施例的其中将热塑性树脂施加在印刷电路板上的状态的视图。
图5是示出了图4中的热塑性树脂的固化状态的视图。
图6是示出了根据本发明的实施例的制造半导体封装的方法的变型例的流程图。
具体实施方式
在下文中,将参考附图详细地描述本发明的优选实施例。
然而,本发明的技术思想不限于将要描述的一些实施例,而是可以以各种形式来实现,并且在本发明的技术思想的范围内,构成要素中的一个或多个可以在实施例之间被选择性地组合或替换。
此外,在本发明的实施例中使用的术语(包括技术术语和科学术语),除非明确定义和描述,否则可以解释为本领域技术人员通常所能理解的含义,并且,常用术语(诸如在字典中定义的术语)可以考虑相关技术的上下文含义来解释。
此外,本说明书中使用的术语用于描述实施例,并非旨在限制本发明。
在本说明书中,单数形式可以包括复数形式,除非在短语中特别说明,并且,当被描述为“A和B和C中的至少一个(或多于一个)”时,它可以包括能够与A、B和C组合的所有组合中的一个或多个。
另外,在描述本发明的实施例的部件时,可以使用诸如“第一”、“第二”、A、B、(a)和(b)的术语。这些术语仅旨在将所述部件与其它部件区分开,并且这些术语不限制所述部件的性质、顺序或次序。
并且,当一个部件被描述为“连接”、“联接”或“互连”到其它部件时,该部件不仅直接连接、联接或互连到所述其它部件,而且还可以包括以下情况:由于另一个部件位于所述其它部件之间而“连接”、“联接”或“互连”。
此外,当被描述为形成或布置在每个部件的“上面(上方)”或“下面(下方)”时,“上面(上方)”或“下面(下方)”意味着它不仅包括两个部件直接接触的情况,而且包括一个或多个其它部件被形成或布置在这两个部件之间的情况。此外,当表达为“在上面(上方)”或“下面(下方)”时,可以包括基于一个部件的、不仅“向上方向”而且“向下方向”的含义。
图1是根据本发明的实施例的半导体封装的截面图。
参考图1,根据实施例的半导体封装100可以包括印刷电路板110、IC芯片120和底部填充胶160。
印刷电路板110被形成为板状,并且可以包括用于电连接的电路图案(未示出)。用于与IC芯片120电连接的连接部130可以布置在印刷电路板110的上表面上。连接部130可以形成所述电路图案的一部分。连接部130的材料可以包括铜。连接部130被设置为多个,并且可以彼此间隔开。IC芯片120可以通过连接部130安装在印刷电路板110上。印刷电路板110和IC芯片120可以通过连接部130电连接。
IC芯片120可以布置在印刷电路板110上。IC芯片120可以表面安装(SM)在印刷电路板110上。在IC芯片120和印刷电路板110之间,可以布置有焊料单元140,该焊料单元140将IC芯片120联接到印刷电路板110上。焊料部140可以是用于将IC芯片120安装在印刷电路板110上的焊接区域。焊料部140可以具有球形形状。焊料部140可以联接到连接部130。焊料部140和连接部130可以在上下方向上彼此面对。焊料部140和连接部130可以彼此接触。
粘合层150可以形成在连接部130和焊料部140之间。粘合层150在连接部130与焊料部140之间牢固地维持连接,并且可以布置在连接部130的上表面或焊料部140的下表面上。粘合层150的材料可以包括热固性树脂。例如,粘合层150可以包括环氧树脂。当粘合层150在稍后将描述的回流工艺中固化时,粘合层150可以将焊料部140牢固地固定在连接部130上。
粘合层150在上下方向上的厚度可以被形成为小于焊料部140在上下方向上的厚度的一半。
半导体封装100可以包括布置在印刷电路板110和IC芯片120之间的底部填充胶160。底部填充胶160可以包括热塑性树脂。例如,底部填充胶160的材料可以包括聚氨酯。底部填充胶160用作IC芯片120的结构支撑体,并且可以在结合到印刷电路板110之后利用毛细管力来喷射和形成。
底部填充胶160在上下方向上的厚度可以形成为大于焊料部140在上下方向上的厚度。
在下文中,将描述制造半导体封装100的方法。
图2是示出了根据本发明的实施例的制造半导体封装的方法的流程图;图3是示出了根据本发明的实施例的其中在印刷电路板上形成粘合层的状态的视图;图4是示出了根据本发明的实施例的其中在印刷电路板上施加热塑性树脂的状态的视图;并且图5是示出了图4中的热塑性树脂的固化状态的视图。
参考图1和图2,根据本实施例的制造半导体封装的方法包括以下步骤:通过基板供应器供应印刷电路板110(S10);在印刷电路板110上印刷热固性树脂(S20);将焊膏施加到IC芯片120被安装在印刷电路板110上的图案并且施加到其上要形成底部填充胶160的图案(S30);通过部件供应单元在印刷电路板110上供应IC芯片120并且同时在印刷电路板110上的IC芯片120周围布置热塑性树脂(S40);以及在表面安装工艺(S40)之后,通过回流焊炉加热来固化所述热固性树脂和所述热塑性树脂(S50)。除此之外,制造半导体封装的方法可以包括以下步骤:在回流工艺(S50)之后检查印刷电路板110上的IC芯片120的安装状态。
在根据现有技术的半导体封装的情况下,在将乳状焊料(焊膏)施加到印刷电路板之后, 在经历各种部件的表面安装工艺之后、在回流焊炉中进行固化。与此分开, 应执行底部填充工艺, 其中: 通过将液体环氧树脂施加到已经经历SMT工艺的印刷电路板上的诸如BGA和CP的部件的侧表面、进行渗透并然后通过固化炉再次固化它来防止诸如裂纹和弯曲的缺陷。
根据本实施例的半导体封装的制造方法的特征在于, 所述表面安装工艺和底部填充工艺能够在单个生产线中执行。
具体地,在将热固性树脂印刷在印刷电路板110上的步骤(S20)中,在半导体封装10中形成粘合层150的上述步骤中, 如图3所示,环氧树脂可以以凝胶型树脂的形式被印刷在印刷电路板110上。在本实施例中, 例示了热固性树脂被印刷在印刷电路板110上,但这不限于此,而是热固性树脂可以印刷在与印刷电路板110联接的IC芯片120的下表面上。
此外,在IC芯片120周围布置热塑性树脂的步骤(S40)中, 如图4所示,该热塑性树脂可以沿着IC芯片120的外周施加在印刷电路板110的上表面上。在图4中, 作为一个示例,多条热塑性树脂被设置和布置成相对于IC芯片120彼此面对。该热塑性树脂具有字母形状的横截面,并且可以布置成围绕IC芯片120的三个侧面。多条热塑性树脂可以彼此间隔开。在这种情况下, 该热塑性树脂仅被例示为具有字母/>形状的横截面,但示例可以变化, 例如字母“口”和字母/>形状。
因此,如图5所示,通过回流工艺(S50)来固化热塑性树脂,可以在半导体封装件100内形成底部填充胶160。
总之,通过回流工艺(S50)来硬化热固性树脂,以将焊料部140牢固地固定在连接部130上,并且该热塑性树脂可以通过毛细管效应(capillarity)渗入IC芯片120中并牢固地固定印刷电路板110与IC芯片120之间的联接状态。
同时,半导体封装100可以额外经历二次回流工艺,并且在这种情况下,有以下优点:由于在焊料部140的熔化过程期间的粘合层150的热固性特性,粘合层150能够支持焊料部140的流动。
图6是示出了根据本发明的实施例的制造半导体封装的方法的变型例的流程图。
在本变型例中,其它部分与上述实施例相同,但是根据通过热固性树脂的粘合层形成结构,存在差异。因此,下文将仅描述本变型例的特征部分,并且对其余部分将使用上述实施例的描述。
参考图6,制造半导体封装的方法可以包括以下步骤:通过基板供应器供应印刷电路板110(S110);将焊膏施加到IC芯片120被安装在印刷电路板110上的图案并且施加到其上将形成底部填充胶160的图案(S120);在将IC芯片120浸渍在热固性树脂中之后,在印刷电路板110(S130)上进行表面安装;在印刷电路板110上的IC芯片120周围布置热塑性树脂(S140);以及在表面安装工艺(S140)之后,通过回流焊炉加热,并且固化所述热固性树脂和所述热塑性树脂(S150)。
因此,在本变型例中,可以通过浸渍将用于形成粘合层150的热固性树脂(例如,环氧树脂)施加到与印刷电路板110联接的IC芯片120的结合表面。该浸渍工艺可以通过将IC芯片120浸渍在环氧助焊剂(它是凝胶型树脂)中并将其向上提升来执行。因为环氧助焊剂不是松香助焊剂,所以在回流步骤(S150)中不存在热固性树脂的残留助焊剂,因此存在不需要单独的清洁或固化工艺的优点。
同时,已经将通过热固性树脂形成粘合层150的步骤分开地描述为在印刷电路板110上印刷的步骤和浸渍IC芯片120的步骤,但不必排他地实现此步骤,当然,在印刷电路板110上印刷的步骤和浸渍IC芯片120的步骤可以在单个半导体封装制造工艺中一起执行。
根据如上所述的结构,因为在半导体封装的制造工艺中没有单独地执行传统的底部填充工艺,所以存在生产率提高、成本降低、缺陷率降低和可修复的优点。
在上面的描述中,描述了构成本发明的实施例的所有部件被组合或操作为一体,但本发明不必限于这些实施例。换句话说,在本发明的范围内,所有部件可以选择性地与一个或多个组合操作。另外,上述术语“包含”、“包括”或“具有”意味着对应的部件可能是固有的(除非另有特别说明),因此应被解释为不排除其它部件,而是反而还包括其它部件。所有术语(包括技术术语和科学术语)具有与本领域普通技术人员通常理解的相同含义,除非另有定义。通常使用的术语(例如字典中定义的术语)应被解释为与相关技术的上下文含义一致,并且除非在本发明中明确地定义,否则不应被解释为理想的或过于正式的意义。
上面的描述仅仅是对本发明的技术思想的说明,并且本发明所属领域的技术人员可以在不脱离本发明的本质特征的情况下做出各种更改和变化。因此,本发明中公开的实施例并非旨在限制本发明的技术思想,而是旨在描述本发明,并且本发明的技术思想的范围不受这些实施例限制。本发明的保护范围应通过所附的权利要求来解释,并且在等效范围内的所有技术思想应被解释为包括在本发明的范围内。
Claims (10)
1.一种半导体封装,包括:
印刷电路板,所述印刷电路板包括连接部;
IC芯片,所述IC芯片布置在所述印刷电路板上;
焊料部,所述焊料部布置在所述IC芯片的下表面上并且联接到所述连接部;
粘合层,所述粘合层布置在所述焊料部和所述连接部之间;以及
底部填充胶,所述底部填充胶布置在所述IC芯片和所述印刷电路板之间,
其中,所述粘合层包括热固性树脂,并且
其中,所述底部填充胶包括热塑性树脂。
2.根据权利要求1所述的半导体封装,
其中,所述粘合层的材料是环氧树脂。
3.根据权利要求1所述的半导体封装,
其中,所述底部填充胶的材料是聚氨酯。
4.根据权利要求1所述的半导体封装,
其中,所述粘合层在上下方向上的厚度小于所述焊料部在上下方向上的厚度的一半。
5.根据权利要求1所述的半导体封装,
其中,所述底部填充胶在上下方向上的厚度大于所述焊料部在上下方向上的厚度。
6.一种半导体封装的制造方法,包括以下步骤:
(a)供应印刷电路板;
(b)将热固性树脂印刷在所述印刷电路板上;
(c)将焊膏施加到所述印刷电路板;
(d)将IC芯片安装在所述印刷电路板上并且在所述IC芯片周围施加热塑性树脂;以及
(e)固化所述热固性树脂和所述热塑性树脂。
7.根据权利要求6所述的半导体封装的制造方法,
其中,所述热塑性树脂包括聚氨酯,并且
其中,所述热固性树脂包括环氧树脂。
8.根据权利要求6所述的半导体封装的制造方法,包括以下步骤:
在所述步骤(e)之后,检查所述IC芯片的安装状态。
9.根据权利要求8所述的半导体封装的制造方法,包括以下步骤:
在所述步骤(c)之后,将所述IC芯片浸渍在环氧树脂中。
10.一种半导体封装的制造方法,包括以下步骤:
(a)供应印刷电路板;
(b)将焊膏施加到所述印刷电路板;
(c)将IC芯片浸渍在热固性树脂中;
(d)将所述IC芯片安装在所述印刷电路板上并且在所述IC芯片周围施加热塑性树脂;以及
(e)固化所述热固性树脂和所述热塑性树脂。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020210006590A KR20220104388A (ko) | 2021-01-18 | 2021-01-18 | 반도체 패키지 및 그 제조방법 |
KR10-2021-0006590 | 2021-01-18 | ||
PCT/KR2022/000942 WO2022154648A1 (ko) | 2021-01-18 | 2022-01-18 | 반도체 패키지 및 그 제조방법 |
Publications (1)
Publication Number | Publication Date |
---|---|
CN116711066A true CN116711066A (zh) | 2023-09-05 |
Family
ID=82447457
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202280009620.4A Pending CN116711066A (zh) | 2021-01-18 | 2022-01-18 | 半导体封装及其制造方法 |
Country Status (5)
Country | Link |
---|---|
EP (1) | EP4280268A1 (zh) |
JP (1) | JP2024502563A (zh) |
KR (1) | KR20220104388A (zh) |
CN (1) | CN116711066A (zh) |
WO (1) | WO2022154648A1 (zh) |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3533665B1 (ja) * | 2002-12-17 | 2004-05-31 | オムロン株式会社 | 電子部品モジュールの製造方法、並びに電磁波読み取り可能なデータキャリアの製造方法。 |
KR100823699B1 (ko) * | 2006-11-29 | 2008-04-21 | 삼성전자주식회사 | 플립칩 어셈블리 및 그 제조 방법 |
KR101208405B1 (ko) * | 2010-12-13 | 2012-12-05 | 권오태 | 고형화된 에폭시를 부품의 형태로 공급하여 언더필 공정을 표면 실장과 동시에 수행하는 표면실장 시스템 및 방법 |
KR20140102597A (ko) * | 2011-12-22 | 2014-08-22 | 파나소닉 주식회사 | 전자부품 실장라인 및 전자부품 실장방법 |
US10703939B2 (en) * | 2016-08-10 | 2020-07-07 | Panasonic Intellectual Property Management Co., Ltd. | Acrylic composition for sealing, sheet material, multilayer sheet, cured product, semiconductor device and method for manufacturing semiconductor device |
-
2021
- 2021-01-18 KR KR1020210006590A patent/KR20220104388A/ko unknown
-
2022
- 2022-01-18 EP EP22739840.1A patent/EP4280268A1/en active Pending
- 2022-01-18 JP JP2023538996A patent/JP2024502563A/ja active Pending
- 2022-01-18 WO PCT/KR2022/000942 patent/WO2022154648A1/ko active Application Filing
- 2022-01-18 CN CN202280009620.4A patent/CN116711066A/zh active Pending
Also Published As
Publication number | Publication date |
---|---|
JP2024502563A (ja) | 2024-01-22 |
WO2022154648A1 (ko) | 2022-07-21 |
EP4280268A1 (en) | 2023-11-22 |
KR20220104388A (ko) | 2022-07-26 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6046910A (en) | Microelectronic assembly having slidable contacts and method for manufacturing the assembly | |
EP2141972B1 (en) | Component-incorporating module and its manufacturing method | |
US5862588A (en) | Method for restraining circuit board warp during area array rework | |
US6821878B2 (en) | Area-array device assembly with pre-applied underfill layers on printed wiring board | |
US6137183A (en) | Flip chip mounting method and semiconductor apparatus manufactured by the method | |
US7875496B2 (en) | Flip chip mounting method, flip chip mounting apparatus and flip chip mounting body | |
JP4617978B2 (ja) | 配線基板の製造方法 | |
JP2001298052A (ja) | 接着剤を用いた半導体素子のフリップチップアセンブリ方法 | |
KR19990036235A (ko) | 반도체 소자의 실장 방법 | |
KR19980064439A (ko) | 기판에 땜납을 형성하기 위한 방법 및 장치 | |
US9865479B2 (en) | Method of attaching components to printed cirucuit board with reduced accumulated tolerances | |
US8061022B2 (en) | Method for manufacturing hybrid printed circuit board | |
US6484927B1 (en) | Method and apparatus for balling and assembling ball grid array and chip scale array packages | |
CN112534971B (zh) | 通过使用粘合剂材料防止vippo焊点中的回流后互连失效 | |
KR100738246B1 (ko) | 전기적 접속 재료 및 전기적 접속 방법 | |
JP4849926B2 (ja) | 半導体装置及び半導体装置の製造方法 | |
CN116711066A (zh) | 半导体封装及其制造方法 | |
US20030205799A1 (en) | Method and device for assembly of ball grid array packages | |
US20240136322A1 (en) | Semiconductor package and manufacturing method therefor | |
JP2002299809A (ja) | 電子部品の実装方法および実装装置 | |
KR100887685B1 (ko) | 전자소자 내장 인쇄회로기판의 제조방법 | |
US10849238B1 (en) | Removable lid for IC reflow | |
KR20030095036A (ko) | 플립 칩 패키지의 솔더 범프 연결방법 | |
KR20070062645A (ko) | 패키지 온 패키지 기판 및 그 제조방법 | |
JP2006073742A (ja) | 電子回路モジュールとその製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination |