CN116699375B - High-temperature testing method and device for FPGA chip - Google Patents
High-temperature testing method and device for FPGA chip Download PDFInfo
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Abstract
The invention provides a method and a device for testing an FPGA chip at high temperature, which are characterized in that a normal temperature test board is used, the correct calculation result of test data is prestored on the normal temperature test board, and the calculation result of the test data on the high temperature test board is compared with the correct calculation result on the normal temperature test board, so that the normal temperature test board and the high temperature test board are connected through parallel data lines and control signal lines, and the parallel data transmission rate can be the same as a calculation clock, so that the data can be rapidly compared through the parallel data lines, the test speed is improved, the parallel data transmission rate reaches 10MHz, the serial communication is less than 1MHz, the transmission bandwidth is more than 100 times of the original calculation flip in the high temperature FPGA within the same test time, and the test strength is improved.
Description
Technical Field
The invention belongs to the field of FPGA (field programmable gate array) testing, and particularly relates to a method and a device for testing an FPGA chip at a high temperature.
Background
With the continuous expansion of research of human beings in the extremely high-temperature fields such as deep exploration of the earth, deep space exploration and the like, the working environment temperature of the used instruments is continuously increased, the maximum deep exploration depth of the earth in China reaches 7km, the temperature is up to 210 ℃, the environment temperature of an astronaut in outer space is up to several hundred degrees, and in order to adapt to the working conditions of deep exploration and deep space exploration high-temperature environment, the high-temperature test of electronic components in high-temperature instruments is an indispensable link. The FPGA product belongs to a common core electronic component, and the high-temperature test accuracy and efficiency of the FPGA product are critical to the development of subsequent high-temperature equipment.
The high-temperature test of the FPGA chip mainly comprises the step of verifying that main resources are used in a certain proportion and are in a high-temperature environment, and the main resources of the chip are: LUT, DSP, RAM, IO can be calculated, stored and transmitted normally.
The high temperature test method currently used is shown in fig. 2, which is: and placing a tested FPGA on a high-temperature test board, corresponding to the FPGA, wherein the FPGA is provided with a corresponding curing FLASH, a working LED lamp, a JTAG line, a communication line, a power supply and the like, the FPGA converts parallel data calculated and stored by using resources such as an LUT, a DSP, a RAM and the like into serial data, the serial data is sent to an upper computer through a serial port, the upper computer analyzes the data after receiving the serial data, and then the data is compared with correct calculation result data stored locally by the upper computer, so that the corresponding LED lamp on the high-temperature test board is lightened according to the wrong resource type. The prior art has the following technical defects:
1. only one FPGA chip on a high-temperature test board can be tested at the same time, and the parallel operation cannot be realized;
2. the IO pins are few in use, and the test is insufficient;
3. data is transmitted through a serial port, the testing speed is low, and the efficiency is low.
Disclosure of Invention
The invention provides a method and a device for testing an FPGA chip at high temperature, which aims to solve the technical problem of improving the high-temperature testing efficiency of the FPGA chip.
In order to solve the technical problems, the invention adopts the following technical scheme:
a high-temperature testing method of an FPGA chip comprises the following steps:
step 1: taking a plurality of high-temperature test boards to be tested, and respectively connecting the high-temperature test boards with a normal-temperature test board, wherein the normal-temperature test board is a board card provided with an FPGA chip;
step 2: loading a data set for testing on the high-temperature test board, sequentially calculating the data of the data set on the high-temperature test board according to the number, and sending the calculation result and the number of the current data to the normal-temperature test board;
step 3: and the normal temperature test board reads the pre-stored data correct calculation result of the serial number from the storage space of the normal temperature test board according to the serial number of the data, if the data comparison of the serial number is completed, a group of signal indication of the data comparison completion is given, the high temperature test board continues to perform the data test of the next serial number, and meanwhile, if the comparison result is wrong, an error indication is given.
Further, the high-temperature test board is connected with the normal-temperature test board through a parallel data bus and a control signal line, the parallel data bus sends a data test result on the high-temperature test board to the normal-temperature test board, the control signal line feeds back a group of data comparison completed signals on the normal-temperature test board to the high-temperature test board, and the high-temperature test board is enabled to continue to perform data calculation of the next number.
Further, error sign LED lamps are arranged on the normal temperature test boards, the number of the error sign LEDs is the same as and corresponds to the number of the high temperature test boards connected to the normal temperature test boards one by one, and when the data calculation result on one high temperature test board is compared with errors, the corresponding error sign LED lamps are on to give out error prompts.
Further, an error counter is arranged on the normal temperature test board, and the number of comparison errors on a high temperature test board in a test time period is counted.
Further, the maximum number of high temperature test boards connected to the normal temperature test board depends on the number of FPGA pins of the normal temperature test board and the number of bits of the parallel data bus and the control signal lines.
The invention also provides a high-temperature testing device for the FPGA chip, which comprises a normal-temperature testing board, a plurality of high-temperature testing boards to be tested, wherein the high-temperature testing boards are connected with the normal-temperature testing board, a testing data set for calculating by using the high-temperature testing boards is loaded on the high-temperature testing board, the calculation results of the testing data on each high-temperature testing board are respectively stored in the storage space of the normal-temperature testing board in advance, the calculation results of the testing data are sent to the normal-temperature testing board by the high-temperature testing board, the normal-temperature testing board is compared with the correct calculation results of the corresponding data stored in advance on the normal-temperature testing board, and the normal-temperature testing board is a board card provided with the FPGA chip.
Further, after the data calculation result of one number on the high-temperature test board is compared with the correct calculation result on the normal-temperature test board, the normal-temperature test board sends a feedback signal to the high-temperature test board to perform data calculation of the next number.
Further, error sign LED lamps are arranged on the normal temperature test boards, the number of the error sign LEDs is the same as and corresponds to the number of the high temperature test boards connected to the normal temperature test boards one by one, and when the data calculation result on one high temperature test board is compared with errors, the corresponding error sign LED lamps are on to give out error prompts.
Further, the high-temperature test board is connected with the normal-temperature test board through a parallel data bus and a control signal line, the parallel data bus sends a data test result on the high-temperature test board to the normal-temperature test board, the control signal line feeds back a signal for completing a group of data comparison on the normal-temperature test board to the high-temperature test board, and the high-temperature test board is enabled to continue to perform data calculation of the next number.
Further, the maximum number of high temperature test boards connected to the normal temperature test board depends on the number of FPGA pins of the normal temperature test board and the number of bits of the parallel data bus and the control signal lines.
By adopting the technical scheme, the invention has the following beneficial effects:
according to the high-temperature testing method and device for the FPGA chip, the normal-temperature testing board which stores the correct calculation result of the testing data in advance and compares the calculation result with the calculation result of the high-temperature testing board is used, whether errors occur or not can be known through comparison, so that the normal-temperature testing board can be used for replacing an upper computer, the normal-temperature testing board is used as a board card with the FPGA chip, pins are rich, a plurality of high-temperature testing boards can be connected for testing at the same time, only the correct calculation result of the testing data of the plurality of high-temperature testing boards is needed to be stored on the normal-temperature testing board, in addition, the normal-temperature testing board and the high-temperature testing board are connected through parallel data lines and control signal lines, and the parallel data transmission rate can be the same as the calculation clock, and therefore the parallel data can be rapidly compared through the parallel data lines, the testing speed is improved, the test shows that the parallel data transmission rate reaches 10MHz, serial communication is below 1MHz, the transmission bandwidth is more than 100 times of the original time, and the calculation efficiency in the high-temperature FPGA is greatly improved within the same testing time, and the testing strength is improved.
In addition, the high temperature test board is connected with the normal temperature test board for comparison, so that an upper computer is not required to be configured, the normal temperature test board can be directly used by using one high temperature test board, only test data and calculation programs are loaded on the high temperature test board, and the normal temperature test board is loaded with the comparison programs and correct calculation results of the test data of each high temperature test board stored in advance. Therefore, the invention is simple and convenient, and the system design is simple.
Drawings
FIG. 1 is a schematic diagram of a test system according to the present invention;
FIG. 2 is a schematic diagram of a conventional high temperature test system.
Detailed Description
The following description of the embodiments of the present invention will be made apparent and fully in view of the accompanying drawings, in which some, but not all embodiments of the invention are shown. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Fig. 1 shows a specific embodiment of a method for testing an FPGA chip at high temperature according to the present invention, including the following steps:
step 1: and taking a plurality of high-temperature test boards to be tested, and respectively connecting the high-temperature test boards with a normal-temperature test board, wherein the normal-temperature test board is a board card provided with an FPGA chip.
In this embodiment, the high-temperature test board is connected with the normal-temperature test board through a parallel data bus and a control signal line, the parallel data bus sends a data test result on the high-temperature test board to the normal-temperature test board, and the control signal line feeds back a group of data comparison completed signals on the normal-temperature test board to the high-temperature test board, and enables the high-temperature test board to continue to perform data calculation of the next number. The parallel data lines can be used for rapidly carrying out transmission comparison on data, the test speed is improved, and experiments show that the parallel data transmission rate reaches 10MHz, the serial communication is below 1MHz, the transmission bandwidth is 100 times of the original transmission bandwidth, the calculation turnover in the high-temperature FPGA is greatly improved within the same test time, and the test strength is improved.
Because the upper computer has fewer IO pins and can only use serial communication, the upper computer can only be connected with one high-temperature test board for detection at the same time, and cannot be connected with a plurality of high-temperature test boards at the same time, but if a normal-temperature test board which is the same as or different from the high-temperature test board structure is used, because the normal-temperature test board is a board card provided with an FPGA chip, the pins are abundant, the upper computer can be simultaneously connected with a plurality of high-temperature test boards for testing, only the correct calculation results of the test data of the plurality of high-temperature test boards are stored on the normal-temperature test board and compared with the calculation results of the high-temperature test boards, the upper computer is not required to be independently configured, the plurality of high-temperature test boards can be simultaneously connected, the plurality of high-temperature test boards can be used for carrying out test work in parallel, and parallel data lines are used for data transmission, so that the test efficiency is greatly improved. Because normal atmospheric temperature test board is just a integrated circuit board of placing the FPGA chip, consequently can take a high temperature test board as normal atmospheric temperature test board to use, need not prepare in addition normal atmospheric temperature test board, so the structure of normal atmospheric temperature test board and the structure of high temperature test board all can the same or different, simple and convenient.
Step 2: and loading a data set for testing on the high-temperature test board, sequentially calculating the data of the data set on the high-temperature test board according to the number, and sending the calculation result and the number of the current data to the normal-temperature test board.
Step 3: and the normal temperature test board reads the pre-stored data correct calculation result of the serial number from the storage space of the normal temperature test board according to the serial number of the data, if the data comparison of the serial number is completed, a group of signal indication of the data comparison completion is given, the high temperature test board continues to perform the data test of the next serial number, and meanwhile, if the comparison result is wrong, an error indication is given.
In this embodiment, as shown in fig. 1, a plurality of data in a test data set are numbered and sequentially loaded onto a high-temperature test board to perform a test, so as to determine whether the high-temperature test board calculates the test data correctly in a high-temperature environment, so that only by sending the calculation result of the high-temperature test board in the high-temperature environment to a normal-temperature test board as data to be compared, the normal-temperature test board can verify whether the high-temperature test board works normally in the high-temperature environment by reading the correct calculation result of the test data in the same number from a storage space and comparing, and by the comparison method provided by the invention, whether the high-temperature test board is abnormal can be detected without an upper computer. Because the data set loaded on the high-temperature test board is circularly fixed, the data is directly and parallelly sent to the calculation result after calculation, the number on the data set is carried during sending, and the normal-temperature test board reads the data with the corresponding number from the storage space to compare the correct calculation result after receiving the data with the corresponding number.
In fig. 1, one normal temperature test board is connected with 4 high temperature test boards, and the maximum number of high temperature test boards connected with the normal temperature test board depends on the number of FPGA pins on the normal temperature test board and the number of bits of parallel data buses and control signal lines. The high temperature test board is connected with the normal temperature test board through parallel data bus and control signal line, and assuming that the parallel data bus adopts 16 bits and the control signal line adopts 10 bits, 26 pins are required for connection of one high temperature test board with the normal temperature test board, and if more pins are arranged on the normal temperature test board, more high temperature test boards are connected. In fig. 1, the calculation result of the test data is sent to the normal temperature test board through the parallel data line as the data to be compared, the normal temperature test board sends a group of signals with the data being compared, namely the comparison feedback signals, to the high temperature test board through the control signal bus, and if the group of data is compared, the high temperature test board continues to test the next numbered data.
In this embodiment, error flag LED lamps are disposed on the normal temperature test board, the number of the error flag LEDs is the same as and corresponds to the number of the high temperature test boards connected to the normal temperature test board, and when the data calculation result on a certain high temperature test board is compared with errors, the corresponding error flag LED lamps are on, and an error prompt is given.
In this embodiment, if the comparison is incorrect, the indication is given through the indicator light, and of course, if the comparison is correct, the indication can be given through the LED lamp, for example, the error sign LED lamp is normally on when the comparison is incorrect, and when the comparison is correct, the error sign LED lamp flashes at a fixed frequency, and meanwhile, the control signal line controls the high-temperature test board to test the next numbered data. Generally, a test time period is about ten clock cycles, and a result of whether a high-temperature test board is normal in a high-temperature environment can be obtained.
In this embodiment, an error counter is disposed on the normal temperature test board, and the number of comparison errors on a high temperature test board in a test period is counted. By counting, the number of times that each high-temperature test board has errors in a test time period can be counted and used for evaluating the high-temperature test boards.
The invention also provides a high-temperature testing device for the FPGA chip, which comprises a normal-temperature testing board, a plurality of high-temperature testing boards to be tested, wherein the high-temperature testing boards are connected with the normal-temperature testing board, a testing data set for calculating by using the high-temperature testing boards is loaded on the high-temperature testing board, the calculation results of the testing data on each high-temperature testing board are respectively stored in the storage space of the normal-temperature testing board in advance, the calculation results of the testing data are sent to the normal-temperature testing board by the high-temperature testing board, the normal-temperature testing board is compared with the correct calculation results of the corresponding data stored in advance on the normal-temperature testing board, and the normal-temperature testing board is a board card provided with the FPGA chip.
In this embodiment, the high-temperature test board is connected with the normal-temperature test board through a parallel data bus and a control signal line, the parallel data bus sends a data test result on the high-temperature test board to the normal-temperature test board, and the control signal line feeds back a signal on the normal-temperature test board, which completes a group of data comparison, to the high-temperature test board, and enables the high-temperature test board to continue the data calculation of the next number. The parallel data lines can be used for rapidly carrying out transmission comparison on data, the test speed is improved, and experiments show that the parallel data transmission rate reaches 10MHz, the serial communication is below 1MHz, the transmission bandwidth is 100 times of the original transmission bandwidth, the calculation turnover in the high-temperature FPGA is greatly improved within the same test time, and the test strength is improved.
Because the upper computer has fewer IO pins and can only use serial communication, the upper computer can only be connected with one high-temperature test board for detection at the same time, and cannot be connected with a plurality of high-temperature test boards at the same time, but if a normal-temperature test board which is the same as or different from the high-temperature test board structure is used, because the normal-temperature test board is a board card provided with an FPGA chip, the pins are abundant, the upper computer can be simultaneously connected with a plurality of high-temperature test boards for testing, only the correct calculation results of the test data of the plurality of high-temperature test boards are stored on the normal-temperature test board and compared with the calculation results of the high-temperature test boards, the upper computer is not required to be independently configured, the plurality of high-temperature test boards can be simultaneously connected, the plurality of high-temperature test boards can be used for carrying out test work in parallel, and parallel data lines are used for data transmission, so that the test efficiency is greatly improved. Because the normal temperature test board is a board card with the FPGA chip, a high temperature test board can be taken as the normal temperature test board for use, and the normal temperature test board does not need to be prepared in addition, so that the structure of the normal temperature test board is the same as or different from that of the high temperature test board, and the normal temperature test board is simple and convenient.
In this embodiment, error flag LED lamps are disposed on the normal temperature test board, the number of the error flag LEDs is the same as and corresponds to the number of the high temperature test boards connected to the normal temperature test board, and when the data calculation result on a certain high temperature test board is compared with errors, the corresponding error flag LED lamps are on, and an error prompt is given. If the comparison is wrong, the indication lamp is used for giving a prompt, and if the comparison is correct, the LED lamp can be used for giving a prompt, for example, the error mark LED lamp is normally on when the comparison is wrong, the error mark LED lamp flashes at a fixed frequency when the comparison is correct, and meanwhile, the control signal line is used for controlling the high-temperature test board to test the next numbered data. Generally, a test time period is about ten clock cycles, and a result of whether a high-temperature test board is normal in a high-temperature environment can be obtained.
In this embodiment, the maximum number of high temperature test boards connected to the normal temperature test board depends on the number of FPGA pins of the normal temperature test board and the number of bits of the parallel data bus and the control signal line. The high-temperature test board is connected with the normal temperature test board through the parallel data bus and the control signal line, the number of bits occupied by the parallel data bus and the control signal line, namely the number of pins connected is fixed, so that the more pins on the normal temperature test board are, the more the high-temperature test boards are connected.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present invention, and not for limiting the same; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some or all of the technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the invention.
Claims (8)
1. The high-temperature testing method for the FPGA chip is characterized by comprising the following steps of:
step 1: taking a plurality of high-temperature test boards to be tested, respectively connecting the high-temperature test boards with a normal-temperature test board, wherein the normal-temperature test board and the high-temperature test board are board cards with FPGA chips; the normal temperature test board is carried out by using a high temperature test board; the maximum number of the high-temperature test boards connected with the normal-temperature test boards depends on the number of FPGA pins of the normal-temperature test boards and the number of bits of the parallel data buses and the control signal lines;
step 2: loading a data set and a calculation program for testing on the high-temperature test board, loading a comparison program on the normal-temperature test board, and pre-storing the correct calculation result of the test data of each high-temperature test board, wherein the data of the data set are sequentially calculated on the high-temperature test board according to the number, and the calculation result and the number of the current data are transmitted to the normal-temperature test board together;
step 3: and the normal temperature test board reads the correct calculation result of the pre-stored serial number data from the storage space of the normal temperature test board according to the serial number of the data, compares the correct calculation result with the calculation result of the serial number data on the high temperature test board through the comparison program on the normal temperature test board, does not need to be configured with an upper computer, gives a group of signal indication of the data comparison completion if the data comparison of the serial number is completed, enables the high temperature test board to continue the data test of the next serial number, and gives an error indication if the comparison result is wrong.
2. The method for testing the high temperature of the FPGA chip according to claim 1, wherein the high temperature test board and the normal temperature test board are connected through a parallel data bus and a control signal line, the parallel data bus sends a data test result on the high temperature test board to the normal temperature test board, the control signal line feeds back a group of data comparison completed signals on the normal temperature test board to the high temperature test board, and the high temperature test board continues to perform data calculation of the next number.
3. The method for testing the high temperature of the FPGA chip according to claim 2, wherein error mark LED lamps are arranged on the normal temperature test boards, the number of the error mark LED lamps is the same as and corresponds to the number of the high temperature test boards connected to the normal temperature test boards one by one, and when the data calculation result on one high temperature test board is compared with errors, the corresponding error mark LED lamps are on to give error prompts.
4. The method for testing the high temperature of the FPGA chip according to claim 3, wherein an error counter is arranged on the normal temperature test board, and the number of comparison errors on the high temperature test board in a test period is counted.
5. The high-temperature testing device for the FPGA chip is characterized by comprising a normal-temperature testing board and a plurality of high-temperature testing boards to be tested, wherein the high-temperature testing boards are connected with the normal-temperature testing boards, a testing data set and a calculating program for calculating by using the high-temperature testing boards are loaded on the high-temperature testing boards, the normal-temperature testing boards are loaded with a comparison program and prestored with correct calculation results of test data of the high-temperature testing boards, after the calculation results of the test data are sent to the normal-temperature testing boards by the high-temperature testing boards, the correct calculation results of the corresponding data prestored on the normal-temperature testing boards are compared with the comparison program on the normal-temperature testing boards, an upper computer is not required to be configured, the normal-temperature testing boards and the high-temperature testing boards are board cards with the FPGA chip, the normal-temperature testing boards are used, and the maximum number of pins of the FPGA pins of the normal-temperature testing boards connected with the normal-temperature testing boards and the number of bits of parallel data buses and control signal lines are determined.
6. The FPGA chip high-temperature testing apparatus of claim 5, wherein after the data calculation result of one number on the high-temperature testing board is compared with the correct calculation result on the normal-temperature testing board, the normal-temperature testing board sends a feedback signal to the high-temperature testing board to perform the data calculation of the next number.
7. The high-temperature testing device for the FPGA chip according to claim 6, wherein error mark LED lamps are arranged on the normal-temperature testing boards, the number of the error mark LED lamps is the same as and corresponds to the number of the high-temperature testing boards connected to the normal-temperature testing boards one by one, and when the data calculation result on one high-temperature testing board is compared with errors, the corresponding error mark LED lamps are on to give error prompts.
8. The device for testing the high temperature of the FPGA chip according to claim 5, wherein the high temperature test board and the normal temperature test board are connected through a parallel data bus and a control signal line, the parallel data bus sends the data test result on the high temperature test board to the normal temperature test board, the control signal line feeds back a signal for completing a group of data comparison on the normal temperature test board to the high temperature test board, and the high temperature test board continues to perform the data calculation of the next number.
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