CN100416284C - Cable testing device and method - Google Patents

Cable testing device and method Download PDF

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CN100416284C
CN100416284C CN 02136551 CN02136551A CN100416284C CN 100416284 C CN100416284 C CN 100416284C CN 02136551 CN02136551 CN 02136551 CN 02136551 A CN02136551 A CN 02136551A CN 100416284 C CN100416284 C CN 100416284C
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test
jtag
device
cable
standard
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CN 02136551
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CN1475810A (en )
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毕毓龙
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中兴通讯股份有限公司
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Abstract

电缆测试的装置其测试矢量生成和检测设备的一端与JTAG器件A3、电缆插头A顺序连接,另一端与JTAG器件B、电缆插头B顺序连接。 One end of the cable and the JTAG testing device A3 means the test vector generation and detection equipment, cable plug A sequence, and the other end B and the JTAG device, the cable connector B is connected sequentially. 方法有:1.在测试矢量生成和检测设备中,生成标准输入测试矢量;2.将标准电缆的一段标准电缆分别与测试矢量生成和检测设备中的JTAG器件A、JTAG器件B连接起来,得到该类电缆的一段标准测试输出矢量;3.把被测电缆的两端分别与JTAG器件A,和JTAG器件B连接起来,得到被测电缆的测试输出矢量;4.将被测电缆的输出测试矢量表,与标准电缆的标准输出测试矢量表进行对比,如果结果相同,则说明被测电缆无故障,否则说明该电缆有故障(短路或者断路)。 Method: 1 test vector generation and detection device, generate standard input test vector; 2 a section of standard cables standard cable respectively generating and detecting apparatus JTAG device A and test vectors, JTAG device B are connected together, to give. some standard tests such cable output vector;. 3 are connected to both ends of the cable under test and the JTAG devices a, B, and up JTAG device, the output vector to obtain the test cable under test; 4. the output test cable under test vector table, compared with the standard output test vector table of standard cable, if the same result, then the cable under test without failure, otherwise indicating that the cable failure (short circuit or open circuit). 本发明适用任一电缆测试。 The present invention is applicable to any of a cable testing.

Description

--种电缆测试装置及方法技术领域本发明属于测量装置及方法类,尤其涉及电缆的测试装置及方法。 - special cable testing apparatus and methods Technical Field The present invention pertains to apparatus and method for measuring the class, and particularly to apparatus and method for testing cables. 背景技术在通讯设备(或其它电子设备)中,应用了大量电缆,如背板电缆等,用于连接系统内部的各个模块传递通讯信号。 Background Art In communication devices (or other electronic devices), the application of a large number of cables, such as cables, etc. backplane, each module is connected within the system for transferring communication signals. 通常要对这种电缆进行通断测试和短路渊试。 Typically turned on and off and short-circuit tests on this cable deep again. 由于这种电缆检测经常是由生产厂商自己定义的,即每根电缆芯应该分别连接电缆两端插头的哪些脚, 这些都由厂商自己定义,于是这样就形成了电缆测试的多样性。 Since such a cable is often detected by the manufacturer's own definition, i.e., each cable core pin should be connected to which cable ends are plugs, which is defined by the manufacturers themselves, thus forming a so diversity cable testing. 通常在制造生产线上,有的厂商是运用手工测试的方法,即利用万用表对电缆内部的每一根芯进行通断测试,这是一种效率很低的测试方法。 Typically the manufacturing line, some manufacturers use a manual test methods, i.e. a multimeter for each of the inner core cable off test, which is a very inefficient test method. 有的厂商尽管设计了自己的测试设备,但是由于内部使用了单片机(如8051等)做主控MCU,利用MCU发送测试矢量。 Although some manufacturers design their own test equipment, but due to the internal use of the microcontroller (such as 8051) to do the master MCU, the MCU transmits using the test vectors. 即每增加--种新电缆就需耍生成一套新的测试矢量,于是软件和硬件都有可能要升级。 That is, each additional - new kind of cable would need to play to generate a new set of test vectors, so the software and hardware are likely to be upgraded. 面对种类繁多的电缆,这种设备仍然缺乏灵活性。 Faced with a wide variety of cable, this device is still a lack of flexibility. 还有,在专利网站上看到利用LED来标识电缆通断和利用MCU来制作电缆测试设备的两种方法:其一,利用LED来测试电缆的方法,就是在电缆的两端加上一个LED。 Further, in the patent to identify the site to see the cable with the LED off and MCU use two methods to make the cable test apparatus: First, using the method of LED to the test cable, the ends of the cable is combined with a LED . 当给电缆测试设备两端加电压时,如果电缆通则LED亮,反之则不亮。 When voltage is applied to both ends of the cable testing apparatus, if the cable General LED light is not bright and vice versa. 测试设备中也有用于标识电缆短路的LED。 LED test devices are also used to identify the short-circuit cable. 显然,这种设备上需要大量的LED,直观性很差。 Clearly, a large amount of the LED, on such poor visual device. 尤其当电缆芯数很大的时候, 设备上的LED会成倍增加,是一种比较笨拙的设计方法。 Especially when a large number of cable cores time, LED will be doubled on the device, it is a relatively clumsy design. 其二,利用MCU来设计电缆测试设备的方法.它引入了测试矢量的概念,但是测试矢量不是串行发出,而是通过MCU的总线并行发出。 Second, the use of the cable testing apparatus MCU to design a method which introduces the concept of test vectors, but not the serial test vectors sent, but sent by the MCU bus in parallel. 这种方法举出了一个实例,是用8051 来设计。 An example of this approach include, 8051 is designed. 因受制于8051的总线宽度只有8位,所以如果总线不扩展的话,这种设计方法本身最多只能测试8芯的电缆。 8051 because the bus width is subject only 8 bits, then if the bus is not extended, this design method itself can test up to 8 core cable. 如果需要测试大于8芯的电缆,则需要扩展总线宽度,并增加扩展并口芯片。 If desired test cable 8 is greater than the core, the need to expand the bus width, and extend parallel to increase the chip. 比如讲,对于一种96芯的电缆(这是通信设备中经常用到的一种背板电缆),就需要加96+8 = 12个扩展并口及相应的驱动电路,这样电路设计就会显得比较复杂, 可靠性也会下降。 For example say, one kind to the cable core 96 (which is a communication device backplane cable frequently used), you need to add 8 + 96 = 12 and the corresponding extension parallel driving circuit, so that the circuit design would seem more complex, reliability will fall. 除了硬件上升级以外,软件可能也要升级,要重新生成适用于大芯数电缆的测试矢量。 In addition to upgrading the hardware, the software may have to upgrade to regenerate for large core number of cable test vectors. 当然,也可以在这种设计里面引入总线宽度足够大的MCU,但是成本会大大增加,而且目前主流型的MCU总线宽度不会超过64,因此同样也无法满足大芯数电缆测量的需要。 Of course, such a design may also be introduced in the inside of the MCU bus width large enough, but the cost will be greatly increased, and the current mainstream type of MCU bus width does not exceed 64, and therefore also can not meet the needs of the large number of cables measured core. 发明内容本发明的目的是提供一种电缆测试装置及方法,解决上述难题,以满足对任何一种电缆进行快速测试的需要。 The object of the present invention is to provide a cable test apparatus and method to solve the above problems, to meet the needs for rapid testing of any kind of cable. 本发明的目的是这样实现的:一种电缆测试装置由测试矢量生成和检测设备,及电缆测试模块组成,电缆测试模块由JTAG器件A、电缆插头A、 JTAG器件B、电缆插头B构成,测试矢量生成和检测设备的一端与JTAG器件A、电缆插头A顺序连接,测试矢量生成和检测设备的另一端与JTAG器件B、电缆插头B顺序连接。 Object of the present invention is implemented as follows: A cable test apparatus by the test pattern generation and detection equipment, the test modules and cables, cable test module consists JTAG device A, the cable connector A, B JTAG device, the cable connector B, tests One end of the JTAG device a vector detection apparatus, and generation, sequence a cable plug connection, test vector generation and detection apparatus and the JTAG device B and the other end, the cable connector B is connected sequentially. 一种电缆测试装置的测试方法,包括下列步骤:i,在测试矢量生成和检测设备中,生成标准输入测试矢量;2, 将被测电缆的一段标准电缆的两端分别与测试矢量生成和检测设备中的JTAG器件A的电缆插头A,和JTAG器件B的电缆插头B连接起来;a. 由测试矢量生成和测试设备向电缆测试模块输入标准输入测试矢量;b. 将标准输入测试矢量在JTAG器件A和JTAG器件B的边界扫描元串行传输,直至把JTAG器件A和JTAG器件B的每个边界扫描元都填满;c. 对JTAG器件A执行一个写出操作,然后再对JTAG器件B执行一个读入操作,把JTAG器件A写出的数据读入到JTAG器件B的内部边界扫描元里面;d. 继续使JTAG器件B边界扫描元内部的数据在JTAG器件B的边界扫描元上串行传输,直至输出JTAG器件B:e. 由测试矢置生成和检测设备接收JTAG器件B的输出数据,这些数据即为被测电缆的一段标准电缆的标 Test Method A cable testing apparatus, comprising the steps of: i, test vector generation and detection device, generate standard input test vector; 2, both ends of the cable section of the cable under test standard were the test vector generation and detection device cable plug a the JTAG device a, and the cable plug B the JTAG device B are connected together; a generated by the test vector and test device enters the standard input test vectors to cable testing module;. b standard input test vectors in JTAG. element boundary scan JTAG serial transmission device a and device B, until each of the JTAG boundary scan element devices a and B are filled JTAG device;. c JTAG a device for performing a write operation, then for JTAG device B performs a read operation, the read data written JTAG device a into the interior of the device B JTAG boundary scan element inside;. d device B continues to JTAG boundary scan data on the internal cell components JTAG boundary scan element B serial transmission until the output JTAG device B: e set by the test vector received output data B JTAG device generating and testing equipment, the data is the standard period of the standard cable the cable under test. 测试输出矢量;3, 将被测电缆的两端分别与测试矢量生成和检测设备中的JTAG器件A的电缆插头A, 和JTAG器件B的电缆插头B连接起来:a. 由测试矢量生成和测试设备向电缆测试模块输入标准输入測试矢量;b. 将标准输入测试矢量在JTAG器件A和JTAG器件B的边界扫描元串行传输,直至把JTAG器件A和JTAG器件B的每个边界扫描元都填满;c. 对JTAG器件A执行一个写出操作,然后再对JTAG器件B执行一个读入操作,把JTAG器件A写出的数据读入到JTAG器件B的内部边界扫描元里面;d. 继续使JTAG器件B边界扫描元内部的数据在JTAG器件B的边界扫描元上串行传输,直至输出JTAG器件B;e. 由测试矢量生成和检测设备接收JTAG器件B的输出数据,这些数据即为被测电缆的测试输出矢量;4,由测试矢量生成和检测设备,将被测电缆的测试输出矢量,和该电缆的一段标准电缆的标准测试输出矢量 Test output vector; 3, both ends of the cable connector A cable under test and generates the test vector detecting apparatus JTAG device A, device B, and JTAG connecting cable plug B: a vector generation and testing by the test. standard input device input test vectors to test the cable module; B standard input test vectors in the JTAG boundary scan serial transmission element JTAG device a and device B, until each of the JTAG boundary scan devices a and B are JTAG device element. are filled;. c JTAG a device for performing a write operation, and then execute a JTAG device B to the read operation, the read data written JTAG device a into the interior of the device B JTAG boundary scan element inside; D continue so that the data inside the boundary scan device B element JTAG boundary scan serial transmission element in the JTAG device B until the output JTAG device B; E, and the output data generating device detecting device B receives JTAG test vectors from these data. test is the output vector of the cable under test; 4, the test pattern generation and detection equipment, the test output test vectors of the cable, and the cable section of standard cables standard test output vector 行对比,如果两者相同,则被测电缆内部的连接关系正确;否则, 即知被测电缆内部的连接错误,即短路或者断路。 OK contrast, if they are the same, the connection relations within the right cable under test; otherwise, i.e., inside the known connection error cable under test, i.e., short circuit or open circuit. 由于本发明采用了以上的技术方案,因而具有以下的优点:1,使用的芯片数极少,只用了两片JTAG器件,硬件设计很简单,所以在可靠性、价格、易携带性等方面具有无可比拟的优势。 Since the present invention adopts the above technical solution, and thus has the following advantages: 1, the number of chips used very little, only the two JTAG devices, hardware design is simple, in terms of reliability, price, and so easy to carry an unparalleled advantage. 2,设计简单,可靠性高,价格低廉,设备小巧,维修方便,具有自适应性,软、硬件基本上不用升级,.就可满足任一种大芯数电缆测试的需要。 2, simple design, high reliability, low cost, device size, easy maintenance, with adaptive software and hardware basically do not upgrade. Can meet the needs of any of the large number of core cable testing. 附图说明图1是本发明的--种边界扫描技术的基本原理示意图;图2是本发明的一种利用边界扫描技术进行电缆测试的原理示意框图;图3是图2的一种电缆测试装置的示意框图:图4是本发明的一种电缆测试方法的流程示意图;图5是本发明的一种电缆测试装置的测试环境实例示意图。 BRIEF DESCRIPTION OF DRAWINGS FIG. 1 is the present invention - a schematic view of the basic principles of Boundary Scan species; FIG. 2 is a schematic block diagram illustrating the principle of using boundary scan techniques of the present invention tests the cable; FIG. 3 is a diagram of a cable testing 2 a schematic block diagram of apparatus: FIG. 4 is a flow diagram of a cable testing method of the present invention; FIG. 5 is a test environment a cable test apparatus of the present invention, a schematic example. 图中-1,测试矢量生成和检测设备2,电缆测试模块3, JTAG器件A4, JTAG器件B 5,边界扫描元6,串行数据输入脚(TDI)7,串行数据输出脚(TDO) 8,电缆插头A 9,电缆插头B10,待测电缆具体实施方式以下结合附图对本发明的实施作如下详述:在图1中,现有大规模集成电路都提供JTAG 口和边界扫描的机制。 FIG -1, test vector generation and detection device 2, the test cable module 3, JTAG device A4, JTAG device B 5, the boundary scan element 6, the serial data input pin (TDI) 7, serial data output pin (TDO) 8, the cable connector a 9, BlO cable plug, the cable under test in conjunction with the following detailed description of the accompanying drawings embodiments of the present invention is described in detail as follows: in FIG. 1, the conventional LSI and provide mechanisms for JTAG boundary scan port . 在这样的集成电路中,每个管脚都和JTAG器件内部的一个边界扫描元一一对应。 In such integrated circuits, and each of the pins are inside the boundary scan element correspondence JTAG device. 在图中设有两个具有JAG 口的JTAG器件A3和JTAG器件B4。 A3 is provided with two devices having a JTAG port and a JTAG device JAG B4 in FIG. 通过控制其JTAG 口, 可以将一组串行数据从串行数据输入脚(TDI) (SerialDataln) 6输入到JTAG器件A3中, 这组数据再依次经过JTAG器件A3内部的每一个边界扫描元(Boundary-Scan Celi) 5后, 最后被从JTAG器件A3的串行数据输出脚(TDO) 7输送出去。 By controlling the JTAG port, a serial set of data may be inputted from the serial data input pin (TDI) (SerialDataln) 6 A3 to the JTAG device, the set of data and then sequentially passes through each of the internal JTAG boundary scan element device A3 ( after) 5, and finally is delivered from the JTAG Boundary-Scan Celi device A3 serial data output pin (TDO) 7 out. 由于边界扫描元5位于器件的最外边界(因为再靠外边就是管脚了),象这样串行数据在各个边界扫描元5中串行传输的过程就叫做边界扫描。 Since the device is located in the outermost boundary of the boundary scan element 5 (because the pin is no longer rely on the outside), such as serial data during each of the boundary scan serial transmission unit 5 is called boundary-scan. 图中,JTAG器件A3的串行数据输出脚7和JTAG器件B4的串行数据输入脚6相连接。 Figures, the device JTAG serial data output pin A3 of the devices 7 and JTAG serial data input pin 6 is connected to B4. 如果数据继续串行传输的话,数据会在JTAG器件B4的边界扫描元5内串行传送一圈,最后从JTAG器件B4的串行数据输出脚7输送出去。 If the serial transmission of data continues, the data will be serially transmitted in a circle element 5 JTAG boundary scan devices B4, and finally out of the delivery device JTAG serial data output pin B4 to 7. 再举一例,JTAG器件A3的一个管脚和JTAG器件B4的一个管脚相连接,不妨把这两个管脚分别叫做管脚a和管脚b。 As another example, a pin of a pin JTAG device A3 and B4 connected JTAG device, may wish to these two pins are called a pin and pin b. 当串行数据传输到JTAG器件A3的管脚a的边界扫描元5时,可以通过控制JTAG器件A3的JTAG 口,让数据从a管脚输出,于是数据就会从管脚a传输到管脚b。 When the serial data is transferred to the device A3 JTAG boundary scan pins of a 5-membered, by controlling JTAG JTAG port A3 of the device, so that a data output pin, so that data will be transmitted to the pin from a pin b. 然后,再通过控制JTAG器件B4的HAG 口,把管脚b上的数据读入到管脚b对应的内部边界扫描元5里面。 Then, the control device JTAG port HAG B4, and the data b is read on the pin into the interior of the boundary scan element 5 inside the corresponding pin b. 而后,该数据继续在JTAG器件B4的各个边界扫描元内传输,直到从串行数据输tli脚7输出。 Then, the data transfer to continue in the respective boundary scan element B4 of the JTAG device, until the output from the serial data output pin 7 tli. 这时,就可以在JTAG器件B4的串行数据输出管脚7处检查到从管脚a传输过来的数据。 In this case, it can be checked over a pin at the data transmitted from the serial data output pin B4 of 7 JTAG devices. 如果检査不到,则说明a和b之间的连接断掉了,或者发生了短路现象。 If not checked, then the connection between a and b cut off or short circuit occurred. 这就是边界扫描及其在在线测试中应用的基本原理。 This is the basic principle of Boundary Scan and its application in the online test. 在图2中,电缆测试装置由测试矢量生成和检测设备1和电缆测试模块2组成。 In FIG. 2, a cable test apparatus and test vectors generated by the detection apparatus 1 and the cable 2 test module components. 电缆测试模块2由JTAG器件A3、电缆插头A8、 JTAG器件B4、电缆插头B9构成。 Cable testing module 2 by the JTAG device A3, the cable plug A8, JTAG device B4, B9 cable plug configuration. 测试矢量生成和检测设备1的一端与HAG器件A3、电缆插头A8顺序连接,溯试矢量生成和检测设备l的另一端与JTAG器件B4、电缆插头B9顺序连接。 Test pattern generation and detection apparatus 1 and the end device HAG A3, A8 order cable plug connector, test vector generation and abduction l detection apparatus and the other end of the JTAG device B4, B9 order cable plug connector. 检测时,待测电缆10连接于电缆插头A8与电缆插头B9之间。 Detection, test cable 10 is connected between the cable plug and the cable plug A8 B9. 在图3中,显示了一个有9个管脚的JTAG器件。 In Figure 3, there is shown a nine-pin JTAG device. 从图中可以看到,串行输入数据是从JTAG器件3A3的第一个串行数据输入脚(TDI) 6输入,进入到JTAG器件A3内部的边界扫描元5里面,最后进入到JTAG器件A3的第九个串行数据输出脚(TDO) 7— —即最后一个管脚一—对应的边界扫描元5,然后从串行数据输出脚(TDO) 7输出。 Can be seen from the figure, serial input data is input from a first device JTAG serial data input pin (TDI) 3A3 6, into the interior of the boundary scan element 5 inside the JTAG device A3, and finally into the JTAG device A3 ninth serial data output pin (TDO) 7- - i.e., a last pin - corresponding boundary scan element 5, and then outputted from the serial data output pin (TDO) 7. JTAG器件八3的串行数据输出脚(TDO) 7和JTAG器件B4的串行数据输入脚(TDI) 6相连。 JTAG device eight serial data output pin 3 (TDO) and the serial data input pin 7 of the JTAG device B4 (TDI) 6 are connected. 所以,数据继续在JTAG器件B4内部的边界扫描元5内传输,最后从JTAG器件B4的串行数据输出脚(TDO) 7输出。 Therefore, data transfer to continue in the interior of the boundary scan element 5 JTAG device B4, the final output device from the JTAG serial data output pin (TDO) B4 7. 在测试的时候,首先向JTAG器件A3输入一串数据,用这串数据把JTAG器件A3和JTAG器件B4的所有边界扫描元填满。 During the test, a series of first input data to the JTAG device A3, with which the string data A3 JTAG devices and JTAG boundary scan element to fill all devices and B4. 比如说,输入的数据最终是在JTAG器件A3的第--个边界扫描元里面±夷入0,而在其它所有边界扫描元5里面填入1。 For example, the data input is ultimately at the JTAG device A3 is - a boundary scan element inside the Yi ± 0, while in all other boundary scan element 5 inside a filled. 然后控制两个器件的JTAGL1,让它们都执行一个写出的操作,把数据写出到各自的管脚上面。 And two control devices JTAGL1, so that they perform a write operation, the data written to the respective pins above. 如果JTAG器件A3的第一个管脚和JTAG器件B4的某一个管脚通过电缆芯相连接,比如JTAG器件A3 的管脚1连接JTAG器件B4的管脚3,那么由于JTAG器件A3的管脚1输出0, JTAG器件B4的管脚3输出1,两个信号线与一下,即得到信号0。 A pin of a JTAG device if the first pin JTAG device A3 and B4 are connected by the cable core, such as a pin JTAG device A3 is connected to the JTAG device pins. 3 B4, then since the pin JTAG device A3 1 0 output, pin 3 of output B4 JTAG device 1, and about two signal lines, i.e., 0 to give the signal. 然后再控制JTAG器件A3和JTAG器件B4执行读入动作,JTAG器件B4的管脚3就把0读入到内部的边界扫描元5里面了。 Then the control device JTAG JTAG device A3 and B4 perform reading operation, the device JTAG pins B4 0 3 put read into the interior of the boundary scan element 5 inside. 然后再控制HAG器件A3和JTAG器件B4继续进行数据的串行传输动作,把JTAG 器件B4内部的9个边界扫描元5里面的数据都从串行数据输出脚(TDO) 7输出,那么在输出数据中JTAG器件B4的管脚3所占的位置上,应该有一个数据0。 Then the control device HAG JTAG device A3 and B4 continue data serial transfer operation, the boundary scan element 9 inside the internal data 5 JTAG device B4 are output from the serial data output pin (TDO) 7, then the output B4 JTAG device data pins 3 on the position occupied, there should be a data 0. 如果JTAG器件A3 的管脚1和JTAG器件B4的管脚3之间没有连接关系,那么由于JTAG器件A3管脚1的输出和JTAG器件B4管脚3的输出无法线与,JTAG器件B4的管脚3处的数据仍然应该是l (在执行读入动作之前),于是最后从JTAG器件B4输出的测试数据中,JTAG器件B4的管脚3所占的位置上的数据应该是1。 If the pin-pin JTAG devices and JTAG device 1 A3 B4 is no relationship between the connector 3, the output of the device since the JTAG output and the JTAG device 1 A3 B4 pin pin 3 and the wire can not, JTAG device B4 tube data at pin 3 should remain L (before performing the reading operation), then the final data from the JTAG testing device B4 outputted, the data on the position of the pins 3 B4 JTAG device should be occupied by one. 从上面的描述可以看出,从JTAG器件B4的输出数据上就可判断两个管脚之间的连接关系。 As can be seen from the above description, the output data from the JTAG device can determine B4 the connection between the two pins. 同理,如果JTAG器件A3的管脚不是和JTAG器件B4的管脚3相连,而是和其它JTAG器件B4的一个管脚相连,那么那个管脚在输出数据中所占的位置上应该是一个0;如果JTAG器件A3管脚1不和JTAG.器件B4的任何管脚相连接,那么JTAG器件A3管脚1上的数据不会在执行写出动作的时候传到JTAG器件B4上,也就不会影响JTAG器件B4的输出数据,因为在最开始当向JTAG器件A3和JTAG器件B4的所有内部边界扫描元5填数据的时候,除了JTAG器件A3的管脚1对应的边界扫描元5内填0外,其余填的都是1. 如果HAG器件A3管脚1的数据(即数据0)无法从电缆芯传到JTAG器件B4的话,JTAG 器件B4只会把最开始向它内部填的1输出去。 Similarly, if the pin is not a JTAG device A3 and B4 JTAG device connected to pin 3, but other, and a pin connected to JTAG device B4, the position occupied by the pin on the output data should be a 0; if not a JTAG device pins A3 and B4 JTAG pins of the device with no connection, then the data in the JTAG device 1 not transmitted to the pin A3 B4 JTAG device when performing write operation, it JTAG device does not affect the data B4 is output, because in the beginning when the time to scan all of the inner boundary of the data filling unit 5 and JTAG device A3 B4 JTAG device, in addition to the 5-membered JTAG boundary scan device A3 corresponding to pin 1 0 fill, the fill is 1. If the remaining data (i.e., data 0) of the HAG device 1 can not be transmitted to the pin A3 B4 JTAG device from the cable core, then, only the most JTAG device B4 began to fill its interior 1 output to go. 上面是针对JTAG器件A3的管脚1输入的溯试数据。 The above is a device for abduction JTAG test data input pin A3 is. 当对这个管脚试结束后,可以对JTAG器件A3的管脚2输入类似的糖试数据,即在管脚2对应的边界扫描元5内填入数据0,在其它的边界扫描元5里面都填入1,然后再执行写出、读入及串行传输等动作, 通过检査JTAG器件B4的输出数据,就可以知道JTAG器件A3的管脚2与JTAG器件B4 的那个管脚连接。 When the end of the test pin, JTAG input pin 2 may in a similar device A3 sugar test data, i.e., data 0 is filled in the boundary scan element 2 corresponding to the pin 5, the other inside the boundary scan element 5 1 are filled and then perform write, read, and serial transmission operation and the like, by checking the data B4 is output JTAG device, the device can know A3 JTAG pin 2 is connected to the pin of the JTAG device B4. 重复上述动作,就可知道JTAG器件A3和JTAG器件B4所有管脚之间的连接关系。 This operation is repeated, it is possible to know a connection relationship between the JTAG device all pins A3 and B4 JTAG devices. 由上所述,这种每次输入的串^^測试数据,就是所霈渕试矢量。 From the above, each such string ^^ test data input, is the vector again Kinji Fuchikami Pei. 从上面的描述过程中可以看到,电缆測试过程中,需要一次次向电缆測试设备输入測试矢i,把JTAG器件A3 和JTAG器件B4的所有管脚及其内部边界扫描元5都種盖:然后根据不同测试矢量生成的输出矢量,就可以知道电缆的连接关系或者知道电澳连接是否正确。 Can be seen from the above described process, the process of testing the cable, the cable need again i to input test vector testing apparatus, the JTAG device A3 and all devices JTAG boundary scan pins and inner element 5 are B4 cover species: and based on the output test vectors generated by the various vectors, it can be known or that a cable connection relationship Australia electrically connected correctly. 在图4中,电澳測试方法的操作流程具体如下:1, 生成标准测试矢量,并标准输出測试矢l::2, 开始测试,及输出渕试矢量,并对渊试矢量结果与标准渊试矢量是否相同作判断; 3,对测试矢量结果与标准測试矢量是否相同作判断:若是,则电缆正确, 若否,则电澳不正确, 并,继续作本类电缜測试: 4,对本类电缆渊试作測试:若是,则重新作开始湄试, 若否,则进行新电澳测试; 5,对新电缆进行測试,若是,则生成标准測试矢量,并标准输出渊试矢量, 若否,则測试过程结束。 In FIG. 4, the operational flow Australia electrically testing method as follows: 1, to generate a standard test vectors, and the standard output test vectors l :: 2, start the test, and the output Kinji Fuchikami test vectors, test vectors and results of deep Yuan same whether the standard test vectors for determination; 3, the test vectors and the results are the same as the standard test vector determination: if yes, the cable correctly, and if not, is not correct electrical Australia, and continue to test for this type electrically Zhen : 4, deep cable test for this type of test: if yes, re-starts for Mae test, and if not, a new electrical tests O; 5, test the new cable, and if yes, generating a standard test vectors, and Yuan standard output test vector, and if not, the test process ends. 在上述过程中,当要对被渊电澳进行渊试的时候,首先要找一段被测电缆的标准电缆, 用标准测试矢i生成这一段被拥电缆(标准电澳)的标准输出澜试矢量表。 In the above procedure, when the test to be performed is deep deep electrically O, looking first cable section of the cable under test standard, generating this period is owned cable (standard electrical Australia) Standard Test Standard Test Lan output vector i vector table. 而后,对被测电缆进行測试的时候,只要按照和生成标准输出拥试矢量表相同的方法,生成被測电绂的输出测试矢量表。 Then, when the cable under test, as long as the same method as the test vector table owned and generating an output in accordance with the standard, generating an electrical test output test vectors Fu table. 最后,把被測电统的输出拥试矢量表,与标准电缆的标准输出测试矢量表进行对比,如果结果相同,则说明被測电缆无故障,否则说明该电敏有故降(|短路或者断路)*在图5中,显示利用一台电ji做为电统測试矢量生成和检獮设各1,同时电脑还做为控制台。 Finally, the electrical system of the measured output test vector table owner, compared with the standard output test vector table of standard cable, if the same result, then the cable under test without failure, indicating that the electro-sensitive or have it drop (| short circuits or disconnection) * in FIG. 5, the use of an electric power system ji as test pattern generation, and each subject provided Hunting 1, but also as a computer console. 电脑内部设置测试程序,完成诸如JTAG 口控制、生成测试矢量、进行输出矢量检测等动作。 Test procedures provided inside the computer, such as a JTAG port control is completed, generate test vectors, and outputs motion vector detection. 同时,做为控制台,并提供人机接口,吿诉使用者电缆測试的状况。 Meanwhile, as the console, and provides human-machine interface, user Gao v cable testing situation. 其中,电缆测试模块2,可由两片144脚的EPLD芯片和若干电缆插头A8、电缆插头B9连接组成。 Wherein the test cable module 2, by the two legs 144 and a plurality of cable plugs EPLD chip A8, B9 cable plug connector components. 在电缆测试模块2上还提供了一个JTAG 口的连接器,它用于把EPLD的JTAG 口连接到电脑的并口上。 Test module on the cable connector 2 is also provided a JTAG port, which is used to EPLD JTAG port connected to the PC parallel port. 电脑控制EPLD的JTAG 口是通过并口控制的。 Computer controlled EPLD JTAG port is controlled through the parallel port. 连接电脑并口与EPLD JTAG 口用的是电缆EPLD逻辑下载线。 Connected to the computer parallel port EPLD the JTAG port is used to download the logical EPLD cable line. 实际上这根连接电缆不需要用专门的EPLD逻辑下载线。 In fact, this does not require the root with a special connection cable EPLD logic download cable. 由于控制JTAG口主要需要JTAG 口的四根信号线:TDI、串行数据输出脚(TDO) 7、 TCK和TMS,所以就可自制一根电缆,只要这根电缆可以保证这四根信号线可以连接到电脑并口的数据线上就可以了。 Since the main control JTAG port JTAG port requires four signal lines: TDI, serial data output pin (TDO) 7, TCK and TMS, so that a cable can be made, as long as the guarantee that this cable can be four signal lines data lines connected to the computer parallel port it. TDI是测试矢量输入的数据线,串行数据输出脚(TDO) 7是測试矢量输出的数据线, TCK是控制JTAG 口的时钟线,TMS是控制JTAG 口内部状态机的控制信号线。 Test vector TDI input data line, the serial data output pin (TDO) 7 output test vectors is the data line, TCK JTAG port clock control line, TMS is a control signal line to control the JTAG port of the internal state machine. 至于这四根线怎么控制数据在边界扫描元5里面串行传输、输入写出读入、复位JTAG等,其可以参见正EE.1194.1标准,或者参考JTAG器件的手册,基本上所有JTAG器件的手册都提供这些资料。 As for how these four wire serial transmission of control data, read write input boundary scan element 5 in which, resets the JTAG the like, which can be found in standard EE.1194.1 positive, or the reference manual JTAG device, substantially all of the JTAG device the manual provides such information. 并口在电脑内部的地址可以通过PC机的资料査到,这也是标准的。 Parallel data can be found in the PC address of the internal computer, which is the standard.

Claims (3)

  1. 1. 一种电缆测试的装置,其特征在于,电缆测试装置由测试矢量生成和检测设备,及电缆测试模块组成,电缆测试模块由第一JTAG器件、第一电缆插头、第二JTAG器件、第二电缆插头构成,测试矢量生成和检测设备的一端与第一JTAG器件、第一电缆插头顺序连接,测试矢量生成和检测设备的另一端与第二JTAG器件、第二电缆插头顺序连接。 A cable testing apparatus, characterized in that the cable test apparatus by the test vector generation and detection equipment, the test modules and cables, cable JTAG test module by the first device, a first cable connector, the second JTAG device, the first two cable plug configuration, the other end of the test vector generation and detection apparatus of the first end JTAG device, the order of the first cable plug connector, test vector generation and detection apparatus and a second JTAG device, the second sequence of cable plug connector.
  2. 2. 根据权利要求1所述的一种电缆测试装置,其特征在于,电缆搠试模块由两片144脚的EPLD芯片和若干第一电缆插头、第二电缆插头连接组成。 2. A cable test apparatus according to claim 1, characterized in that the test cable daub module consists of two legs 144 and EPLD chip plurality of first cable connector, the second cable plug connector components.
  3. 3. 根据权利要求l所述的一种电缆測试装置的测试方法,包括下列步骤: 1) 在測试矢量生成和检测设备中,生成标准输入测试矢量; 2) 将被測电缆的一段标准电缆的两端分别与测试矢量生成和检瀕设备中的第一JTAG器件的第一电缆插头,和第二JTAG器件的第二电缆插头连接起来;a. 由测试矢量生成和测试设备向电缆測试模块输入标准输入渊试矢量:b. 将标准输入测试矢量在第一JTAG器件和第二JTAG器件的边界扫描元串行传输,直至把第一JTAG器件和第二JTAG器件的每个边界扫描元都填满;c. 对第一JTAG器件执行一个写出操作,然后再对第二JTAG器件执行一个读入操作,把第一JTAG器件写出的数据读入到第二JTAG器件的内部边界扫描元里面;d. 继续使第二JTAG器件边界扫描元内部的数据在第二JTAG器件的边界扫描元上串行传输,直至输出第二JTAG器件;e. 由测试矢量生 The test method A cable test apparatus of claim l, comprising the steps of claim: 1) In the test pattern generation and detection device, generate standard input test vector; 2) a section of the cable under test standard ends of the cable are respectively generate test vectors and the first cable connector device near the subject to the first JTAG device, and a second JTAG second connecting cable plug device; a test vectors generated by the test equipment and test cables. yuan test module input standard input test vector: b standard input boundary scan test vectors in a first serial transmission element JTAG JTAG device and the second device until each of the first JTAG boundary scan device and the second JTAG device. element are filled;. c JTAG device for performing a first write operation, and then execute a second device to a JTAG read operation, the read data is written into a first device to a JTAG boundary of the second internal device JTAG scanning element inside;. D continues to scan the data within the device JTAG boundary element second serial transmission on a second JTAG boundary scan element of the device until the second JTAG output device; E by the test vector generator. 成和检测设备接收第二JTAG器件的输出数据,这些数据即为被测电缆的一段标准电缆的标准測试输出矢量; 3) 将被溯电缆的两端分别与测试矢量生成和检测设备中的第,JTAG器件的第一电缆插头,和第二JTAG器件的第二电缆插头连接起来;a. 由測试矢量生成和测试设备向电缆测试模块输入标准输入瀰试矢量;b. 将标准输入測试矢量在第一JTAG器件和第二JTAG器件的边界扫描元串行传输,直至把第一JTAG器件和第二JTAG器件的每个边界扫描元都填满;c. 对第一JTAG器件执行一个写出操作,然后再对第二JTAG器件执行一个读入操作,把第一JTAG器件写出的数据读入到第二JTAG器件的内部边界扫描元里面;d. 继续使第二JTAG器件边界扫描元内部的数据在第二JTAG器件的边界扫描元上串行传输,直至输出第二JTAG器件;e. 由测试矢量生成和检测设备接收第二JTAG器件的输出数据, And to a second JTAG test equipment receives the data output device, the data vector output period is the standard test of a standard cable of the cable under test; 3) are respectively generated at both ends of the cable and traceability detection apparatus and test vectors the first, the first cable connector JTAG device, and a second JTAG second connecting cable plug device; a test vectors generated by the test device and the test vector input to the standard input Mi cable test module;. B standard input measured. in boundary-scan test vector element JTAG serial transmission of the first device and the second JTAG device, until each of the JTAG boundary scan element of the first device and the second device are filled JTAG; C executes a first JTAG device. write operation, and then execute a second device to a JTAG read operation, the read data written JTAG device first into a second internal JTAG boundary scan element inside the device;. d continues to the second JTAG boundary scan device internal data element in the serial JTAG boundary scan element of the second transmission device, the output device until the second JTAG; E generated by the test vectors and a second JTAG test equipment receives the output data of the device. 些数据即为被测电缆的测试输出矢量;4)由测试矢量生成和检测设备,将被测电缆的测试输出矢量,和该电缆的一段标准电缆的标准测试输出矢量进行对比,如果两者相同,则被測电缆内部的连接关系正确;否则,即知被测电缆内部的连接错误,即短路或者断路。 These test data output vector is the cable under test; 4), the cable under test to test an output vector, and the vector output period of the standard test of a standard cable of the cable were compared by the test pattern generation and detection equipment, and if identical , the connection relationships within the cable under test is correct; otherwise, i.e., inside the known connection error cable under test, i.e., short circuit or open circuit.
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CN2388607Y (en) 1999-04-21 2000-07-19 深圳市中兴通讯股份有限公司 Cable tester
CN1316056A (en) 1999-06-30 2001-10-03 诺基亚网络有限公司 Method and arrangement for checking cable connections
CN1351262A (en) 2000-10-26 2002-05-29 中国石油化工股份有限公司 Failure tester for electric power cable

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1989008850A1 (en) 1988-03-08 1989-09-21 Network Systems Builders Limited Method of and apparatus for testing multi-wire cable
CN1180412A (en) 1995-12-08 1998-04-29 三星电子株式会社 Jtag testing of buses using plug-in cards with jtag logic mounted thereon
CN2388607Y (en) 1999-04-21 2000-07-19 深圳市中兴通讯股份有限公司 Cable tester
CN1316056A (en) 1999-06-30 2001-10-03 诺基亚网络有限公司 Method and arrangement for checking cable connections
CN1351262A (en) 2000-10-26 2002-05-29 中国石油化工股份有限公司 Failure tester for electric power cable

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