CN116666344A - Frame structure - Google Patents

Frame structure Download PDF

Info

Publication number
CN116666344A
CN116666344A CN202310923366.5A CN202310923366A CN116666344A CN 116666344 A CN116666344 A CN 116666344A CN 202310923366 A CN202310923366 A CN 202310923366A CN 116666344 A CN116666344 A CN 116666344A
Authority
CN
China
Prior art keywords
frame
chip
plastic envelope
electric connection
envelope body
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202310923366.5A
Other languages
Chinese (zh)
Inventor
宋贵波
黄泽军
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SHENZHEN RUICHIPS SEMICONDUCTOR CO LTD
Original Assignee
SHENZHEN RUICHIPS SEMICONDUCTOR CO LTD
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SHENZHEN RUICHIPS SEMICONDUCTOR CO LTD filed Critical SHENZHEN RUICHIPS SEMICONDUCTOR CO LTD
Priority to CN202310923366.5A priority Critical patent/CN116666344A/en
Publication of CN116666344A publication Critical patent/CN116666344A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49579Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49503Lead-frames or other flat leads characterised by the die pad
    • H01L23/49513Lead-frames or other flat leads characterised by the die pad having bonding material between chip and die pad
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49568Lead-frames or other flat leads specifically adapted to facilitate heat dissipation
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

The application provides a frame structure, which belongs to the field of semiconductor package manufacture and comprises a plastic package body, a chip, an electric connecting material, a first frame and a second frame, wherein the chip is arranged on the first frame, the bottom end of the chip is electrically connected with the first frame, the other end of the electric connecting material is connected with the second frame, the plastic package body is in plastic package on the outer sides of the chip, the electric connecting material, the first frame and the second frame, the bottoms of the first frame and the second frame which are wrapped by the plastic package body are respectively provided with a rough structural surface, and the rough structural surfaces prevent the plastic package body from layering with the first frame and the second frame. Through using the frame copper as the carrier, also regard as output electrode, satisfy the overcurrent output's in the power semiconductor plastic envelope ability, can save the carrier again simultaneously, with the plastic envelope volume littleer, set up the back of frame copper into the coarse structure of indent, avoid plastic envelope body and copper layering's condition, need not design connecting hole on the frame copper simultaneously, the frame copper can deposit more chips.

Description

Frame structure
Technical Field
The present disclosure relates to semiconductor package manufacturing, and more particularly, to a frame structure.
Background
With the continuous development of semiconductor packaging technology, various semiconductor devices have appeared, in which a single tube employing a plastic packaging process is one branch in which it is relatively large. Chip packaging is an indispensable process in integrated circuit fabrication. Not only are the packaging materials required to have excellent electrical, thermal and mechanical properties, but also high reliability and low cost, which are also the main reasons that epoxy resins are the main materials of chip packaging, which account for more than about 95% of the entire packaging material market. However, since the epoxy package is a non-hermetic package, the resistance to the external environment is not very strong, particularly the intrusion of moisture, so that some reliability problems, particularly delamination, often occur in the chip package. How to increase the binding force between the plastic packaging material and the frame to ensure that the plastic packaging material and the frame are not separated in the use process of the product, and the plastic packaging material and the frame are considered by design engineers.
The Chinese patent with publication number of CN201514940U discloses a lead frame structure for packaging an integrated circuit, which comprises a slide holder, pins, gold wires, a plastic package body and a chip, wherein the slide holder comprises a slide holder region and a slide holder peripheral region, the slide holder region is of a sinking structure, and the slide holder peripheral region is of an annular groove-shaped structure or a network-shaped structure; the adhesive is coated on the surface of the chip loading platform area of the chip loading platform, the chip is placed on the adhesive, the two ends of the gold wire are respectively connected with the chip and the pins, and the chip loading platform, the chip, the gold wire and a part of the pins are integrally packaged together by the plastic package body. This frame construction bears the weight of the chip through the slide holder, has avoided the layering, but set up the slide holder and can have increased the volume of encapsulation, increase the cost of slide holder, set up the demand that the pin can not satisfy power semiconductor simultaneously, consequently can't satisfy the application in power board conductor field.
Chinese patent publication No. CN213366592U discloses a component lead frame structure, including last pad, lower pad, go up pad lead-out wire and lower pad lead-out wire, go up pad and lower pad all level setting to upper and lower spaced setting, go up the pad with all be equipped with at least one connecting hole that runs through it from top to bottom on the lower pad, go up pad lead-out wire and lower pad lead-out wire set up relatively, and respectively with go up the pad with lower pad is connected. The frame structure is provided with the connecting holes penetrating up and down, and the adhesion of plastic package is increased through the communicating holes, so that layering is avoided. As shown in fig. 6, this solution has the disadvantage that if more chips are to be placed, the positions of the connection holes will be occupied by the chips, so that a larger carrier is required, and in addition, the connection holes reduce the overcurrent capacity of the frame to some extent. Therefore, it is desirable to design a frame structure with better current capability and more chips stored in a limited carrier.
Disclosure of Invention
The application aims to provide a frame structure, which solves the technical problems that the over-current capacity is influenced and the storage space of a chip is occupied by plastic package connecting holes arranged on the existing frame structure. The surface treatment is carried out on the position of the plastic package body at the back of the frame to form a rough surface, and the rough surface can increase the contact area between the plastic package body and the frame, thereby increasing the binding force of the plastic package body and the frame.
Because the structure is used on the power diode chip, larger overcurrent is needed, and the common chip structure has no overcurrent requirement, namely the power diode chip needs to solve the overcurrent magnitude, but the existing diode structure cannot solve the problem of the overcurrent magnitude.
In order to achieve the above purpose, the technical scheme adopted by the application is as follows:
the utility model provides a frame construction, including plastic envelope body and chip, still include electric connecting material, first frame and second frame, the chip sets up on first frame, and the bottom and the first frame electric connection of chip, electric connecting material's one end is connected with the chip, electric connecting material's the other end and second frame connection, the plastic envelope body plastic envelope is in the chip, electric connecting material, the outside of first frame and second frame, the outside of plastic envelope body is stretched out at the both ends of first frame and second frame, the bottom of first frame and second frame by the parcel of plastic envelope body all sets up to the coarse structural face, the adhesive force of coarse structural face increase first frame and second frame and plastic envelope body, prevent plastic envelope body and first frame and second frame layering.
Further, the first frame and the second frame are copper sheets, and the first frame and the second frame are respectively used as the positive electrode and the negative electrode of the chip.
Further, the rough structure surface is set to be a concave rough surface structure, and is integrally formed on the copper sheet by stamping through a stamping die.
Further, the concave rough surface structure is set to be a concave pit structure, a concave grid structure or a concave honeycomb structure.
Further, the concave depth of the concave rough surface structure is five to twelve percent of the thickness of the copper sheet.
Further, the concave pit structure is composed of a plurality of inwards concave hemispherical surfaces, the hemispherical surfaces are arranged at intervals, and the interval distance between the hemispherical surfaces is greater than or equal to one half of the radius of the hemispherical surfaces.
Further, the grids in the concave grid structure are square, rectangular or equilateral triangle, and the spacing between the grids is 0.01-0.02mm.
Further, the thicknesses of the first frame and the second frame are 0.2-0.8mm, the first frame is set as a negative electrode frame, and the second frame is set as a positive electrode frame.
The utility model provides a power tube frame construction, including plastic envelope body and a plurality of chips, electric connecting material, first frame and second frame, the chip is the power tube chip, a plurality of power tube chips set up side by side on first frame, and the bottom and the first frame electric connection of a plurality of chips, electric connecting material's one end is connected with a plurality of chips, electric connecting material's the other end and second frame connection, plastic envelope body plastic envelope is in the chip, electric connecting material, the outside of first frame and second frame, the outside of plastic envelope body is stretched out at the both ends of first frame and second frame, the bottom of first frame and second frame by the parcel of plastic envelope body all sets up to the coarse structural face, the adhesion of coarse structural face increase first frame and second frame and plastic envelope body, prevent plastic envelope body and first frame and second frame layering, a plurality of power tube chips parallel arrangement.
Further, the electric connection materials are aluminum wires, aluminum belts or copper belts, and each power tube chip is provided with a plurality of electric connection materials which are connected with the second frame.
Due to the adoption of the technical scheme, the application has the following beneficial effects:
(1) The application uses the frame copper plate as a carrier and also as an output electrode, so that the capacity of overcurrent output in the plastic package of the power semiconductor can be well met, meanwhile, the carrier can be saved, the plastic package volume is smaller, the back of the frame copper plate is provided with a concave rough structure, the layering situation of a plastic package body and the copper plate can be effectively avoided, meanwhile, the frame copper plate does not need to be provided with a connecting hole, and more chips can be stored in the frame copper plate;
(2) The power tube chips of a plurality of blocks are arranged in parallel, the bearing of heavy current is met, meanwhile, the frame copper plate can be directly used as a heat dissipation conductor to transfer heat, and a plurality of electric connection materials are arranged, so that the over-current requirement in the power tube is met better.
Drawings
FIG. 1 is a front view of a frame structure of the present application;
FIG. 2 is a schematic view of a frame structure with a twist-shaped back surface;
FIG. 3 is a schematic view of the back of the frame structure of the present application in a grid configuration;
FIG. 4 is a schematic view of the back side of the frame structure of the present application in a honeycomb structure;
fig. 5 is a schematic diagram of an application structure of the frame structure in plastic packaging of a single plastic package of a power tube;
fig. 6 is a front-back view of the prior art before modification.
Reference numerals in the drawings: 1-plastic packaging body; 2-a frame; 3-chip; 4-an electrical connection material; 5-a first frame; 6-a second frame.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application will be further described in detail below by referring to the accompanying drawings and by illustrating preferred embodiments. It should be noted, however, that many of the details set forth in the description are merely provided to provide a thorough understanding of one or more aspects of the application, and that these aspects of the application may be practiced without these specific details.
Example 1:
as shown in fig. 1, a frame structure includes a plastic package body 1 and a chip 3, wherein, still include electric connection material 4, first frame 5 and second frame 6, chip 3 sets up on first frame 5, and the bottom and the first frame 5 electric connection of chip 3, electric connection material 4's one end is connected with chip 3, electric connection material 4's the other end is connected with second frame 6, plastic package body 1 plastic package is in the outside of chip 3, electric connection material 4, first frame 5 and second frame 6, the outside of plastic package body 1 is stretched out at the both ends of first frame 5 and second frame 6, the bottom of first frame 5 and second frame 6 by plastic package body 1 parcel all sets up to the roughness structure face, the roughness structure face increases the adhesion of first frame 5 and second frame 6 and plastic package body 1, prevent plastic package body 1 and first frame 5 and second frame 6 layering. The frame structure is a power diode chip frame structure, and because the structure is used on a power diode chip, larger overcurrent is required, and the general chip structure has no overcurrent requirement, namely the power diode chip needs to solve the overcurrent magnitude, but the existing diode structure can not solve the problem of the overcurrent magnitude.
The frame structure not only can solve the problem of the binding force between the plastic package body and the frame, but also can not be influenced by the increase of the number of chips, and meanwhile, the overcurrent capacity of the frame can not be reduced. As shown in fig. 1 and 6, it can be known by comparing the positions of two chips occupied by two through holes in fig. 6, and the over-current capability of the copper plate can be affected due to the arrangement of the holes, but the situation can not occur due to the structure of the application, and the application has the rough surface arranged on the back, so that the storage position of the chips is not affected, and the over-current capability of the copper plate is not affected.
The plastic package body 1 is composed of, by volume, 100 parts of epoxy resin, 100 parts of olfactory epoxy resin, 80 parts of phenolic novolac resin, 50 parts of silicon dioxide, 10 parts of aluminum nitride, 5 parts of Miwa, 3 parts of aliphatic vinegar, 2 parts of nitrile rubber, 3 parts of Qin acid vinegar and 3 parts of antimony trioxide. The aluminum nitride realizes better heat dissipation, and simultaneously nitrile rubber and Qin acid vinegar are added, so that the plastic package body 1 material has the advantages of strong adhesiveness and good insulating effect.
In the embodiment of the present application, as shown in fig. 1, the first frame 5 and the second frame 6 are copper sheets, and the first frame 5 and the second frame 6 are respectively used as the positive electrode and the negative electrode of the chip. The thickness of the copper sheet is 0.2-0.8mm, and the copper sheet is mainly used as an input electrode and an output electrode of a chip, namely one is a positive electrode and the other is a negative electrode. The copper sheet has the advantages of strong overcurrent capability, low price and good heat dissipation performance. The width of the copper sheet is determined according to the number of chips required to be placed. The first frame 5 is provided as a negative electrode frame, and the second frame 6 is provided as a positive electrode frame.
In the embodiment of the application, the rough structure surface is arranged as a concave rough surface structure, and is integrally formed and arranged on the copper sheet by stamping through a stamping die. Because the copper sheet is very thin, in the existing process, the copper sheet is manufactured through an extrusion process, so in the process of preventing layering, the existing process is to punch through holes, but the through holes occupy positions and influence the overcurrent capacity. If the convex form is used, the forming is difficult, if the convex form is used, the mode of integrally forming by using a die is needed, but the die cannot be used for forming in the prior art due to the too thin thickness of the copper plate, and the simplest structure is used for stamping.
In the embodiment of the application, the concave rough surface structure is set to be a concave pit structure, a concave grid structure or a concave honeycomb structure, and the concave honeycomb structure is shown in fig. 4. The concave depth of the concave rough surface structure is five to twelve percent of the thickness of the copper sheet. By setting the depth of the recess to five to twelve percent, the overcurrent capacity is not substantially affected at this time, so that the adhesion can be increased without affecting the overcurrent capacity.
In the embodiment of the application, as shown in fig. 2, the concave pit structure is formed by a plurality of inwardly concave hemispherical surfaces, the hemispherical surfaces are arranged at intervals, and the interval distance between the hemispherical surfaces is greater than or equal to one half of the radius of the hemispherical surfaces. The concave pit structure can also be formed by other concave structures, so long as the concave pit structure can increase the adhesive force, the embedding of soldering tin and copper plate in the vertical direction is realized, and the transverse force is better.
In the embodiment of the application, as shown in fig. 3, the grids in the concave grid structure are square, rectangular or equilateral triangle, and the space between the grids is 0.01-0.02mm. The internal portion that sets up for the check this moment is sunken, and this structure is mainly realized the internal portion extrusion of check for the metal mesh side is protruding, forms the interval limit, then the plastic envelope body enters into the check in, forms vertical grasping force between side and the plastic envelope body simultaneously, and the interval between net and the net is by certain stability, avoids too thin and the cracked condition of side appears.
Among the indent grid structure, the adhesion effect is best, and indent grid structure sets up to positive direction grid structure, and positive direction grid structure's limit is sunken, and the width of limit is 0.5mm, and extrusion is fastest when adding this moment, and extruded grinding apparatus better processing simultaneously, mainly extrude sunken limit and form interconnect's line, and the plastic envelope body enters into in the sunken grid limit, forms one and grabs mutually and closes.
Example 2:
the utility model provides a power tube frame construction, as shown in fig. 2-5, including plastic envelope body 1 and a plurality of chips 3, electric connecting material 4, first frame 5 and second frame 6, chip 3 is the power tube chip, a plurality of power tube chips set up side by side on first frame 5, and the bottom and the first frame 5 electric connection of a plurality of chips 3, electric connecting material 4's one end is connected with a plurality of chips 3, electric connecting material 4's the other end is connected with second frame 6, plastic envelope body 1 plastic envelope is in chip 3, electric connecting material 4, the outside of plastic envelope body 1 is stretched out at first frame 5 and second frame 6, the both ends of first frame 5 and second frame 6 are stretched out the outside of plastic envelope body 1, the bottom of first frame 5 and second frame 6 that is wrapped up by plastic envelope body 1 all sets up to the coarse structural plane, the adhesive force of coarse structural plane increase first frame 5 and second frame 6 and plastic envelope body 1, prevent plastic envelope body 1 and first frame 5 and second frame 6 layering, a plurality of power tube chips parallel arrangement. The electric connection materials 4 are aluminum wires, aluminum belts or copper belts, and each power tube chip is provided with a plurality of electric connection materials 4 which are connected with the second frame 6.
And a plurality of power tube chips are arranged in parallel, so that the overcurrent capacity of the plastic package structure is increased. At the same time, the number of the electrical connection materials 4 is generally more than four, so as to avoid influencing the overcurrent capacity. The structure has the advantages that products with better performance can be produced under the condition of not changing the original production equipment, and only one stamping process is added when the copper plate is cut.
Comparative example:
fig. 6 shows a conventional structure or chinese patent publication No. CN213366592U, which is to make through holes in copper plates to increase the gripping force of the upper and lower molding materials. However, this is the case in which the overcurrent capability of the copper plate is affected and the number of chips placed on the copper plate is affected (in the case where the same-sized copper plate is set here). Compared with embodiment 1 of the application, in embodiment 1 of the application, the invagination structure is stamped at the rear of the copper plate, so that the copper plate is roughened, the grasping force of the plastic sealing layer and the copper plate can be increased, the layering condition is avoided, and meanwhile, the current output capacity of the positive electrode and the negative electrode is not influenced. But in fig. 6 the current output capability is affected and the location where the chip is placed is affected. The use of the convex structure in the chinese patent publication No. CN213366592U is difficult to achieve in the existing process, because it generally requires mold molding, but because the thick bottom of the copper sheet is too thin to be molded and prepared, it is generally used to extrude the copper sheet, so that the overcurrent capacity and volume can be smaller in example 1 of the present application by comparing with the prior art.
As shown in fig. 6, the conventional structure or chinese patent with publication number CN213366592U is compared with example 2, since example 2 is in the direction of the power semiconductor, the required current is larger, the effect of the overcurrent is larger, and after the improvement of the present application, the overcurrent capability is more advantageous than that of the conventional structure or chinese patent with publication number CN213366592U, and the present application has better effect.
The foregoing is merely a preferred embodiment of the present application and it should be noted that modifications and adaptations to those skilled in the art may be made without departing from the principles of the present application, which are intended to be comprehended within the scope of the present application.

Claims (10)

1. The utility model provides a frame construction, includes plastic envelope body (1) and chip (3), its characterized in that: still include electric connection material (4), first frame (5) and second frame (6), chip (3) set up on first frame (5), and the bottom and the first frame (5) electric connection of chip (3), the one end and the chip (3) of electric connection material (4) are connected, the other end and the second frame (6) of electric connection material (4) are connected, plastic envelope body (1) plastic envelope is in chip (3), electric connection material (4), the outside of first frame (5) and second frame (6), the outside of plastic envelope body (1) is stretched out at the both ends of first frame (5) and second frame (6), the bottom of first frame (5) and second frame (6) that are wrapped up by plastic envelope body (1) all sets up to the coarse structure face, the coarse structure face sets up to the coarse structure of indent, the adhesion of coarse structure face increase first frame (5) and second frame (6) and plastic envelope body (1), prevent plastic envelope body (1) and first frame (5) and second frame (6) layered structure of chip diode.
2. A frame structure according to claim 1, wherein: the first frame (5) and the second frame (6) are copper sheets, and the first frame (5) and the second frame (6) are respectively used as the positive electrode and the negative electrode of the chip.
3. A frame structure according to claim 2, wherein: the concave rough surface structure is integrally formed and arranged on the copper sheet by stamping through a stamping die.
4. A frame structure according to claim 2, wherein: the concave rough surface structure is arranged as a concave pit structure, a concave grid structure or a concave honeycomb structure.
5. A frame structure according to claim 3, wherein: the concave depth of the concave rough surface structure is five to twelve percent of the thickness of the copper sheet.
6. A frame structure according to claim 4, wherein: the concave pit structure is composed of a plurality of inwards concave hemispherical surfaces, the hemispherical surfaces are arranged at intervals, and the interval distance between the hemispherical surfaces is greater than or equal to one half of the radius of the hemispherical surfaces.
7. A frame structure according to claim 4, wherein: the grids in the concave grid structure are square, rectangular or equilateral triangles, and the spacing between the grids is 0.01-0.02mm.
8. A frame structure according to claim 1, wherein: the thickness of the first frame (5) and the second frame (6) is 0.2-0.8mm, the first frame (5) is set as a negative electrode frame, and the second frame (6) is set as a positive electrode frame.
9. A power tube frame structure, characterized in that: including plastic envelope body (1) and a plurality of chips (3), electric connection material (4), first frame (5) and second frame (6), chip (3) are the power tube chip, a plurality of power tube chips set up side by side on first frame (5), and the bottom and the first frame (5) electric connection of a plurality of chips (3), the one end and the a plurality of chips (3) of electric connection material (4) are connected, the other end and the second frame (6) of electric connection material (4) are connected, plastic envelope body (1) plastic envelope is in chip (3), electric connection material (4), the outside of first frame (5) and second frame (6), the outside of plastic envelope body (1) is stretched out at the both ends of first frame (5) and second frame (6), the bottom of first frame (5) and second frame (6) of being wrapped up by plastic envelope body (1) all sets up to the coarse structural surface, the adhesion of coarse structural surface increase first frame (5) and second frame (6) and plastic envelope body (1), prevent that plastic envelope body (1) and first frame (5) and second frame (6) from setting up with a plurality of parallel layers of power tube chips (6).
10. A power tube frame structure according to claim 9, wherein: the electric connection materials (4) are aluminum wires, aluminum belts or copper belts, and each power tube chip is provided with a plurality of electric connection materials (4) which are connected with the second frame (6).
CN202310923366.5A 2023-07-26 2023-07-26 Frame structure Pending CN116666344A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202310923366.5A CN116666344A (en) 2023-07-26 2023-07-26 Frame structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202310923366.5A CN116666344A (en) 2023-07-26 2023-07-26 Frame structure

Publications (1)

Publication Number Publication Date
CN116666344A true CN116666344A (en) 2023-08-29

Family

ID=87724454

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202310923366.5A Pending CN116666344A (en) 2023-07-26 2023-07-26 Frame structure

Country Status (1)

Country Link
CN (1) CN116666344A (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN201364899Y (en) * 2009-03-19 2009-12-16 宁波华龙电子股份有限公司 Integrated circuit lead frame of ring plated welding zone
CN104752386A (en) * 2013-12-25 2015-07-01 天水华天科技股份有限公司 High reliability small outline package (SOP) lead frame and production method of packaging piece
CN106684065A (en) * 2016-09-07 2017-05-17 四川上特科技有限公司 Novel integrated Mini rectifier bridge structure and fabrication process thereof
CN211295075U (en) * 2020-03-05 2020-08-18 杰华特微电子(杭州)有限公司 Chip packaging structure

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN201364899Y (en) * 2009-03-19 2009-12-16 宁波华龙电子股份有限公司 Integrated circuit lead frame of ring plated welding zone
CN104752386A (en) * 2013-12-25 2015-07-01 天水华天科技股份有限公司 High reliability small outline package (SOP) lead frame and production method of packaging piece
CN106684065A (en) * 2016-09-07 2017-05-17 四川上特科技有限公司 Novel integrated Mini rectifier bridge structure and fabrication process thereof
CN211295075U (en) * 2020-03-05 2020-08-18 杰华特微电子(杭州)有限公司 Chip packaging structure

Similar Documents

Publication Publication Date Title
CN100485917C (en) Method for manufacturing non-exterior pin semiconductor packaging construction plated in sealing glue
CN110429075B (en) High-density multi-side pin exposed packaging structure and production method thereof
CN109637811B (en) Ultra-thin polymer sheet type laminated solid aluminum electrolytic capacitor and preparation method thereof
CA1209653A (en) Solid electrolyte capacitor
CN103366957A (en) Multi-core-combined ceramic capacitor and manufacturing method thereof
CN212848364U (en) Packaging structure of multi-base-island lead frame
CN116666344A (en) Frame structure
CN210200717U (en) Silicon controlled rectifier adopting insulation encapsulation
CN114334885A (en) Double-chip sensor packaging structure based on conductive adhesive, method and device thereof
CN207602549U (en) A kind of three-dimensional chip stacked chips size packaging structure
CN113675149A (en) Lead frame with stress release structure and packaging material sheet
CN212182316U (en) Carrier-free semiconductor laminated packaging structure
CN213583768U (en) Impact-resistant lead frame
CN212182318U (en) High-power bridge rectifier
CN216250719U (en) Jumper wire connecting structure of semiconductor device
CN214956854U (en) Chip packaging structure
CN216928573U (en) High reverse voltage diode
CN212848367U (en) Stacked packaging structure
CN220121822U (en) Chip packaging frame structure
CN216250716U (en) Lead frame structure
CN213242543U (en) Lead frame packaging structure for increasing chip area
CN212230424U (en) WB chip packaging structure based on glass substrate
CN208478383U (en) A kind of packaging system of LED flip chip
CN217641312U (en) Punching type high-pin-position multi-row lead frame
CN216354195U (en) Pre-injection molding type pad-free QFN (quad flat no-lead) packaging substrate

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication

Application publication date: 20230829

RJ01 Rejection of invention patent application after publication