CN116581032A - Packaging loading plate with hollow structure and manufacturing process thereof - Google Patents
Packaging loading plate with hollow structure and manufacturing process thereof Download PDFInfo
- Publication number
- CN116581032A CN116581032A CN202310623902.XA CN202310623902A CN116581032A CN 116581032 A CN116581032 A CN 116581032A CN 202310623902 A CN202310623902 A CN 202310623902A CN 116581032 A CN116581032 A CN 116581032A
- Authority
- CN
- China
- Prior art keywords
- substrate
- manufacturing
- layer
- circuit
- copper
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 60
- 238000004806 packaging method and process Methods 0.000 title claims abstract description 17
- 238000011068 loading method Methods 0.000 title claims abstract description 9
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 73
- 239000000758 substrate Substances 0.000 claims abstract description 67
- 239000011889 copper foil Substances 0.000 claims abstract description 40
- 229920005989 resin Polymers 0.000 claims abstract description 40
- 239000011347 resin Substances 0.000 claims abstract description 40
- 238000000034 method Methods 0.000 claims abstract description 38
- 238000005553 drilling Methods 0.000 claims abstract description 19
- 238000003825 pressing Methods 0.000 claims abstract description 18
- 238000007639 printing Methods 0.000 claims abstract description 15
- 238000005530 etching Methods 0.000 claims abstract description 13
- 238000005520 cutting process Methods 0.000 claims abstract description 11
- 238000009713 electroplating Methods 0.000 claims abstract description 10
- 238000004381 surface treatment Methods 0.000 claims abstract description 5
- 238000003466 welding Methods 0.000 claims abstract description 5
- 239000010410 layer Substances 0.000 claims description 133
- 229910052802 copper Inorganic materials 0.000 claims description 33
- 239000010949 copper Substances 0.000 claims description 33
- 239000007788 liquid Substances 0.000 claims description 22
- 238000012545 processing Methods 0.000 claims description 14
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 claims description 12
- 239000003814 drug Substances 0.000 claims description 12
- 239000000126 substance Substances 0.000 claims description 12
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 claims description 9
- 238000004140 cleaning Methods 0.000 claims description 9
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 claims description 6
- 238000006243 chemical reaction Methods 0.000 claims description 6
- 238000000227 grinding Methods 0.000 claims description 6
- 239000011229 interlayer Substances 0.000 claims description 6
- 238000003801 milling Methods 0.000 claims description 6
- 238000007650 screen-printing Methods 0.000 claims description 6
- 238000005507 spraying Methods 0.000 claims description 6
- 238000011161 development Methods 0.000 claims description 4
- 239000003292 glue Substances 0.000 claims description 4
- 238000002791 soaking Methods 0.000 claims description 4
- 239000002253 acid Substances 0.000 claims description 3
- 239000000853 adhesive Substances 0.000 claims description 3
- 230000001070 adhesive effect Effects 0.000 claims description 3
- 239000012459 cleaning agent Substances 0.000 claims description 3
- 239000011248 coating agent Substances 0.000 claims description 3
- 238000000576 coating method Methods 0.000 claims description 3
- 238000004891 communication Methods 0.000 claims description 3
- ORTQZVOHEJQUHG-UHFFFAOYSA-L copper(II) chloride Chemical compound Cl[Cu]Cl ORTQZVOHEJQUHG-UHFFFAOYSA-L 0.000 claims description 3
- 230000008021 deposition Effects 0.000 claims description 3
- 238000001035 drying Methods 0.000 claims description 3
- 239000003822 epoxy resin Substances 0.000 claims description 3
- 239000004519 grease Substances 0.000 claims description 3
- 238000007731 hot pressing Methods 0.000 claims description 3
- 229910052739 hydrogen Inorganic materials 0.000 claims description 3
- 230000003301 hydrolyzing effect Effects 0.000 claims description 3
- 239000005457 ice water Substances 0.000 claims description 3
- 238000003384 imaging method Methods 0.000 claims description 3
- 238000003475 lamination Methods 0.000 claims description 3
- 229920002120 photoresistant polymer Polymers 0.000 claims description 3
- 238000005554 pickling Methods 0.000 claims description 3
- 229920000647 polyepoxide Polymers 0.000 claims description 3
- 230000000379 polymerizing effect Effects 0.000 claims description 3
- 230000002265 prevention Effects 0.000 claims description 3
- 238000007127 saponification reaction Methods 0.000 claims description 3
- 229920001187 thermosetting polymer Polymers 0.000 claims description 3
- 238000005406 washing Methods 0.000 claims description 3
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 3
- 239000011265 semifinished product Substances 0.000 claims description 2
- 229910000679 solder Inorganic materials 0.000 description 4
- 239000000047 product Substances 0.000 description 3
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 2
- 238000010030 laminating Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012805 post-processing Methods 0.000 description 1
- 238000010019 resist printing Methods 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4857—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49822—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02W—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO WASTEWATER TREATMENT OR WASTE MANAGEMENT
- Y02W30/00—Technologies for solid waste management
- Y02W30/50—Reuse, recycling or recovery technologies
- Y02W30/80—Packaging reuse or recycling, e.g. of multilayer packaging
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Geometry (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
The application relates to a packaging loading plate with a hollow structure and a manufacturing process thereof, wherein the manufacturing process comprises the following steps: cutting and manufacturing circuits of the first core plate, and printing a first resin layer on an inner layer circuit of the first core plate to obtain a first substrate; preparing a second core board, etching copper foils on two sides, attaching pure films on two sides of an insulating layer of the second core board, and manufacturing a cavity through a UV laser process to obtain a second substrate; cutting and manufacturing lines on the third core plate, and printing a second resin layer on an inner layer line of the third core plate to obtain a third substrate; sequentially overlapping and pressing the first, second and third substrates to form a semi-finished board; and (3) drilling and electroplating the semi-finished board, manufacturing an outer layer circuit, performing anti-welding and surface treatment, and performing laser uncapping treatment to form sound holes to obtain the packaging loading board. In the manufacturing process, a resin layer is printed when the inner layer circuit is manufactured, so that the problem of short circuit of the dense circuit is solved.
Description
Technical Field
The application relates to carrier plate manufacturing, in particular to a packaging carrier plate with a hollow structure and a manufacturing process thereof.
Background
Along with the development of electronic technology and the requirement of people on miniaturization and high integration of electronic products, the packaging carrier plate needs to be internally provided with a hollow structure, and dense circuits are required above and below the hollow structure. At present, when a hollow structure is manufactured, UV laser carbon powder is easy to cause short circuit of upper and lower layers of circuits, so that poor products are caused.
Disclosure of Invention
In order to overcome the above-mentioned drawbacks, the present application provides a manufacturing process of a package carrier having a hollow structure, in which a resin layer is printed during the manufacture of an inner layer circuit, so as to solve the problem of short circuit of a dense circuit.
The technical scheme adopted by the application for solving the technical problems is as follows:
a manufacturing process of a packaging loading plate with a hollow structure comprises the following steps:
s1: manufacturing a first substrate: preparing a first core board, cutting and manufacturing circuits of the first core board, and printing a first resin layer on an inner layer circuit of the first core board to obtain a first substrate;
s2: manufacturing a second substrate: preparing a second core board, etching copper foils on two sides, attaching pure films on two sides of an insulating layer of the second core board, and manufacturing a cavity through a UV laser process to obtain a second substrate;
s3: manufacturing a third substrate: preparing a third core board, cutting and manufacturing a circuit of the third core board, and printing a second resin layer on an inner layer circuit of the third core board to obtain a third substrate;
s4: sequentially superposing a first substrate, a second substrate and a third substrate, and pressing the first substrate, the second substrate and the third substrate by a press to form a semi-finished board, wherein two sides of the second substrate are respectively attached to the first resin layer and the second resin layer;
s5: and (3) carrying out drilling electroplating, outer layer circuit manufacturing, welding prevention and surface treatment on the semi-finished product plate, and then carrying out laser uncovering treatment on the third substrate to form sound holes, so as to obtain the packaging carrier plate, wherein the sound holes are communicated with the cavity.
Optionally, the drilling electroplating in S5 includes the steps of: drilling a through hole for interlayer communication on the plate by using a drilling machine, and carrying out photoresist residue removal, chemical copper and copper electroplating treatment on the through hole so as to form a copper layer on the inner layer of the through hole to form a through hole for interlayer circuit conduction; the specific process parameters are as follows: the feed speed is 1.2+/-0.1 m/min, the withdrawal speed is 15+/-1 m/min, the rotating speed is 160+/-10 krpm/min, and the depth compensation is 0.3-0.4mm; the adhesive removing rate is 0.1-0.4mg/cm 2 The microetching rate is 20-60 mu m/min, and the deposition rate is 17-32 mu m/min.
Optionally, the line making in S1, S3 and S5 includes the steps of:
(1) Pretreatment: cleaning the surface of the plate by using a cleaning solution containing hydrogen peroxide, and coarsening the surface of the copper foil layer by using a sulfuric acid solution;
(2) Pressing dry film: adhering a photosensitive dry film on the surface of the copper foil layer in a hot pressing mode;
(3) Exposure: polymerizing the photosensitive substance in the photosensitive dry film by using an LDI exposure machine, so that the designed pattern is transferred to the photosensitive dry film;
(4) Developing: saponification reaction of the developing solution and the unexposed dry film is utilized to remove the film;
(5) Etching: spraying copper chloride liquid medicine on the copper surface through an etching machine, and etching the copper surface which is not protected by the dry film by utilizing chemical reaction of the liquid medicine and copper to form a circuit;
(6) Film stripping: spraying NaOH or KOH liquid medicine on the board surface through a film removing machine, and removing the dry film by utilizing the chemical reaction of the liquid medicine and the dry film to finish the manufacture of the circuit;
(7) AOI: the AOI system checks the circuit on the copper surface against the difference between the etched circuit and the original designed circuit;
the specific process parameters of the dry film pressing are as follows: the temperature is 110+/-2 ℃, the linear speed is 1.8+/-0.2 m/min, and the pressure is 6+/-0.2 kg/cm 2 The method comprises the steps of carrying out a first treatment on the surface of the The energy grid during exposure is 6+/-1; the specific technological parameters during development are as follows: the linear velocity is 3.0+/-0.1 m/min, and the pressure is 1.3+/-0.3 kg/cm 2 The temperature was 30.+ -. 2 ℃.
Optionally, the manufacturing of the resin layer in S1 and S3 includes the following steps:
(1) Pretreatment: removing oxide on the copper surface, pickling and drying after microetching;
(2) Screen printing and pre-baking: uniformly coating ink on the surface of an inner layer circuit through screen printing and locally solidifying the ink through pre-baking, wherein the mesh number of a printing screen is 120 meshes, the thickness of a wet film is 30+/-2 mu m, and the ink adopts thermosetting solvent-free epoxy resin;
(3) Grinding: the surface flatness of the printing ink is treated by eight-axis grinding, so that the thickness tolerance can be controlled to be +/-5 mu m;
wherein the thickness of the first resin layer and the second resin layer is 15.+ -.5. Mu.m.
Optionally, pre-attaching the pure film in the step S2 by using a vacuum film attaching machine, wherein the attaching temperature is 70+/-5 ℃ and the film pressing pressure is as follows: 0.6-0.7Mpa, vacuum reaching time less than 20S; the technological parameters of the UV laser manufacturing cavity are as follows: the laser has the advantages that the laser UV sheath second power is 10W, the frequency is 1000KHZ, the processing speed is 1500mm/s, and the processing times are 3 times; and after UV laser, placing the second substrate in an environment with the temperature of 120+/-10 ℃ for baking for 30+/-5 min, so that the glue overflow quantity is less than 0.05mm.
Optionally, the pressing in S4 includes the steps of:
(1) Pretreatment: acid washing: removing oxide on the surface of the copper foil layer by utilizing sulfuric acid; cleaning: hydrolyzing the grease into small molecular substances which are easy to dissolve in water by using a cleaning agent; presoaking: pre-soaking the inner layer plate by using brown liquid;
(2) Brown chemical: the surface of the copper foil layer is subjected to brown treatment by using brown liquid, so that the surface of the copper layer forms an uneven surface shape, and the contact area of the copper surface and resin is increased;
(3) Overlapping: sequentially stacking plates to be pressed together;
(4) Pressing: fusing and bonding the plates to be pressed into a multi-layer plate at high temperature and high pressure of a press;
(5) Post-treatment: drilling: imaging a plate target by utilizing X-rays, and drilling a positioning hole and a fool-proof hole required by a subsequent process on the target by using a drill bit; edge milling: and cutting and removing redundant rim charge by using a milling machine.
Optionally, the specific process parameters of the browning are as follows: microetching rate of 1.2-1.6 μm, mass percentage concentration of medicinal liquid in the presoaking tank of 1.2-2.8%, H in the browning tank 2 O 2 The mass percentage concentration of (2) is 4.2-4.8%; the specific technological parameters of the lamination are as follows: ice water pressure of 0.2+/-0.1 MPa, vacuum degree of less than or equal to 40mPa, oil outlet pressure of 0.2+/-0.1 MPa and oil inlet pressureThe force is 0.5+/-0.1 MPa.
Optionally, in S5, the technological parameters of laser uncapping are: the laser has the advantages of 10W of UV sheath second power, 1000KHZ of frequency, 1500mm/s of processing speed and 2-3 times of processing.
The packaging carrier plate with the hollow structure is manufactured according to the manufacturing process of the packaging carrier plate with the hollow structure.
The beneficial effects of the application are as follows:
1) When inner-layer circuits of the first substrate and the third substrate are manufactured in the manufacturing process, the inner circuits are protected by a layer of resin layer through solder resist printing, so that the problem of short circuit of a sealing circuit crossing a cavity can be solved;
2) When the cavity structure on the second substrate is manufactured, the cavity with enough size can be obtained by using UV laser processing, the size of the hollow back cavity can be controlled to be +/-0.02 mm, the glue overflow amount is less than 0.05mm, and the alignment degree of the film and the cavity is improved by combining a pre-attached pure film with a laser process;
3) Through laser uncapping process, the hollow cavity is communicated with the outside, and the packaging carrier plate obtained by the manufacturing process not only increases the volume of the cavity and improves the signal to noise ratio and other performances of the product, but also solves the problem that dense circuits are easy to short-circuit.
Drawings
FIG. 1 is a schematic view of a package carrier according to the present application;
FIG. 2 is a schematic view of a first core plate according to the present application;
FIG. 3 is a schematic view of a first substrate according to the present application;
FIG. 4 is a schematic view of a second core plate according to the present application;
FIG. 5 is a schematic view of the structure of the second core board after attaching the plain film according to the present application;
FIG. 6 is a schematic diagram of a second substrate according to the present application;
FIG. 7 is a schematic view of a third core plate according to the present application;
FIG. 8 is a schematic structural view of a third substrate according to the present application;
in the figure: 10-first substrate, 11-first insulating layer, 12-first copper foil layer, 13-second copper foil layer, 14-first resin layer, 20-second substrate, 21-second insulating layer, 22-third copper foil layer, 23-fourth copper foil layer, 24-pure film, 25-cavity, 30-third substrate, 31-third insulating layer, 32-fifth copper foil layer, 33-sixth copper foil layer, 34-second resin layer, 40-package carrier, 41-sound hole, 42-solder mask.
Detailed Description
The technical solutions of the embodiments of the present application will be clearly and completely described below in conjunction with the embodiments of the present application, and it is apparent that the described embodiments are only some embodiments of the present application, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
It should be noted that the terms "first," "second," and the like in the description and claims of the present application and in the following figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the objects so used may be interchanged where appropriate such that embodiments of the application described herein may be capable of operation in sequences other than those illustrated or otherwise described. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
Spatially relative terms, such as "above … …," "above … …," "upper surface at … …," "above," and the like, may be used herein for ease of description to describe one device or feature's spatial location relative to another device or feature as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as "above" or "over" other devices or structures would then be oriented "below" or "beneath" the other devices or structures. Thus, the exemplary term "above … …" may include both orientations of "above … …" and "below … …". The device may also be positioned in other different ways (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.
Examples: a manufacturing process of a packaging loading plate with a hollow structure comprises the following steps:
s1: fabrication of the first substrate 10: as shown in fig. 2, preparing a first core board, performing cutting and circuit manufacturing on the first core board, and printing a first resin layer 14 on an inner layer circuit of the first core board, as shown in fig. 3, to obtain a first substrate 10; the first core board comprises a first insulating layer 11, a first copper foil layer 12 and a second copper foil layer 13 which are respectively arranged on the front side and the back side of the first insulating layer, a circuit pattern is manufactured on the second copper foil layer 13, a dry film is covered at a circuit position which is finally required to be reserved, the exposed copper surface is etched, the film is removed to obtain an inner-layer dense circuit pattern, then a first resin layer 14, namely an ink resin layer, is printed on the circuit pattern, and the circuit on the second copper foil layer is protected from being damaged by a post-processing through the first resin layer; in this embodiment, the first substrate 10 is a double-layer board, and in other embodiments, the first substrate 10 may be an N-layer board, where N is 3-10 layer boards, and the required N-layer board is obtained by performing a layer-adding operation on the first core board;
s2: fabrication of the second substrate 20: as shown in fig. 4 and 5, preparing a second core board, etching copper foils on both sides, attaching pure films 24 on both sides of an insulating layer of the second core board, and manufacturing a cavity 25 through a UV laser process, as shown in fig. 6, to obtain a second substrate 20; the second core board comprises a second insulating layer 21, and a third copper foil layer 22 and a fourth copper foil layer 23 respectively arranged on the front side and the back side of the second insulating layer, after the third copper foil layer 22 and the fourth copper foil layer 23 are etched, pure films 24 are stuck on the front side and the back side of the second insulating layer 21, and after cavities 25 are manufactured on the second core board and the pure films 24 through a UV laser process, a second substrate 20 is obtained;
s3: manufacturing of the third substrate 30: as shown in fig. 7, preparing a third core board, cutting and wiring the third core board, and printing a second resin layer 34 on an inner layer wiring of the third core board, as shown in fig. 8, to obtain a third substrate 30; the third core board comprises a third insulating layer 31, a fifth copper foil layer 32 and a sixth copper foil layer 33 which are respectively arranged on the front side and the back side of the third insulating layer, a circuit pattern is manufactured on the sixth copper foil layer 33, a dry film is covered at the circuit position which is finally required to be reserved, the exposed copper surface is etched, the dense circuit pattern of the inner layer is obtained after the film is removed, then a second resin layer 34 is printed on the circuit pattern, and the circuit on the sixth copper foil layer is protected through the resin layer, so that the damage of the subsequent process is prevented; in this embodiment, the third substrate 30 is a double-layer board, and in other embodiments, the third substrate 30 may be an N-layer board, where N is 3-10 layers, and the required N-layer board is obtained by performing a build-up operation on the third core board;
s4: sequentially superposing the first substrate 10, the second substrate 20 and the third substrate 30 and pressing the first substrate, the second substrate 20 and the third substrate into a semi-finished board by using a press, wherein two sides of the second substrate 20 are respectively attached to the first resin layer 14 and the second resin layer 34; the green sheet 24 and the resin layer are bonded to each other, and the semi-finished board is in this order: a fifth copper foil layer 32, a third insulating layer 31, a sixth copper foil layer 33, a second resin layer 34, a green sheet 24, a second insulating layer 21, a green sheet 24, a first resin layer 14, a second copper foil layer 13, a first insulating layer 11, and a first copper foil layer 12;
s5: as shown in fig. 1, after drilling, electroplating, outer layer circuit manufacturing, welding prevention and surface treatment are performed on the semi-finished board, laser uncapping treatment is performed on the third substrate 30 to form sound holes 41, and the package carrier board 40 is obtained, wherein the sound holes 41 are communicated with the cavity 25. The semi-finished board is drilled with copper to form via holes which are mutually communicated between layers, the outer copper foil layer is subjected to outer circuit treatment, the solder mask layer 42 is formed after the solder mask treatment, a gold layer is plated on the exposed copper foil after the surface treatment, and the sound holes 41 are processed in a laser mode to realize connection between the outside and the hollow cavity, so that the finished package carrier 50 is obtained. In the manufacturing process, when inner-layer circuits of the first substrate 10 and the third substrate 30 are etched, a resin layer is formed through anti-welding printing to protect the inner-layer circuits, so that damage of a later process is prevented, and the problem that carbon powder generated by UV laser causes short circuits of the upper-layer circuits and the lower-layer circuits can be prevented; when the cavity structure on the second substrate 20 is manufactured, the UV laser processing is used, cavities with different sizes and shapes can be realized, the alignment degree of the film and the hollow substrate is improved by pre-attaching the pure film and then laser, and the laser precision is controlled to be +/-0.02 mm, so that the alignment degree of the chip and the cavity is improved; the hollow cavity is communicated with the outside through a laser uncovering process, so that the manufacture of a dense circuit with a hollow structure packaging loading plate is realized, wherein the minimum line width is 40 microns and the line distance is 40 microns.
S5, electroplating the drilling holes comprises the following steps: drilling a through hole for interlayer communication on the plate by using a drilling machine, and carrying out photoresist residue removal, chemical copper and copper electroplating treatment on the through hole so as to form a copper layer on the inner layer of the through hole to form a through hole for interlayer circuit conduction; the specific process parameters are as follows: the feed speed is 1.2+/-0.1 m/min, the withdrawal speed is 15+/-1 m/min, the rotating speed is 160+/-10 krpm/min, and the depth compensation is 0.3-0.4mm; the adhesive removing rate is 0.1-0.4mg/cm 2 The microetching rate is 20-60 mu m/min, and the deposition rate is 17-32 mu m/min.
S1, S3 and S5 circuit fabrication comprises the following steps:
(1) Pretreatment: cleaning the surface of the plate by using a cleaning solution containing hydrogen peroxide, and coarsening the surface of the copper foil layer by using a sulfuric acid solution;
(2) Pressing dry film: adhering a photosensitive dry film on the surface of the copper foil layer in a hot pressing mode;
(3) Exposure: polymerizing the photosensitive substance in the photosensitive dry film by using an LDI exposure machine, so that the designed pattern is transferred to the photosensitive dry film;
(4) Developing: saponification reaction of the developing solution and the unexposed dry film is utilized to remove the film;
(5) Etching: spraying copper chloride liquid medicine on the copper surface through an etching machine, and etching the copper surface which is not protected by the dry film by utilizing chemical reaction of the liquid medicine and copper to form a circuit;
(6) Film stripping: spraying NaOH or KOH liquid medicine on the board surface through a film removing machine, and removing the dry film by utilizing the chemical reaction of the liquid medicine and the dry film to finish the manufacture of the circuit;
(7) AOI: the AOI system checks the circuit on the copper surface against the difference between the etched circuit and the original designed circuit;
the specific process parameters of the dry film pressing are as follows: the temperature is 110+/-2 ℃, the linear speed is 1.8+/-0.2 m/min, and the pressure is 6+/-0.2 kg/cm 2 The method comprises the steps of carrying out a first treatment on the surface of the The energy grid during exposure is 6+/-1; the specific technological parameters during development are as follows: the linear velocity is 3.0+/-0.1 m/min, and the pressure is 1.3+/-0.3 kg/cm 2 The temperature was 30.+ -. 2 ℃.
The manufacture of the resin layer in S1 and S3 comprises the following steps:
(1) Pretreatment: removing oxide on the copper surface, pickling and drying after microetching;
(2) Screen printing and pre-baking: uniformly coating ink on the surface of an inner layer circuit through screen printing and locally solidifying the ink through pre-baking, wherein the mesh number of a printing screen is 120 meshes, the thickness of a wet film is 30+/-2 mu m, and the ink adopts thermosetting solvent-free epoxy resin; the ink is characterized in that the viscosity is rapidly reduced to remove bubbles and the ink has high fluidity when the temperature is raised, so that the flatness of the ink can be realized to +/-7 mu m;
(3) Grinding: the surface flatness of the printing ink is treated by eight-axis grinding, so that the thickness tolerance can be controlled to be +/-5 mu m;
wherein the thickness of the ink resin layer 14 is 15.+ -.5. Mu.m. The ink resin layer is used for protecting the pattern at the bottom of the cavity from being damaged.
In S2, pre-attaching the pure film 24 by using a vacuum laminator, wherein the laminating temperature is 70+/-5 ℃ and the laminating pressure is as follows: 0.6-0.7Mpa, vacuum reaching time less than 20S; the process parameters of the UV laser manufacturing cavity 25 are as follows: the laser has the advantages that the laser UV sheath second power is 10W, the frequency is 1000KHZ, the processing speed is 1500mm/s, and the processing times are 3 times; and after UV laser, placing the second substrate 20 in an environment with the temperature of 120+/-10 ℃ for baking for 30+/-5 min, so that the glue overflow quantity is less than 0.05mm. The attached film passes through pictures required by laser places in a laser mode, cavity designs with different sizes and shapes can be realized, laser precision is controlled to be +/-0.02 mm, and the alignment degree of a chip and the cavity can be improved.
The pressing in S4 comprises the steps of:
(1) Pretreatment: acid washing: removing oxide on the surface of the copper foil layer by utilizing sulfuric acid; cleaning: hydrolyzing the grease into small molecular substances which are easy to dissolve in water by using a cleaning agent; presoaking: pre-soaking the inner layer plate by using brown liquid;
(2) Brown chemical: the surface of the copper foil layer is subjected to brown treatment by using brown liquid, so that the surface of the copper layer forms an uneven surface shape, and the contact area of the copper surface and resin is increased;
(3) Overlapping: sequentially stacking plates to be pressed together;
(4) Pressing: fusing and bonding the plates to be pressed into a multi-layer plate at high temperature and high pressure of a press;
(5) Post-treatment: drilling: imaging a plate target by utilizing X-rays, and drilling a positioning hole and a fool-proof hole required by a subsequent process on the target by using a drill bit; edge milling: and cutting and removing redundant rim charge by using a milling machine.
The specific process parameters of the browning are as follows: microetching rate of 1.2-1.6 μm, mass percentage concentration of medicinal liquid in the presoaking tank of 1.2-2.8%, H in the browning tank 2 O 2 The mass percentage concentration of (2) is 4.2-4.8%; the specific technological parameters of the lamination are as follows: the ice water pressure is 0.2+/-0.1 MPa, the vacuum degree is less than or equal to 40MPa, the oil outlet pressure is 0.2+/-0.1 MPa, and the oil inlet pressure is 0.5+/-0.1 MPa. The medicinal liquid in the pre-soaking tank is BR616.
In S5, the technological parameters of the laser uncovering are as follows: the laser has the advantages of 10W of UV sheath second power, 1000KHZ of frequency, 1500mm/s of processing speed and 2-3 times of processing.
The packaging carrier plate with the hollow structure is manufactured according to the manufacturing process of the packaging carrier plate with the hollow structure. As shown in fig. 1, the package carrier 40 has a cavity 25 therein, and the cavity 25 is used for mounting chips by customers.
It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the application, which are all within the scope of the application. Accordingly, the scope of protection of the present application is to be determined by the appended claims.
Claims (9)
1. A manufacturing process of a packaging loading plate with a hollow structure is characterized by comprising the following steps of: the method comprises the following steps:
s1: manufacturing of a first substrate (10): preparing a first core board, cutting and manufacturing circuits of the first core board, and printing a first resin layer (14) on an inner layer circuit of the first core board to obtain a first substrate (10);
s2: manufacturing a second substrate (20): preparing a second core board, etching copper foils on two sides, attaching pure films (24) on two sides of an insulating layer of the second core board, and manufacturing a cavity (25) through a UV laser process to obtain a second substrate (20);
s3: manufacturing a third substrate (30): preparing a third core board, cutting and manufacturing circuits of the third core board, and printing a second resin layer (34) on an inner layer circuit of the third core board to obtain a third substrate (30);
s4: sequentially superposing a first substrate (10), a second substrate (20) and a third substrate (30) and pressing the first substrate, the second substrate and the third substrate into a semi-finished board by using a press, wherein two sides of the second substrate (20) are respectively attached to a first resin layer (14) and a second resin layer (34);
s5: and (3) after drilling electroplating, outer layer circuit manufacturing, welding prevention and surface treatment are carried out on the semi-finished product plate, laser uncovering treatment is carried out on the third substrate (30) to form sound holes (41), and the packaging loading plate (40) is obtained, wherein the sound holes (41) are communicated with the cavity (25).
2. The process for manufacturing a package carrier having a hollow structure according to claim 1, wherein: s5, electroplating the drilling holes comprises the following steps: drilling a through hole for interlayer communication on the plate by using a drilling machine, and carrying out photoresist residue removal, chemical copper and copper electroplating treatment on the through hole so as to form a copper layer on the inner layer of the through hole to form a through hole for interlayer circuit conduction; the specific process parameters are as follows: the feed speed is 1.2+/-0.1 m/min, and the withdrawal speed is 15+/-1m/min, the rotating speed is 160+/-10 krpm/min, and the depth compensation is 0.3-0.4mm; the adhesive removing rate is 0.1-0.4mg/cm 2 The microetching rate is 20-60 mu m/min, and the deposition rate is 17-32 mu m/min.
3. The process for manufacturing a package carrier having a hollow structure according to claim 1, wherein: s1, S3 and S5 circuit fabrication comprises the following steps:
(1) Pretreatment: cleaning the surface of the plate by using a cleaning solution containing hydrogen peroxide, and coarsening the surface of the copper foil layer by using a sulfuric acid solution;
(2) Pressing dry film: adhering a photosensitive dry film on the surface of the copper foil layer in a hot pressing mode;
(3) Exposure: polymerizing the photosensitive substance in the photosensitive dry film by using an LDI exposure machine, so that the designed pattern is transferred to the photosensitive dry film;
(4) Developing: saponification reaction of the developing solution and the unexposed dry film is utilized to remove the film;
(5) Etching: spraying copper chloride liquid medicine on the copper surface through an etching machine, and etching the copper surface which is not protected by the dry film by utilizing chemical reaction of the liquid medicine and copper to form a circuit;
(6) Film stripping: spraying NaOH or KOH liquid medicine on the board surface through a film removing machine, and removing the dry film by utilizing the chemical reaction of the liquid medicine and the dry film to finish the manufacture of the circuit;
(7) AOI: the AOI system checks the circuit on the copper surface against the difference between the etched circuit and the original designed circuit;
the specific process parameters of the dry film pressing are as follows: the temperature is 110+/-2 ℃, the linear speed is 1.8+/-0.2 m/min, and the pressure is 6+/-0.2 kg/cm 2 The method comprises the steps of carrying out a first treatment on the surface of the The energy grid during exposure is 6+/-1; the specific technological parameters during development are as follows: the linear velocity is 3.0+/-0.1 m/min, and the pressure is 1.3+/-0.3 kg/cm 2 The temperature was 30.+ -. 2 ℃.
4. The process for manufacturing a package carrier having a hollow structure according to claim 1, wherein: the manufacture of the resin layer in S1 and S3 comprises the following steps:
(1) Pretreatment: removing oxide on the copper surface, pickling and drying after microetching;
(2) Screen printing and pre-baking: uniformly coating ink on the surface of an inner layer circuit through screen printing and locally solidifying the ink through pre-baking, wherein the mesh number of a printing screen is 120 meshes, the thickness of a wet film is 30+/-2 mu m, and the ink adopts thermosetting solvent-free epoxy resin;
(3) Grinding: the surface flatness of the printing ink is treated by eight-axis grinding, so that the thickness tolerance can be controlled to be +/-5 mu m;
wherein the thickness of the first resin layer (14) and the second resin layer (34) is 15 + -5 [ mu ] m.
5. The process for manufacturing a package carrier having a hollow structure according to claim 1, wherein: in S2, pre-attaching a pure film (24) by using a vacuum film attaching machine, wherein the attaching temperature is 70+/-5 ℃ and the film pressing pressure is as follows: 0.6-0.7Mpa, vacuum reaching time less than 20S; the technological parameters of the UV laser manufacturing cavity (25) are as follows: the laser has the advantages that the laser UV sheath second power is 10W, the frequency is 1000KHZ, the processing speed is 1500mm/s, and the processing times are 3 times; and after UV laser, placing the second substrate (20) in an environment with the temperature of 120+/-10 ℃ for baking for 30+/-5 min, so that the glue overflow amount is less than 0.05mm.
6. The process for manufacturing a package carrier having a hollow structure according to claim 1, wherein: the pressing in S4 comprises the steps of:
(1) Pretreatment: acid washing: removing oxide on the surface of the copper foil layer by utilizing sulfuric acid; cleaning: hydrolyzing the grease into small molecular substances which are easy to dissolve in water by using a cleaning agent; presoaking: pre-soaking the inner layer plate by using brown liquid;
(2) Brown chemical: the surface of the copper foil layer is subjected to brown treatment by using brown liquid, so that the surface of the copper layer forms an uneven surface shape, and the contact area of the copper surface and resin is increased;
(3) Overlapping: sequentially stacking plates to be pressed together;
(4) Pressing: fusing and bonding the plates to be pressed into a multi-layer plate at high temperature and high pressure of a press;
(5) Post-treatment: drilling: imaging a plate target by utilizing X-rays, and drilling a positioning hole and a fool-proof hole required by a subsequent process on the target by using a drill bit; edge milling: and cutting and removing redundant rim charge by using a milling machine.
7. The process for manufacturing a package carrier having a hollow structure according to claim 6, wherein: the specific process parameters of the browning are as follows: microetching rate of 1.2-1.6 μm, mass percentage concentration of medicinal liquid in the presoaking tank of 1.2-2.8%, H in the browning tank 2 O 2 The mass percentage concentration of (2) is 4.2-4.8%; the specific technological parameters of the lamination are as follows: the ice water pressure is 0.2+/-0.1 MPa, the vacuum degree is less than or equal to 40MPa, the oil outlet pressure is 0.2+/-0.1 MPa, and the oil inlet pressure is 0.5+/-0.1 MPa.
8. The process for manufacturing a package carrier having a hollow structure according to claim 1, wherein: in S5, the technological parameters of the laser uncovering are as follows: the laser has the advantages of 10W of UV sheath second power, 1000KHZ of frequency, 1500mm/s of processing speed and 2-3 times of processing.
9. A package carrier plate having a hollow structure, characterized in that: the package carrier with hollow structure according to any one of claims 1-8.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202310623902.XA CN116581032A (en) | 2023-05-30 | 2023-05-30 | Packaging loading plate with hollow structure and manufacturing process thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202310623902.XA CN116581032A (en) | 2023-05-30 | 2023-05-30 | Packaging loading plate with hollow structure and manufacturing process thereof |
Publications (1)
Publication Number | Publication Date |
---|---|
CN116581032A true CN116581032A (en) | 2023-08-11 |
Family
ID=87541224
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202310623902.XA Pending CN116581032A (en) | 2023-05-30 | 2023-05-30 | Packaging loading plate with hollow structure and manufacturing process thereof |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN116581032A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN117153631A (en) * | 2023-10-31 | 2023-12-01 | 圆周率半导体(南通)有限公司 | Preparation method of fuse element of fuse link current |
-
2023
- 2023-05-30 CN CN202310623902.XA patent/CN116581032A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN117153631A (en) * | 2023-10-31 | 2023-12-01 | 圆周率半导体(南通)有限公司 | Preparation method of fuse element of fuse link current |
CN117153631B (en) * | 2023-10-31 | 2023-12-29 | 圆周率半导体(南通)有限公司 | Preparation method of fuse element of fuse link current |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN100386869C (en) | Ball grid array substrate having window and method of fabricating same | |
US8238114B2 (en) | Printed wiring board and method for manufacturing same | |
EP1009205A1 (en) | Single-sided circuit board and method for manufacturing the same | |
KR20070086941A (en) | Printed wiring board | |
US8574444B2 (en) | Fabricating method for multilayer printed circuit board | |
CN114302561B (en) | Manufacturing method of multilayer board with ultralow copper residue and semi-through holes | |
CN116581032A (en) | Packaging loading plate with hollow structure and manufacturing process thereof | |
CN110621123A (en) | Manufacturing method of heat-conducting PCB and PCB | |
CN110798988A (en) | Additive process for manufacturing high-frequency antenna packaging substrate and AiP packaging antenna structure | |
CN114501855B (en) | Manufacturing process of double-sided buried wire ultrathin circuit board | |
WO2004064150A1 (en) | Method for manufacturing electronic component mount board and electronic mount board manufactured by this method | |
CN114206001B (en) | High-voltage-resistant MEMS (micro-electromechanical systems) packaging loading plate and manufacturing process thereof | |
CN114195090B (en) | Ultra-high capacitance MEMS packaging loading plate and manufacturing process thereof | |
CN114368726B (en) | MEMS (micro-electromechanical systems) built-in chip packaging loading plate and manufacturing process thereof | |
CN114466512B (en) | MEMS (micro-electromechanical systems) buried-capacitor buried-resistor packaging loading plate and manufacturing process thereof | |
CN114269071B (en) | Through hole filling manufacturing process of multilayer board | |
CN116634687A (en) | Packaging carrier plate of semi-buried chip and processing technology thereof | |
CN114340223A (en) | Manufacturing method of multilayer board based on high aspect ratio selective semiconductor through hole | |
CN112040677A (en) | Novel circuit board lamination method | |
CN114190010B (en) | Processing technology of carrier plate with PAD at bottom of blind groove | |
CN114477073B (en) | Manufacturing method for improving edge chip drop of MEMS carrier plate | |
CN114375097B (en) | Processing technology of packaging substrate for sensor | |
KR100645656B1 (en) | Method for manufacturing semiconductor chip package board | |
CN114132886B (en) | Five-layer buried-capacitor MEMS (micro-electromechanical systems) packaging loading plate with high hole filling ratio and manufacturing process thereof | |
CN116634676A (en) | Double-golden edge package loading plate and manufacturing process thereof |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination |