CN116504610A

CN116504610A - Mask structure, pattern forming method and preparation method of semiconductor structure

Info

Publication number: CN116504610A
Application number: CN202310737077.6A
Authority: CN
Inventors: 盛薄辉
Original assignee: Changxin Memory Technologies Inc
Current assignee: Changxin Memory Technologies Inc
Priority date: 2023-06-21
Filing date: 2023-06-21
Publication date: 2023-07-28
Anticipated expiration: 2043-06-21
Also published as: CN116504610B

Abstract

The present disclosure relates to a mask structure, a pattern forming method, and a method of manufacturing a semiconductor structure. The mask structure includes a plurality of mask layers and a plurality of anti-reflection layers alternately stacked; wherein, the etching selectivity of the adjacent anti-reflection layers positioned at two sides of any mask layer is different. In some examples, the materials of adjacent anti-reflective layers on both sides of either mask layer are silicon-based materials and contain the same elemental species; wherein the molar ratio of each element in the silicon-based material of different anti-reflection layers is different. The mask structure, the pattern forming method and the preparation method of the semiconductor structure can effectively control the stability of the mask pattern, thereby effectively controlling the appearance and the key size of a target structure formed based on the mask pattern and further improving the electrical performance of a device.

Description

Mask structure, pattern forming method and preparation method of semiconductor structure

Technical Field

The present disclosure relates to the field of integrated circuit technology, and in particular, to a mask structure, a pattern forming method, and a method for manufacturing a semiconductor structure.

Background

A dynamic random access memory (Dynamic Random Access Memory, abbreviated as DRAM) is a semiconductor memory that randomly writes and reads data at high speed, and is widely used in data storage devices or apparatuses.

With the continued development of semiconductor manufacturing processes, the size of DRAM is also becoming smaller. In particular, as the process node of DRAM goes to 10nm and below, such small pattern sizes have exceeded the resolution limits of current immersion lithography machines. For this reason, a sidewall self-aligned multiple patterning technique is required to be used, so that the stability of the mask pattern becomes a very challenging process. Therefore, how to effectively control the stability of the mask pattern is also a challenge in the related art.

Disclosure of Invention

Based on this, the embodiment of the disclosure provides a mask structure, a pattern forming method and a method for preparing a semiconductor structure, which can effectively control the stability of a mask pattern, thereby effectively controlling the morphology and critical dimensions of a target structure formed based on the mask pattern, and further improving the electrical performance of a device.

To achieve the above object, in one aspect, some embodiments of the present disclosure provide a mask structure, including: a plurality of mask layers and a plurality of anti-reflection layers alternately stacked; wherein, the etching selectivity of the adjacent anti-reflection layers positioned at two sides of any mask layer is different.

In some embodiments of the present disclosure, adjacent antireflective layers on either side of any mask layer are of different materials.

In some embodiments of the present disclosure, the materials of adjacent anti-reflection layers located on both sides of any mask layer are all silicon-based materials and contain the same element species; wherein the molar ratio of each element in the silicon-based material of different anti-reflection layers is different.

In some embodiments of the present disclosure, the etch selectivity of the multilayer antireflective layers is different.

In some embodiments of the present disclosure, the etch rate of the multilayer antireflective layer under the same etch conditions gradually decreases in a direction toward the structure to be etched.

In some embodiments of the present disclosure, the material of the anti-reflective layer comprises a silicon-based material; the silicon-based material includes: a first element, a second element, and a third element; the multilayer antireflective layer comprises: a reference antireflective layer, and a first type antireflective layer containing a higher molar ratio of the first element than the reference antireflective layer, and a second type antireflective layer containing a higher molar ratio of the second element than the reference antireflective layer; wherein the reference antireflective layer is on top of the multilayer antireflective layer.

In some embodiments of the present disclosure, the silicon-based material comprises silicon oxynitride; the first element is oxygen element, and the second element is silicon element; wherein the first type of anti-reflective layer is located between the reference anti-reflective layer and the second type of anti-reflective layer; under the same etching condition, the etching rate of the second type anti-reflection layer is smaller than that of the reference anti-reflection layer; the etch rate of the first type of anti-reflective layer is greater than the etch rate of the reference anti-reflective layer.

In some embodiments of the present disclosure, the mole ratio of the first element in the first type anti-reflective layer is higher than 50%; the mole ratio of the second element in the second type anti-reflection layer is higher than 60%.

In some embodiments of the present disclosure, the thickness of the film layer is the same for each antireflective layer.

In another aspect, some embodiments of the present disclosure further provide a pattern forming method, including the following steps.

Providing a structure to be etched, and forming a mask structure on the structure to be etched; the mask structure includes a plurality of mask layers and a plurality of anti-reflection layers alternately stacked; wherein, the etching selectivity of the adjacent anti-reflection layers positioned at two sides of any mask layer is different.

And etching the anti-reflection layer and the corresponding mask layer by layer along the direction close to the structure to be etched so as to pattern the mask structure and form a mask pattern.

In some embodiments of the present disclosure, the anti-reflection layer and the corresponding mask layer are etched layer by layer along a direction approaching to the structure to be etched, further including: when any one of the mask layers is removed from the anti-reflection layer on the side, away from the structure to be etched, of the mask layer, no etching loss is caused on the anti-reflection layer on the side, close to the structure to be etched, of the mask layer.

In some embodiments of the present disclosure, the three antireflective layers and the corresponding mask layers alternately stacked in the mask structure comprise: the bottom mask material layer, the intermediate mask material layer and the top mask material layer are sequentially laminated along the direction far away from the structure to be etched, and each of the bottom mask material layer, the intermediate mask material layer and the top mask material layer comprises a mask layer and an anti-reflection layer; etching the anti-reflection layer and the corresponding mask layer by layer along the direction close to the structure to be etched so as to pattern the mask structure and form a mask pattern, and further comprising: etching the top mask material layer to form a plurality of first mandrels which are arranged at intervals; forming a first side wall on the side wall of each first mandrel, and removing the first mandrels; forming a plurality of initial second mandrels based on the first sidewall self-aligned etching of the reticle material layer; removing the anti-reflection layer in the initial second mandrel to form a second mandrel; and forming second side walls on the side walls of the second mandrels, and etching the bottom mask material layer based on the second side walls in a self-aligned mode to form mask patterns.

In some embodiments of the present disclosure, a groove is provided between adjacent second mandrels; forming second side walls on the side walls of the second mandrels, and etching the bottom mask material layer based on the second side walls in a self-aligned mode to form mask patterns, wherein the method comprises the following steps of: forming a side wall material layer which covers the second mandrel and the mask material layer at the bottom of the groove along with the shape; the part of the side wall material layer covering the side wall of the second mandrel forms a second side wall; forming an initial spin-on mask layer which covers the side wall material layer and fills the groove; grinding the upper surface of the initial spin-on mask layer to form a spin-on mask layer; and carrying out one etching process on the spin coating mask layer, the side wall material layer, the second mandrel and the bottom mask material layer to form a mask pattern.

In some embodiments of the present disclosure, a groove is provided between adjacent second mandrels; forming second side walls on the side walls of the second mandrels, and etching the bottom mask material layer based on the second side walls in a self-aligned mode to form mask patterns, wherein the method comprises the following steps of: forming a side wall material layer which covers the second mandrel and the mask material layer at the bottom of the groove along with the shape; etching the side wall material layer, and forming second side walls on the side walls of the second mandrels; forming an initial spin-coating mask layer which covers the top surface of the second mandrel, the top surface of the second side wall and the side wall and fills the groove; grinding the upper surface of the initial spin-on mask layer to form a spin-on mask layer; and carrying out one etching process on the spin coating mask layer, the second side wall, the second mandrel and the bottom mask material layer to form a mask pattern.

In some embodiments of the present disclosure, the initial second mandrel is formed using a wet etching process.

In some embodiments of the present disclosure, the antireflective layer in the initial second mandrel is removed using a wet cleaning process.

In some embodiments of the present disclosure, the material of the antireflective layer comprises silicon oxynitride; the anti-reflection layer in the initial second mandrel is cleaned and removed by diluted hydrofluoric acid.

In some embodiments of the present disclosure, the volume ratio range of water and hydrofluoric acid in dilute hydrofluoric acid includes: 25: 1-35: 1.

In yet another aspect, some embodiments of the present disclosure further provide a method for manufacturing a semiconductor structure, including the following steps.

A substrate is provided, the substrate having a structure to be etched.

A mask pattern is formed on the structure to be etched using the pattern forming method described in some of the embodiments above.

And etching the structure to be etched based on the mask pattern to obtain the target structure.

Embodiments of the present disclosure may/have at least the following advantages:

the mask structure, the pattern forming method and the semiconductor structure manufacturing method provided by the embodiment of the disclosure are as above. In the embodiment of the disclosure, the mask structure includes a plurality of mask layers and a plurality of anti-reflection layers which are alternately stacked, and the etching selectivity of the adjacent anti-reflection layers located at both sides of any one mask layer is different, that is, the etching rates of the adjacent anti-reflection layers located at both sides of any one mask layer are different under the same etching condition. Therefore, when the mask layer and the anti-reflection layer on the upper side are etched, on one hand, the anti-reflection layer on the upper side can protect the top of the pattern formed after the mask layer is etched from being damaged by etching so as to ensure the structural stability of the pattern formed by the mask layer, and on the other hand, the anti-reflection layer on the lower side of the mask layer can not be damaged by etching due to different etching rates of the anti-reflection layers on the two sides of the mask layer, so that the subsequent anti-reflection layer on the lower side and the corresponding mask layer can be ensured to be better protected when the mask layer on the lower side and the corresponding mask layer are etched so as to ensure the structural stability of the mask layer after the pattern is formed. Therefore, for the mask pattern formed by adopting the self-aligned multiple patterning technology, the stability of mask pattern transmission in each mask layer can be effectively ensured, so that the stability of the finally formed mask pattern can be effectively controlled, the morphology and the key size of a target structure formed based on the mask pattern can be precisely controlled, and the electrical properties of the target structure and a semiconductor structure or a device where the target structure is positioned are further improved, so that the production yield is further improved.

The details of one or more embodiments of the disclosure are set forth in the accompanying drawings and the description below. Other features, objects, and advantages of the disclosure will be apparent from the description and drawings, and from the claims.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments or the conventional techniques of the present disclosure, the drawings required for the descriptions of the embodiments or the conventional techniques will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present disclosure, and other drawings may be obtained according to the drawings without inventive effort to those of ordinary skill in the art.

FIG. 1 is a schematic cross-sectional view of a mask structure according to one embodiment;

FIG. 2 is a schematic cross-sectional view of another mask structure provided in one embodiment;

FIG. 3 is a flow chart of a method of forming a pattern according to one embodiment;

FIG. 4 is a schematic cross-sectional view of the structure obtained in step S100 in a flowchart of a method for forming a pattern according to an embodiment;

FIG. 5 is a flowchart of a method for forming a mask pattern in a flowchart of a method for forming a pattern according to one embodiment;

FIG. 6 is a schematic cross-sectional view of a structure obtained by forming a first mandrel in a flowchart of a pattern formation method according to one embodiment;

FIG. 7 is a schematic cross-sectional view of a structure obtained by forming a first initial sidewall in a flowchart of a method for forming a pattern according to an embodiment;

FIG. 8 is a schematic cross-sectional view of a structure formed by forming a first sidewall in a flowchart of a method for forming a pattern according to an embodiment;

FIG. 9 is a schematic cross-sectional view of a structure of a pattern forming method according to an embodiment, wherein the structure is obtained by removing a first mandrel;

FIG. 10 is a schematic cross-sectional view of a structure obtained by forming an initial second mandrel in a flowchart of a patterning method according to one embodiment;

FIG. 11 (a) is a schematic cross-sectional view of a structure obtained by forming a second mandrel in a flowchart of a pattern forming method according to an embodiment; FIG. 11 (b) is a scanning electron microscope image of the structure resulting from forming the second mandrel in a flowchart of one pattern formation method provided in one embodiment;

FIG. 12 is a schematic cross-sectional view of a structure obtained by forming a sidewall material layer in a flowchart of a pattern formation method according to an embodiment;

FIG. 13 is a schematic cross-sectional view of a structure obtained by forming an initial spin-on mask layer in a flowchart of a patterning method according to an embodiment;

FIG. 14 is a schematic cross-sectional view of a structure of a spin-on mask layer formed in a flowchart of a patterning method according to one embodiment;

FIG. 15 is a schematic cross-sectional view of a structure obtained by forming a mask pattern in a flowchart of a pattern forming method according to an embodiment;

FIG. 16 is a schematic cross-sectional view of a structure obtained by forming a sidewall material layer in a flowchart of a pattern formation method according to an embodiment;

FIG. 17 is a schematic cross-sectional view of a structure of a second sidewall formed in a flowchart of a further method of forming a pattern according to one embodiment;

FIG. 18 is a schematic cross-sectional view of a structure obtained by forming an initial spin-on mask layer in a flowchart of a patterning method according to one embodiment;

FIG. 19 is a schematic cross-sectional view of a structure of a spin-on mask layer formed in a flowchart of a patterning method according to one embodiment;

FIG. 20 is a schematic cross-sectional view of a structure obtained by forming a mask pattern in a flowchart of a pattern forming method according to an embodiment;

FIG. 21 is a flow chart of a method for fabricating a semiconductor structure according to one embodiment;

FIG. 22 is a schematic cross-sectional view of a semiconductor structure obtained in step S1 in a method for fabricating a semiconductor structure according to an embodiment;

FIG. 23 is a schematic cross-sectional view of a semiconductor structure obtained in step S2 in a method for fabricating a semiconductor structure according to an embodiment;

FIG. 24 is a schematic cross-sectional view of a semiconductor structure obtained in step S3 in a method for fabricating a semiconductor structure according to an embodiment;

FIG. 25 (a) is a scanning electron microscope image of the structure obtained in step S3 in a method for fabricating a semiconductor structure according to one embodiment; FIG. 25 (b) is another SEM of the structure obtained in step S3 of a method for fabricating a semiconductor structure according to one embodiment; FIG. 25 (c) is a further SEM image of the structure obtained in step S3 in a method for fabricating a semiconductor structure according to one embodiment; fig. 25 (d) is another sem image of the structure obtained in step S3 in the method for manufacturing a semiconductor structure according to an embodiment.

Reference numerals illustrate:

1-a mask layer; 11-a first mask layer; 12-a second mask layer; 13-a reference mask layer; 130-a reference mask pattern layer; 14-a first type mask layer; 140-a first type mask pattern layer; 15-a second type mask layer; 150-a second type mask pattern layer; 16-initially spin-coating a mask layer; 160-spin-coating a mask layer;

A 2-antireflective layer; 21-a first anti-reflective layer; 22-a second anti-reflective layer; 23-a reference antireflective layer; 230-a reference antireflective pattern layer; 24-a first type of antireflective layer; 240-a first type anti-reflective pattern layer; 25-a second type of antireflective layer; 250-a second type anti-reflective pattern layer;

3-etching the structure; 30-target structure; 410-a first side wall; 41-a first initial side wall; 42-a side wall material layer; 420-a second side wall;

m02-an initial second mandrel; m2-a second mandrel; m3-a first mandrel; g1-grooves;

y1-a bottom mask material layer, Y2-a middle mask material layer; y3-top mask material layer; y-mask pattern.

Detailed Description

In order that the disclosure may be understood, a more complete description of the disclosure will be rendered by reference to the appended drawings. Preferred embodiments of the present disclosure are shown in the drawings. This disclosure may, however, be embodied in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. The terminology used in the description of the disclosure herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure.

It will be understood that when an element or layer is referred to as being "on," "adjacent," "connected to," or "coupled to" another element or layer, it can be directly on, adjacent, connected, or coupled to the other element or layer, or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" another element or layer, there are no intervening elements or layers present. It will be understood that, although the terms first, second, third, etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present invention.

Spatially relative terms, such as "under", "below", "beneath", "under", "above", "over" and the like, may be used herein to describe one element or feature's relationship to another element or feature as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use and operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements or features described as "under" or "beneath" other elements would then be oriented "on" the other elements or features. Thus, the exemplary terms "below" and "under" may include both an upper and a lower orientation. Furthermore, the device may also include an additional orientation (e.g., rotated 90 degrees or other orientations) and the spatial descriptors used herein interpreted accordingly.

As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. Also, as used herein, the term "and/or" includes any and all combinations of the associated listed items.

As used herein, a "deposition" process includes, but is not limited to, physical vapor deposition (Physical Vapor Deposition, PVD for short), chemical vapor deposition (Chemical Vapor Deposition, CVD for short), or atomic layer deposition (Atomic Layer Deposition, ALD for short).

Embodiments of the invention are described herein with reference to cross-sectional illustrations that are schematic illustrations of idealized embodiments (and intermediate structures) of the invention, such that variations of the illustrated shapes due to, for example, manufacturing techniques and/or tolerances are to be expected. Thus, embodiments of the present invention should not be limited to the particular shapes of the regions illustrated herein, but rather include deviations in shapes that result, for example, from manufacturing techniques. For example, an implanted region shown as a rectangle typically has rounded or curved features and/or implant concentration gradients at its edges rather than a binary change from implanted to non-implanted regions. Also, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface over which the implantation is performed. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to limit the scope of the invention.

A dynamic random access memory (Dynamic Random Access Memory, abbreviated as DRAM) is a semiconductor memory that randomly writes and reads data at high speed, and is widely used in data storage devices or apparatuses. However, as semiconductor processing advances, the size of DRAM is also decreasing. In particular, as the process node of DRAM goes to 10nm and below, such small pattern sizes have exceeded the resolution limits of current immersion lithography machines. For this reason, a sidewall self-aligned multiple patterning technique is required to be used, so that the stability of the mask pattern becomes a very challenging process. Therefore, how to effectively control the stability of the mask pattern is also a challenge in the related art.

Based on this, the embodiment of the disclosure provides a mask structure, a pattern forming method and a method for manufacturing a semiconductor structure, which can effectively control the stability of a mask pattern, thereby precisely controlling the morphology and the critical dimension of a target structure formed based on the mask pattern, and further improving the electrical properties of the target structure and the semiconductor structure or device where the target structure is located, so as to further improve the production yield. However, the embodiments of the present disclosure are not limited thereto, and may be applied to any semiconductor structure requiring improved pattern morphology and dimensional accuracy.

Referring to fig. 1, some embodiments of the present disclosure provide a mask structure, including: a plurality of mask layers 1 (e.g., a first mask layer 11 and a second mask layer 12) and a plurality of antireflection layers 2 (e.g., a first antireflection layer 21 and a second antireflection layer 22) which are alternately stacked. Wherein the etching selectivity of adjacent anti-reflection layers 2 positioned at both sides of any mask layer is different.

The mask structure provided by the embodiment of the disclosure is as above. In the embodiment of the present disclosure, the mask structure includes a plurality of mask layers 1 and a plurality of anti-reflection layers 2 alternately stacked, and the etching selectivity of the adjacent anti-reflection layers 2 located at both sides of any one mask layer 1 is different, that is, the etching rate of the adjacent anti-reflection layers 2 located at both sides of any one mask layer 1 is different under the same etching condition. Therefore, when etching the mask layer 1 and the anti-reflection layer 2 on the upper side thereof, on one hand, the anti-reflection layer 2 on the upper side can protect the top of the pattern formed after etching the mask layer 1 from etching damage, so as to ensure the structural stability of the pattern formed by the mask layer 1, and on the other hand, the anti-reflection layer 2 on the lower side of the mask layer 1 can not be damaged by etching the mask layer 1 and the anti-reflection layer 2 on the upper side thereof because the etching rates of the anti-reflection layers 2 on the two sides of the mask layer 1 are different, so that the corresponding mask layer 1 can be better protected when the anti-reflection layer 2 on the lower side and the corresponding mask layer 1 are etched later, so as to ensure the structural stability of the mask layer 1 after forming the pattern. Therefore, for the mask pattern formed by adopting the self-aligned multiple patterning technology, the stability of mask pattern transmission in each mask layer 1 can be effectively ensured, so that the stability of the finally formed mask pattern can be effectively controlled, the morphology and the key size of a target structure formed based on the mask pattern can be precisely controlled, and the electrical performance of the target structure and the semiconductor structure or the device where the target structure is positioned can be further improved, so that the production yield can be further improved.

Illustratively, the Self-aligned multiple patterning technique includes, but is not limited to, self-aligned double patterning technique (Self-aligned Double Patterning, SADP for short), self-aligned quad patterning technique (Self-aligned Quardruple Patterning, SAQP for short), or Self-aligned eight or more patterning technique, etc.

Illustratively, the etch selectivity of adjacent anti-reflection layers 2 located on both sides of any mask layer 1 is different, and may be expressed as: adjacent anti-reflection layers 2 located on both sides of any mask layer 1 have different etching rates under the same etching conditions.

As an example, referring to fig. 1, taking the first mask layer 11 as an example, the etching selectivity of the adjacent first anti-reflective layer 21 and the adjacent second anti-reflective layer 22 on both sides of the first mask layer 11 is different, which is represented by different etching rates of the adjacent first anti-reflective layer 21 and the adjacent second anti-reflective layer 22 on both sides of the first mask layer 11.

In some embodiments, the material of the mask layer 1 comprises polysilicon, amorphous silicon, or a spin-on carbon hard mask, or the like.

In some embodiments, adjacent antireflective layers 2 on either side of either mask layer 1 are of different materials.

Here, the materials of the adjacent anti-reflection layers 2 located at both sides of any one of the mask layers 1 are different, and may be expressed as: the two anti-reflection layers 2 are respectively made of materials containing different elements; alternatively, the two anti-reflection layers 2 are made of materials containing the same elements but different molar ratios of the elements.

In some examples, the materials of adjacent anti-reflection layers 2 on both sides of any mask layer 1 are silicon-based materials and contain the same elemental species. Wherein the molar ratio of each element in the silicon-based material of different anti-reflection layers 2 is different.

Further exemplary, the adjacent anti-reflection layers 2 located at both sides of any one of the mask layers 1 may be silicon-based materials such as silicon oxide, silicon nitride, silicon oxynitride, or silicon carbide nitride.

With continued reference to fig. 1, in some examples, the adjacent first anti-reflective layer 21 and second anti-reflective layer 22 on both sides of the first mask layer 11 are silicon oxynitride, and the molar ratios of the elements in the first anti-reflective layer 21 and the second anti-reflective layer 22 are different, where the first anti-reflective layer 21 may be oxygen-enriched silicon oxynitride, and the second anti-reflective layer 22 may be silicon-enriched silicon oxynitride. Illustratively, the molar ratio of oxygen element of the oxygen-enriched silicon oxynitride is higher than 50%, for example, may be 53.309%; the molar ratio of the nitrogen element includes, but is not limited to, 9.284%, and the molar ratio of the silicon element includes, but is not limited to, 37.407%. The molar ratio of silicon element of the silicon-rich silicon oxynitride is higher than 60%, for example, 66.665%; the molar ratio of the oxygen element includes, but is not limited to, 28.712%, and the molar ratio of the nitrogen element includes, but is not limited to, 4.623%.

It should be noted that in some embodiments, the etching selectivity of the multilayer anti-reflection layer 2 is different.

Illustratively, the difference in etching selectivity of the multilayer reflective layer 2 may be expressed as: under the same etching conditions, the multiple anti-reflection layers 2 have different etching rates, respectively.

Further by way of example, the etch rate of the multilayer antireflective layer 2 under the same etch conditions gradually decreases in a direction approaching the structure to be etched.

With continued reference to fig. 1, taking an example in which the mask structure includes two mask layers 1 and two anti-reflection layers 2 alternately stacked, the etching rates of the first anti-reflection layer 21 and the second anti-reflection layer 22 gradually decrease under the same etching conditions. That is, the etching rate of the first anti-reflection layer 21 is greater than that of the second anti-reflection layer 22 under the same etching conditions.

In some embodiments, referring to fig. 2, the material of the anti-reflection layer 2 includes a silicon-based material. The silicon-based material includes: a first element, a second element, and a third element. The multilayer antireflective layer 2 includes: the reference anti-reflection layer 23, and the first type anti-reflection layer 24 containing a higher molar ratio of the first element than the reference anti-reflection layer 23, and the second type anti-reflection layer 25 containing a higher molar ratio of the second element than the reference anti-reflection layer 23. Wherein the reference anti-reflection layer 23 is located on top of the multilayer anti-reflection layer 2.

Accordingly, the multi-layered mask layer 1 includes: a reference mask layer 13, a first type mask layer 14 and a second type mask layer 15. Wherein the second type mask layer 15 is located at the bottom layer of the multi-layer mask layer 1. In this embodiment, the material of each mask layer 1 may be polysilicon, amorphous silicon, or the like.

In some embodiments, the silicon-based material comprises silicon oxynitride; the first element is oxygen element, and the second element is silicon element; wherein the first type of anti-reflective layer 24 is located between the reference anti-reflective layer 23 and the second type of anti-reflective layer 25; under the same etching condition, the etching rate of the second type anti-reflection layer 25 is smaller than that of the reference anti-reflection layer 23; the etching rate of the first type anti-reflection layer 24 is greater than that of the reference anti-reflection layer 23.

In some embodiments, the mole ratio of the first element in the first type anti-reflective layer 24 is greater than 50%; the molar ratio of the second element in the second type anti-reflective layer 25 is higher than 60%.

In some embodiments, taking the first element in the first type anti-reflective layer 24 as an oxygen element, the mole ratio of the oxygen element in the first type anti-reflective layer 24 includes, but is not limited to, 53.309%, the mole ratio of the nitrogen element includes, but is not limited to, 9.284%, and the mole ratio of the silicon element is 37.407%. The molar ratio of the oxygen element in the second type antireflective layer 25 was 28.712%, the molar ratio of the nitrogen element was 4.623%, and the molar ratio of the silicon element was 66.665%. Under the same etching condition, the etching rate of the second type anti-reflection layer 25 is smaller than that of the reference anti-reflection layer 23; the etching rate of the first type anti-reflection layer 24 is greater than that of the reference anti-reflection layer 23.

It should be noted that the molar ratio of each element in the anti-reflection layer 2 can be obtained by an X-ray photoelectron spectroscopy (X-ray Photoelectron Spectroscopy, abbreviated as XPS) test.

Further by way of example, there is a correspondence between the molar ratios and the mass ratios of the respective elements. Accordingly, the adjacent anti-reflection layers 2 located at both sides of any one mask layer 1 are different in material and can also be expressed as: the two anti-reflection layers 2 are made of materials containing the same elements but different mass ratios of the elements.

Illustratively, the second type anti-reflective layer 25 has a molar ratio of 28.712% of oxygen element, a molar ratio of 4.623% of nitrogen element, a molar ratio of 66.665% of silicon element, a mass ratio of 32.236% of oxygen element, a mass ratio of 2.271% of nitrogen element, and a mass ratio of 65.493% of silicon element.

In some embodiments, the thickness of the film layer of each antireflective layer 2 is the same.

Some embodiments of the present disclosure also provide a pattern forming method. Referring to fig. 5, the pattern forming method includes the following steps.

S100: providing a structure to be etched, and forming a mask structure on the structure to be etched; the mask structure includes a plurality of mask layers and a plurality of anti-reflection layers alternately stacked; wherein, the etching selectivity of the adjacent anti-reflection layers positioned at two sides of any mask layer is different.

S200: and etching the anti-reflection layer and the corresponding mask layer by layer along the direction close to the structure to be etched so as to pattern the mask structure and form a mask pattern.

The pattern forming method provided by the embodiment of the disclosure can be used for preparing the mask structure and forming the mask pattern in the mask structure. The mask structure has technical advantages, and the pattern forming method is also provided, which will not be described in detail herein.

In some embodiments, the etch rate of the multilayer antireflective layer under the same etch conditions gradually decreases in a direction toward the structure to be etched.

In some embodiments, in step S200, the anti-reflection layer and the corresponding mask layer are etched layer by layer along a direction approaching the structure to be etched, and further including: when any one of the mask layers is removed from the anti-reflection layer on the side, away from the structure to be etched, of the mask layer, no etching loss is caused on the anti-reflection layer on the side, close to the structure to be etched, of the mask layer.

In order to more clearly illustrate the pattern forming method in the above embodiments, please understand with reference to fig. 4 to 20, the following embodiments describe a pattern forming method according to an embodiment of the disclosure in detail.

In step S100, referring to fig. 4, a structure to be etched 3 is provided, and a mask structure is formed on the structure to be etched 3; the mask structure includes a plurality of mask layers 1 and a plurality of anti-reflection layers 2 alternately stacked; wherein the etching selectivity of adjacent anti-reflection layers 2 positioned at both sides of any mask layer 1 is different.

The above mask structure may be constructed as described in connection with the previous embodiments, and will not be described in detail herein.

For convenience of description, the following embodiments are illustrated by taking an example in which a mask structure includes three mask layers 1 and three anti-reflection layers 2 alternately stacked, but it is understood that the mask structure may include more mask layers 1 and anti-reflection layers 2.

Referring to fig. 4, forming a mask structure includes: the bottom mask material layer Y1, the intermediate mask material layer Y2 and the top mask material layer Y3 are sequentially stacked in a direction away from the structure to be etched 3, and each of the bottom mask material layer Y1, the intermediate mask material layer Y2 and the top mask material layer Y3 includes a mask layer 1 and an anti-reflection layer 2.

In some examples, the underlying mask material layer Y1 includes a second type mask layer 15 and a second type anti-reflective layer 25. The layer of reticle material Y2 includes a first type mask layer 14 and a first type anti-reflective layer 24. The top mask material layer Y3 includes a reference mask layer 13 and a reference anti-reflection layer 23.

In step S200, referring to fig. 5 to 20, the anti-reflection layer 2 and the corresponding mask layer 1 are etched layer by layer along the direction approaching to the structure to be etched 3 to pattern the mask structure to form a mask pattern.

In some embodiments, step S200 may include S201-S205.

S201: and etching the top mask material layer to form a plurality of first mandrels which are arranged at intervals.

S202: and forming a first side wall on the side wall of each first mandrel, and removing the first mandrels.

S203: a plurality of initial second mandrels are formed based on the first sidewall self-aligned etch of the layer of reticle material.

S204: and removing the anti-reflection layer in the initial second mandrel to form the second mandrel.

S205: and forming second side walls on the side walls of the second mandrels, and etching the bottom mask material layer based on the second side walls in a self-aligned mode to form mask patterns.

In step S201, referring to fig. 6, the top mask material layer Y3 is etched to form a plurality of first mandrels M3 arranged at intervals. The first mandrel M3 includes a reference mask pattern layer 130 and a reference anti-reflection pattern layer 230.

In step S202, referring to fig. 7 to 9, a first sidewall 410 is formed on the sidewall of each first mandrel M3, and the first mandrels M3 are removed.

For example, forming the first sidewall 410 on the sidewall of each first mandrel M3 may include the following steps.

Referring to fig. 7, a first initial sidewall 41 is formed on a surface of the intermediate mask material layer Y2 away from the bottom mask material layer Y1 to cover the top and the sidewall of the first mandrel M3 in a conformal manner.

Referring to fig. 8, the first initial sidewall 41 is anisotropically etched to leave the first initial sidewall 41 covering the sidewall of the first mandrel M3, so as to form a first sidewall 410.

Here, the first initial sidewall 41 covers the first mandrel M3 in a conformal manner, which means that: the first initial sidewall 41 is a thin-layer structure, and the surface of the first initial sidewall 41 is shaped to the top of the first mandrel M3 and the surface of the sidewall, so that the surface shape of the first initial sidewall 41 is similar to the surface shape of the top of the first mandrel M3 and the surface shape of the sidewall.

For example, a deposition process may be used to form a first initial sidewall 41 conformally covering the top and sidewalls of the first mandrel M3 on the surface of the reticle material layer Y2 remote from the underlying reticle material layer Y1.

It should be noted that the thickness of the first sidewall 410 may be controlled by controlling the deposition thickness of the first initial sidewall 41.

Referring to fig. 9, the first mandrel M3 is removed.

Illustratively, a dry etch may be employed to remove the first mandrel M3.

In step S203, referring to fig. 10, the reticle material layer Y2 is etched in a self-aligned manner based on the first sidewall 410, so as to form a plurality of initial second mandrels M02. The initial second mandrel M02 includes a first-type mask pattern layer 140 and a first-type anti-reflective pattern layer 240.

Illustratively, the initial second mandrel M02 is formed using a wet etching process.

In step S204, referring to fig. 11 (a), the anti-reflection layer 240 in the initial second mandrel M02 is removed to form a second mandrel M2.

In the embodiment of the present disclosure, the etching selectivity of the first type mask pattern layer 140, the first type anti-reflective pattern layer 240 and the second type anti-reflective layer 25 is different, so that etching damage to the first type mask pattern layer 140 and etching damage to the second type anti-reflective layer 25 are not caused when the first type anti-reflective pattern layer 240 is etched. In this way, the stability of the head morphology dimension of the first type mask pattern layer 140 is protected, the mask height is reduced, and the filling effect of the subsequent initial spin-on mask layer 16 is improved.

In some examples, the thickness of the film layer of each antireflective layer 2 is the same. Therefore, the same technological parameters can be adopted when different anti-reflection layers 2 are removed, so that the technological process is simplified, and the technological window is enlarged.

Illustratively, the thickness of the film of the anti-reflective layer 2 includes: 10nm to 15nm.

In some examples, the anti-reflective layer 240 in the initial second mandrel M02 is removed using a wet cleaning process.

Further by way of example, the anti-reflective layer (i.e., the first type anti-reflective pattern layer 240) in the initial second mandrel M02 is removed using a dilute hydrofluoric acid rinse.

It should be added that dilute hydrofluoric acid has a higher selectivity to oxygen-rich silicon oxynitride or silicon-rich silicon oxynitride. Diluted hydrofluoric acid can be obtained by diluting hydrofluoric acid with water and/or hydrogen peroxide.

In some examples, the volume ratio range of water and hydrofluoric acid in the diluted hydrofluoric acid used for cleaning and removing the anti-reflection layer may include: 25: 1-35: 1, a step of; for example, the volume ratio of water to hydrofluoric acid in the diluted hydrofluoric acid is: 25:1, 30:1 or 35:1, etc.

In some examples, a volume ratio of water to hydrofluoric acid of 30:1 in dilute hydrofluoric acid may be the best choice for removing oxygen-rich silicon oxynitride without consuming the silicon-rich silicon oxynitride.

Referring to table 1, in table 1, the etching amounts of the anti-reflective layers at different etching times are tested by taking the anti-reflective layer as silicon oxynitride (the reference anti-reflective layer 23 is common silicon oxynitride, the first type anti-reflective layer 24 is oxygen-enriched silicon oxynitride, the second type anti-reflective layer 25 is silicon-enriched silicon oxynitride) and the volume ratio of water and hydrofluoric acid in diluted hydrofluoric acid is 30:1 as an example, and the test results are shown in table 1.

TABLE 1 etching time and etching amount of different anti-reflective layers in wet etching

The second type anti-reflective layer-1, the second type anti-reflective layer-2, and the second type anti-reflective layer-3 in Table 1 are three different samples of the second type anti-reflective layer, respectively, for testing. The etching rate of the second type anti-reflection layer may be the etching rate of any one of the second type anti-reflection layer-1, the second type anti-reflection layer-2 and the second type anti-reflection layer-3, or may be the average value or the maximum value of the etching rates of the second type anti-reflection layer-1, the second type anti-reflection layer-2 and the second type anti-reflection layer-3.

As can be seen from Table 1, the etching rate of the reference anti-reflective layer was 0.286nm/s and the etching rate of the first type anti-reflective layer was 0.964nm/s in the wet etching time of 5 seconds. The etching rate of the reference anti-reflection layer is 0.302nm/s, the etching rate of the first type anti-reflection layer is 1.378nm/s, and the etching rate of the second type anti-reflection layer is 0.0710nm/s (taking the second type anti-reflection layer-1 as an example) within 10 seconds of the wet etching time. The etching rate of the reference anti-reflection layer is 0.267nm/s, the etching rate of the first type anti-reflection layer is 1.405nm/s, and the etching rate of the second type anti-reflection layer is 0.0520nm/s (taking the second type anti-reflection layer-1 as an example) within 15 seconds of the wet etching time.

Based on this, within the wet etching time of 5 seconds, the etching selectivity of the reference antireflection layer to the first type antireflection layer was 0.296:1 (=1.43/4.82), the etching selectivity of the first type anti-reflection layer to the second type anti-reflection layer-1 is 10.711:1 (= 4.82/0.45). Within 10 seconds of the wet etching time, the etching selectivity of the reference anti-reflection layer to the first type anti-reflection layer is 0.219:1 (=3.02/13.78), the etching selectivity of the first type anti-reflection layer to the second type anti-reflection layer-1 is 19.408:1 (=13.78/0.71). The etching selectivity of the reference anti-reflection layer to the first type anti-reflection layer is 0.190 within 15 seconds of the wet etching time: 1 (=4.01/21.08), the etching selectivity of the first type anti-reflection layer to the second type anti-reflection layer-1 is 27.026:1 (=21.08/0.78). That is, under the same etching conditions, the etching rate of the second type anti-reflection layer 25 is smaller than that of the reference anti-reflection layer 23; the etching rate of the first type anti-reflection layer 24 is greater than that of the reference anti-reflection layer 23. In this way, it can be ensured that the second type anti-reflection layer 25 is not damaged and the first type mask pattern layer 140 is not damaged when the first type anti-reflection pattern layer 240 is removed by the wet cleaning process, so that the structural stability of the second mandrel M2 can be ensured, and the structural stability of the subsequent mask pattern can be further ensured.

In some embodiments, the etch rate of the dilute hydrofluoric acid anti-reflective layer is also related to the refractive index and extinction coefficient of the anti-reflective layer material.

Referring to table 2, in table 2, the anti-reflective layer is silicon oxynitride (the reference anti-reflective layer 23 is common silicon oxynitride, the first type of anti-reflective layer 24 is oxygen-enriched silicon oxynitride, the second type of anti-reflective layer 25 is silicon-enriched silicon oxynitride), and the volume ratio of water and hydrofluoric acid in diluted hydrofluoric acid is 30:1, and the etching amounts of partial anti-reflective layers of different materials under different etching times are tested, and the test results are shown in table 2.

TABLE 2 etching time and etching amount of different anti-reflective layers in wet etching

In addition, fig. 11 (b) shows a structural diagram of a second mandrel M2 prepared by the method provided by the embodiment of the present disclosure under a scanning electron microscope. As shown in fig. 11 (b), the second mandrel M2 has better structural symmetry, and the ratio of the top dimension to the bottom dimension thereof is about 83% (≡35/42), which is advantageous for significantly improving the symmetry and stability of the subsequent mask pattern. (in the second mandrel obtained by other patterning methods in the related art, the top morphology of the second mandrel is easily damaged, and the ratio of the top surface size to the bottom surface size is usually about 50%)

In step S205, referring to fig. 12 to 15, or fig. 16 to 20, a second sidewall 420 is formed on the sidewall of each second mandrel M2, and the bottom mask material layer Y1 is etched in a self-aligned manner based on the second sidewall 420 to form a mask pattern Y.

It will be appreciated that the embodiments of the present disclosure may be equally applied to etching of more masking material layers to achieve the above-described cyclic operation of etching of three masking material layers.

In some embodiments, referring to fig. 11 (a), a groove G1 is formed between adjacent second mandrels M2. The step S205 may be implemented in various ways, for example, as shown in fig. 12-15, or as shown in fig. 16-20.

In some examples, step S205 forms a second sidewall 420 on the sidewall of each second mandrel M2, and self-aligned etches the bottom mask material layer Y1 based on the second sidewall 420 to form a mask pattern Y, which may include the following steps as shown in fig. 12-15.

Referring to fig. 12, a sidewall material layer 42 is formed to cover the second mandrel M2 and the mask material layer Y1 at the bottom of the trench G1 in a conformal manner; the portion of the sidewall material layer 42 covering the sidewall of the second mandrel M2 forms the second sidewall 420.

Here, the sidewall material layer 42 also covers the top surface of the second mandrel M2.

Referring to fig. 13, an initial spin-on mask layer 16 is formed overlying sidewall material layer 42 and filling trench G1.

Illustratively, the material of the initial Spin-on mask layer 16 includes, but is not limited to, spin-on Carbon (SOC).

In the embodiment of the disclosure, the symmetry and the shape stability of the second mandrel M2 are better, which is favorable for realizing uniform filling and stress dispersion of the initial spin-coating mask layer 16 in the groove G1, thereby effectively avoiding the defects of tilting or toppling of the second mandrel M2.

Referring to fig. 14, the top surface of the initial spin-on mask layer 16 is polished to form a spin-on mask layer 160. In this manner, the overall height of the resulting structure after formation of spin-on mask layer 160 is advantageously reduced.

Referring to fig. 15, an etching process is performed on the spin-on mask layer 160, the sidewall material layer 42, the second mandrel M2, and the underlying mask material layer Y1 to form a mask pattern Y. Wherein the mask pattern Y includes the second type mask pattern layer 150 and the second type anti-reflection pattern layer 250.

In the embodiment of the disclosure, the anti-reflection layer corresponding to the upper side of each mask layer can effectively protect the pattern formed after the mask layer is etched, so that the pattern is ensured to have better symmetry and morphology stability, and the stability of the mask pattern Y is ensured, so that the morphology and the key size of a target structure formed on the basis of the mask pattern can be accurately controlled.

In other examples, the sidewall material layer 42 on the top surface of the second mandrel M2 may also be removed. Step S205 forms a second sidewall 420 on the sidewall of each second mandrel M2, and self-aligned etches the bottom mask material layer Y1 based on the second sidewall 420 to form a mask pattern Y, which may include the following steps as shown in fig. 16-20.

Referring to fig. 16, a sidewall material layer 42 is formed to cover the second mandrel M2 and the mask material layer Y1 in the trench G1.

Referring to fig. 17, the sidewall material layer 42 is etched to form second sidewalls 420 on the sidewalls of the second mandrels M2.

Here, the second sidewall 420 covers only the sidewall corresponding to the second mandrel M2. That is, after the sidewall material layer 42 on the top surface of the second mandrel M2 is etched away, the top surface of the second mandrel M2 is exposed and no second sidewall material layer 42 remains. As such, the height of the second sidewall 420 in the embodiments of the disclosure is smaller than the second sidewall 420 formed in some embodiments described above.

It will be appreciated that, as shown in fig. 17, the second sidewall material layer 42 at the bottom surface of the trench G1 may be etched simultaneously with the etching to remove the sidewall material layer 42 at the top surface of the second mandrel M2.

For example, the sidewall material layer 42 on the top surface of the second mandrel M2 and the second sidewall material layer 42 on the bottom surface of the trench G1 may be etched and removed by using a dry etching process.

Referring to fig. 18, an initial spin-on mask layer 16 is formed covering the top surface of the second mandrel M2, the top surface and the sidewalls of the second sidewall 420, and filling the trench G1.

Illustratively, the initial spin-on mask layer 16 also covers the bottom surface of the trench G1.

In the embodiment of the disclosure, based on the exposure of the top surface of the second mandrel M2, the initial spin-on mask layer 16 may directly cover the top surface of the second mandrel M2, so as to facilitate reducing the consumption of spin-on mask material.

Referring to fig. 19, the upper surface of the initial spin-on mask layer 160 is polished to form the spin-on mask layer 160.

Referring to fig. 20, an etching process is performed on the spin-on mask layer 160, the second sidewall 420, the second mandrel M2 and the underlying mask material layer Y1 to form a mask pattern Y. Wherein the mask pattern Y includes the second type mask pattern layer 150 and the second type anti-reflection pattern layer 250.

In the embodiment of the present disclosure, by removing the sidewall material layer 42 on the top surface of the second mandrel M2 and then forming the spin-on mask layer 160, on one hand, the height of the second sidewall 420 may be reduced, that is, the depth of the trench G1 may be reduced, so as to ensure the filling effect of the subsequent initial spin-on mask layer 16, and facilitate reducing the material consumption of the initial spin-on mask layer 16; on the other hand, the roughness of the key dimension of the pattern is improved, so that the shape quality of the mask pattern Y formed later is improved, for example, the roughness of the line width of the linear pattern in the mask pattern Y can be improved, and the symmetry and shape stability of the linear pattern in the mask pattern Y are improved.

It should be appreciated that in some examples, the thickness of the reference mask layer 13 includes, but is not limited to, 45 nm-55 nm.

In some examples, the height of the first mandrel M3 includes, but is not limited to, 50 nm-60 nm.

In some examples, the thickness of the first initial sidewall 41 includes, but is not limited to, 20nm to 30nm.

In some examples, the height of the second mandrel M2 includes, but is not limited to, 20 nm-25 nm.

Some embodiments of the present disclosure further provide a method for manufacturing a semiconductor structure, referring to fig. 21, including the following steps.

S1: a substrate is provided, the substrate having a structure to be etched.

S2: a mask pattern is formed on the structure to be etched using the pattern forming method described in some of the embodiments above.

S3: and etching the structure to be etched based on the mask pattern to obtain the target structure.

The method for manufacturing the semiconductor structure provided by the embodiments of the present disclosure adopts the pattern forming method described in some embodiments above. The above-mentioned patterning method has technical advantages, and the method for manufacturing the semiconductor structure is also provided, which will not be described in detail herein.

In order to more clearly illustrate the preparation method of the semiconductor structure in the above embodiments, please understand with reference to fig. 22 to 24, the following embodiments describe a detailed description of the preparation method of the semiconductor structure according to the embodiments of the disclosure.

In step S1, referring to fig. 22, a substrate 5 is provided, the substrate 5 having a structure 3 to be etched.

Illustratively, the substrate 5 may be constructed of a semiconductor material, an insulating material, a conductor material, or any combination thereof. The substrate 5 may have a single-layer structure or a multilayer structure. For example, the substrate 1 may be a substrate such as a silicon (Si) substrate, a silicon germanium (SiGe) substrate, a silicon germanium carbon (SiGeC) substrate, a silicon carbide (SiC) substrate, a gallium arsenide (GaAs) substrate, an indium arsenide (InAs) substrate, an indium phosphide (InP) substrate, or other III/V semiconductor substrate or II/VI semiconductor substrate. Alternatively, the substrate 5 may be a layered substrate comprising, for example, si/SiGe, si/SiC, silicon-on-insulator (SOI) or silicon-germanium-on-insulator.

In step S2, referring to fig. 23, a mask pattern Y is formed on the structure to be etched by using the pattern forming method described in some embodiments above.

Illustratively, the mask pattern Y includes a second type mask pattern layer 150 and a second type anti-reflection pattern layer 250.

In step S3, referring to fig. 24, the structure 3 to be etched is etched based on the mask pattern Y, to obtain a target structure 30.

Illustratively, the structure to be etched 3 may be etched using a dry etching process, resulting in the target structure 30. Referring to table 3, according to the structure to be etched 3 of different etching materials, the corresponding reaction gas may be selected for dry etching.

TABLE 3 etching reaction gases corresponding to different etching materials

In some embodiments, after the structure 3 to be etched is etched by using the dry etching process, the resulting structure may be further cleaned by DSP (Dilute Sulfuric Peroxide Mixture, diluted sulfur peroxide mixed solution) to effectively remove the plasma polymer or the like formed by the dry etching.

Illustratively, the DSP (diluted sulfur peroxide mixed solution) includes sulfuric acid (H ₂ SO ₄ ) Hydrogen peroxide (H) ₂ O ₂ ) Hydrofluoric acid (HF) and water (H) ₂ O) is provided. Wherein sulfuric acid (H) ₂ SO ₄ ) For example, 8.7% by mass and 5% by volume. Hydrogen peroxide (H) ₂ O ₂ ) For example, 3.7% by mass and 12% by volume. The mass ratio of hydrofluoric acid (HF) is, for example, 300ppm. Water (H) ₂ The volume ratio of O) is, for example, 83%.

In some embodiments, the structure to be etched 3 may also be etched using a wet etching process, resulting in the target structure 30.

The structure 3 to be etched is illustratively an oxide film. The structure 3 to be etched may be wet etched using dilute hydrofluoric acid.

Illustratively, the structure 3 to be etched is wet etched with dilute hydrofluoric acid at room temperature (e.g., 25 ℃ + -5 ℃). The reaction mechanism of the diluted hydrofluoric acid is as follows: siO (SiO) ₂ +6HF→H ₂ SiF ₆ +2H ₂ O。

Illustratively, the volume ratio of water to hydrofluoric acid in the diluted hydrofluoric acid may range from 100:1 to 200:1; but is not limited thereto.

In some examples, the volume ratio of water to hydrofluoric acid in the diluted hydrofluoric acid may range from 100:1, with an etch rate of about 25 angstroms/minute for the structure 3 to be etched.

In some examples, the volume ratio of water to hydrofluoric acid in the diluted hydrofluoric acid may range from 200:1, with an etch rate of about 11 angstroms/minute for the structure 3 to be etched.

In addition, the diluted hydrofluoric acid is also beneficial to preparing an oxygen-free surface, cleaning a structural surface and the like.

After the semiconductor structure is prepared by adopting the preparation method provided by the embodiment of the disclosure, a scanning electron microscope image can be used for detecting the target structure so as to verify the morphological characteristics and the critical dimensions of the target structure. Fig. 25 (a) to 25 (d) show detection results of some target structures, respectively.

In some examples, as shown in fig. 25 (a) and 25 (b), the target structure 30 includes a linear structure having a line width dimension with a good roughness, which can clearly and accurately characterize its formation position and extension direction, and ensure uniform distribution of the spacing between adjacent linear structures.

In some examples, as shown in fig. 25 (c) and 25 (d), the target structure 30 comprises a linear structure with a stable top topography and better structural symmetry, with a significant increase in the ratio of the top and bottom dimensions compared to 50%.

Illustratively, as shown in fig. 25 (c), the ratio of the top surface dimension to the bottom surface dimension of one of the linear structures is about 77.4% (≡16.08/20.80); the ratio of the top dimension to the bottom dimension of one of the linear structures is about 71.4% (. Apprxeq.14.18/19.86).

Illustratively, as shown in fig. 25 (d), the ratio of the top and bottom dimensions of one of the linear structures is about 74.4% (≡15.17/20.38); the ratio of the top and bottom dimensions of one of the linear structures is about 79.6% (. Apprxeq.16.59/20.85).

The technical features of the above embodiments may be arbitrarily combined, and for brevity, all of the possible combinations of the technical features of the above embodiments are not described, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.

The above examples merely represent a few embodiments of the present disclosure, which are described in more detail and are not to be construed as limiting the scope of the claims. It should be noted that variations and modifications can be made by those skilled in the art without departing from the spirit of the disclosure, which are within the scope of the disclosure.

Claims

1. A mask structure, comprising: a plurality of mask layers and a plurality of anti-reflection layers alternately stacked; and etching selectivity ratios of adjacent anti-reflection layers positioned on two sides of any mask layer are different.

2. The mask structure of claim 1, wherein adjacent ones of said anti-reflective layers on either side of any of said mask layers are of different materials.

3. The mask structure of claim 2, wherein materials of adjacent anti-reflective layers on both sides of any one of the mask layers are silicon-based materials and contain the same elemental species;

wherein the molar ratio of each element in the silicon-based material of the different anti-reflection layers is different.

4. The mask structure of claim 1, wherein the etch selectivity of the plurality of antireflective layers is different.

5. The mask structure of claim 4, wherein an etch rate of the plurality of anti-reflective layers under the same etch condition is gradually reduced in a direction approaching the structure to be etched.

6. The mask structure of claim 1, wherein the material of the anti-reflective layer comprises a silicon-based material; the silicon-based material includes: a first element, a second element, and a third element;

The plurality of anti-reflection layers includes: a base antireflective layer, and a first type antireflective layer comprising a higher molar ratio of a first element than the base antireflective layer, and a second type antireflective layer comprising a higher molar ratio of a second element than the base antireflective layer;

wherein the reference anti-reflection layer is located on top of the plurality of anti-reflection layers.

7. The mask structure of claim 6, wherein the silicon-based material comprises silicon oxynitride; the first element is oxygen element, and the second element is silicon element; wherein,,

the first type of anti-reflection layer is positioned between the reference anti-reflection layer and the second type of anti-reflection layer;

under the same etching condition, the etching rate of the second type anti-reflection layer is smaller than that of the reference anti-reflection layer; the etching rate of the first type anti-reflection layer is larger than that of the reference anti-reflection layer.

8. The mask structure according to claim 6 or 7, wherein,

the mole ratio of the first element in the first type anti-reflection layer is higher than 50%;

the mole ratio of the second element in the second type anti-reflection layer is higher than 60%.

9. The mask structure of claim 1, wherein the thickness of the film layer of each of the anti-reflective layers is the same.

10. A pattern forming method, comprising:

providing a structure to be etched, and forming a mask structure on the structure to be etched; the mask structure includes a plurality of mask layers and a plurality of anti-reflection layers alternately stacked; wherein, the etching selectivity of the adjacent anti-reflection layers positioned at two sides of any mask layer is different;

11. The pattern forming method according to claim 10, wherein an etching rate of the plurality of anti-reflection layers under the same etching condition is gradually decreased in a direction approaching the structure to be etched.

12. The pattern forming method according to claim 10, wherein the step of etching the anti-reflection layer and the corresponding mask layer by layer in a direction approaching the structure to be etched further comprises:

when any one of the mask layers is removed from the anti-reflection layer on the side away from the structure to be etched, the mask layer is close to the anti-reflection layer on the side of the structure to be etched, and no etching loss exists.

13. The pattern forming method according to claim 10, wherein three layers of the antireflection layer and the corresponding mask layer alternately stacked in the mask structure include: a bottom mask material layer, a middle mask material layer and a top mask material layer which are sequentially stacked along a direction far away from the structure to be etched, wherein the bottom mask material layer, the middle mask material layer and the top mask material layer all comprise a mask layer and an anti-reflection layer;

and etching the anti-reflection layer and the corresponding mask layer by layer along the direction close to the structure to be etched so as to pattern the mask structure to form a mask pattern, and further comprising:

etching the top mask material layer to form a plurality of first mandrels which are arranged at intervals;

forming a first side wall on the side wall of each first mandrel, and removing the first mandrels;

etching the intermediate mask material layer based on the first side wall in a self-aligned mode to form a plurality of initial second mandrels;

removing the anti-reflection layer in the initial second mandrel to form a second mandrel;

and forming second side walls on the side walls of the second mandrels, and etching the bottom mask material layer based on the second side walls in a self-aligned mode to form mask patterns.

14. The pattern forming method according to claim 13, wherein a groove is provided between adjacent ones of the second mandrels; forming a second sidewall on the sidewall of each second mandrel, and etching the bottom mask material layer based on the second sidewall in a self-aligned manner to form the mask pattern, wherein the method comprises the following steps:

forming a side wall material layer which covers the second mandrel and the bottom mask material layer in the groove along with the shape; the part of the side wall material layer covering the side wall of the second mandrel forms the second side wall;

forming an initial spin-on mask layer which covers the side wall material layer and fills the groove;

grinding the upper surface of the initial spin-coating mask layer to form a spin-coating mask layer;

and carrying out an etching process on the spin-coating mask layer, the side wall material layer, the second mandrel and the bottom mask material layer to form the mask pattern.

15. The pattern forming method according to claim 13, wherein a groove is provided between adjacent ones of the second mandrels; forming a second sidewall on the sidewall of each second mandrel, and etching the bottom mask material layer based on the second sidewall in a self-aligned manner to form the mask pattern, wherein the method comprises the following steps:

Forming a side wall material layer which covers the second mandrel and the bottom mask material layer in the groove along with the shape;

etching the side wall material layers, and forming second side walls on the side walls of the second mandrels;

forming an initial spin-on mask layer which covers the top surface of the second mandrel, the top surface and the side wall of the second side wall and fills the groove;

and carrying out an etching process on the spin-coating mask layer, the second side wall, the second mandrel and the bottom mask material layer to form the mask pattern.

16. The pattern forming method according to any one of claims 13 to 15, wherein the initial second mandrel is formed by a wet etching process.

17. The method according to any one of claims 13 to 15, wherein the anti-reflection layer in the initial second mandrel is removed by a wet cleaning process.

18. The pattern forming method according to claim 17, wherein a material of the antireflection layer includes silicon oxynitride; the anti-reflection layer in the initial second mandrel is removed by using diluted hydrofluoric acid for cleaning.

19. The pattern forming method according to claim 18, wherein the range of volume ratios of water and hydrofluoric acid in the diluted hydrofluoric acid includes: 25: 1-35: 1.

20. a method of fabricating a semiconductor structure, comprising:

providing a substrate, wherein the substrate is provided with a structure to be etched;

forming a mask pattern on the structure to be etched by using the pattern forming method according to any one of claims 10 to 19;

and etching the structure to be etched based on the mask pattern to obtain a target structure.