CN116435445A - Light-emitting diode chip with high thrust value and preparation method thereof - Google Patents
Light-emitting diode chip with high thrust value and preparation method thereof Download PDFInfo
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/58—Optical field-shaping elements
- H01L33/60—Reflective elements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
- H01L2933/0058—Processes relating to semiconductor body packages relating to optical field-shaping elements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
- H01L2933/0066—Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
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Abstract
The invention belongs to the technical field of chip preparation, and particularly relates to a light-emitting diode chip with a high thrust value and a preparation method thereof. The N filling structure grows on the N ohm contact electrode, so that the height difference between the electrode pads is eliminated, and the electrode pads are positioned on the same plane. In addition, the gear-shaped welding patterns are etched on the electrode bonding pads, so that the stability of die bonding and eutectic is improved, and the thrust value of the chip is improved. The invention is used for manufacturing the flip LED chip.
Description
Technical Field
The invention belongs to the technical field of chip preparation, and particularly relates to a light-emitting diode chip with a high thrust value and a preparation method thereof.
Background
The LED adopts the solid semiconductor chip as the luminescent material, and compared with the traditional lamp, the LED lamp has the advantages of energy conservation, environmental protection, good color rendering property and response speed, and can efficiently convert electric energy into light energy, and has wide application in modern society, such as illumination, flat panel display, medical devices and the like.
In the technical field of chips, the development of flip chip technology is in progress, the active area of the chip faces the substrate, and the interconnection between the chip and the substrate is realized through solder bumps arranged in an array on the chip. The silicon chip is directly arranged on the PCB in a back-off mode, the I/O is led out from the silicon chip to the periphery, the length of interconnection is greatly shortened, RC delay is reduced, and the electrical performance is effectively improved.
In the prior art, the P ohmic contact electrode of the flip-chip light emitting diode chip is located on top of the P epitaxial layer, and the N ohmic contact electrode is located on the N epitaxial layer on the etched mesa, and the P ohmic contact electrode and the N ohmic contact electrode are not on the same plane, i.e., the non-planar light emitting diode chip. The electrode pads of the non-planar light-emitting diode chip have larger height difference, so that the situation that the chip cannot be grasped or is scratched easily occurs in the flip-chip welding process, the die bonding is not firm, the thrust value is low, the reliability is poor, and the use of the light-emitting diode chip is seriously influenced.
Disclosure of Invention
Aiming at the technical problems that the die bonding is not firm, the thrust value is low and the reliability is poor due to the fact that larger height difference exists between electrode pads of the traditional non-planar light-emitting diode chip, the invention provides the light-emitting diode chip with the high thrust value and the preparation method thereof.
In order to solve the technical problems in the prior art, the invention adopts the following technical scheme:
the light-emitting diode chip with the high thrust value comprises a substrate, an aluminum nitride layer, an N semiconductor structure, a quantum well structure, a P semiconductor structure, an N ohmic contact electrode, an N filling structure and a P ohmic contact electrode, wherein the aluminum nitride layer grows on the substrate, the N semiconductor structure grows on the aluminum nitride layer, the quantum well structure grows on the N semiconductor structure, the P semiconductor structure grows on the quantum well structure, a table top is etched on the N semiconductor structure through photoresist serving as a mask, the N ohmic contact electrode is evaporated on the table top of the N semiconductor structure, the N filling structure is evaporated on the N ohmic contact electrode, the table top is etched on the P semiconductor structure through photoresist serving as a mask, and the P ohmic contact electrode is evaporated on the table top of the P semiconductor structure.
The LED packaging structure is characterized by further comprising a passivation layer structure, an N pad hole, a P pad hole, an N electrode pad, a P electrode pad, an LED support and an organic solvent soldering flux, wherein the passivation layer structure is formed on the N filling structure and the P ohmic contact electrode by evaporation, the N pad hole is etched on the passivation layer structure of the N filling structure, the P pad hole is etched on the passivation layer structure of the P ohmic contact electrode, the N electrode pad is evaporated on the N pad hole, the P electrode pad is evaporated on the P pad hole, gear-shaped welding patterns are etched on the N electrode pad and the P electrode pad, and the N electrode pad and the P electrode pad are connected with the LED support through the organic solvent soldering flux.
The preparation method of the light-emitting diode chip with the high thrust value comprises the following steps:
the first step, the light-emitting epitaxial layer structure is sequentially arranged from bottom to top by a substrate, an aluminum nitride layer, an N semiconductor structure, a quantum well structure and a P semiconductor structure;
preparing an N ohm contact electrode on the N semiconductor structure, and preparing an N filling structure on the N ohm contact electrode;
step three, preparing a P ohmic contact electrode on the P semiconductor structure;
preparing a passivation layer structure on the N filling structure and the P ohmic contact electrode;
step five, preparing an N pad hole and a P pad hole on a passivation layer structure at corresponding positions of the N filling structure and the P ohmic contact electrode, and preparing an N electrode pad and a P electrode pad on the N pad hole and the P pad hole in an evaporation mode;
step six, preparing gear-shaped welding patterns on the N electrode bonding pad and the P electrode bonding pad, dripping organic solvent soldering flux on the LED support, flip-chip bonding the chip on the LED support, embedding and blending the organic solvent soldering flux and the chip, and packaging the chip.
The first step further includes: the impurities on the luminous epitaxial layer structure are cleaned through an inorganic solvent and an organic solvent, wherein the inorganic solvent is a mixed solution of sulfuric acid and hydrogen peroxide, and the organic solvent is an isopropanol solution.
In the second step, the method for preparing the N ohm contact electrode on the N semiconductor structure comprises the following steps: etching a table top of the N semiconductor structure by using a dry etching method through photoresist serving as a mask on the surface of the light-emitting epitaxial layer structure, preparing an N table top graph on the table top of the N semiconductor structure by using the photoresist, etching an N semiconductor contact layer by using the dry etching method, and preparing an N ohmic contact electrode on the N semiconductor contact layer, wherein the N ohmic contact electrode is a TiAlTiAu combined system.
The method for preparing the N filling structure on the N ohm contact electrode in the second step comprises the following steps: and preparing an N filling pattern on the N ohm contact electrode through photoresist, and evaporating an N filling structure on the N ohm contact electrode through a metal evaporator, wherein the N filling structure is a CrAlAu combined system.
In the third step, the method for preparing the P ohmic contact electrode on the P semiconductor structure comprises the following steps: and preparing a P ohmic contact electrode pattern on the P semiconductor structure through photoresist, evaporating the P ohmic contact electrode on the surface of the P semiconductor structure through a metal evaporator, wherein the P ohmic contact electrode is a NiAu transparent metal system.
In the fourth step, the method for preparing the passivation layer structure on the N filling structure and the P ohmic contact electrode comprises the following steps: and preparing a passivation layer structure on the N filling structure and the P ohmic contact electrode in an evaporation mode, wherein the passivation layer structure is made of silicon oxide, and the thickness of the passivation layer structure is more than 800nm.
In the fifth step, the method for preparing the N pad holes and the P pad holes on the passivation layer structure at the corresponding positions of the N filling structure and the P ohmic contact electrode comprises the following steps: preparing hole patterns of the P electrode pad and hole patterns of the N electrode pad on the passivation layer structure at the corresponding positions of the N filling structure and the P ohmic contact electrode through photoresist, and etching the passivation layer structure on the N filling structure through dry etching to leak out holes of the N electrode pad; and etching the passivation layer structure on the P ohmic contact electrode by dry etching to leak out the P pad hole.
In the sixth step, the method for preparing the gear-shaped welding patterns on the N electrode bonding pad and the P electrode bonding pad comprises the following steps: gear-shaped masks are made on the N electrode bonding pad and the P electrode bonding pad through photoresist, gear-shaped welding patterns are etched on the N electrode bonding pad and the P electrode bonding pad through dry etching, the heights of the gear-shaped welding patterns are 100-200 nm, and the intervals of the gear-shaped welding patterns are 50-100 nm.
Compared with the prior art, the technical scheme adopted by the invention has the beneficial effects that:
the N filling structure grows on the N ohm contact electrode, the height difference between the N electrode pad and the P electrode pad is eliminated, the N electrode pad and the P electrode pad are located on the same plane, and the N filling structure adopts a CrAlAu combined system and can be used as a reflecting layer or a current expansion layer, so that the light emitting efficiency of a substrate is improved, local charge accumulation is reduced, and the reliability of a chip is improved. According to the invention, gear-shaped welding patterns are etched on the N electrode bonding pad and the P electrode bonding pad by utilizing the mechanical principle of gear engagement, and the N electrode bonding pad and the P electrode bonding pad can be mutually embedded and fused with the organic solvent soldering flux during die bonding, so that the heat conduction area and the welding area of the flip LED chip are increased, the stability of die bonding and eutectic is greatly improved, the thrust value of the chip is improved, and the reliability of the chip is further improved.
Drawings
Fig. 1 is a schematic structural diagram of a light emitting epitaxial layer structure in the present embodiment;
fig. 2 is a schematic structural diagram of an N semiconductor structure in this embodiment;
fig. 3 is a schematic diagram of the structures of an N ohmic contact electrode and a P ohmic contact electrode in the present embodiment;
fig. 4 is a schematic structural view of an N electrode pad and a P electrode pad in the present embodiment;
fig. 5 is a schematic package diagram of the present embodiment.
Wherein: 11 is a substrate, 12 is an aluminum nitride layer, 13 is an N semiconductor structure, 14 is a quantum well structure, 15 is a P semiconductor structure, 21 is an N ohmic contact electrode, 22 is an N fill-up structure, 23 is a P ohmic contact electrode, 24 is a passivation layer structure, 25 is an N pad hole, 26 is a P pad hole, 27 is an N electrode pad, 28 is a P electrode pad, 31 is an LED bracket, and 32 is an organic solvent soldering flux.
Detailed Description
In order that the above-recited objects, features and advantages of the present invention will be more clearly understood, a more particular description of the invention will be rendered by reference to specific embodiments thereof which are illustrated in the appended drawings. It should be noted that, in the case of no conflict, the embodiments of the present application and the features in the embodiments may be combined with each other.
In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention, however, the present invention may be practiced otherwise than as described, and therefore the scope of the present invention is not limited to the specific embodiments disclosed below.
In the method for manufacturing the light emitting diode chip with high thrust value in this embodiment, as shown in fig. 1, a substrate 11, an aluminum nitride layer 12, an N semiconductor structure 13, a quantum well structure 14, and a P semiconductor structure 15 are sequentially disposed in the light emitting epitaxial layer structure from bottom to top. And inorganic solvent and organic solvent are used for cleaning impurities on the light-emitting epitaxial layer structure, so that the light-emitting epitaxial layer structure is ensured to be clean. The inorganic solvent is preferably a mixed solution of sulfuric acid and hydrogen peroxide, and the mixed solution of sulfuric acid and hydrogen peroxide is a strong oxidant, so that a part of substances which cannot be oxidized by original concentrated sulfuric acid or hydrogen peroxide can be oxidized, and the cleaning effect of the luminous epitaxial layer structure is improved. The organic solvent is preferably an isopropanol solution, which is used as a cleaning and degreasing agent in the electronics industry to wash away organic impurities of the light-emitting epitaxial layer structure.
As shown in fig. 2, photoresist is used as a mask on the surface of the provided light-emitting epitaxial layer structure, and a dry etching method is used to etch the mesa of the N semiconductor structure 13. And preparing an N mesa pattern on the mesa of the N semiconductor structure 13 by using photoresist, etching an N semiconductor contact layer by a dry etching method, and growing an N ohmic contact electrode 21 on the N semiconductor contact layer. The N ohm contact electrode 21 can be formed by selecting any one or more conductive materials from a metal system such as Cr, ti, ni, al, au, rh, and the N ohm contact electrode 21 is optimally made of a TiAlTiAu combination system. On the basis of the above structure, a metal evaporator grows an N fill-up structure 22 on the N ohmic contact electrode 21 using a photoresist as a mask. The N filling structure 22 can adopt Au or TiAu or CrAu or TiAlAu or CrAlAu, and is optimally a CrAlAu combination system, and the metal Cr at the bottom layer is used as a barrier layer to avoid the weakening of the reliability of the chip caused by the diffusion of the metal Al to the P ohmic contact electrode 23 in the chip operation. And the N filling structure 22 adopts a CrAlAu combination system, can be used as a reflecting layer and a current expansion layer, can improve the light emitting efficiency of the substrate 11, reduce local charge accumulation and improve the reliability of the device. On the basis of the structure, photoresist is used as a mask, and a metal evaporator is used for evaporating the P ohmic contact electrode 23 on the mesa of the P semiconductor structure 15. The P ohmic contact electrode 23 can adopt a NiAu transparent metal system or a NiRh metal system, the P ohmic contact electrode 23 optimally adopts a NiAu transparent metal system, and the P ohmic contact electrode 23 of the NiAu transparent metal system can greatly improve the brightness of the light emitting diode.
As shown in fig. 3, on the basis of the above structure, a passivation layer structure 24 is prepared on the N fill-up structure 22 and the P ohmic contact electrode 23 by vapor deposition to protect the N ohmic contact electrode 21, the N fill-up structure 22 and the P ohmic contact electrode 23 from electric leakage. The passivation layer structure 24 is preferably made of silicon oxide, and the thickness is preferably more than 800nm, and the passivation layer structure 24 made of silicon oxide can prevent contamination of the chip surface by harmful impurities for a long time, and has a thermal expansion coefficient matched with that of the substrate 11, and a film growth temperature is low. And the passivation layer structure 24 using silicon oxide has good uniformity, low pinhole density and is easy to get a slowly varying step after photolithography. On the basis of the above structure, the hole pattern of the P electrode pad 28 and the hole pattern of the N electrode pad 27 are prepared on the passivation layer structure 24 at the corresponding positions of the N fill-up structure 22 and the P ohmic contact electrode 23 by using photoresist, the passivation layer structure 24 on the N fill-up structure 22 is etched to leak out the N pad hole 25, the passivation layer structure 24 on the P ohmic contact electrode 23 is etched to leak out the P pad hole 26. In addition to the above structure, an N electrode pad 27 is vapor-deposited on the N pad hole 25 and a P electrode pad 28 is vapor-deposited on the P pad hole 26 by vapor deposition.
As shown in fig. 4, on the basis of the above structure, gear-like masks are made on the N electrode pad 27 and the P electrode pad 28 using photoresist, and gear-like solder patterns are etched on the N electrode pad 27 and the P electrode pad 28 by dry etching. Preferably, the height of the gear-shaped welding patterns is 100 nm-200 nm, and the pitch of the gear-shaped welding patterns is 50 nm-100 nm.
As shown in fig. 5, an organic solvent flux 32 is dropped onto the LED support 31, and then the chip is flip-chip mounted onto the LED support 31, and the organic solvent flux 32 and the chip are mutually embedded and melted. Since the gear-shaped welding patterns are etched on the N electrode pad 27 and the P electrode pad 28, the N electrode pad 27 and the P electrode pad 28 can be mutually embedded and fused with the organic solvent soldering flux 32 during die bonding, the heat conduction area and the welding area of the flip LED chip are increased, the stability of die bonding and eutectic is greatly improved, the thrust value of the chip is improved, and the reliability of the chip is further improved.
The embodiments of the present invention may be subject to various modifications and alterations without departing from the scope of the invention. Thus, it should be understood that embodiments of the invention should not be limited to the exemplary embodiments described below, but should be controlled by the limitations set forth in the claims and any equivalents thereof.
Claims (10)
1. The light-emitting diode chip with high thrust value is characterized in that: including base (11), aluminium nitride layer (12), N semiconductor structure (13), quantum well structure (14), P semiconductor structure (15), N ohmic contact electrode (21), N fill-up structure (22) and P ohmic contact electrode (23), it has aluminium nitride layer (12) to grow on base (11), it has N semiconductor structure (13) to grow on aluminium nitride layer (12), it has quantum well structure (14) to grow on N semiconductor structure (13), it has P semiconductor structure (15) to grow on quantum well structure (14), it has the mesa to etch through the photoresist on N semiconductor structure (13), the evaporation plating of N ohmic contact electrode (21) is on the mesa of N semiconductor structure (13), N fill-up structure (22) is on N ohmic contact electrode (21), it has the mesa to etch through the photoresist on P semiconductor structure (15), P ohmic contact electrode (23) is on the mesa of P semiconductor structure (15).
2. The light emitting diode chip with high thrust value of claim 1, wherein: still include passivation layer structure (24), N pad hole (25), P pad hole (26), N electrode pad (27), P electrode pad (28), LED support (31) and organic solvent scaling powder (32), all the coating by vaporization has passivation layer structure (24) on N filled structure (22) and the P ohmic contact electrode (23), N pad hole (25) sculpture is on passivation layer structure (24) of N filled structure (22), P pad hole (26) sculpture is on passivation layer structure (24) of P ohmic contact electrode (23), N electrode pad (27) coating by vaporization is on N pad hole (25), P electrode pad (28) coating by vaporization is on P pad hole (26), all the etching has gear-like welding pattern on N electrode pad (27) and P electrode pad (28), N electrode pad (27) and P electrode pad (28) are connected with LED support (31) through organic solvent scaling powder (32).
3. The preparation method of the light-emitting diode chip with the high thrust value is characterized by comprising the following steps: comprises the following steps:
the first step, the light-emitting epitaxial layer structure is sequentially arranged from bottom to top by a substrate, an aluminum nitride layer, an N semiconductor structure, a quantum well structure and a P semiconductor structure;
preparing an N ohm contact electrode on the N semiconductor structure, and preparing an N filling structure on the N ohm contact electrode;
step three, preparing a P ohmic contact electrode on the P semiconductor structure;
preparing a passivation layer structure on the N filling structure and the P ohmic contact electrode;
step five, preparing an N pad hole and a P pad hole on a passivation layer structure at corresponding positions of the N filling structure and the P ohmic contact electrode, and preparing an N electrode pad and a P electrode pad on the N pad hole and the P pad hole in an evaporation mode;
step six, preparing gear-shaped welding patterns on the N electrode bonding pad and the P electrode bonding pad, dripping organic solvent soldering flux on the LED support, flip-chip bonding the chip on the LED support, embedding and blending the organic solvent soldering flux and the chip, and packaging the chip.
4. The method for manufacturing a light emitting diode chip having a high thrust value according to claim 3, wherein: the first step further includes: the impurities on the luminous epitaxial layer structure are cleaned through an inorganic solvent and an organic solvent, wherein the inorganic solvent is a mixed solution of sulfuric acid and hydrogen peroxide, and the organic solvent is an isopropanol solution.
5. The method for manufacturing a light emitting diode chip having a high thrust value according to claim 3, wherein: in the second step, the method for preparing the N ohm contact electrode on the N semiconductor structure comprises the following steps: etching a table top of the N semiconductor structure by using a dry etching method through photoresist serving as a mask on the surface of the light-emitting epitaxial layer structure, preparing an N table top graph on the table top of the N semiconductor structure by using the photoresist, etching an N semiconductor contact layer by using the dry etching method, and preparing an N ohmic contact electrode on the N semiconductor contact layer, wherein the N ohmic contact electrode is a TiAlTiAu combined system.
6. The method for manufacturing a light emitting diode chip having a high thrust value according to claim 3, wherein: the method for preparing the N filling structure on the N ohm contact electrode in the second step comprises the following steps: and preparing an N filling pattern on the N ohm contact electrode through photoresist, and evaporating an N filling structure on the N ohm contact electrode through a metal evaporator, wherein the N filling structure is a CrAlAu combined system.
7. The method for manufacturing a light emitting diode chip having a high thrust value according to claim 3, wherein: in the third step, the method for preparing the P ohmic contact electrode on the P semiconductor structure comprises the following steps: and preparing a P ohmic contact electrode pattern on the P semiconductor structure through photoresist, evaporating the P ohmic contact electrode on the surface of the P semiconductor structure through a metal evaporator, wherein the P ohmic contact electrode is a NiAu transparent metal system.
8. The method for manufacturing a light emitting diode chip having a high thrust value according to claim 3, wherein: in the fourth step, the method for preparing the passivation layer structure on the N filling structure and the P ohmic contact electrode comprises the following steps: and preparing a passivation layer structure on the N filling structure and the P ohmic contact electrode in an evaporation mode, wherein the passivation layer structure is made of silicon oxide, and the thickness of the passivation layer structure is more than 800nm.
9. The method for manufacturing a light emitting diode chip having a high thrust value according to claim 3, wherein: in the fifth step, the method for preparing the N pad holes and the P pad holes on the passivation layer structure at the corresponding positions of the N filling structure and the P ohmic contact electrode comprises the following steps: preparing hole patterns of the P electrode pad and hole patterns of the N electrode pad on the passivation layer structure at the corresponding positions of the N filling structure and the P ohmic contact electrode through photoresist, and etching the passivation layer structure on the N filling structure through dry etching to leak out holes of the N electrode pad; and etching the passivation layer structure on the P ohmic contact electrode by dry etching to leak out the P pad hole.
10. The method for manufacturing a light emitting diode chip having a high thrust value according to claim 3, wherein: in the sixth step, the method for preparing the gear-shaped welding patterns on the N electrode bonding pad and the P electrode bonding pad comprises the following steps: gear-shaped masks are made on the N electrode bonding pad and the P electrode bonding pad through photoresist, gear-shaped welding patterns are etched on the N electrode bonding pad and the P electrode bonding pad through dry etching, the heights of the gear-shaped welding patterns are 100-200 nm, and the intervals of the gear-shaped welding patterns are 50-100 nm.
Priority Applications (1)
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