CN207925512U - A kind of high reliability LED chip - Google Patents
A kind of high reliability LED chip Download PDFInfo
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- CN207925512U CN207925512U CN201820023231.8U CN201820023231U CN207925512U CN 207925512 U CN207925512 U CN 207925512U CN 201820023231 U CN201820023231 U CN 201820023231U CN 207925512 U CN207925512 U CN 207925512U
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Abstract
The utility model discloses a kind of high reliability LED chips, including；Substrate, light emitting structure, the first metal layer, second metal layer, groove, second insulating layer, barrier layer, the first solder layer and the and solder layer, wherein the groove is set between the first metal layer and second metal layer.The application, to make chip after eutectic welding, by cleaning solution come cleaning scaling powder, and film of flux residue is removed by forming the groove through entire chip on the surface of chip.Specifically, cleaning solution lead to the groove can fully infiltrate and clean the first solder layer (opposite and first electrode) and the second solder layer (with respect to and second electrode) between region, it is conductively connected to prevent film of flux residue from will be formed between the first solder layer and the second solder layer, and then prevent chip from leaking electricity, improve reliability of the chip in package application.
Description
Technical field
The utility model is related to LED technology field more particularly to a kind of high reliability LED chips.
Background technology
LED (Light Emitting Diode, light emitting diode) be it is a kind of using Carrier recombination when release energy shape
At luminous semiconductor devices, LED chip is with power consumption is low, coloration is pure, long lifespan, small, the response time is fast, energy conservation and environmental protection
Equal many advantages.
Conventional LED chip is generally Sapphire Substrate, has heat dissipation performance poor, is easy to happen electric leakage, and light decay is serious, electricity
The problems such as high is pressed, the unfailing performance of LED chip is seriously affected.
Flip LED chips are compared with conventional LED chip, have luminous efficiency height, homogeneous current distribution, good heat dissipation, voltage
The advantages that reducing, is efficient.
Existing flip LED chips need to carry out auxiliary welding using scaling powder when carrying out eutectic welding die bond, from
And ensure the stability of welding procedure, reduce voidage.But scaling powder contains the impurity of organic acid and halogen etc., is easy
Its residue insulation impedance is caused to reduce and leak electricity, in addition, the residue of scaling powder can absorb sky in the environment of high temperature and humidity
Moisture content in gas causes conduction to change the molecular structure of residue itself.Existing flip LED chips are only using letter
Single planar electrode structure design often leads to lead to chip there are remaining scaling powder between PN electrodes after welding encapsulates
Electric leakage.
Invention content
Technical problem to be solved by the utility model is to provide a kind of high reliability LED chips, prevent scaling powder residual
It stays on the electrode of chip, chip is avoided to leak electricity, improve the reliability of chip package.
In order to solve the above-mentioned technical problem, the utility model provides a kind of high reliability LED chip, including；
Substrate；
Set on the light emitting structure of the substrate surface, the light emitting structure includes be sequentially arranged in the substrate surface first
Semiconductor layer, active layer, the second semiconductor layer, metallic reflector and the first insulating layer；
Set on the first surface of insulating layer and the first metal layer of the first semiconductor layer is extended to, is set to the first surface of insulating layer
And the second metal layer of metallic reflector is extended to, mutually insulated between the first metal layer and second metal layer；
Through the first insulating layer and the groove that is arranged between the first metal layer and second metal layer；
The second insulating layer and barrier layer being sequentially arranged on the first surface of insulating layer and groove；
Set on blocking layer surface and extend to the first solder layer of the first metal, set on blocking layer surface and extend to second
Second solder layer of metal, and mutually insulated between first solder layer and second solder layer.
As the improvement of said program, two grooves are equipped between the first metal layer and the second metal layer, and
Metal layer is equipped between two grooves.
As the improvement of said program, the first metal layer is conductively connected with first semiconductor layer, and described second
Metal layer is conductively connected with second semiconductor layer.
As the improvement of said program, first solder layer is conductively connected with the first metal layer, second weldering
The bed of material is conductively connected with the second metal layer.
As the improvement of said program, the material of the barrier layer is SiO2, one kind in SiN and polyimides.
As the improvement of said program, the barrier layer is DLC film.
As the improvement of said program, the material of the metallic reflector is one in ITO, Ag, Au, Al, Cr, Ni and Ti
Kind.
As the improvement of said program, the material of first insulating layer is SiC, SiO2、SiNxAnd SiOxNyIn one
Kind.
As the improvement of said program, the material of the metal layer is one kind in Cr, Ti, Ni, AuSn, Pt, Au and Sn.
As the improvement of said program, the material of the second insulating layer is SiC, SiO2、SiNxAnd SiOxNyIn one
Kind.
Implement the utility model, has the advantages that：
1, a kind of high reliability LED chip provided by the utility model runs through entire core by being formed on the surface of chip
The groove of piece by cleaning solution come cleaning scaling powder, and film of flux residue is gone to make chip after eutectic welding
It removes.Specifically, cleaning solution, which leads to the groove, can fully infiltrate and clean the first solder layer (opposite and first electrode) and second
Region between solder layer (opposite and second electrode), to prevent film of flux residue by the first solder layer and the second solder layer
Between formed and be conductively connected, and then prevent chip from leaking electricity, improve reliability of the chip in package application.
2, a kind of high reliability LED chip provided by the utility model, the application on second insulating layer surface by forming
One layer of barrier layer, the barrier layer is different from the wettability of scaling powder, to reduce scaling powder in the first metal layer and second
Adhesion property between metal layer is further reduced the residual of the scaling powder in region between the first metal layer and second metal layer,
Enhance cleaning performance, reduces encapsulation electric leakage hidden danger.In addition, barrier layer can also enhance the insulation performance of chip, scaling powder is prevented
And the brazing metals such as active Au, Sn, In are diffused into the inside of chip during high-temperature soldering, further increase chip
Reliability.
Description of the drawings
Fig. 1 is the structural schematic diagram of the utility model high reliability LED chip；
Fig. 2 is the vertical view of Fig. 1；
Fig. 3 is the cleaning schematic diagram of the utility model high reliability LED chip；
Fig. 4 is the production process schematic diagram of the utility model high reliability LED chip；
Fig. 4 a are the structural schematic diagrams of the utility model light emitting structure；
Fig. 4 b are that the utility model forms the structural schematic diagram after the first hole；
Fig. 4 c are that the utility model forms the structural schematic diagram after the first insulating layer and the second hole；
Fig. 4 d are that the utility model forms the structural schematic diagram after the first metal layer, second metal layer and groove；
Fig. 4 e are that the utility model forms the structural schematic diagram after second insulating layer and barrier layer；
Fig. 4 f are that the utility model forms the structural schematic diagram after third hole and the 4th hole.
Specific implementation mode
It is new to this practicality below in conjunction with attached drawing to keep the purpose of this utility model, technical solution and advantage clearer
Type is described in further detail.
Referring to Fig. 1 and Fig. 2, the utility model additionally provides a kind of high reliability LED chip, including；
Substrate 10；
Light emitting structure set on 10 surface of the substrate, the light emitting structure include be sequentially arranged in the substrate surface
Semi-conductor layer 21, active layer 22, the second semiconductor layer 23, metallic reflector 30 and the first insulating layer 40；
Set on 40 surface of the first insulating layer and the first metal layer 51 of the first semiconductor layer 21 is extended to, is set to the first insulation
40 surface of layer and the second metal layer 52 for extending to metallic reflector 30；
Through the first insulating layer 40 and the groove 53 that is arranged between the first metal layer 51 and second metal layer 52；
The second insulating layer 60 and barrier layer 70 being sequentially arranged on 40 surface of the first insulating layer and groove 53；
Set on 70 surface of barrier layer and the first solder layer 81 of the first metal 51 is extended to, set on 70 surface of barrier layer and is prolonged
The second solder layer 82 of the second metal 52 is extended to, and between first solder layer 81 and second solder layer 82 mutually absolutely
Edge.
The material of substrate 10 can be sapphire, silicon carbide or silicon, or other semi-conducting materials, in the present embodiment
Preferred substrate is Sapphire Substrate.Specifically, the substrate is nano-pattern substrate, flip LED chips from one side of substrate light extraction,
Nano-pattern is made in substrate, increases diffraction efficiency, to improve the light extraction efficiency of flip LED chips.
Specifically, the first semiconductor layer provided by the embodiments of the present application and the second semiconductor layer are gallium nitride-based semiconductor
Layer, active layer are gallium nitride base active layer；In addition, the first semiconductor layer provided by the embodiments of the present application, the second semiconductor layer and
The material of active layer can also be other materials, be not particularly limited to this application.
Wherein, the first semiconductor layer can be n type semiconductor layer, then the second semiconductor layer is p type semiconductor layer；Alternatively,
First semiconductor layer is p type semiconductor layer, and the second semiconductor layer is n type semiconductor layer, for the first semiconductor layer and second
The conduction type of semiconductor layer needs to be designed according to practical application, is not particularly limited to this application.
The material of the metallic reflector 30 is one kind in ITO, Ag, Au, Al, Cr, Ni and Ti.First insulating layer
40 material is SiC, SiO2、SiNxAnd SiOxNyIn one kind.
It should be noted that mutually insulated between the first metal layer 51 and second metal layer 52.Wherein, described first
Metal layer 51 is conductively connected with first semiconductor layer 21, and the second metal layer 52 is conductive with second semiconductor layer 23
Connection.Preferably, two grooves 53, and two grooves 53 are equipped between the first metal layer 51 and the second metal layer 52
Between be equipped with metal layer.The material of the metal layer is one kind in Cr, Ti, Ni, AuSn, Pt, Au and Sn.
Referring to Fig. 3, the application is by forming the groove 53 through entire chip on the surface of chip, to make chip altogether
After crystalline substance welding, by cleaning solution come cleaning scaling powder, and film of flux residue is removed.Specifically, cleaning solution leads to the ditch
Slot can fully infiltrate and clean the first solder layer 81 (opposite and first electrode) and the second solder layer 82 is (relatively electric with second
Pole) between region, to prevent film of flux residue will be formed between the first solder layer 81 and the second solder layer 82 it is conductive even
It connects, and then prevents chip from leaking electricity, improve reliability of the chip in package application.
The material of the second insulating layer 60 is SiC, SiO2、SiNxAnd SiOxNyIn one kind.The material of the barrier layer 70
Matter is SiO2, one kind in SiN and polyimides.Alternatively, the barrier layer 70 is DLC film.
It should be noted that barrier layer 70 is different from the wettability of scaling powder (main component is rosin), to reduce
Adhesion property of the scaling powder between the first metal layer 51 and second metal layer 52, is further reduced the first metal layer 51 and second
The residual of the scaling powder in region between metal layer 52 enhances cleaning performance, reduces encapsulation electric leakage hidden danger.In addition, barrier layer 70 is also
The insulation performance that chip can be enhanced prevents the brazing metals such as scaling powder and active Au, Sn, In in the process of high-temperature soldering
In be diffused into the inside of chip, further increase the reliability of chip.
Wherein, first solder layer 81 is conductively connected with the first metal layer 51, second solder layer 82 and institute
Second metal layer 52 is stated to be conductively connected.
Correspondingly, it is a kind of production method flow chart of high reliability LED chip of the utility model referring to Fig. 4, Fig. 4,
In, a kind of production method for high reliability LED chip that the utility model also provides includes the following steps：
S1：Light emitting structure is provided；
Referring to Fig. 4 a, light emitting structure is provided, the light emitting structure includes substrate 10, epitaxial layer and metallic reflector 30, institute
It includes the first semiconductor layer 21, active layer 22 and the second semiconductor layer 23 for being sequentially arranged in 10 surface of the substrate to state epitaxial layer,
The metallic reflector 30 is set on second semiconductor layer 23.
The material of substrate 10 can be sapphire, silicon carbide or silicon, or other semi-conducting materials, in the present embodiment
Preferred substrate is Sapphire Substrate.Specifically, the substrate is nano-pattern substrate, flip LED chips from one side of substrate light extraction,
Nano-pattern is made in substrate, increases diffraction efficiency, to improve the light extraction efficiency of flip LED chips.
Specifically, the first semiconductor layer provided by the embodiments of the present application and the second semiconductor layer are gallium nitride-based semiconductor
Layer, active layer are gallium nitride base active layer；In addition, the first semiconductor layer provided by the embodiments of the present application, the second semiconductor layer and
The material of active layer can also be other materials, be not particularly limited to this application.
Wherein, the first semiconductor layer can be n type semiconductor layer, then the second semiconductor layer is p type semiconductor layer；Alternatively,
First semiconductor layer is p type semiconductor layer, and the second semiconductor layer is n type semiconductor layer, for the first semiconductor layer and second
The conduction type of semiconductor layer needs to be designed according to practical application, is not particularly limited to this application.
It should be noted that in order to improve the yield of subsequent etching technics, the thickness of the epitaxial layer is 4-10 μm.When
The thickness of epitaxial layer is less than 4 μm, and the brightness of LED chip can reduce, and in subsequent etching, LED chip is susceptible to the feelings of sliver
Condition.But the thickness of epitaxial layer is more than 10 μm, and the brightness of LED chip can reduce, and increase difficulty and the time of etching.
The metallic reflector 30 is formed in the second semiconductor layer surface using depositing operation.Specifically, the gold
Belong to reflecting layer 30 and carry out high annealing in the environment of nitrogen, forms Ohmic contact.Here be conducive to improve the photo electric of chip
Energy.Wherein, the metallic reflector 30 is made of one or more of ITO, Ag, Au, Al, Cr, Ni and Ti.
It should be noted that being equipped in the other embodiment of the application, between the substrate 10 and the epitaxial layer slow
It deposits and rushes layer (not shown).
S2：Form the first hole；
Referring to Fig. 4 b, the light emitting structure is performed etching, forms the first hole 31 for being etched to the first semiconductor layer 21.
Specifically, being performed etching to the light emitting structure using inductively coupled plasma (ICP) technique, run through the metal
Reflecting layer 30, the second semiconductor layer 23 and active layer 22 and the first hole 31 for extending to first semiconductor layer 21.At this
In the other embodiment of application, the first hole 31 can etch into the surface of the first semiconductor layer 21, can also etch into first
Semiconductor layer 21.
S3：Form insulating layer and the second hole；
Referring to Fig. 4 c, a layer insulating is deposited on the light emitting structure surface, forms the first insulating layer 40, and to described the
One insulating layer 40 performs etching, and is formed and is etched to second hole 32 on 30 surface of metallic reflector, and by first hole 31
It exposes.
Specifically, using plasma enhances chemical vapor deposition (PECVD) technique, on 30 surface of the metallic reflector
A layer insulating is deposited, the first insulating layer 40 is formed.Wherein, first insulating layer 40 is by SiC, SiO2、SiNxAnd SiOxNyIn
One or more be made.In the other embodiment of the application, first insulating layer 40 can also be electrically insulated by other
Material composition.
First insulating layer 40 is performed etching using inductively coupled plasma (ICP) or wet corrosion technique, is passed through
It wears the insulating layer 40 and extends to second hole 32 on 30 surface of metallic reflector, and through first insulating layer 40 and incite somebody to action
First hole 31 exposes.
S4：Form the first metal layer, second metal layer and groove；
Referring to Fig. 4 d, 32 interior depositions form one in 40 surface of the first insulating layer, the first hole 31 and the second hole
Metal layer, the metal layer being formed on the first hole 31 is the first metal layer 51, and the metal layer being formed on the second hole 32 is
Second metal layer 52 is equipped with groove 53, and first metal between the first metal layer 51 and the second metal layer 52
Mutually insulated between layer 51 and second metal layer 52.Wherein, the first metal layer 51 and first semiconductor layer 21 are conductive
Connection, the second metal layer 52 are conductively connected with second semiconductor layer 23.
Specifically, using electron beam evaporation (E-beam) or magnetron sputtering (sputter) technique in first insulation
Deposition forms a metal layer, the metal being formed on the first hole 31 in 32 in 40 surface of layer, the first hole 31 and the second hole
Layer is the first metal layer 51, and the metal layer being formed on the second hole 32 is second metal layer 52.Wherein, after forming metal layer
Fully anneal to form good Ohmic contact, to improve the photoelectric properties of chip.The groove 53 runs through the gold
Belong to layer, and extends to 40 surface of the first insulating layer.Preferably, the first metal layer 51 and the second metal layer 52 it
Between be equipped with two grooves 53, and between two grooves 53 be equipped with metal layer.The metal layer by Cr, Ti, Ni, AuSn, Pt, Au and
One or more of Sn is made.
The application is by forming the groove 53 through entire chip on the surface of chip, to make chip weld it in eutectic
Afterwards, by cleaning solution come cleaning scaling powder, and film of flux residue is removed.It can be filled specifically, cleaning solution leads to the groove
Sub-dip is moistened between the first solder layer of cleaning 81 (opposite and first electrode) and the second solder layer 82 (opposite and second electrode)
Region is conductively connected, Jin Erfang to prevent film of flux residue from will be formed between the first solder layer 81 and the second solder layer 82
Only chip leaks electricity, and improves reliability of the chip in package application.
S5：Form second insulating layer and barrier layer；
Referring to Fig. 4 e, second insulating layer 60 and barrier layer are sequentially formed on the layer on surface of metal and the groove 53
70。
Specifically, using plasma enhances chemical vapor deposition (PECVD) technique, one is deposited in the layer on surface of metal
Layer insulating forms second insulating layer 60.Wherein, the second insulating layer 60 is by SiC, SiO2、SiNxAnd SiOxNyIn one kind
Or it several is made.In the other embodiment of the application, the second insulating layer 60 can also be electrically insulated substance group by other
At.
Densification is formed on 60 surface of the second insulating layer using vapor deposition, surface coating or ion implanting surface treatment
Barrier layer 70.Specifically, the barrier layer 70 is by SiO2, one or more of SiN and polyimides be made.Alternatively, institute
It is DLC film to state barrier layer 70.
It should be noted that barrier layer 70 is different from the wettability of scaling powder (main component is rosin), to reduce
Adhesion property of the scaling powder between the first metal layer 51 and second metal layer 52, is further reduced the first metal layer 51 and second
The residual of the scaling powder in region between metal layer 52 enhances cleaning performance, reduces encapsulation electric leakage hidden danger.In addition, barrier layer 70 is also
The insulation performance that chip can be enhanced prevents the brazing metals such as scaling powder and active Au, Sn, In in the process of high-temperature soldering
In be diffused into the inside of chip, further increase the reliability of chip.
S6：Form third hole and the 4th hole；
Referring to Fig. 4 f, the barrier layer 70 and second insulating layer 60 are performed etching, form the be etched on metal layer
Three holes 71 and the 4th hole 72.
Specifically, exhausted to the barrier layer 70 and second using inductively coupled plasma (ICP) or wet corrosion technique
Edge layer 60 performs etching, and forms the third hole 71 for running through the barrier layer 70 and second insulating layer 60 and being etched on metal layer
With the 4th hole 72.Wherein, the third hole 71 is located at the surface of the first hole 31, and the 4th hole 72 is located at second
The surface of hole 32.
S7：Form the first solder layer and the second solder layer；
Referring to Fig. 1, deposition forms the first solder layer 81 in the third hole 71, the deposition in the 4th hole 72
Form the second solder layer 82, and mutually insulated between first solder layer, 81 and second solder layer 82.
Specifically, using electron beam evaporation or magnetron sputtering technique in the deposition formation first in the third hole 71
Solder layer 81, deposition forms the second solder layer 82, and first solder layer, 81 and second solder in the 4th hole 72
Mutually insulated between layer 82.Wherein, first solder layer 81 is conductively connected with the first metal layer 51, second solder
Layer 82 is conductively connected with the second metal layer 52.
Above disclosed is only a kind of the utility model preferred embodiment, cannot limit this practicality with this certainly
Novel interest field, therefore equivalent variations made according to the claim of the utility model still belong to what the utility model was covered
Range.
Claims (10)
1. a kind of high reliability LED chip, including；
Substrate；
Set on the light emitting structure of the substrate surface, the light emitting structure includes being sequentially arranged in the first the half of the substrate surface to lead
Body layer, active layer, the second semiconductor layer, metallic reflector and the first insulating layer；
Set on the first surface of insulating layer and the first metal layer of the first semiconductor layer is extended to, set on the first surface of insulating layer and is prolonged
Extend to the second metal layer of metallic reflector, mutually insulated between the first metal layer and second metal layer；
Through the first insulating layer and the groove that is arranged between the first metal layer and second metal layer；
The second insulating layer and barrier layer being sequentially arranged on the first surface of insulating layer and groove；
Set on blocking layer surface and extend to the first solder layer of the first metal, set on blocking layer surface and extend to the second metal
The second solder layer, and mutually insulated between first solder layer and second solder layer.
2. high reliability LED chip according to claim 1, which is characterized in that the first metal layer and described second
It is equipped with two grooves between metal layer, and is equipped with metal layer between two grooves.
3. high reliability LED chip according to claim 1 or 2, which is characterized in that the first metal layer and described the
Semi-conductor layer is conductively connected, and the second metal layer is conductively connected with second semiconductor layer.
4. high reliability LED chip according to claim 1 or 2, which is characterized in that first solder layer and described the
One metal layer is conductively connected, and second solder layer is conductively connected with the second metal layer.
5. high reliability LED chip according to claim 1, which is characterized in that the material of the barrier layer is SiO2、SiN
With one kind in polyimides.
6. high reliability LED chip according to claim 1, which is characterized in that the barrier layer is DLC film.
7. high reliability LED chip according to claim 1, which is characterized in that the material of the metallic reflector is
One kind in ITO, Ag, Au, Al, Cr, Ni and Ti.
8. high reliability LED chip according to claim 1, which is characterized in that the material of first insulating layer is
SiC、SiO2、SiNxAnd SiOxNyIn one kind.
9. high reliability LED chip according to claim 1, which is characterized in that the material of the metal layer be Cr, Ti,
One kind in Ni, AuSn, Pt, Au and Sn.
10. high reliability LED chip according to claim 1, which is characterized in that the material of the second insulating layer is
SiC、SiO2、SiNxAnd SiOxNyIn one kind.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820023231.8U CN207925512U (en) | 2018-01-05 | 2018-01-05 | A kind of high reliability LED chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820023231.8U CN207925512U (en) | 2018-01-05 | 2018-01-05 | A kind of high reliability LED chip |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN207925512U true CN207925512U (en) | 2018-09-28 |
Family
ID=63616212
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201820023231.8U Active CN207925512U (en) | 2018-01-05 | 2018-01-05 | A kind of high reliability LED chip |
Country Status (1)
| Country | Link |
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| CN (1) | CN207925512U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109449271A (en) * | 2018-11-01 | 2019-03-08 | 佛山市国星半导体技术有限公司 | A kind of LED chip and preparation method thereof with solder electrode |
| WO2021134488A1 (en) * | 2019-12-31 | 2021-07-08 | 重庆康佳光电技术研究院有限公司 | Light-emitting diode chip, display panel, and electronic device |
-
2018
- 2018-01-05 CN CN201820023231.8U patent/CN207925512U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109449271A (en) * | 2018-11-01 | 2019-03-08 | 佛山市国星半导体技术有限公司 | A kind of LED chip and preparation method thereof with solder electrode |
| CN109449271B (en) * | 2018-11-01 | 2024-04-16 | 佛山市国星半导体技术有限公司 | LED chip with solder electrode and manufacturing method thereof |
| WO2021134488A1 (en) * | 2019-12-31 | 2021-07-08 | 重庆康佳光电技术研究院有限公司 | Light-emitting diode chip, display panel, and electronic device |
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