CN1164158C - 用于半导体芯片组件的多层电路板 - Google Patents
用于半导体芯片组件的多层电路板 Download PDFInfo
- Publication number
- CN1164158C CN1164158C CNB991191692A CN99119169A CN1164158C CN 1164158 C CN1164158 C CN 1164158C CN B991191692 A CNB991191692 A CN B991191692A CN 99119169 A CN99119169 A CN 99119169A CN 1164158 C CN1164158 C CN 1164158C
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- China
- Prior art keywords
- circuit board
- underboarding
- trace layer
- insulating barrier
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 36
- 238000000034 method Methods 0.000 title description 12
- 239000002184 metal Substances 0.000 claims abstract description 51
- 229910052751 metal Inorganic materials 0.000 claims abstract description 51
- 230000004888 barrier function Effects 0.000 claims description 35
- 239000004642 Polyimide Substances 0.000 claims description 21
- 229920001721 polyimide Polymers 0.000 claims description 21
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 19
- 229910052802 copper Inorganic materials 0.000 claims description 14
- 239000010949 copper Substances 0.000 claims description 14
- 239000000919 ceramic Substances 0.000 claims description 7
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 7
- 239000011347 resin Substances 0.000 claims description 7
- 229920005989 resin Polymers 0.000 claims description 7
- 229910052737 gold Inorganic materials 0.000 claims description 5
- 239000010931 gold Substances 0.000 claims description 5
- 239000007769 metal material Substances 0.000 claims description 4
- 239000010408 film Substances 0.000 description 21
- 238000003466 welding Methods 0.000 description 18
- 239000011889 copper foil Substances 0.000 description 6
- 238000005275 alloying Methods 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 4
- 238000005755 formation reaction Methods 0.000 description 4
- QRJOYPHTNNOAOJ-UHFFFAOYSA-N copper gold Chemical compound [Cu].[Au] QRJOYPHTNNOAOJ-UHFFFAOYSA-N 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 230000017525 heat dissipation Effects 0.000 description 3
- 238000007731 hot pressing Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N nickel Substances [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 3
- 238000007747 plating Methods 0.000 description 3
- 229910000881 Cu alloy Inorganic materials 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 238000010276 construction Methods 0.000 description 2
- 238000005520 cutting process Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 238000001020 plasma etching Methods 0.000 description 2
- 229910001020 Au alloy Inorganic materials 0.000 description 1
- 229910001128 Sn alloy Inorganic materials 0.000 description 1
- MPTQRFCYZCXJFQ-UHFFFAOYSA-L copper(II) chloride dihydrate Chemical compound O.O.[Cl-].[Cl-].[Cu+2] MPTQRFCYZCXJFQ-UHFFFAOYSA-L 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 239000002223 garnet Substances 0.000 description 1
- 239000003353 gold alloy Substances 0.000 description 1
- JVPLOXQKFGYFMN-UHFFFAOYSA-N gold tin Chemical compound [Sn].[Au] JVPLOXQKFGYFMN-UHFFFAOYSA-N 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 230000003116 impacting effect Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 238000000427 thin-film deposition Methods 0.000 description 1
Images
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
- H05K3/4629—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets
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- H—ELECTRICITY
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4857—Multilayer substrates
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49805—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5383—Multilayer substrates
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
- H05K3/4617—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination characterized by laminating only or mainly similar single-sided circuit boards
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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- H01L2224/4809—Loop shape
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
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- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H01L2924/01039—Yttrium [Y]
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- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12042—LASER
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- H01L2924/30—Technical effects
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- H01L2924/3025—Electromagnetic shielding
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/05—Insulated conductive substrates, e.g. insulated metal substrate
- H05K1/056—Insulated conductive substrates, e.g. insulated metal substrate the metal substrate being covered by an organic insulating layer
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09554—Via connected to metal substrate
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09563—Metal filled via
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/423—Plated through-holes or plated via connections characterised by electroplating method
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/44—Manufacturing insulated metal core circuits or other insulated electrically conductive core circuits
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Insulated Metal Substrates For Printed Circuits (AREA)
Abstract
Description
Claims (7)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10264410A JP3119630B2 (ja) | 1998-09-18 | 1998-09-18 | 半導体チップモジュール用多層回路基板およびその製造方法 |
JP264410/1998 | 1998-09-18 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1248882A CN1248882A (zh) | 2000-03-29 |
CN1164158C true CN1164158C (zh) | 2004-08-25 |
Family
ID=17402788
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB991191692A Expired - Fee Related CN1164158C (zh) | 1998-09-18 | 1999-09-17 | 用于半导体芯片组件的多层电路板 |
Country Status (6)
Country | Link |
---|---|
US (1) | US6555763B1 (zh) |
EP (1) | EP0987748A3 (zh) |
JP (1) | JP3119630B2 (zh) |
KR (1) | KR100335454B1 (zh) |
CN (1) | CN1164158C (zh) |
TW (1) | TW444529B (zh) |
Families Citing this family (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002217510A (ja) * | 2001-01-15 | 2002-08-02 | Matsushita Electric Ind Co Ltd | 基板の接続構造とその製造方法 |
KR20020091785A (ko) * | 2001-05-31 | 2002-12-06 | 니혼도꾸슈도교 가부시키가이샤 | 전자부품 및 이것을 사용한 이동체 통신장치 |
JP3840921B2 (ja) | 2001-06-13 | 2006-11-01 | 株式会社デンソー | プリント基板のおよびその製造方法 |
MXPA02005829A (es) * | 2001-06-13 | 2004-12-13 | Denso Corp | Tablero de cableados impresos con dispositivo electrico incrustado y metodo para la manufactura de tablero de cableados impresos con dispositivo electrico incrustado. |
JP2003023250A (ja) | 2001-07-06 | 2003-01-24 | Denso Corp | 多層基板のおよびその製造方法 |
JP4030285B2 (ja) * | 2001-10-10 | 2008-01-09 | 株式会社トクヤマ | 基板及びその製造方法 |
US6599778B2 (en) * | 2001-12-19 | 2003-07-29 | International Business Machines Corporation | Chip and wafer integration process using vertical connections |
MY140754A (en) | 2001-12-25 | 2010-01-15 | Hitachi Chemical Co Ltd | Connection board, and multi-layer wiring board, substrate for semiconductor package and semiconductor package using connection board, and manufacturing method thereof |
KR100435042B1 (ko) * | 2002-04-27 | 2004-06-07 | 엘지이노텍 주식회사 | 듀플렉스 패키지 제조방법 |
JP3835381B2 (ja) * | 2002-09-04 | 2006-10-18 | 株式会社村田製作所 | 積層型電子部品 |
JP2004228478A (ja) * | 2003-01-27 | 2004-08-12 | Fujitsu Ltd | プリント配線基板 |
US6859514B2 (en) * | 2003-03-14 | 2005-02-22 | Ge Medical Systems Global Technology Company Llc | CT detector array with uniform cross-talk |
JP2005340741A (ja) * | 2004-05-31 | 2005-12-08 | Renesas Technology Corp | 半導体装置 |
US7118277B2 (en) * | 2004-12-08 | 2006-10-10 | King Slide Works Co., Ltd. | Slide assembly |
JP4503583B2 (ja) * | 2006-12-15 | 2010-07-14 | 日本メクトロン株式会社 | キャパシタ用接着シートおよびそれを用いたキャパシタ内蔵型プリント配線板の製造方法 |
CN101321430B (zh) * | 2007-06-04 | 2010-11-10 | 鸿富锦精密工业(深圳)有限公司 | 电路板组件及其制造方法 |
CN102029922B (zh) * | 2009-09-27 | 2015-01-21 | 天津市松正电动汽车技术股份有限公司 | 基于双面铝基板的功率mosfet并联电路及结构设计 |
JP2011222555A (ja) * | 2010-04-02 | 2011-11-04 | Denso Corp | 半導体チップ内蔵配線基板の製造方法 |
US8680403B2 (en) * | 2011-09-08 | 2014-03-25 | Texas Instruments Incorporated | Apparatus for broadband matching |
KR102153041B1 (ko) * | 2013-12-04 | 2020-09-07 | 삼성전자주식회사 | 반도체소자 패키지 및 그 제조방법 |
JP2016213283A (ja) * | 2015-05-01 | 2016-12-15 | ソニー株式会社 | 製造方法、および貫通電極付配線基板 |
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Publication number | Priority date | Publication date | Assignee | Title |
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CA2059020C (en) * | 1991-01-09 | 1998-08-18 | Kohji Kimbara | Polyimide multilayer wiring board and method of producing same |
US5440805A (en) * | 1992-03-09 | 1995-08-15 | Rogers Corporation | Method of manufacturing a multilayer circuit |
US5259110A (en) * | 1992-04-03 | 1993-11-09 | International Business Machines Corporation | Method for forming a multilayer microelectronic wiring module |
US5396397A (en) * | 1992-09-24 | 1995-03-07 | Hughes Aircraft Company | Field control and stability enhancement in multi-layer, 3-dimensional structures |
JPH0828580B2 (ja) * | 1993-04-21 | 1996-03-21 | 日本電気株式会社 | 配線基板構造及びその製造方法 |
JP3246796B2 (ja) | 1993-05-07 | 2002-01-15 | 新光電気工業株式会社 | 多層パッケージとその製造方法 |
JPH06318669A (ja) | 1993-05-07 | 1994-11-15 | Shinko Electric Ind Co Ltd | 多層リードフレームおよび半導体パッケージ |
JPH0786736A (ja) | 1993-09-14 | 1995-03-31 | Fujitsu Ltd | 薄膜多層回路基板 |
JP2679681B2 (ja) | 1995-04-28 | 1997-11-19 | 日本電気株式会社 | 半導体装置、半導体装置用パッケージ及びその製造方法 |
US6156980A (en) * | 1998-06-04 | 2000-12-05 | Delco Electronics Corp. | Flip chip on circuit board with enhanced heat dissipation and method therefor |
-
1998
- 1998-09-18 JP JP10264410A patent/JP3119630B2/ja not_active Expired - Fee Related
-
1999
- 1999-09-15 US US09/397,016 patent/US6555763B1/en not_active Expired - Lifetime
- 1999-09-16 EP EP99118391A patent/EP0987748A3/en not_active Withdrawn
- 1999-09-17 KR KR1019990040104A patent/KR100335454B1/ko not_active IP Right Cessation
- 1999-09-17 CN CNB991191692A patent/CN1164158C/zh not_active Expired - Fee Related
- 1999-09-17 TW TW088116177A patent/TW444529B/zh not_active IP Right Cessation
Also Published As
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CN1248882A (zh) | 2000-03-29 |
EP0987748A2 (en) | 2000-03-22 |
TW444529B (en) | 2001-07-01 |
JP3119630B2 (ja) | 2000-12-25 |
US6555763B1 (en) | 2003-04-29 |
JP2000100987A (ja) | 2000-04-07 |
KR20000023266A (ko) | 2000-04-25 |
EP0987748A3 (en) | 2005-05-11 |
KR100335454B1 (ko) | 2002-05-04 |
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