CN116207140A - 半导体装置及电力变换装置 - Google Patents

半导体装置及电力变换装置 Download PDF

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CN116207140A
CN116207140A CN202211490554.5A CN202211490554A CN116207140A CN 116207140 A CN116207140 A CN 116207140A CN 202211490554 A CN202211490554 A CN 202211490554A CN 116207140 A CN116207140 A CN 116207140A
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原田辰雄
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Mitsubishi Electric Corp
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Abstract

得到不会导致耐压降低且能够抑制电容特性的增加的半导体装置及电力变换装置。载流子积蓄层(7)的峰值浓度大于或等于1.0E16/cm3，沟槽(2)的底部位于载流子积蓄层(7)之中，将沟槽(2)的底部的深度处的载流子积蓄层(7)的浓度除以漂移层(6)的浓度所得到的结果作为浓度比率，沟槽(2)的底部的深度是浓度比率大于1而小于或等于10的位置。

Description

半导体装置及电力变换装置
技术领域
本发明涉及半导体装置及电力变换装置。
背景技术
电力用半导体装置为了降低接通电压而具有载流子积蓄层和沟槽栅极构造。就现有的半导体装置而言，沟槽是以贯穿载流子积蓄层的方式形成的(例如参照专利文献1)。
专利文献1：日本特开2013-89700号公报
存在下述问题，即，随着沟槽深度变深而电容特性增加。另一方面，如果仅仅是在载流子积蓄层内配置沟槽栅极，则存在下述问题，
即，在施加反向偏置时耐压减少。
发明内容
本发明就是为了解决上述那样的课题而提出的，其目的在于，得到不会导致耐压降低且能够抑制电容特性的增加的半导体装置及电力变换装置。
本发明涉及的半导体装置的特征在于，具有：半导体基板，其具有设置于彼此相对的第1主面与第2主面之间的第1导电型的漂移层；第1导电型的载流子积蓄层，其设置于所述漂移层的所述第1主面侧；第2导电型的基极层，其设置于所述载流子积蓄层的所述第1主面侧；第1导电型的发射极层，其选择性地设置于所述基极层的所述第1主面侧；多个沟槽，其并排设置于所述半导体基板的所述第1主面，将所述发射极层及所述基极层贯穿；栅极电极，其隔着栅极绝缘膜而设置于所述沟槽之中；以及第2导电型的集电极层，其设置于所述半导体基板的所述第2主面侧的表层，所述载流子积蓄层的峰值浓度大于或等于1.0E16/cm3，所述沟槽的底部位于所述载流子积蓄层之中，将所述沟槽的底部的深度处的所述载流子积蓄层的浓度除以所述漂移层的浓度所得到的结果作为浓度比率，所述沟槽的底部的深度是所述浓度比率大于1而小于或等于10的位置。
发明的效果
在本发明中，沟槽的底部位于n型载流子积蓄层之中。并且，沟槽的底部的深度是浓度比率大于1而小于或等于10的位置。由此，不会导致耐压降低，能够抑制电容特性的增加。
附图说明
图1是表示实施方式1涉及的半导体装置的俯视图。
图2是沿图1的I-II的剖视图。
图3是表示对比例涉及的半导体装置的剖视图。
图4是将沟槽的深度与接通电压的相关性按载流子积蓄层的峰值浓度示出的图。
图5是表示沟槽的深度与IGBT的各电容的相关性的图。
图6是表示沟槽的深度与VCES比率的相关性的图。
图7是表示实施方式1涉及的p型基极层的载流子浓度分布与n型载流子积蓄层的载流子浓度分布的关系的图。
图8是表示沟槽的深度与导通损耗的相关性的图。
图9是表示实施方式2涉及的半导体装置的剖视图。
图10是表示实施方式3涉及的半导体装置的剖视图。
图11是表示电力变换系统的结构的框图，该电力变换系统应用了实施方式4涉及的电力变换装置。
具体实施方式
参照附图，对实施方式涉及的半导体装置及电力变换装置进行说明。对相同或对应的结构要素标注相同标号，有时省略重复说明。
实施方式1
图1是表示实施方式1涉及的半导体装置的俯视图。单元区域1是流过主电流的区域，具有IGBT单元。在单元区域1条带状地设置沟槽2，单位单元(unit cell)的俯视形状成为条带型。但是，单位单元的俯视形状也可以是由四边形、六边形或圆等构成的格子型等。
在焊盘区域3设置有栅极焊盘，但不限于此，例如也可以设置电流感测焊盘、开尔文发射极焊盘、温度感测二极管焊盘。栅极焊盘是施加用于对半导体装置进行通断控制的栅极驱动电压的控制焊盘，与单元区域的栅极沟槽电极电连接。电流感测焊盘是用于对在半导体装置的单元区域流动的电流进行检测的控制焊盘，以使得在半导体装置的单元区域流动电流时流过在整个单元区域流动的电流的几分之一至几万分之一的电流的方式与单元区域的一部分电连接。开尔文发射极焊盘与IGBT单元的p型基极层电连接，但也可以经由p+型接触层而与p型基极层电连接。温度感测二极管焊盘是与设置于半导体装置的温度感测二极管的阳极及阴极电连接的控制焊盘。对设置于单元区域内的未图示的温度感测二极管的阳极和阴极之间的电压进行测定，对半导体装置的温度进行测定。
在单元区域1及焊盘区域3的周围设置有用于保持半导体装置的耐压的末端区域4。在末端区域4，在作为半导体装置的表面侧的第1主面侧，作为耐压保持构造而设置例如由p型末端阱层包围单元区域1的FLR(Field Limmiting Ring)、或由具有浓度梯度的p型阱层包围单元区域的VLD(Variation of Lateral Doping)。FLR的环状的p型末端阱层的数量或者VLD的浓度分布是根据半导体装置的耐压设计而适当地选择的。
图2是沿图1的I-II的剖视图。半导体基板5具有：彼此相对的第1主面及第2主面；以及n-型漂移层6，其设置于第1主面与第2主面之间。
在n-型漂移层6的第1主面侧设置有与n-型漂移层6相比n型杂质的浓度更高的n型载流子积蓄层7。n型载流子积蓄层7的峰值浓度大于或等于1.0E16/cm3。通过设置n型载流子积蓄层7，从而能够降低电流流动时的通电损耗。n型载流子积蓄层7是通过下述方式形成的，即，通过向具有n-型漂移层6的半导体基板5对n型杂质进行离子注入，然后通过退火使注入的n型杂质在半导体基板5内扩散。
p型基极层8设置于n型载流子积蓄层7的第1主面侧。n型发射极层9和p+型接触层10选择性地设置于p型基极层8的第1主面侧的表层的一部分。p型接触层10与p型基极层8相比杂质浓度更高。
多个沟槽2并排设置于半导体基板5的第1主面，将n型发射极层9及p型基极层8贯穿。沟槽2的底部位于n型载流子积蓄层7之中。栅极电极11隔着栅极绝缘膜12而设置于沟槽2之中。层间绝缘膜13覆盖栅极电极11的上表面。
在半导体基板5的第1主面和层间绝缘膜13之上设置有发射极电极14。发射极电极14是例如铝硅合金(Al-Si类合金)等铝合金。也可以是在由铝合金形成的电极上通过化学镀或电镀形成了镀膜的由多层金属膜构成的电极。镀膜是例如镍(Ni)镀膜。当在层间绝缘膜13设置的接触孔的宽度窄，不能通过发射极电极14得到良好的填埋的情况下，也可以在接触孔配置与发射极电极14相比填埋性更好的钨，在钨之上设置发射极电极14。
此外，也可以在半导体基板5的第1主面及层间绝缘膜13与发射极电极14之间设置阻挡金属。阻挡金属是包含钛(Ti)的导电体，例如氮化钛，也可以是使钛与硅(Si)合金化的TiSi。阻挡金属与n型发射极层9、p+型接触层10欧姆接触而电连接。
在n-型漂移层6的第2主面侧设置有与n-型漂移层6相比杂质的浓度更高的n型缓冲层15。n型缓冲层15是为了在半导体装置为断开状态时抑制从p型基极层8向第2主面侧延伸的耗尽层穿通而设置的。n型缓冲层15是注入例如磷(P)或质子(H+)而形成的，也可以注入磷(P)以及质子(H+)这两者。此外，也可以不设置n型缓冲层15。
p型集电极层16设置于半导体基板5的第2主面侧的表层。p型集电极层16不仅设置于单元区域1，而且还设置于末端区域4。p型集电极层16中的设置于末端区域4的部分构成p型末端集电极层。集电极电极17设置于半导体基板5的第2主面。集电极电极17与发射极电极14相同地由铝合金构成、或由铝合金和镀膜构成。另外，集电极电极17也可以呈与发射极电极14不同的结构。集电极电极17与p型集电极层16欧姆接触，与p型集电极层16电连接。
在这里，将沟槽2的底部的深度处的n型载流子积蓄层7的浓度除以漂移层6的浓度所得到的结果作为浓度比率，沟槽2的底部的深度是浓度比率大于1而小于或等于10的位置。沟槽2的深度大于或等于3.5μm而小于或等于5.0μm。
接下来，与对比例进行比较而对本实施方式的效果进行说明。图3是表示对比例涉及的半导体装置的剖视图。在对比例中，为了确保施加反向偏置电压的能力，沟槽2贯穿n型载流子积蓄层7。与未贯穿的情况相比较，由于沟槽2更深，所以处于下述倾向，即，沟槽2的周长变长，栅极周边的电容增加。
栅极绝缘膜12的电容Cox由Cox＝(εoεoxLW)/d表示。在这里，L是沟槽2的周长，W是沟槽2的宽度(进深)，d是栅极绝缘膜12的厚度，εo是真空的介电常数，εox是栅极绝缘膜12的相对介电常数。另外，周长L由L＝2α+πβ表示。在这里，α是沟槽2的直线部的长度，β是沟槽2的圆周部的半径。W、d在这里是固定值，因此可知栅极绝缘膜12的电容Cox是由沟槽2的周长L决定的。
另外，在对比例中沟槽2贯穿n型载流子积蓄层7，因此沟槽2的周长L变长，电容Cox变大。与此相对，在本实施方式中，沟槽2的底部位于n型载流子积蓄层7之中。因此，沟槽2的周长L短，所以能够抑制电容特性的增加。
图4是将沟槽的深度与接通电压的相关性按载流子积蓄层的峰值浓度示出的图。接通电压(VCE(sat))是向栅极电极11施加正向偏置从集电极电极17至发射极电极14通电时的电压降。在不存在n型载流子积蓄层7或n型载流子积蓄层7的峰值浓度低于1.0E16/cm3的情况下，显现出接通电压的增加对沟槽2的深度的依赖程度高的倾向。在峰值浓度比1.0E16/cm3低的情况下，在沟槽2的深度大于或等于3.5μm而小于或等于5.0μm的范围内，接通电压变化率最低的凡例6.3E15/cm3的接通电压变化率(沟槽深度5.0μm和沟槽深度3.5μm时的VCE(sat)的比率)变为接近大约10％。另一方面，在本实施方式中，由于n型载流子积蓄层7的峰值浓度大于或等于1.0E16/cm3，所以沟槽2的深度和接通电压的相关性变得平缓。
图5是表示沟槽的深度与IGBT的各电容的相关性的图。通过将沟槽2的深度设为大于或等于3.5μm而小于或等于5.0μm，从而能够在防止反馈电容(Cres)、输出电容(Coes)急剧增加的同时减少输入电容(Cies)。
图6是表示沟槽的深度与VCES比率的相关性的图。VCES表示将栅极电极11、发射极电极14与GND连接，向集电极电极17施加了反向偏置的非重复的最大电压。在沟槽2贯穿n型载流子积蓄层7并且沟槽2的底部配置于n-型漂移层6的构造中，VCES足够稳定。VCES比率是将沟槽2的深度形成得浅的构造的VCES相对于该VCES足够稳定的构造(沟槽2的深度6μm)的VCES的比率。直至沟槽2的深度达到5.0μm为止，显现出VCES比率伴随着深度而减少的倾向。另外，也可知在浓度比率小于或等于10的区域，VCES比率是稳定的。
图7是表示实施方式1涉及的p型基极层的载流子浓度分布与n型载流子积蓄层的载流子浓度分布的关系的图。图中的A表示从p型基极层8的载流子分布(实线)与n型载流子积蓄层7的载流子分布(虚线)的交点至n型载流子积蓄层7的峰值浓度为止的距离。即，A示出了从p型基极层8和n型载流子积蓄层7的接合位置至n型载流子积蓄层7的峰值浓度位置为止的距离。在A长的情况下，为了将浓度比率设为小于或等于10，需要不断加深n型载流子积蓄层7的深度。其结果是，沟槽2的深度也不断加深，所以难以对电容特性的降低进行测量。因此，优选A为0.4μm以内。
图8是表示沟槽的深度与导通损耗的相关性的图。如果沟槽2的深度大于或等于3.5μm而小于或等于5.0μm，则导通损耗的增加率平缓。将该沟槽深度与导通损耗的相关性平缓的范围进行直线近似所得到的线是线:A。如果沟槽2的深度超过5.0μm，则导通损耗的增加率变得陡峭。将该沟槽深度与导通损耗的相关性陡峭的范围进行直线近似所得到的线是线:B。在线:A与线:B的交点处沟槽2的深度是5.0μm。通过将沟槽2的深度设为小于或等于5.0μm，从而能够防止通断时的导通损耗的大幅增加。
实施方式2
图9是表示实施方式2涉及的半导体装置的剖视图。图9对应于沿图1的I-II的剖面。将n型发射极层9贯穿的凹部18选择性地设置于第1主面侧的表层。将凹部18称为沟槽接触。在凹部18的底部设置有p+型接触层10的IGBT通断时，集电极电流不通过n型发射极层9而是通过凹部18流动。由此，能够实现闩锁耐量的提高。其它的结构及效果与实施方式1相同。
实施方式3
图10是表示实施方式3涉及的半导体装置的剖视图。图10对应于沿图1的I-II的剖面。该半导体装置是RC-IGBT，该RC-IGBT具有在半导体基板5彼此相邻地设置的IGBT区域19和二极管区域20。
IGBT区域19具有n型载流子积蓄层7、p型基极层8、n型发射极层9、沟槽2、栅极电极11、p型集电极层16。二极管区域20具有：p型阳极层21，其设置于半导体基板5的第1主面侧的表层；以及n型阴极层22，其设置于半导体基板5的第2主面侧的表层。其它的结构与实施方式1相同。由此，能够得到具有实施方式1的效果的RC-IGBT。
此外，半导体基板5不限于由硅形成，也可以由与硅相比带隙更大的宽带隙半导体形成。宽带隙半导体例如是碳化硅、氮化镓类材料或金刚石。由于由这样的宽带隙半导体形成的半导体芯片的耐压性及允许电流密度高，因此能够小型化。通过使用该被小型化后的半导体芯片，组装有该半导体芯片的半导体装置也能够小型化、高集成化。另外，由于半导体芯片的耐热性高，因此能够将散热器的散热鳍片小型化，能够将水冷部空冷化，因此能够进一步将半导体装置小型化。另外，由于半导体芯片的功率损耗低且高效，因此能够使半导体装置高效化。
实施方式4
本实施方式是将上述的实施方式1～3涉及的半导体装置应用于电力变换装置。电力变换装置例如为逆变器装置、转换器装置、伺服放大器、电源单元等。本发明并不限于特定的电力变换装置，以下，对将本发明应用于三相逆变器的情况进行说明。
图11是表示电力变换系统的结构的框图，该电力变换系统应用了实施方式4涉及的电力变换装置。该电力变换系统具有电源100、电力变换装置200、负载300。电源100为直流电源，将直流电供给至电力变换装置200。电源100可以由各种电源构成，例如，能够由直流系统、太阳能电池、蓄电池构成，也可以由与交流系统连接的整流电路或AC/DC转换器构成。另外，也可以由将从直流系统输出的直流电力变换为规定电力的DC/DC转换器构成电源100。
电力变换装置200为连接于电源100和负载300之间的三相逆变器，将从电源100供给来的直流电力变换为交流电力，将交流电力供给至负载300。电力变换装置200具有：主变换电路201，其将直流电力变换为交流电力而输出；以及控制电路203，其将对主变换电路201进行控制的控制信号输出至主变换电路201。
负载300为由从电力变换装置200供给的交流电力驱动的三相电动机。此外，负载300并不限于特定的用途，为搭载于各种电气设备的电动机，例如，用作面向混合动力汽车、电动汽车、铁路车辆、电梯、或空调设备的电动机。
以下，对电力变换装置200详细地进行说明。主变换电路201具有开关元件和续流二极管(未图示)，通过开关元件的通断，从而将从电源100供给来的直流电力变换为交流电力而供给至负载300。主变换电路201的具体的电路结构是多种多样的，但本实施方式涉及的主变换电路201为2电平的三相全桥电路，能够由6个开关元件和分别与开关元件反并联的6个续流二极管构成。主变换电路201的各开关元件和各续流二极管由与上述实施方式1～4中的任意者相当的半导体装置202构成。6个开关元件两个两个地串联连接而构成上下桥臂，各上下桥臂构成全桥电路的各相(U相、V相、W相)。而且，各上下桥臂的输出端子即主变换电路201的3个输出端子与负载300连接。
另外，主变换电路201具有对各开关元件进行驱动的驱动电路(未图示)，但驱动电路可以内置于半导体装置202，也可以为具有与半导体装置202分体的驱动电路的结构。驱动电路生成对主变换电路201的开关元件进行驱动的驱动信号，供给至主变换电路201的开关元件的控制电极。具体而言，按照来自后述的控制电路203的控制信号，将使开关元件成为接通状态的驱动信号、和使开关元件成为断开状态的驱动信号输出至各开关元件的控制电极。在将开关元件维持为接通状态的情况下，驱动信号为大于或等于开关元件的阈值电压的电压信号(接通信号)，在将开关元件维持为断开状态的情况下，驱动信号为小于或等于开关元件的阈值电压的电压信号(断开信号)。
控制电路203对主变换电路201的开关元件进行控制以将所期望的电力供给至负载300。具体而言，基于应该供给至负载300的电力对主变换电路201的各开关元件应该成为接通状态的时间(接通时间)进行计算。例如，能够通过与应该输出的电压对应地对开关元件的接通时间进行调制的PWM控制而对主变换电路201进行控制。而且，将控制指令(控制信号)输出至主变换电路201所具有的驱动电路，以使得在各时间点将接通信号输出至应该成为接通状态的开关元件，将断开信号输出至应该成为断开状态的开关元件。驱动电路按照该控制信号，将接通信号或断开信号作为驱动信号输出至各开关元件的控制电极。
在本实施方式涉及的电力变换装置中，由于应用实施方式1～3涉及的半导体装置作为半导体装置202，所以不会导致耐压降低，能够抑制电容特性的增加。
在本实施方式中，对将本发明应用于2电平的三相逆变器的例子进行了说明，但本发明并不限于此，能够应用于各种电力变换装置。在本实施方式中，设为2电平的电力变换装置，但也可以是3电平或多电平的电力变换装置，在将电力供给至单相负载的情况下也可以将本发明应用于单相逆变器。另外，在将电力供给至直流负载等的情况下，也可以将本发明应用于DC/DC转换器或AC/DC转换器。
另外，应用了本发明的电力变换装置并不限定于上述负载为电动机的情况，例如，也能够用作放电加工机、激光加工机、或感应加热烹调器或非接触器供电系统的电源装置，并且也能够用作太阳能发电系统或蓄电系统等的功率调节器。
标号的说明
2沟槽，5半导体基板，6漂移层，7n型载流子积蓄层，8p型基极层，9n型发射极层，11栅极电极，12栅极绝缘膜，16p型集电极层，18凹部，19IGBT区域，20二极管区域，21p型阳极层，22n型阴极层，200电力变换装置，201主变换电路，202半导体装置，203控制电路

Claims (8)

1.一种半导体装置，其特征在于，具有：
半导体基板，其具有设置于彼此相对的第1主面与第2主面之间的第1导电型的漂移层；
第1导电型的载流子积蓄层，其设置于所述漂移层的所述第1主面侧；
第2导电型的基极层，其设置于所述载流子积蓄层的所述第1主面侧；
第1导电型的发射极层，其选择性地设置于所述基极层的所述第1主面侧；
多个沟槽，其并排设置于所述半导体基板的所述第1主面，将所述发射极层及所述基极层贯穿；
栅极电极，其隔着栅极绝缘膜而设置于所述沟槽之中；以及
第2导电型的集电极层，其设置于所述半导体基板的所述第2主面侧的表层，
所述载流子积蓄层的峰值浓度大于或等于1.0E16/cm3，
所述沟槽的底部位于所述载流子积蓄层之中，
将所述沟槽的底部的深度处的所述载流子积蓄层的浓度除以所述漂移层的浓度所得到的结果作为浓度比率，所述沟槽的底部的深度是所述浓度比率大于1而小于或等于10的位置。
2.根据权利要求1所述的半导体装置，其特征在于，
所述载流子积蓄层的浓度峰值在从所述第1主面朝向所述第2主面的方向上位于与所述基极层和所述载流子积蓄层的接合部相距0.4μm以内的位置处。
3.根据权利要求1或2所述的半导体装置，其特征在于，
所述沟槽的深度小于或等于5.0μm。
4.根据权利要求1或2所述的半导体装置，其特征在于，
所述沟槽的深度大于或等于3.5μm而小于或等于5.0μm。
5.根据权利要求1至4中任一项所述的半导体装置，其特征在于，
贯穿所述发射极层的凹部选择性地设置于所述第1主面侧的表层。
6.根据权利要求1至5中任一项所述的半导体装置，其特征在于，
所述半导体装置是RC-IGBT，该RC-IGBT具有彼此相邻地设置于所述半导体基板的IGBT区域和二极管区域，
所述IGBT区域具有所述载流子积蓄层、所述基极层、所述发射极层、所述沟槽、所述栅极电极、所述集电极层，
所述二极管区域具有：第2导电型的阳极层，其设置于所述半导体基板的所述第1主面侧的表层；以及第1导电型的阴极层，其设置于所述半导体基板的所述第2主面侧的表层。
7.根据权利要求1至6中任一项所述的半导体装置，其特征在于，
所述半导体基板由宽带隙半导体形成。
8.一种电力变换装置，其特征在于，具有：
主变换电路，其具有权利要求1至7中任一项所述的半导体装置，该主变换电路将输入进来的电力变换而输出；以及
控制电路，其将对所述主变换电路进行控制的控制信号输出至所述主变换电路。
CN202211490554.5A 2021-12-01 2022-11-25 半导体装置及电力变换装置 Pending CN116207140A (zh)

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