CN116193735A - Manufacturing method of ladder groove bottom graph - Google Patents

Abstract

The invention discloses a manufacturing method of a stair groove bottom graph and a PCB, comprising the following steps: s10, providing a first sub-board as a sub-board of a stepped groove layer, wherein the first sub-board is not processed into a line pattern on the surface layer corresponding to the bottom of the stepped groove, plating flash copper S20 on the whole of the first sub-board, and processing a groove bottom line pattern corresponding to a preset stepped groove on the first sub-board; s30, providing other layers of daughter boards and prepregs, and pressing the daughter boards and the prepregs with the first daughter board to manufacture a mother board with a stepped groove; s40, plating chemical copper on the step groove; s50, microetching the step groove to remove the chemical copper in the step groove. The invention firstly plating flash copper and then plating chemical copper on the groove bottom circuit pattern, and takes the chemical plating as a layer to be removed, which can accurately control the removal amount, on the surface of the groove bottom circuit pattern, thereby realizing the production of the groove bottom circuit pattern with high precision, eliminating the copper layer on the side wall of the stepped groove without secondary machining, and having simple process, high yield and no output bottleneck.

Description

Manufacturing method of ladder groove bottom graph

Technical Field

The invention relates to the field of PCB manufacturing, in particular to a manufacturing method of a stepped groove bottom graph.

Background

With miniaturization and thinning of electronic products, circuit design of the products is finer, and part of the products need to carry more accessories to meet the requirement of high-speed transmission, such as a switch, because conventional connectors are all made up by standards, and mounting required accessories on the same board to meet the speed of 400G/s is difficult to achieve, so that design of the improved PCB board, such as connection of the required accessories by designing a stepped slot, is difficult. However, the manufacturing process of the PCB stepped groove is complex, and the groove bottom is usually provided with a crimping hole and a pattern design because other accessories are needed to be connected, so that the conventional PCB equipment cannot realize high-precision pattern manufacturing of the groove bottom with a certain depth.

The current industry has the following solutions to the above problems with such products:

1. the method mainly uses laser ablation to manufacture the pattern by adopting a one-time pressing and laser tin burning method, but the pattern precision can not meet the requirement, can only achieve 5.0+/-0.5 mil, is not suitable for manufacturing high-precision circuit patterns, and relates to high-performance laser equipment, and the production bottleneck exists.

2. The method has the advantages that the method has more processes, the pattern accuracy of ink jet is limited, and laser ablation is also needed, so that whether the laser ablates redundant ink is difficult to confirm, poor tinning is easily caused when the pattern is electroplated due to ink residues, finally, the defect of etching and biting or open circuit of a groove bottom pattern is caused, the method is also not suitable for manufacturing high-accuracy patterns, the accuracy can be only 5.0+/-0.5 mil, and the method relates to high-performance laser equipment and has a production bottleneck.

3. The method comprises the steps of manufacturing the patterns of the daughter board by adopting a twice laminating and tape sticking method, then carrying out twice laminating by adopting a cushion layer or tape sticking protection pattern, protecting the bottom patterns of the grooves by adopting the tape sticking method before electroplating the mother board, and removing the tape to expose the bottom patterns of the grooves after finishing the mother board patterns. However, when the mother board is subjected to a chemical photoresist removing process, the adhesive tape cannot resist strong alkali and is easy to fall off at high temperature, so that the bottom pattern of the groove is damaged, and the yield is low.

4. The method comprises the steps of firstly manufacturing the patterns of the daughter board by adopting a twice lamination and low-flow bonding sheet protection method, then carrying out twice lamination by adopting a cushion layer or tape method to protect the patterns, carrying out surface lamination protection on the stepped groove by adopting a low-flow bonding sheet during the twice lamination, and removing PP on the surface layer to expose the groove bottom pattern after finishing the patterns of the mother board. However, the method adopts the low-flow bonding sheet, the bonding force between the low-flow bonding sheet and the copper layer is very weak, and when the mother board is subjected to a chemical glue removing process, the PP is easy to crack with the copper surface, so that liquid medicine enters the stepped groove, the pattern is destroyed, the yield is low, and the final low-flow bonding sheet of the method needs to be removed in a mechanical milling mode, so that the space occupied by a customer product is large.

The method has certain defects, and cannot meet the requirements of high pattern precision and yield.

Disclosure of Invention

The invention aims to provide a manufacturing method of a stair groove bottom graph, which solves one or more technical problems in the prior art and at least provides a beneficial selection or creation condition.

The technical scheme adopted for solving the technical problems is as follows:

the invention provides a manufacturing method of a stair groove bottom graph, which comprises the following steps:

s10, providing a first sub-board as a sub-board of a stepped groove layer, wherein the first sub-board is not processed with line patterns on a surface layer corresponding to the bottom of the stepped groove, and the whole first sub-board is plated with flash copper;

s20, processing a groove bottom circuit pattern of the first sub-board corresponding to a preset step groove;

s30, providing other layers of daughter boards and prepregs, and pressing the daughter boards and the prepregs with the first daughter board to manufacture a mother board with a stepped groove;

s40, plating chemical copper on the step groove;

s50, microetching the step groove to remove the chemical copper in the step groove.

The beneficial effects of the invention are as follows: compared with the prior art, the technical scheme of the invention firstly causes the daughter board to be plated with the flash copper with compact and thicker texture and then etches the groove bottom circuit pattern, then is plated with the chemical copper with loose texture and thinner thickness, and uses the chemical plating as the layer to be removed, which can accurately control the removal amount, on the surface of the groove bottom circuit pattern, thereby realizing the production of the groove bottom circuit pattern with high precision, eliminating the copper layer on the side wall of the stepped groove without secondary machining, and having simple process, high yield and no production bottleneck.

As a further improvement of the above technical solution, in step S10, a through hole is drilled before flash plating of the daughter board. The bottom of the stepped groove is required to be provided with a through hole, when the through hole exists, drilling is required before flash plating of the daughter board, so that the through hole is plated with a layer of flash copper, and therefore, when the through hole is subsequently microetched together with the groove bottom circuit pattern of the stepped groove, the copper layer on the inner wall of the through hole cannot be completely etched by microetching liquid.

As a further improvement of the above technical solution, in step S20, the first sub-board forms the groove bottom circuit pattern by film pasting, exposing, developing, etching, and film stripping, and the sub-board retains the groove bottom circuit pattern and the area corresponding to the through hole during developing. This protects the flash copper in the via from damage during fabrication of the trench bottom circuit pattern.

As a further improvement of the above technical solution, in step S30, the step of forming the step groove includes: providing an upper-layer sub-board and a lower-layer sub-board which are respectively positioned above and below the first sub-board, windowing all or part of the positions of the upper-layer sub-board corresponding to a preset ladder groove, windowing prepregs corresponding to the windowed sub-board, stacking the upper-layer sub-board, the first sub-board, the lower-layer sub-board and the prepregs, placing a cushion layer at the windowed position, and taking out the cushion layer after lamination to form the ladder groove.

As a further improvement of the above technical solution, in step S40, the motherboard is drilled with a via hole before the step groove is plated with the chemical copper. The mother board is provided with a via hole, and the via hole is drilled before the step groove is plated with chemical copper, so that the via hole and the step groove can be plated with copper at the same time.

As a further improvement of the technical scheme, the whole motherboard is plated with chemical copper, so that the step groove and the via hole are plated with chemical copper.

As a further improvement of the above technical solution, the step of manufacturing the microetching includes: and covering the outer surface of the mother board drilled with the via holes with a protective film, uncovering the protective film to expose the step grooves, and then carrying out integral microetching on the mother board through microetching liquid. And after the protective film is used for protecting the via hole, only the inner part of the stepped groove is microetched, and the thickness of the chemical copper of the groove bottom circuit pattern can be accurately removed by controlling the concentration of microetching liquid.

As a further improvement of the technical scheme, the thickness of the flash copper is in the range of 5-10 mu m, and the thickness of the chemical copper is in the range of 0.35-0.75 mu m.

As a further improvement of the technical scheme, the microetching amount of the microetching step is controlled to be 1.0-1.5 mu m by controlling the concentration of the microetching liquid. After microetching within the microetching amount range, the residual copper thickness of the groove bottom circuit pattern is 3.85-9.75 mu m, which is far larger than the thickness of the conventional conductive chemical copper and is enough to be used as the electroplating thickening copper conduction of the mother board.

As a further improvement of the above technical solution, after step S50, thickened copper is electroplated on the motherboard. The thickened copper is electroplated to form a compact electroplated layer on the whole plate, so that the reliability of the conducting quality of the final product is ensured. And for the pattern at the bottom of the mother board, the thickened copper is electroplated integrally, so that the pattern is not uniform due to large copper thickness difference caused by large pattern difference, copper is not plated and only tin is plated when the pattern at the outer layer of the mother board is manufactured, and the side surface of a pattern circuit is also plated with tin to be protected because the pattern at the bottom of the mother board is manufactured, so that the pattern at the bottom of the mother board is free from side erosion problem of the traditional process, and the pattern precision at the bottom of the mother board is completely ensured.

Drawings

The invention is further described below with reference to the drawings and examples;

fig. 1 is a schematic structural diagram of a first sub-board of embodiment 1 of the present invention corresponding to a step groove position;

FIG. 2 is a schematic view of the structure of the first daughter board of FIG. 1 after flash plating copper;

FIG. 3 is a schematic diagram of the structure of the first daughter board shown in FIG. 2 after plating to form a trench bottom circuit pattern;

fig. 4 is a schematic view of the structure of the mother substrate of embodiment 1 of the present invention after forming the stepped groove;

FIG. 5 is a schematic view of the structure of the motherboard of FIG. 4 after electroless copper plating;

fig. 6 is a schematic view of the structure of the master plate shown in fig. 5 after microetching.

Detailed Description

Reference will now be made in detail to the present embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein the accompanying drawings are used to supplement the description of the written description so that one can intuitively and intuitively understand each technical feature and overall technical scheme of the present invention, but not to limit the scope of the present invention.

In the description of the present invention, it should be understood that references to orientation descriptions such as upper, lower, front, rear, left, right, etc. are based on the orientation or positional relationship shown in the drawings, are merely for convenience of description of the present invention and to simplify the description, and do not indicate or imply that the apparatus or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus should not be construed as limiting the present invention.

In the description of the present invention, greater than, less than, exceeding, etc. are understood to exclude this number, and above, below, within, etc. are understood to include this number. The description of the first and second is for the purpose of distinguishing between technical features only and should not be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated or implicitly indicating the precedence of the technical features indicated.

In the description of the present invention, unless explicitly defined otherwise, terms such as arrangement, installation, connection, etc. should be construed broadly and the specific meaning of the terms in the present invention can be reasonably determined by a person skilled in the art in combination with the specific contents of the technical scheme.

Example 1:

a method for manufacturing a stair groove bottom pattern according to an embodiment of the present invention will be described with reference to fig. 1 to 3, including:

step S10, providing a first sub-board 100 as a sub-board of the stepped groove layer, wherein the first sub-board corresponds to a surface layer unprocessed line pattern of the stepped groove bottom, then drilling a through hole 110 at a position of the first sub-board 100 corresponding to a preset stepped groove, and then flash plating the whole first sub-board 100. The number of the through holes 110 is set according to the actual situation.

Referring to fig. 2, the upper surface, the lower surface, and the inner wall of the through hole 110 of the first sub-board 100 after flash plating are covered with a layer of flash copper plating 120. The thickness of the flash copper is 5-10 μm.

The purpose of first drilling the through hole 110 and then flash plating is to make the inside of the through hole 110 be electroplated with a layer of copper, so that when the through hole 110 is microetched with the bottom line pattern of the step groove, the copper layer on the inner wall of the through hole 110 is not completely etched by microetching liquid, and the phenomenon of no copper in the hole is avoided.

The first sub-board 100 may be a core board or a plurality of core boards laminated together, and the manufacturing steps when the first sub-board 100 is laminated by a plurality of core boards will be described below with reference to the first sub-board 100 shown in fig. 1.

The first sub-board 100 shown in fig. 1 is formed by laminating two core boards, and the processing steps of the first sub-board 100 include core board cutting, inner layer dry film pretreatment, inner layer DI exposure, inner layer development, inner layer etching, inner layer film stripping, inner layer AOI, core board matching, browning and lamination to form a sub-board. The inner layer DI exposure means that an inner layer circuit pattern is formed only on the inner layer core plate at the position of the non-step groove layer, as shown in fig. 1, the L1 layer is not formed into a circuit pattern, the L2 layer and the L3 layer are formed into a circuit pattern, and the L4 layer is formed into a circuit pattern or not as required. The circuit pattern of the L1 layer is fabricated after the flash plating of the first sub-board 100 is completed.

Step S20, processing the outer layer circuit pattern of the first daughter board 100 to form a groove bottom circuit pattern 101 corresponding to the preset step groove, i.e. manufacturing the circuit pattern of the L1 layer.

The manufacturing steps of the groove bottom circuit pattern 101 comprise the steps of sub-board film pasting, sub-board exposure, sub-board development, sub-board etching and sub-board film stripping. The sub-board is developed to reserve the groove bottom circuit pattern 101 and the through hole 110, so that after film removal, the inner wall of the through hole 110 and the outer layer of the groove bottom circuit pattern 101 are all flash copper plating.

In step S30, other layers of sub-boards and prepregs are provided and pressed with the first sub-board 100 to manufacture the motherboard 200 with the stepped slot 210.

The manufacturing steps of the step groove comprise: providing an upper sub-board, a lower sub-board and a prepreg which are respectively positioned above and below the first sub-board 100, windowing all or part of the positions of the upper sub-board corresponding to the preset stepped grooves, windowing the prepreg corresponding to the windowed sub-board, stacking the upper sub-board, the first sub-board 100, the lower sub-board and the prepreg, and manufacturing the stepped grooves in a manner of filling cushion layers or embedding cushion layers in the windowed positions to form the motherboard with the stepped grooves as shown in fig. 4.

The method for manufacturing the step groove by adopting the embedded cushion layer mode comprises the following steps: and opening windows on the upper-layer daughter board positioned on the inner layer of the motherboard, namely, opening no windows on the upper-layer daughter board positioned on the outermost layer of the motherboard, embedding cushion layers in grooves formed by opening windows when the daughter boards are stacked, opening the cover of the upper-layer daughter board positioned on the outermost layer of the motherboard after lamination, and taking out the cushion layers to form the stepped groove.

The method for manufacturing the stepped groove by adopting the filling cushion layer mode comprises the following steps: and windowing all the upper sub-boards, stacking all the sub-boards, filling cushion layers in grooves formed by the windowing, placing a buffer plate on the upper surface of a mother board, laminating, removing the buffer plate after laminating, and taking out the cushion layers, thereby forming the step groove.

Further, the cushion layer comprises a PTFE gasket and an adhesive tape which are arranged in an up-down lamination mode, wherein the PTFE gasket is used for preventing a prepreg from being melted into the groove bottom during lamination, and the adhesive tape is used for protecting a groove bottom circuit pattern from being stuck with PP powder.

Step S40, the motherboard 200 is drilled with the via 220, and then the motherboard 200 is subjected to integral electroless copper plating. The number of the vias 220 is set according to the actual situation.

Referring to fig. 5, the upper and lower surfaces of the mother substrate 200, the side walls and bottom walls of the stepped groove 210, the inner walls of the through-hole 110, and the inner walls of the via hole 220 are plated with chemical copper having a thickness ranging from 0.35 to 0.75 μm after electroless copper plating.

After electroless copper plating, the via 110 and trench bottom line pattern 101 have an additional layer of electroless copper on the outer layer of flash copper, and the via 220 has only one layer of electroless copper on the inner wall.

Step S50, microetching the step groove 210 is performed to remove the chemical copper 230 in the step groove 210.

The microetching preparation steps comprise: the outer surface of the mother substrate 200 drilled with the via holes 220 is covered with a protective film, the protective film is opened corresponding to the area of the stepped groove 210, the stepped groove 210 is exposed, then the entire micro etching is performed on the mother substrate 200 by a micro etching solution, and the micro etching amount can be precisely controlled by controlling the concentration of the micro etching solution, in this embodiment, the micro etching amount is controlled to be in the range of 1.0-1.5 μm according to the thickness of the chemical copper. Further, the protective film may be a dry film or a blue gel, and blue gel is preferably used as the protective film because blue gel has low cost.

Since the outer surface of the motherboard 200 is covered with the protective film, the chemical copper of the via 220 remains intact, and only the sidewall, bottom wall, and through-hole 110 of the stepped groove 210 are microetched by the microetching solution. The main purpose of the micro etching of the mother board is to remove the chemical copper at the bottom of the exposed stepped groove, and to manufacture a high-precision groove bottom circuit pattern 101 by precise micro etching amount control.

It should be noted that, the chemical copper is formed by the displacement reaction, and the chemical reaction is completed faster, so the chemical copper has loose texture and thinner thickness; the flash copper is formed by electrolysis, the electrolysis reaction time is long, the electrolytic characteristics determine the compact texture of the flash copper, and the copper layer formed by the flash copper is also thick. Therefore, chemical copper is easily removed under the action of microetching solution, and flash copper is not easily removed. With this characteristic, the present embodiment employs electroless plating as the layer to be removed of the surface of the groove bottom wiring pattern 101, which can precisely control the removal amount. After step S50 is completed, the thickness of the trench bottom line pattern 101 realizes high-precision fabrication while well retaining the chemical copper on the inner wall of the via hole 220, and simultaneously removes the copper layer on the side wall of the stepped trench. Compared with the prior art, the manufacturing method has simple process, can manufacture high-precision groove bottom circuit patterns, can meet the pattern precision requirement of 2.5+/-0.5 mil, does not need secondary machining to remove the copper layer on the side wall of the stepped groove, has no output bottleneck, and has high yield.

In this embodiment, the thickness of the flash copper is 5-10 μm, the thickness of the chemical copper is 0.35-0.75 μm, the microetching amount is 1.0-1.5 μm, and after the mother board is microetched, the thickness of the flash copper left by the through hole 110 and the groove bottom circuit pattern 101 can reach 3.85-9.75 μm, and the flash copper within the thickness range is enough to be used as the electroplating thickened copper of the mother board for conduction.

Step S60, electroplating thickened copper on the mother board 200.

After microetching solution microetching, the bottom circuit pattern 101 and other positions of the mother board can be normally electroplated and thickened, and electroplating thickened copper can enable the whole board to form a compact electroplated layer, so that the reliability of the conducting quality of the final product is ensured. The protective film covered on the outer surface of the motherboard 200 is removed, and then the electroplating thickening copper is performed. For the pattern at the bottom of the motherboard, the thickened copper is electroplated on the whole motherboard at the moment, the pattern is not uniform due to the large copper thickness difference caused by the large pattern difference, the copper is not plated and only plated when the pattern at the outer layer of the motherboard is manufactured later, and the side surface of a pattern circuit is plated with tin to be protected because the pattern at the bottom of the motherboard is already manufactured, so that the pattern at the bottom of the motherboard has no side etching problem of the traditional process, and the pattern precision at the bottom of the motherboard is completely ensured.

Example 2:

embodiment 2 differs from embodiment 1 in that no through hole 110 is provided under the step groove of embodiment 2, and the corresponding step S10 is that no through hole needs to be drilled in the first daughter board 100, and the step S10 of embodiment 2 is as follows: the first sub-board 100 is provided as a sub-board of the stepped groove layer, and the first sub-board 100 is flash plated as a whole.

Example 3:

example 3 differs from example 1 in that the motherboard 200 is not drilled with the via 220 before the motherboard 200 is entirely plated with electroless copper in step S40, and the drilling of the via 220 and copper plating may be performed separately in the subsequent steps. This method has a larger number of steps than in example 1.

Since the via 220 is not provided, the entire electroless copper plating may be performed on the motherboard 200, or the upper and lower surfaces of the motherboard may be covered with a film, and only the step groove 210 may be plated with electroless copper. Example 1 the entire electroless copper plating was performed on the motherboard 200 because the motherboard was drilled with the via holes 220 before electroless copper plating, and the upper and lower surfaces of the motherboard were not covered with a film to perform the entire copper plating in order to allow the via holes 220 to be plated with electroless copper for subsequent plating of thickened copper.

While the preferred embodiments of the present invention have been illustrated and described, the present invention is not limited to the embodiments, and various equivalent modifications and substitutions can be made by one skilled in the art without departing from the spirit of the present invention, and these are intended to be included in the scope of the present invention as defined in the appended claims.

Claims (10)

1. The manufacturing method of the stair groove bottom graph is characterized by comprising the following steps of:

s10, providing a first sub-board (100) as a sub-board of a stepped groove layer, wherein the first sub-board (100) is provided with a surface layer unprocessed line pattern corresponding to the bottom of the stepped groove, and the whole first sub-board (100) is plated with flash copper (120);

s20, machining a groove bottom circuit pattern (101) of the first daughter board (100) corresponding to a preset step groove;

s30, providing other layers of daughter boards and prepregs, and pressing the daughter boards and the prepregs with the first daughter board (100) to manufacture a mother board (200) with a stepped groove (210);

s40, plating chemical copper (230) on the step groove (210);

s50, microetching the step groove (210) to remove the chemical copper (230) in the step groove (210).

2. The method of fabricating a stair groove bottom pattern according to claim 1, wherein in step S10, a via hole (110) is drilled before flash plating of the daughter board (100).

3. The method according to claim 2, wherein in step S20, the first sub-board (100) forms the trench bottom circuit pattern (101) by film pasting, exposing, developing, etching, and film stripping, and areas corresponding to the trench bottom circuit pattern (101) and the through hole (110) are reserved when the sub-board is developed.

4. The method for manufacturing the bottom pattern of the stair groove according to claim 1, wherein: in step S30, the step of forming the step groove (210) includes: providing an upper-layer sub-board and a lower-layer sub-board which are respectively positioned above and below the first sub-board (100), windowing all or part of the positions of the upper-layer sub-board corresponding to a preset ladder groove, windowing prepregs corresponding to the windowed sub-board, stacking the upper-layer sub-board, the first sub-board (100), the lower-layer sub-board and the prepregs, placing a cushion layer at the windowed position, and taking out the cushion layer after lamination to form the ladder groove.

5. The method of fabricating a stair groove bottom pattern according to claim 1, wherein in step S40, the motherboard (200) is drilled with a via (220) prior to plating the stair groove (210) with electroless copper.

6. The method of manufacturing a stair groove bottom pattern according to claim 5, wherein the entire motherboard (200) is plated with electroless copper, and both the stair groove (210) and the via (220) are plated with electroless copper.

7. The method for manufacturing the bottom pattern of the stair groove according to claim 6, wherein: the microetching manufacturing steps comprise: the outer surface of the mother board (200) drilled with the via holes (220) is covered with a protective film, the protective film is uncovered to expose the step grooves (210), and then the entire mother board (200) is microetched by microetching liquid.

8. The method for manufacturing the bottom pattern of the stair groove according to claim 1, wherein: the thickness of the flash copper (120) ranges from 5 to 10 mu m, and the thickness of the chemical copper (230) ranges from 0.35 to 0.75 mu m.

9. The method for manufacturing the bottom pattern of the stair groove according to claim 8, wherein: the microetching amount of the microetching step is 1.0-1.5 mu m by controlling the concentration of the microetching liquid.

10. The method for manufacturing the bottom pattern of the stair groove according to claim 1, wherein: after step S50, thickened copper is electroplated on the motherboard (200).

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