CN116184769A - Alignment mark and alignment method - Google Patents
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- CN116184769A CN116184769A CN202211724771.6A CN202211724771A CN116184769A CN 116184769 A CN116184769 A CN 116184769A CN 202211724771 A CN202211724771 A CN 202211724771A CN 116184769 A CN116184769 A CN 116184769A
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- 238000000034 method Methods 0.000 title claims description 39
- 239000007769 metal material Substances 0.000 claims description 14
- 239000007787 solid Substances 0.000 claims description 10
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 8
- 229910052802 copper Inorganic materials 0.000 claims description 8
- 239000010949 copper Substances 0.000 claims description 8
- 229910000838 Al alloy Inorganic materials 0.000 claims description 7
- JRBRVDCKNXZZGH-UHFFFAOYSA-N alumane;copper Chemical compound [AlH3].[Cu] JRBRVDCKNXZZGH-UHFFFAOYSA-N 0.000 claims description 6
- 238000005259 measurement Methods 0.000 claims description 6
- 238000001514 detection method Methods 0.000 abstract description 7
- 235000012431 wafers Nutrition 0.000 description 94
- 238000001259 photo etching Methods 0.000 description 13
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- 238000004519 manufacturing process Methods 0.000 description 6
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- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
- G03F7/70605—Workpiece metrology
- G03F7/70616—Monitoring the printed patterns
- G03F7/70633—Overlay, i.e. relative alignment between patterns printed by separate exposures in different layers, or in the same layer in multiple exposures or stitching
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F9/00—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
- G03F9/70—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
- G03F9/7003—Alignment type or strategy, e.g. leveling, global alignment
- G03F9/7023—Aligning or positioning in direction perpendicular to substrate surface
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F9/00—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
- G03F9/70—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
- G03F9/7073—Alignment marks and their environment
- G03F9/7076—Mark details, e.g. phase grating mark, temporary mark
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F9/00—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
- G03F9/70—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
- G03F9/7073—Alignment marks and their environment
- G03F9/708—Mark formation
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- General Physics & Mathematics (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Abstract
The application belongs to the technical field of integrated circuits, and particularly discloses an alignment mark for alignment, which at least comprises: a first pattern formed in a first layer of the wafer; a second pattern formed in a second layer above the first layer of the wafer and including two second sub-patterns symmetrically disposed about the first pattern in a first direction; a third pattern formed in a third layer above the second layer of the wafer and including two third sub-patterns symmetrically disposed about the first pattern in a second direction perpendicular to the first direction; the projections of the first pattern, the second pattern and the third pattern on the wafer form a pattern with a rectangular external contour. The alignment mark can establish the relevance of the first pattern, the second pattern and the third pattern with the alignment error, can also establish the relevance of the pattern formed by combining the first pattern, the second pattern and the third pattern with the alignment error, detects the alignment error from multiple dimensions, improves the detection precision of the alignment, and ensures the stacking precision of multilayer alignment.
Description
Technical Field
The application belongs to the technical field of integrated circuits, and particularly relates to an alignment mark and an alignment method.
Background
With the rapid development of semiconductor processes, integrated circuits (Intergrated Circuit, IC) have evolved from small scale in the last century to very large scale today. In the current semiconductor manufacturing process, the photolithography process is the most important. Among the most important indicators in the lithography process are critical dimension (Critical Dimension), resolution, overlay error (Overlay), particle (Particle), and defect (defect) density. Ideally, the current layer alignment mark and the front layer alignment mark of the integrated circuit are completely aligned, i.e. the relative displacement is zero. There is always a certain alignment error in the actual semiconductor processing process, because the mask of the alignment mark of the current layer cannot be completely in perfect alignment with the mask of the alignment mark of the previous layer in the alignment and exposure steps. The influence of the mask overlay mark on the overlay accuracy is very important, and as the overlay layer number is increased and the key size is continuously reduced, the problem that the yield is continuously reduced in the photoetching process of the wafer in the yellow light area is solved, and the requirements of the photoetching process on the design of the overlay mark are higher and higher.
At present, frame-in-Frame, box-in-Box and Bar-in-Bar alignment marks are commonly adopted, and in a 28-130 nm process technology node, a larger alignment error occurs between a previous layer and a current layer, the alignment error exceeds a critical dimension allowable alignment error range, the electrical performance of a semiconductor device is directly affected, and the yield of semiconductor photoetching processing is reduced. The alignment precision of 28-130 nm process technology nodes is improved by adopting the cross photoetching alignment mark, so that the alignment error range is kept in a reasonable interval. However, the two alignment modes requiring long time for the cross-shaped mark are adopted, and the first step is coarse alignment, namely, two alignment marks in one area are selected on a wafer and two alignment marks on a mask are aligned. The second step is fine alignment, generally, alignment marks in a plurality of exposure areas are selected to be aligned with marks on the mask respectively, correction values are calculated and fed back to an exposure machine for correction, and alignment errors are reduced. In addition, the cross-shaped photoetching alignment mark occupies a larger area of the cutting path area, and is seriously deformed after chemical polishing and other processes, so that the alignment error of the multi-layer alignment is increased, the yield of finished products is reduced, and the manufacturing cost is increased.
Disclosure of Invention
The embodiment of the application provides an alignment mark and an alignment method, which aim to solve the technical problems of low alignment efficiency and large error in the prior art.
In one aspect, the alignment mark is formed on a wafer, and the alignment mark at least includes:
a first pattern formed in a first layer of the wafer;
a second pattern formed in a second layer above the first layer of the wafer and including two second sub-patterns symmetrically disposed about the first pattern in a first direction;
a third pattern formed in a third layer above the second layer of the wafer and including two third sub-patterns symmetrically disposed about the first pattern in a second direction perpendicular to the first direction;
the projections of the first pattern, the second pattern and the third pattern on the wafer form a pattern with a rectangular external contour.
According to an embodiment of an aspect of the present application, in a preset coordinate system, the abscissa of the central coordinates of the first pattern and the two second sub-patterns is the same, and the ordinate of the central coordinates of the first pattern and the two third sub-patterns is the same; or (b)
Under a preset coordinate system, the ordinate of the central coordinates of the first pattern and the two second sub-patterns are the same, and the abscissa of the central coordinates of the first pattern and the two third sub-patterns are the same.
According to any of the preceding embodiments in one aspect of the present application, the outer contours of the first pattern, the second sub-pattern, and the third sub-pattern comprise at least two of square, rectangular, and triangular.
According to any of the foregoing embodiments in one aspect of the present application, the outer contours of the first pattern, the second sub-pattern, and the third sub-pattern are all rectangular.
According to any one of the foregoing embodiments in one aspect of the present application, the outer contours of the first pattern and the second sub-pattern are square, and the outer contour of the third sub-pattern is rectangular; or (b)
The external contour of the first pattern and the third sub-pattern is square, and the external contour of the second sub-pattern is rectangular; or (b)
The external contour of the first pattern is square, and the external contour of the second sub pattern and the third sub pattern are rectangular; or (b)
The external contour of the first pattern is rectangular, and the external contour of the second sub pattern and the third sub pattern is rectangular or square; or (b)
The outer contour of the first pattern is square, and the outer contours of the second sub-pattern and the third sub-pattern are triangular.
According to any of the foregoing embodiments of a aspect of the present application, the first pattern and/or the second sub-pattern and/or the third sub-pattern are each a ring-shaped pattern.
According to any of the foregoing embodiments of the aspect of the present application, the projections of the first pattern, the second pattern, and the third pattern on the wafer constitute a pattern having a square outer contour.
On the other hand, the method for performing alignment by using the alignment mark provided in the embodiment of the application includes the following steps
Forming a first pattern on the current layer of the wafer by using the mask plate and the exposure machine by taking the first layer as the current layer;
taking the first layer as a previous layer, taking the second layer as a current layer, and forming a second pattern on the current layer of the wafer by using a mask plate and an exposure machine;
taking the second layer as a previous layer, taking the third layer as a current layer, and forming a third pattern on the current layer of the wafer by using a mask and an exposure machine;
and measuring whether the external outline of the graph formed by the first pattern, the second pattern and the third pattern is rectangular or not by using a measuring instrument, and if the external outline of the graph formed by the first pattern, the second pattern and the third pattern is not rectangular, correcting the position of the mask plate according to the measured pattern.
According to another aspect of the present application, the steps of forming a second pattern on the current layer of the wafer using the mask and the exposure machine by using the first layer as the previous layer and the second layer as the current layer include
And forming a second pattern on the current layer of the wafer by using the mask and the exposure machine by taking the first layer as a previous layer and the second layer as a current layer, so that the transverse marks of the central coordinates of the first pattern and the two second sub-patterns are the same.
According to any of the foregoing embodiments of the other aspect of the present application, the step of forming a second pattern on the current layer of the wafer using the mask and the exposure machine by using the first layer as the previous layer and the second layer as the current layer further includes the step of
And measuring the difference delta Y1 between the longitudinal coordinates of the first pattern and the two second sub-patterns by using a measuring instrument, and if delta Y1 is larger than a threshold value, feeding back delta Y1 to an exposure machine to correct the position of the current mask plate.
According to any of the foregoing embodiments of the other aspect of the present application, the step of forming a third pattern on the current layer of the wafer using the reticle and the exposure machine by using the second layer as the previous layer and the third layer as the current layer includes
And forming a third pattern on the current layer of the wafer by using the mask and the exposure machine, wherein the second layer is used as a previous layer, and the third layer is used as a current layer, so that the ordinate coordinates of the central coordinates of the first pattern and the two third sub-patterns are the same.
According to any of the foregoing embodiments of the other aspect of the present application, the step of forming a third pattern on the current layer of the wafer using the mask and the exposure machine by using the second layer as the previous layer and the third layer as the current layer further includes the step of
And measuring the difference delta X1 between the first pattern and the horizontal coordinates of the two third sub-patterns by using a measuring instrument, and if the delta X1 is larger than a threshold value, feeding back the delta X1 to an exposure machine to correct the position of the current mask plate.
According to any of the foregoing embodiments of the other aspect of the present application, the step of measuring, with a measuring instrument, whether the external contour of the pattern composed of the first pattern, the second pattern, and the third pattern is rectangular, and if not, correcting the position of the reticle based on the measured pattern, includes
And measuring the difference delta Y2 between the ordinate of the center coordinates of the two second sub-patterns and the difference delta X2 between the abscissa of the two third sub-patterns by using a measuring instrument, and correcting the position of the current mask plate according to the measurement result if the delta Y2 and the delta X2 do not meet the preset relation.
According to any of the foregoing embodiments of the other aspect of the present application, the step of forming a first pattern on the current layer of the wafer using the reticle and the exposure machine with the first layer as the current layer includes:
using the first layer as a current layer, exposing and developing the current layer of the wafer by using a mask plate and an exposure machine, and forming a hollowed-out first pattern on the current layer of the wafer; filling metal materials into the hollowed-out first patterns to form solid first patterns;
and/or
The method comprises the steps of taking a first layer as a previous layer, taking a second layer as a current layer, forming a second pattern on the current layer of a wafer by using a mask and an exposure machine, and comprises the following steps:
the first layer is used as a previous layer, the second layer is used as a current layer, the current layer of the wafer is exposed and developed by using a mask plate and an exposure machine, and a hollowed-out second pattern is formed on the current layer of the wafer; filling metal materials into the hollowed-out second patterns to form solid second patterns;
And/or
The step of forming a third pattern on the current layer of the wafer by using the mask and the exposure machine by taking the second layer as a previous layer and the third layer as the current layer comprises the following steps:
taking the second layer as a previous layer and the third layer as a current layer, exposing and developing the current layer of the wafer by using a mask and an exposure machine, and forming a hollowed-out third pattern on the current layer of the wafer; and filling metal materials into the hollowed-out third pattern to form a solid third pattern.
According to any of the foregoing embodiments of the other aspect of the present application, the metal material is copper or copper-aluminum alloy.
The alignment mark for alignment can establish the relevance of the first pattern, the second pattern and the third pattern with alignment errors (caused by the relative position relation between the first pattern and the second pattern and the relative position relation between the first pattern and the third pattern), can also establish the relevance of the patterns formed by combining the first pattern, the second pattern and the third pattern with the alignment errors, detects the alignment errors from multiple dimensions, improves the detection precision of alignment, and ensures the stacking precision of multilayer alignment.
According to the overlay method, the first pattern of the first layer on the wafer is used for correcting the position of the mask plate corresponding to the second layer, the first pattern of the first layer is used for continuously correcting the position of the sample mask plate corresponding to the third layer, the second pattern of the second layer is used for correcting the position of the sample mask plate corresponding to the third layer, the three layers of wafers are mutually corrected, and the overlay alignment precision is improved.
Drawings
FIG. 1a is a schematic diagram of an overlay alignment mark according to an embodiment of the present disclosure;
FIG. 1b is a schematic diagram of an overlay alignment mark according to another embodiment of the present application;
fig. 2 is a schematic structural diagram of a preset coordinate system in an embodiment of the present application;
FIG. 3 is a schematic diagram of the alignment mark and scribe line structure according to an embodiment of the present application;
FIGS. 4a to 4d are schematic structural views of alignment marks according to other embodiments of the present application;
FIG. 5a is a flow chart of an overlay method according to an embodiment of the present application;
fig. 5b is a flowchart of an overlay method according to another embodiment of the present application.
Detailed Description
Features and exemplary embodiments of various aspects of the present application are described in detail below to make the objects, technical solutions and advantages of the present application more apparent, and to further describe the present application in conjunction with the accompanying drawings and the detailed embodiments. It should be understood that the specific embodiments described herein are intended to be illustrative of the application and are not intended to be limiting. It will be apparent to one skilled in the art that the present application may be practiced without some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of the present application by showing examples of the present application.
The working process of the photoetching machine is as follows: the exposure process of the photoetching machine exposes all fields (fields) on the wafer W one by one, namely, steps are performed, and then the wafer W is replaced until all the wafers W are exposed; when the other process steps of the wafer W are finished, a photoresist coating process is performed, the mask is replaced by a photolithography machine, and then a second layer of pattern is exposed on the wafer W, that is, repeated exposure is performed. Wherein, the pattern of the second layer mask exposure must be exactly nested with the first layer mask exposure, so called overlay; overlay error refers to the positional error between two exposures.
The patterns on the wafer that are specially used to measure overlay errors are called overlay marks, which have been placed in a designated area, typically on dicing lanes (a wafer eventually needs to be diced into thousands of chips, the dicing lanes being reserved for chip dicing, typically only tens of microns) when designing the mask. Typically each layer will be assigned to be de-aligned to a previous layer.
Referring to fig. 1a and fig. 1b, in one aspect, an alignment mark is formed on a wafer, where the wafer at least includes a first layer, a second layer above the first layer, and a third layer above the second layer, and the alignment mark at least includes a first pattern 1, a second pattern 2, and a third pattern 3; the first pattern 1 is formed in a first layer of the wafer; the second pattern 2 is formed in a second layer above the first layer of the wafer, and includes two second sub-patterns 21 symmetrically arranged about the first pattern 1 in the first direction; the third pattern 3 is formed in a third layer above the second layer of the wafer, and includes two third sub-patterns 31 symmetrically disposed about the first pattern 1 in a second direction perpendicular to the first direction; the projections of the first pattern 1, the second pattern 2 and the third pattern 3 on the wafer form a pattern with a rectangular external contour.
It will be appreciated that the position error between the first layer exposure and the second layer exposure of the wafer, the position error between the second layer exposure and the third layer exposure, and the overall position error of the first layer exposure, the second layer exposure, and the third layer exposure can be reflected by the pattern formed by combining the first pattern 1, the second pattern 2, and the third pattern 3 (i.e., the pattern whose projection onto the wafer constitutes a rectangle in outline). For example, when the second pattern 2 is formed, it can be determined whether the position of the second pattern 2 meets the requirement by the symmetrical association of the two second sub-patterns 21 with respect to the first pattern 1, and the external contour that the first pattern 1 and the second pattern 2 should have as a part of the combined pattern (the pattern that the first pattern 1, the second pattern 2, and the third pattern 3 are combined); for example, the overlay alignment marks on the wafer may be detected by a gauge dedicated to detecting overlay errors; if the measuring instrument detects that the pattern formed by combining the first pattern 1 and the second pattern 2 (i.e. the pattern with the rectangular external outline formed by projection on the wafer) does not meet the requirement, the currently measured pattern and the data related to the pattern are sent to the exposure machine (photoetching machine), and the exposure machine adjusts the position of the mask plate according to the obtained information to correct the position of the mask plate corresponding to the current layer. For another example, after the third pattern 3 is formed, by the symmetrical relativity of the two third sub-patterns 31 with respect to the first pattern 1 and the external contour that the pattern formed by combining the first pattern 1, the second pattern 2 and the third pattern 3 should have, it can be determined whether the position of the third pattern 3 meets the requirement; if the measuring instrument detects that the pattern formed by combining the first pattern 1, the second pattern 2 and the third pattern 3 is not in the preset rectangular shape, the currently measured pattern and data related to the pattern are sent to the exposure machine, the exposure machine adjusts the position of the mask corresponding to the current layer according to the obtained information, and the position of the mask corresponding to the current layer is corrected. The alignment mark for alignment of the structure can establish the relevance of the first pattern 1, the second pattern 2 and the third pattern 3 with alignment errors (caused by the relative position relation between the first pattern 1 and the second pattern 2 and the relative position relation between the first pattern 1 and the third pattern 3), and also can establish the relevance of the patterns formed by combining the first pattern 1, the second pattern 2 and the third pattern 3 with the alignment errors, and detect the alignment errors from multiple dimensions, thereby improving the detection precision of alignment and ensuring the stacking precision of multilayer alignment.
Referring to fig. 1a and 2, in some embodiments, under a preset coordinate system, the abscissas of the central coordinates of the first pattern 1 and the two second sub-patterns 21 are the same, and the ordinates of the central coordinates of the first pattern 1 and the two third sub-patterns 31 are the same. Here, the preset coordinate system may be a coordinate system pre-stored in the exposure machine according to a position of a placing table on which the wafer is placed and a position of the wafer placed on the placing table, for example, as shown in fig. 2, after the wafer is placed on the placing table, a circle center of the wafer is used as a circle point of the coordinate axis, a square where a notch (notch) of the wafer is located is used as a Y-axis square, and a direction perpendicular to the Y-axis is used as an X-axis, so as to construct the preset coordinate system. In the process of generating the first pattern 1, the second pattern 2, and the third pattern 3, the first pattern 1, the second pattern 2, and the third pattern 3 are generated in an orientation in which the longitudinal direction and the width direction of the pattern formed by combining the first pattern 1, the second pattern 2, and the third pattern 3 are parallel to the directions of both coordinate axes, respectively. When the exposure machine exposes and develops the first pattern 1 to the first layer of the wafer, the pattern on the current mask is projected to the wafer according to the built-in preset coordinate system, so that the center coordinate of the first pattern 1 is located at a preset position, for example, as shown in fig. 3, the first pattern 1 is located close to the inside of the dicing street, the exposure machine records the center coordinate parameter O1 (X1, Y1) of the first pattern 1, and the center of the first pattern 1 can reflect the position of the lithography pattern (circuit pattern to be etched) of the current layer. Similarly, when the exposure machine exposes and develops the second pattern 2 to the second layer of the wafer, the pattern on the current mask is projected to the preset position of the wafer according to the built-in preset coordinate system, so that the central coordinates of the two second sub-patterns 21 are identical to the abscissa of the central coordinates of the first pattern 1; the exposure machine records parameters O2 (X2, Y2), O3 (X3, Y3) of the center coordinates of the two second sub-patterns 21, which may reflect the position of the second layer lithographic pattern. Then, the positions of the first pattern 1 and the second pattern 2 on the wafer are detected by using the measuring instrument, specifically, the measuring instrument can acquire the image information of the first pattern 1 and the second pattern 2, find the center of the first pattern 1 and the centers of the two second sub-patterns 21 according to the image information, calculate whether the difference (Δy1= |y1-y2|= |y1-y3|) between the ordinate of the center coordinates of the first pattern 1 and the ordinate of the center coordinates of the two second sub-patterns 21 exceeds a threshold value, and if the difference exceeds the threshold value, feed the measured parameter information back to the exposure machine, and correct the position of the current mask through the exposure machine. Since the two second sub-patterns 21 are symmetrically disposed with respect to the first pattern 1, a difference in the ordinate of the center coordinates of the first pattern 1 and the two second sub-patterns 21 may reflect the overlay accuracy of the first layer photolithography pattern and the second layer photolithography pattern. When the exposure machine exposes and develops the third pattern 3 to the third layer of the wafer, the pattern on the current mask is projected to the preset position of the wafer according to the built-in preset coordinate system, so that the central coordinates of the two third sub-patterns 31 are identical to the ordinate of the central coordinates of the first pattern 1, and meanwhile, the pattern formed by combining the first pattern 1, the second pattern 2 and the third pattern 3 is ensured to be rectangular, the exposure machine records parameters O4 (X4, Y4) and O5 (X5, Y5) of the central coordinates of the two third sub-patterns 31, and the central coordinates of the two third sub-patterns 31 can reflect the position of the third layer of photoetching pattern. Then, detecting the positions of the first pattern 1, the second pattern 2 and the third pattern 3 on the wafer by using a measuring instrument, and judging whether the combined pattern of the first pattern 1, the second pattern 2 and the third pattern 3 is in a preset rectangular shape or not; specifically, the measuring instrument may collect the image information of the first pattern 1, the second pattern 2 and the third pattern 3, find the center of the first pattern 1 and the centers of the two third sub-patterns 31 according to the image information, calculate whether the difference (Δx1= |x1-x4= |x1-x5|) between the ordinate of the center coordinates of the first pattern 1 and the abscissa of the center coordinates of the two second sub-patterns 21 exceeds a threshold value, and if the difference exceeds the threshold value, feed the measured parameter information back to the exposure machine, and correct the position of the current mask through the exposure machine. Since the two third sub-patterns 31 are symmetrically disposed with respect to the first pattern 1, a difference between the first pattern 1 and the abscissa of the center coordinates of the two third sub-patterns 31 may reflect the overlay accuracy of the first layer photolithography pattern and the third layer photolithography pattern. Meanwhile, the measuring instrument may also determine whether the values of Δx1 and Δy1 satisfy a predetermined relationship, for example, whether the values satisfy a predetermined proportional relationship, whether the values are equal, and so on, depending on the shape of the combined pattern of the first pattern 1, the second pattern 2, and the third pattern 3.
Similarly, referring to fig. 1b, in some embodiments, the first pattern 1 and the second sub-patterns 21 may have the same ordinate and the first pattern 1 and the third sub-patterns 31 may have the same abscissa. The exposure machine projects the pattern on the current mask plate to the wafer according to the built-in preset coordinate system, exposes and develops the first pattern 1 to the first layer of the wafer, then records the central coordinate parameters O1 (X1, Y1) of the first pattern 1, and the center of the first pattern 1 can reflect the position of the photoetching pattern (circuit pattern to be etched) of the current layer. Similarly, when the exposure machine exposes and develops the second pattern 2 to the second layer of the wafer, the pattern on the current mask is projected to the preset position of the wafer according to the built-in preset coordinate system, and the central coordinates of the two second sub-patterns 21 are identical to the ordinate of the central coordinates of the first pattern 1; the exposure machine records parameters O2 (X2, Y2), O3 (X3, Y3) of the center coordinates of the two second sub-patterns 21, which may reflect the position of the second layer lithographic pattern. Then, the positions of the first pattern 1 and the second pattern 2 on the wafer are detected by using the measuring instrument, specifically, the measuring instrument can acquire the image information of the first pattern 1 and the second pattern 2, find the center of the first pattern 1 and the centers of the two second sub-patterns 21 according to the image information, calculate the difference (Δx1= |x 1-x2|= |x 1-x3|) between the ordinate of the center coordinates of the first pattern 1 and the abscissa of the center coordinates of the two second sub-patterns 21, and if the difference exceeds the threshold, the measured parameter information is fed back to the exposure machine, and the position of the current mask is corrected by the exposure machine. Since the two second sub-patterns 21 are symmetrically disposed with respect to the first pattern 1, a difference between the first pattern 1 and the abscissa of the center coordinates of the two second sub-patterns 21 may reflect the overlay accuracy of the first layer photolithography pattern and the second layer photolithography pattern. When the exposure machine exposes and develops the third pattern 3 to the third layer of the wafer, the pattern on the current mask is projected to the preset position of the wafer according to the built-in preset coordinate system, so that the central coordinates of the two third sub-patterns 31 are identical to the abscissa of the central coordinates of the first pattern 1, and meanwhile, the pattern formed by combining the first pattern 1, the second pattern 2 and the third pattern 3 is ensured to be rectangular, the exposure machine records parameters O4 (X4, Y4) and O5 (X5, Y5) of the central coordinates of the two third sub-patterns 31, and the central coordinates of the two third sub-patterns 31 can reflect the position of the third layer of photoetching pattern. Then, detecting the positions of the first pattern 1, the second pattern 2 and the third pattern 3 on the wafer by using a measuring instrument, and judging whether the combined pattern of the first pattern 1, the second pattern 2 and the third pattern 3 is in a preset rectangular shape or not; specifically, the measuring instrument may collect the image information of the first pattern 1, the second pattern 2 and the third pattern 3, find the center of the first pattern 1 and the centers of the two third sub-patterns 31 according to the image information, calculate whether the difference (Δy1= |y1-y4= |y1-y5|) between the ordinate of the center coordinates of the first pattern 1 and the ordinate of the center coordinates of the two second sub-patterns 21 exceeds a threshold value, and if the difference exceeds the threshold value, feed the measured parameter information back to the exposure machine, and correct the position of the current mask through the exposure machine. Since the two third sub-patterns 31 are symmetrically disposed with respect to the first pattern 1, a difference between the first pattern 1 and the abscissa of the center coordinates of the two third sub-patterns 31 may reflect the overlay accuracy of the first layer photolithography pattern and the third layer photolithography pattern.
In some embodiments, the outer contours of the first pattern 1, the second sub-pattern 21, and the third sub-pattern 31 include at least two of square, rectangle, and triangle. For example, as shown in fig. 1b, the first pattern 1 and the second sub-pattern 21 are square, and the third sub-pattern 31 is rectangular; as shown in fig. 4a, the first pattern 1 is square, and the second sub-pattern 21 and the third sub-pattern 31 are triangular; as shown in fig. 4b, the first pattern 1 is square, and the second sub-pattern 21 and the third sub-pattern 31 are rectangular; as shown in fig. 4c, the first pattern 1 is rectangular, and the second sub-pattern 21 and the third sub-pattern 31 are triangular; of course, the first pattern 1 may be rectangular, and the second sub-pattern 21 and the third sub-pattern 31 may be square. Of course, as shown in fig. 4d, the first pattern 1, the second sub-pattern 21, and the third sub-pattern 31 may all be rectangular.
Preferably, as shown in fig. 1a, 1b, 4b and 4d, the outer contours of the first pattern 1, the second sub-pattern 21 and the third sub-pattern 31 are rectangular. It can be appreciated that, on the one hand, the first pattern 1, the second sub-pattern 21 and the third sub-pattern 31 with rectangular outline are simple in pattern, so that the manufacturing difficulty of the mask can be reduced; the alignment precision of the alignment can be higher, and the space occupied by the alignment mark of the alignment on the cutting path can be effectively reduced by the regular rectangle; on the other hand, the external contour of all patterns is rectangular, so that the extending direction of the external contour lines of all patterns is parallel to the coordinate axis direction, and when the measuring instrument is used for detecting/calculating the distances between the central coordinates of different patterns, only the coordinate difference value in the direction of the corresponding coordinate axis is required to be measured/calculated, thereby greatly reducing the calculated amount.
In some embodiments, the first pattern 1 and/or the second sub-pattern 21 and/or the third sub-pattern 31 are each a ring-shaped pattern; as shown in the figure, the first pattern 1, the second sub-pattern 21 and the third sub-pattern 31 are all annular patterns, on one hand, the annular patterns have low processing requirements on the mask, have simple structure and do not occupy too much space on the mask; on the other hand, the rectangular ring and square ring nested patterns adopted in the embodiment of the application have the following advantages: 1. the length and the width of the rectangular ring are formed by rectangular patterns, the length and the width of the rectangular ring have an equal ratio relationship, and the width of the rectangular patterns is consistent with the width of the rectangular ring on the X axis and the Y axis, so that the high accuracy of the overlay mark is ensured; 2. the length and the width of the square ring are formed by square patterns, the length and the width of the square ring have an equal ratio relationship, the length and the width of the square patterns are consistent in an X axis and a Y axis, the self-alignment advantage exists, and the high accuracy of the overlay mark is ensured; preferably, the rectangular ring (third sub-pattern) and the square ring (first pattern, second sub-pattern) in the embodiment of the present application have an equal ratio relationship of 3:1, each layer of alignment mark shares an X-axis or Y-axis coordinate, meanwhile, the connection proportion relation ensures the precision, the top view is square after the third layer of alignment mark is finished, the error of the alignment mark of the first layer and the second layer of the wafer in the X-axis and the Y-axis is inspected in a self-alignment manner, and the precision of the multilayer alignment is ensured.
In some embodiments, the materials of the first pattern 1, the second pattern 2 and the third pattern 3 are copper or an alloy with aluminum. Exposing and developing the current layer (the first layer or the second layer or the third layer) of the wafer by using a mask and an exposure machine, and forming a hollowed-out pattern (a first pattern 1 or a second pattern 2 or a third pattern 3) on the current layer of the wafer; and filling copper or the same aluminum alloy into the hollowed-out pattern to form a solid pattern (the first pattern 1, the second pattern 2 or the third pattern 3). After copper or copper-aluminum alloy is filled, the subsequent process can be prevented from damaging the alignment mark, and the alignment mark can be effectively detected by a measuring instrument (optical detection equipment).
To further improve stacking accuracy of the overlay, in some embodiments, the projections of the first pattern 1, the second pattern 2, and the third pattern 3 on the wafer constitute a pattern with a square outer contour. Preferably, the first pattern 1 is square, one of the second sub-pattern 21 and the third sub-pattern 31 is square, and the other is rectangular; in this way, when the third pattern 3 is generated, it can be determined whether the overlay error exceeds the threshold value by determining whether the distance between the center coordinates of the two second sub-patterns 21 and the distance between the center coordinates of the two third sub-patterns 31 are equal. Since the lines of the outer contour formed by the projections of the pattern, the second pattern 2 and the third pattern 3 on the wafer are parallel to the coordinate axes, when judging the distance between the center coordinates, only the difference between the coordinates in the direction of one axis is needed to judge whether the difference exceeds the threshold value, so that the calculated amount is reduced.
In some embodiments, the alignment mark can be circularly generated in the wafer processing process, that is, each three layers form a set of alignment mark, and the alignment error of the adjacent layer can be reduced by identifying the alignment mark of the adjacent layer; by identifying the alignment marks of the adjacent three layers (formation), the alignment error of the current layer can be further corrected, and the alignment accuracy of alignment is improved.
The alignment mark is aligned by the alignment mark, the regular square ring pattern and the rectangular ring pattern are combined into the regular rectangular pattern, the occupied space of the alignment mark in a cutting path is effectively reduced, the measurement accuracy is improved, and meanwhile, the stacking accuracy of multilayer alignment can be ensured by utilizing the regular square pattern formed by the alignment mark of the first three layers. Secondly, the alignment mark is not easy to damage by other processing technologies due to the fact that copper or copper-aluminum alloy is adopted for filling, and the alignment mark made of metal materials can provide maximum signal intensity and can be effectively detected by optical detection equipment. And moreover, the regular square ring and rectangular ring are simple and convenient in design structure, and do not occupy too much space of the mask. In summary, the alignment mark can improve the production yield of the semiconductor processing yellow light area and reduce the manufacturing cost of the semiconductor.
Referring to fig. 5, in another aspect, a method for performing alignment by using the alignment mark includes the following steps:
s1, taking a first layer as a current layer, and forming a first pattern 1 on the current layer of a wafer by using a mask plate and an exposure machine;
it can be understood that the mark mask pattern for generating the first pattern 1 is arranged on the current mask plate, and meanwhile, the photoetching mask pattern for generating the photoetching pattern of the current layer can also be arranged on the current mask plate;
in some embodiments, the outer contour of the first pattern 1 is preferably rectangular, and when the first pattern 1 is formed on the current layer of the wafer by using the mask and the exposure machine, the extending direction of the outer contour line of the first pattern 1 is parallel to the coordinate axis direction of a preset coordinate system pre-stored in the exposure machine for representing the position of the wafer;
s2, taking the first layer as a previous layer, taking the second layer as a current layer, and forming a second pattern 2 on the current layer of the wafer by using a mask and an exposure machine;
it will be appreciated that the present reticle may have an identification mask pattern for generating the second pattern 2, and may also have a lithography mask pattern for generating the present layer lithography pattern;
in some embodiments, the outer contour of the second sub-pattern 21 is preferably rectangular, and when the second pattern 2 is formed on the current layer of the wafer by using the mask and the exposure machine, the extending direction of the outer contour line of the second sub-pattern 21 is parallel to the coordinate axis direction of the preset coordinate system pre-stored in the exposure machine for representing the position of the wafer;
S3, taking the second layer as a previous layer, taking the third layer as a current layer, and forming a third pattern 3 on the current layer of the wafer by using a mask and an exposure machine; it will be appreciated that the present reticle may have an identification mask pattern for generating the third pattern 3, and may also have a lithography mask pattern for generating the present layer lithography pattern;
it will be appreciated that the present reticle may have an identification mask pattern for generating the third pattern 3, and may also have a lithography mask pattern for generating the present layer lithography pattern;
in some embodiments, the outer contour of the third sub-pattern 31 is preferably rectangular, and when the third pattern 3 is formed on the current layer of the wafer by using the mask and the exposure machine, the extending direction of the outer contour line of the third sub-pattern 31 is parallel to the coordinate axis direction of the preset coordinate system pre-stored in the exposure machine for representing the position of the wafer;
s4, measuring whether the external outline of the graph formed by the first pattern 1, the second pattern 2 and the third pattern 3 is rectangular or not by using a measuring instrument, and if not, correcting the position of the current mask plate according to the measured pattern.
It can be understood that, in the embodiment of the present application, the error between the first layer alignment and the second layer alignment may be reflected by whether the two second sub-patterns 21 and the first pattern 1 satisfy the symmetrical relationship, and likewise, the error between the first layer alignment and the third layer alignment may be reflected by whether the two third sub-patterns 31 and the first pattern 1 satisfy the symmetrical relationship, and meanwhile, the error between the second layer alignment and the second layer alignment may be reflected by whether the outer contour of the pattern formed by the first pattern 1, the second pattern 2 and the third pattern 3 is rectangular; the alignment precision of the overlay is improved by the layer-by-layer nesting mode.
In some embodiments, step S2 comprises:
the first layer is used as a previous layer, the second layer is used as a current layer, and a second pattern 2 is formed on the current layer of the wafer by using a mask and an exposure machine, so that the transverse marks of the central coordinates of the first pattern 1 and the two second sub-patterns 21 are the same.
It will be appreciated that the first pattern 1 is the same as the abscissa of the central coordinates of the two second sub-patterns 21, and that the difference between the ordinate of the central coordinates of the two second sub-patterns 21 may then be indicative of the distance between the centers of the two second sub-patterns 21; the difference between the ordinate of the center coordinates of the second sub-pattern 21 and the ordinate of the center coordinates of the first pattern 1 may characterize the distance between the center of the second sub-pattern 21 and the center of the first pattern 1.
In some embodiments, after step S2, the method further comprises the steps of:
s21, measuring the difference delta Y1 between the ordinate of the first pattern 1 and the ordinate of the two second sub-patterns 21 by using a measuring instrument, and if delta Y1 is larger than a threshold value, feeding back delta Y1 to an exposure machine to correct the position of the current mask.
It will be appreciated that the gauge can determine whether the overlay error between the current layer and the previous layer exceeds the threshold value by merely measuring whether the difference Δy1 between the ordinate of the first pattern 1 and the two second sub-patterns 21 exceeds the threshold value, thereby reducing the calculation amount of the overlay error.
In some embodiments, step S3 comprises:
and forming a third pattern 3 on the current layer of the wafer by using the mask and the exposure machine by taking the second layer as a previous layer and the third layer as a current layer, so that the ordinate coordinates of the central coordinates of the first pattern 1 and the two third sub-patterns 31 are the same.
It will be appreciated that the first pattern 1 is the same as the ordinate of the center coordinates of the two third sub-patterns 31, and that the difference between the abscissa of the center coordinates of the two third sub-patterns 31 may then characterize the distance between the centers of the two third sub-patterns 31; the difference between the abscissa of the center coordinates of the third sub-pattern 31 and the abscissa of the center coordinates of the first pattern 1 may characterize the distance between the center of the third sub-pattern 31 and the center of the first pattern 1.
In some embodiments, after step S3, the method further comprises the steps of:
s31, measuring the difference delta X1 between the first pattern 1 and the horizontal coordinates of the two third sub-patterns 31 by using a measuring instrument, and if delta X1 is larger than a threshold value, feeding back delta X1 to an exposure machine to correct the position of the current mask.
It will be appreciated that the gauge simply measures whether the difference Δx1 between the abscissa of the first pattern 1 and the two third sub-patterns 31 exceeds the threshold value, and can determine whether the overlay error between the current layer and the first layer exceeds the threshold value, thereby reducing the calculation amount of the overlay error.
In some embodiments, step S4 comprises:
and measuring the difference delta Y2 between the ordinate of the center coordinates of the two second sub-patterns 21 and the difference delta X2 between the abscissa of the two third sub-patterns 31 by using a measuring instrument, and correcting the position of the current mask according to the measurement result if the delta Y2 and the delta X2 do not meet the preset relation.
Wherein the preset relationship is determined according to the respective external contours of the first pattern 1, the second pattern 2 and the third pattern 3 and the projected external contours of the first pattern 1, the second pattern 2 and the third pattern 3 on the wafer. For example, as shown in fig. 1b, the external contours of the first pattern 1 and the two second sub-patterns 21 are square, the external contours of the two third sub-patterns 31 are rectangular, and the projected external contours of the first pattern 1, the second pattern 2 and the third pattern 3 on the wafer are square, so that Δy2 should be equal to Δx2 ideally, and if the measurement result of the measuring instrument is Δy2+.Δx2, the measuring instrument sends the measured data to the exposure machine, and the exposure machine corrects the position of the current mask according to the obtained data. As shown in fig. 4d, the outer contours of the projections of the first pattern 1, the two second sub-patterns 21, the two third sub-patterns 31, the first pattern 1, the second pattern 2 and the third pattern 3 on the wafer are rectangular, so that ideally, Δy2 should satisfy a specific proportional relationship with Δx2, if the detection result of the measuring instrument shows that Δy2 and Δx2 do not satisfy the specific proportional relationship, the measured data is sent to the exposure machine, and the exposure machine corrects the position of the current mask according to the obtained data.
It can be understood that through the above steps, the position of the mask corresponding to the second layer is corrected by the first pattern 1 of the first layer on the wafer, the position of the sample mask corresponding to the third layer is continuously corrected by the first pattern of the first layer, the position of the sample mask corresponding to the third layer is corrected again by the second pattern of the second layer, and the alignment precision of overlay is improved by mutually correcting the positions of the three layers of wafers layer by layer.
In some embodiments, step S1 comprises:
using the first layer as a current layer, exposing and developing the current layer of the wafer by using a mask plate and an exposure machine, and forming a hollowed-out first pattern 1 on the current layer of the wafer; and filling metal materials into the hollowed-out first pattern 1 to form a solid first pattern 1.
In some embodiments, step S2 comprises:
the first layer is used as a previous layer, the second layer is used as a current layer, the current layer of the wafer is exposed and developed by using a mask plate and an exposure machine, and a hollowed-out second pattern 2 is formed on the current layer of the wafer; and filling metal materials into the hollowed-out second pattern 2 to form a solid second pattern 2.
In some embodiments, step S2 comprises:
taking the second layer as a previous layer and the third layer as a current layer, exposing and developing the current layer of the wafer by using a mask and an exposure machine, and forming a hollowed-out third pattern 3 on the current layer of the wafer; and filling metal materials into the hollowed-out third patterns 3 to form solid third patterns 3.
It will be appreciated that the subsequent process of filling the metal material may be prevented from damaging the overlay mark, and may also provide maximum signal strength such that the overlay mark may be effectively detected by the meter (optical detection device).
Preferably, the metal material is copper or copper-aluminum alloy. In the prior art node integrated circuit manufacturing process, the mechanical strength of copper and copper-aluminum alloy is higher, the post-annealing process has good plasticity and the post-chemical mechanical polishing (chemical mechanical polishing, CMP) process has low damage to the overlay mark, the uncertainty of the overlay error measurement result of the overlay mark is reduced, and the precision of multilayer overlay is improved.
Claims (15)
1. An overlay alignment mark formed on a wafer, the overlay alignment mark comprising at least:
a first pattern formed in a first layer of the wafer;
a second pattern formed in a second layer above the first layer of the wafer and including two second sub-patterns symmetrically disposed about the first pattern in a first direction;
a third pattern formed in a third layer above the second layer of the wafer and including two third sub-patterns symmetrically disposed about the first pattern in a second direction perpendicular to the first direction;
The projections of the first pattern, the second pattern and the third pattern on the wafer form a pattern with a rectangular external contour.
2. The overlay alignment mark of claim 1, wherein: under a preset coordinate system, the abscissa of the central coordinates of the first pattern and the two second sub-patterns are the same, and the ordinate of the central coordinates of the first pattern and the two third sub-patterns are the same; or (b)
And under a preset coordinate system, the ordinate of the central coordinates of the first pattern and the two second sub patterns are the same, and the abscissa of the central coordinates of the first pattern and the two third sub patterns are the same.
3. The overlay alignment mark of claim 1, wherein: the external contours of the first pattern, the second sub-pattern and the third sub-pattern comprise at least two of square, rectangle and triangle.
4. The overlay alignment mark of claim 3, wherein: the external contours of the first pattern, the second sub-pattern and the third sub-pattern are all rectangular.
5. The overlay alignment mark of claim 3, wherein: the external contour of the first pattern and the second sub-pattern is square, and the external contour of the third sub-pattern is rectangular; or (b)
The external outline of the first pattern and the third sub-pattern is square, and the external outline of the second sub-pattern is rectangular; or (b)
The external outline of the first pattern is square, and the external outlines of the second sub pattern and the third sub pattern are rectangular; or (b)
The external outline of the first pattern is rectangular, and the external outlines of the second sub pattern and the third sub pattern are rectangular or square; or (b)
The external contour of the first pattern is square, and the external contour of the second sub pattern and the third sub pattern is triangular.
6. The overlay alignment mark of claim 1, wherein: the first pattern and/or the second sub-pattern and/or the third sub-pattern are annular patterns.
7. The overlay alignment mark as set forth in any one of claims 1 to 6, wherein: the projections of the first pattern, the second pattern and the third pattern on the wafer form a pattern with square external outline.
8. A method of overlay alignment using the overlay alignment marks of any one of claims 1 to 7, wherein: the method comprises the following steps of
Taking the first layer as a current layer, and forming a first pattern on the current layer of the wafer by using a mask plate and an exposure machine;
Taking the first layer as a previous layer, taking the second layer as a current layer, and forming a second pattern on the current layer of the wafer by using a mask plate and an exposure machine;
taking the second layer as a previous layer, taking the third layer as a current layer, and forming a third pattern on the current layer of the wafer by using a mask plate and an exposure machine;
and measuring whether the external outline of the graph formed by the first pattern, the second pattern and the third pattern is rectangular or not by using a measuring instrument, and if the external outline is not rectangular, correcting the position of the mask plate according to the measured pattern.
9. The method according to claim 8, wherein: the steps of forming a second pattern on the current layer of the wafer by using a mask and an exposure machine by taking the first layer as the previous layer and the second layer as the current layer, including
And forming a second pattern on the current layer of the wafer by using the mask and the exposure machine by taking the first layer as a previous layer and the second layer as a current layer, so that the transverse marks of the central coordinates of the first pattern and the two second sub-patterns are the same.
10. The method according to claim 9, wherein: the steps take the first layer as the previous layer, the second layer as the current layer, and after the second pattern is formed on the current layer of the wafer by using a mask and an exposure machine, the steps are also included
And measuring the difference delta Y1 between the ordinate of the first pattern and the ordinate of the two second sub-patterns by using a measuring instrument, and if delta Y1 is larger than a threshold value, feeding back delta Y1 to an exposure machine to correct the position of the current mask plate.
11. The method according to claim 10, wherein: the step of forming a third pattern on the current layer of the wafer by using a mask and an exposure machine by taking the second layer as the previous layer and the third layer as the current layer comprises
And forming a third pattern on the current layer of the wafer by using the mask and the exposure machine, wherein the second layer is used as a previous layer, and the third layer is used as a current layer, so that the ordinate coordinates of the central coordinates of the first pattern and the two third sub-patterns are the same.
12. The method according to claim 11, wherein: the step takes the second layer as the previous layer, the third layer as the current layer, and the step is also included after the third pattern is formed on the current layer of the wafer by using a mask and an exposure machine
And measuring the difference delta X1 between the first pattern and the horizontal coordinates of the two third sub-patterns by using a measuring instrument, and if delta X1 is larger than a threshold value, feeding back delta X1 to an exposure machine to correct the position of the current mask plate.
13. The method according to claim 12, wherein: the step of measuring whether the external outline of the pattern formed by the first pattern, the second pattern and the third pattern is rectangular or not by using a measuring instrument, and if not, correcting the position of the mask plate according to the measured pattern, including
And measuring the difference delta Y2 between the ordinate of the center coordinates of the two second sub-patterns and the difference delta X2 between the abscissa of the two third sub-patterns by using a measuring instrument, and correcting the position of the current mask plate according to the measurement result if the delta Y2 and the delta X2 do not meet the preset relation.
14. The method of claim 8, wherein the step of determining the position of the first electrode is performed,
the step of forming a first pattern on the current layer of the wafer by using a mask and an exposure machine by taking the first layer as the current layer comprises the following steps:
using the first layer as a current layer, exposing and developing the current layer of the wafer by using a mask plate and an exposure machine, and forming a hollowed-out first pattern on the current layer of the wafer; filling metal materials into the hollowed-out first patterns to form solid first patterns;
and/or
The step of forming a second pattern on the current layer of the wafer by using a mask and an exposure machine by taking the first layer as a previous layer and the second layer as a current layer comprises the following steps:
taking the first layer as a previous layer and the second layer as a current layer, exposing and developing the current layer of the wafer by using a mask plate and an exposure machine, and forming a hollowed-out second pattern on the current layer of the wafer; filling metal materials into the hollowed-out second patterns to form solid second patterns;
And/or
The step of forming a third pattern on the current layer of the wafer by using the mask and the exposure machine by taking the second layer as a previous layer and the third layer as the current layer comprises the following steps:
taking the second layer as a previous layer and the third layer as a current layer, exposing and developing the current layer of the wafer by using a mask and an exposure machine, and forming a hollowed-out third pattern on the current layer of the wafer; and filling metal materials into the hollowed-out third pattern to form a solid third pattern.
15. The method according to claim 14, wherein: the metal material is copper or copper-aluminum alloy.
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| CN117492336B (en) * | 2024-01-02 | 2024-04-09 | 天府兴隆湖实验室 | Alignment mark and pattern alignment method |
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