CN116093164B - High-voltage Schottky diode with floating island type protection ring - Google Patents
High-voltage Schottky diode with floating island type protection ring Download PDFInfo
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Abstract
The invention provides a high-voltage Schottky diode with a floating island type protection ring, which comprises a first conduction type well region, a first conduction type active region and a second conduction type protection ring, wherein the first conduction type active region and the second conduction type protection ring are arranged in the first conduction type well region, the active regions on the surface of the first conduction type well region are respectively provided with a Schottky barrier metal, the second conduction type protection ring is separated from the Schottky barrier metals on the surface of the second conduction type protection ring and is arranged below the Schottky barrier metals in a floating manner, a PN junction is formed between the second conduction type protection ring and the first conduction type well region, a depletion region is arranged on the PN junction, the Schottky junction is formed by the first conduction type well region and the Schottky barrier metals on the surface of the first conduction type well region, and the depletion region of the PN junction can cover the edge of the Schottky barrier metals of the Schottky junction in a zero bias state. The invention can eliminate the minority carrier storage effect existing in forward conduction, greatly improve the switching speed of the switch and optimize the parasitic capacitance characteristic.
Description
Technical Field
The invention relates to the field of Schottky diode structures, in particular to a high-voltage Schottky diode with a floating island type protection ring.
Background
Schottky diodes are rectifying devices fabricated using metal-Semiconductor junctions formed by metal-to-Semiconductor contacts, and are typically implemented in a Complementary Metal Oxide Semiconductor (CMOS) process as shown in fig. 1. To isolate the P-type substrate P110, the entire device is fabricated in an N-well region N120, with shallow trench isolation (Shallow trench isolation, STI) structures 100 between all active regions. A schottky barrier metal 121A, 123A, 125A is automatically formed on all active area surfaces by a typical Self-aligned metal silicide (Salicide) process. When the schottky barrier metals 121A, 125A contact the heavily doped active regions 121 and 125, ohmic contacts are formed without rectifying capability; and when the schottky barrier metal 123A contacts the N-well region N120, a schottky junction is formed. At this time, when the metal interconnection line 91 is connected to a high potential and the metal interconnection line 92 is connected to a low potential, the schottky junction is turned on in a forward bias manner, and the current is conducted to clamp the voltage; on the contrary, the Schottky junction is turned off in a reverse bias way, so that the effect of unidirectional rectification is achieved. Compared with a PN diode formed when a P-type semiconductor is contacted with an N-type semiconductor, the PN diode has lower forward starting voltage and lower conduction power consumption; meanwhile, only majority carriers in the Schottky diode participate in conduction, and a minority carrier storage effect hardly exists, so that the switching speed, particularly the turn-off speed, of the switch is greatly increased, and the Schottky diode is suitable for high-frequency application. Thanks to the above advantages, schottky diodes are now widely used in the fields of rectification, signal conditioning, switching, voltage clamping, solar cells, etc.
However, schottky diodes generally have poorer reverse blocking capability than PN diodes because:
the dashed line 141 shows the depletion region boundary of the typical schottky diode, where there is a "corner effect" at the edge of the schottky junction, due to which the electric field strength is much higher inside the Yu Xiaote base junction, thus greatly deteriorating the leakage current and breakdown voltage. For some high voltage applications, it is desirable to optimize the reverse blocking capability of the schottky diode.
In order to improve the reverse withstand voltage capability of the schottky diode and reduce the leakage current, a typical approach in the industry is to add a guard ring, as shown in fig. 2.
Fig. 2 shows a typical high voltage schottky diode structure implemented on a CMOS process. Based on the device structure in fig. 1, by adding a P-type guard ring at the edge of the schottky junction, the problem of the "corner effect" can be effectively eliminated, so that the leakage current of the device in the reverse bias state is greatly reduced, and the breakdown voltage is improved. Specifically, the P-type guard ring is formed of two P-type heavily doped active regions 122, 124 and schottky barrier metals 122A, 124A at their surfaces. The schottky barrier metals 122a,123a, 124A will self-short according to the prevailing salicide process characteristics. Dashed line 141 is the depletion region boundary of the typical high voltage schottky diode.
Advantages and disadvantages of the typical high voltage schottky diode:
the reverse blocking capability of the high voltage schottky diode is remarkably enhanced due to the addition of the P-type guard ring, which is manifested by reduction of leakage current and improvement of breakdown voltage. However, the P-type guard ring also introduces a PN junction in parallel with the schottky junction, thereby introducing additional parasitic capacitance (including barrier capacitance and diffusion capacitance); furthermore, when the forward bias voltage of the whole device is high in actual operation, the PN junction D2 path is conducted and turned on, while helping to clamp the whole voltage, a minority carrier conduction mechanism is introduced, a significant 'minority carrier storage effect' is introduced when the device is turned off, and the switching speed of the whole device is severely deteriorated, so that the inherent advantage of the Schottky diode is not existed any more, and the inherent advantage of the Schottky diode is absolutely intolerable for high-frequency application.
Disclosure of Invention
In order to solve the problems in the prior art, the invention provides the high-voltage Schottky diode with the floating island type protection ring, so that the minority carrier storage effect existing in a PN diode path during forward conduction is eliminated while the reverse voltage-withstanding characteristic of the device is maintained, and the switching speed of a switch is greatly improved.
The high-voltage Schottky diode with floating island type protection ring comprises a first conductive type well region, a first conductive type active region and a second conductive type protection ring, wherein the first conductive type active region and the second conductive type protection ring are arranged in the first conductive type well region, the active regions on the surface of the first conductive type well region are respectively provided with a Schottky barrier metal, the second conductive type protection ring is separated from the Schottky barrier metal on the surface of the second conductive type protection ring and is arranged below the Schottky barrier metal in a floating way, so that the second conductive type protection ring forms a floating island type buried layer region in the first conductive type well region,
a PN junction is formed between the second conductive type protection ring and the first conductive type well region, the PN junction is provided with a depletion region, the first conductive type well region and the Schottky barrier metal on the surface of the first conductive type well region form a Schottky junction,
in the zero bias state, the depletion region of the PN junction can cover the edge of the Schottky barrier metal of the Schottky junction.
The invention is further improved, and the first conductive type active region comprises a first conductive type heavily doped active region which is isolated from the second conductive type guard ring and a well region active region which is connected with the second conductive type guard ring;
the first Schottky barrier metal above the well region active region is connected with the Schottky barrier metal above the second conductivity type protection ring, and the distance between the second conductivity type protection ring and the Schottky barrier metal above the second conductivity type protection ring is W, wherein W is a positive number.
According to the invention, an isolation structure is arranged between the first conductive type heavily doped active region and the second conductive type guard ring.
The invention is further improved, and the isolation structure is a shallow trench isolation structure arranged on the upper surface of the first conductive type well region.
The invention further improves, the isolation structure is a metal silicide blocking layer isolation structure or a field oxide layer isolation structure which is arranged on the upper surface of the first conductive type well region.
According to the invention, an extension end is arranged at one end of the second conductive type protection ring, which is close to the first conductive type heavily doped active region, and the extension end extends towards the first conductive type heavily doped active region and is arranged below the isolation structure.
The invention makes a third improvement, the isolation structure is a gate isolation structure arranged above the first conductive type well region, the gate isolation structure is arranged between the first conductive type heavily doped active region and the second conductive type guard ring,
the grid isolation structure comprises a grid oxide layer arranged on the first conductive type well region, grid polysilicon arranged above the grid oxide layer, grid Schottky barrier metal arranged above the grid polysilicon, and grid side walls arranged on two sides of the grid polysilicon, one end of each grid side wall is flush with the upper surface of the grid Schottky barrier metal, the other end of each grid side wall is connected with the grid oxide layer,
when the preparation sequence of the second conductive type protection ring is earlier than that of the grid isolation structure, one end of the second conductive type protection ring, which is close to the first conductive type heavily doped active region, is provided with an extension end, and the extension end extends towards the first conductive type heavily doped active region and is arranged below the grid isolation structure or is not provided with the extension end;
when the preparation sequence of the second conductive type guard ring is later than that of the grid isolation structure, one end, close to the first conductive type heavily doped active region, of the second conductive type guard ring is aligned with the boundary of the grid isolation structure.
The invention is further improved, and the layout topology of the high-voltage Schottky diode with the floating island type protection ring comprises, but is not limited to, a round layout, an elliptic layout, a rectangular layout and an octagonal layout on the premise that the structural section views are the same.
The invention further improves, the preparation process of the second conductive type protection ring comprises the following steps: the second conductivity type protection ring is manufactured by controlling technological parameters and adjusting impurity distribution.
According to the invention, the low-capacitance Schottky diode further comprises a P-type substrate, the first conduction type is N-type, the first conduction type well region is N-type well region, and the N-type well region is arranged on the P-type substrate.
The invention further improves, the low-capacitance Schottky diode further comprises a P-type substrate, the first conduction type is P-type, the first conduction type well region is P-type well region, a deep N-well isolating the P-type well region and the P-type substrate is arranged above the P-type substrate, the P-type well region is arranged in the deep N-well, an N-type heavily doped active region isolated from the P-type heavily doped active region is arranged on the surface of the deep N-well, and Schottky barrier metal is arranged on the surface of the N-type heavily doped active region.
The schottky barrier metal may be a metal AL, ti, co, cr, mo, mg, ni, W, au, pt, or a silicide metal, or a silicide alloy.
Compared with the prior art, the invention has the beneficial effects that: by separating the Schottky barrier metal of the second conduction type protection ring from the Schottky barrier metal of the surface of the second conduction type protection ring through process optimization, floating of the second conduction type protection ring is finally achieved, and operability is higher. Thereby effectively inhibiting the adverse effects of the deterioration of the switching speed and the increase of parasitic capacitance.
The impurity distribution of the second conductivity type guard ring area is optimized by controlling the process manufacturing condition, so that the impurity distribution is changed from an impurity area starting from the surface of the silicon wafer, namely the surface of the well area, to a floating island type buried layer area, and potential floating of the P type guard ring is realized. After the P-type protection ring floats, the PN junction introduced by the P-type protection ring is always in an off state, so that the minority carrier storage effect is eliminated, and the switching speed of the device is obviously improved; meanwhile, potential barrier capacitance and diffusion capacitance caused by PN junctions are eliminated, and the parasitic characteristic of the device is optimized.
Drawings
For a clearer description of the present application or of the solutions of the prior art, a brief introduction will be given below to the drawings used in the description of the embodiments or of the prior art, it being apparent that the drawings in the description below are some embodiments of the present application, from which other drawings can be obtained, without the inventive effort for a person skilled in the art.
Fig. 1 is a schematic diagram of a typical schottky diode device of prior art 1;
FIG. 2 is a schematic diagram of a device structure of a typical high voltage Schottky diode with guard rings of prior art 2;
FIG. 3 is a schematic view of a device structure according to embodiment 1 of the present invention;
FIG. 4 is a schematic view of a device structure according to embodiment 2 of the present invention;
FIG. 5 is a schematic view of a device structure according to embodiment 3 of the present invention;
fig. 6 is a schematic view of the device structure of embodiment 4 of the present invention.
Description of the embodiments
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs; the terminology used in the description of the applications herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application; the terms "comprising" and "having" and any variations thereof in the description and claims of the present application and in the description of the figures above are intended to cover non-exclusive inclusions. The terms first, second and the like in the description and in the claims or in the above-described figures, are used for distinguishing between different objects and not necessarily for describing a sequential or chronological order.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the present application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.
In order to better understand the technical solutions of the present application, the following description will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the accompanying drawings.
As shown in fig. 3-6, the present invention seeks to float the second conductivity type guard ring 122, 124 in fig. 2, so as to realize the effects of suppressing the deteriorated switching speed and increasing the parasitic capacitance caused by the second conductivity type guard ring 122, 124, specifically, the high voltage schottky diode with the floating island type guard ring includes a first conductivity type well region, a first conductivity type heavily doped active region 121, 125 disposed in the first conductivity type well region, and a second conductivity type guard ring 122, 124, the active regions on the surface of the first conductivity type well region are respectively provided with a schottky barrier metal 121A, 123A, 125A, the second conductivity type guard ring 122, 124 is separated from the schottky barrier metal 122A, 124A on the surface of the second conductivity type guard ring, and is float disposed below the schottky barrier metal 122A, 124A, so that the second conductivity type guard ring 122, 124 forms a buried layer region of a first conductivity type in the first conductivity type well region, the active regions on the surface of the second conductivity type well region are respectively provided with a schottky barrier metal 121A, 123A schottky junction 141 is formed at the surface of the schottky barrier region, and a depletion state of the junction 141 is formed at the junction between the second conductivity type guard ring and the first conductivity type well region.
The following is a detailed description of specific embodiments.
The meanings and applications of each component in the embodiment of the invention are as follows:
(1) P110 represents a P-type substrate of a semiconductor process;
(2) N120 represents an N well region;
(3) 100 represents shallow trench isolation (Shallow trench isolation, STI) structures;
(4) 122 and 124 represent second conductivity type regions (i.e., second conductivity type guard rings), and the specific doping profile may be heavily doped active regions, lightly Doped Drain (LDD) regions, BASE doped regions (BASE), or other custom doped regions;
(5) 121 and 125 generally represent heavily doped regions of the first conductivity type (i.e., heavily doped active regions of the first conductivity type);
(6) 121A, 122A,123A, 124A, 125A represent schottky barrier metals, examples using metal silicides (silicides);
(7) 126 and 127 represent silicide barriers (Salicide blocking);
(8) 141 represents depletion region boundaries;
(9) 91 and 92 represent metal interconnection lines, wherein one end of the metal interconnection line 91 is connected to the active region of the device well region, and one end of the metal interconnection line 92 is connected to the heavily doped region of the first conductivity type;
(10) Dimension W represents the distance between the metal silicide silicon and the second conductivity type guard ring in a direction perpendicular to the surface of the silicon wafer;
(11) 121B and 125B represent Lightly-doped drain (LDD) regions of the first conductivity type, as an option;
(12) 126A and 127A represent gate metal silicide (silicide), 126B and 127B represent gate oxide, 126C and 127C represent gate polysilicon, and 126D, 126E, 127D and 127E represent gate sidewall;
(13) P120 represents a P well region;
(14) N130 represents a deep N-well, intended to isolate its internal P-well P120 from the P-type substrate P110;
(15) 131 and 132 represent heavily doped N-type regions (i.e., N-type active regions) of the deep N-well;
(16) 131A and 132A represent metal silicide (silicide) on the surfaces of the N-type active regions 131, 132, respectively;
(17) 93 represents a metal interconnect, connected to a power supply potential, or kept floating (floating).
Example 1
As shown in fig. 3, the high-voltage schottky diode with the floating island type guard ring in this example includes a P-type substrate P110, the first conductivity type is N-type, the first conductivity type well region is N-type well region N120, and the N-type well region N120 is disposed on the P-type substrate P110.
However, for the mainstream Salicide CMOS process, the schottky barrier metals 122A, 124A on the P-type guard ring surface are automatically shorted to the schottky barrier metal 123A of the schottky junction. Therefore, in order to realize the floating of the P-type guard ring of the present invention, the schottky barrier metals 122A and 124A on the surface thereof must be disconnected from the schottky barrier metal 123A of the schottky junction. The schottky barrier metals 121A, 122A,123A, 124A, 125A of this example are each described as a metal silicide. Of course, the schottky barrier metals 121A, 122A,123A, 124A, 125A of this example may be replaced with the metal AL, ti, co, cr, mo, mg, ni, W, au, pt, or may be replaced with an alloy for diode conduction, such as a silicide alloy.
The method for realizing the disconnection of the metal silicide on the surface of the P-type protection ring and the metal silicide of the Schottky junction comprises the following visual steps:
the above objective is achieved by means of an additional process mask, silicide blocking layer (Salicide blocking), but the actual layout design is complex, and the manufacturing cost is inevitably increased, and the layout area is possibly increased, so that the comprehensive efficiency of the schottky diode is reduced. In summary, in the mainstream Salicide CMOS process, it will be difficult to achieve floating of the guard ring within the same active area window.
In order to solve the problem of floating, the method gives up a strategy of disconnecting the metal silicide on the surface of the P-type protection ring from the metal silicide on the Schottky junction, and separates the active region of the protection ring from the metal silicide on the surface of the protection ring by means of process optimization, so that floating of the protection ring can be finally realized, and the operability is stronger.
Specifically, as shown in fig. 3, by controlling the process manufacturing conditions, the impurity distribution of the P-type guard ring region is optimized, so that the impurity region starts from the surface of the silicon wafer and evolves into a floating island type buried layer region, and potential floating of the P-type guard ring can be realized. After the P-type protection ring floats, the PN junction introduced by the P-type protection ring is always in an off state, so that the minority carrier storage effect is eliminated, and the switching speed of the device is obviously improved; meanwhile, potential barrier capacitance and diffusion capacitance caused by PN junctions are eliminated, and the parasitic characteristic of the device is optimized.
The technical key points of the invention are as follows:
(1) The P-type guard ring is floated and does not interfere with the reverse blocking capability of the device. At this time, although the P-type guard ring is floating, the depletion region of the PN junction formed by the P-type guard ring and the N-well region N120 still exists and extends as the reverse bias voltage of the device increases. Therefore, as long as the W is proper, the depletion region of the PN junction in the zero bias state is ensured to cover the edge of the metal silicide of the schottky junction, the problem of corner electric field can still be effectively restrained, so that the superior reverse blocking capability (i.e. lower leakage current and higher breakdown voltage) of the device is maintained.
(2) The manufacturing method of the floating island type protection ring comprises the following steps:
compared with the conventional protection ring structure in fig. 2, the floating island type protection ring requires higher ion implantation energy during process manufacture so as to realize deeper junction depth and ensure the formation of a floating island structure.
The process level used for preparing the P-type protection ring can be obtained by improving the impurity distribution by further controlling a process menu through typical process levels such as a traditional heavily doped active region injection layer process, a lightly doped drain region injection layer process, a base region doped injection layer process, a P-type electrostatic discharge injection layer process and the like, so that the P-type protection ring meeting the requirements is prepared.
(3) The value of W in this example is critical and needs to be carefully compromised. On the one hand, if W is too small, the actual floating island guard rings (122 and 124) may not be manufactured, which would render the embodiments of the present invention ineffective; on the other hand, if W is too large, the depletion region of the floating island guard ring cannot cover the edge of the schottky junction, so that the problem of "corner electric field" at the edge of the schottky junction is re-exposed, and the overall reverse blocking capability of the device is deteriorated.
Performance comparison:
in the embodiment 1 of the invention, the P-type guard ring is skillfully optimized by the preparation process, and is floated, and the PN junction of the invention is always in the off state, so that the PN junction can eliminate the 'minority carrier storage effect' existing in the PN diode path when the PN diode is forward conducted while maintaining the excellent reverse blocking capability of the device, and the switching speed and parasitic capacitance characteristics of the device are greatly optimized.
Example 2
The structure of a device of a high voltage schottky diode with a floating island type guard ring according to embodiment 2 of the present invention is shown in fig. 4. The present embodiment adjusts the isolation structure between the P-type guard ring and the N-type heavily doped active region in the schottky diode, and the present embodiment replaces the shallow trench isolation structure 100 of embodiment 1 with the silicide blocking layers 126, 127, which aims to further optimize the forward on-resistance of the device. In addition, the blocking of the shallow trench isolation structure to ion implantation is absent, so that the transverse design size of the floating island type protection ring is more flexible. In particular, the outer boundary of the floating island guard ring can no longer be aligned only with the outer boundary of the metal silicide above it, but can extend further outwards, i.e. underneath the silicide blocking layers 126, 127. The embodiment 2 of the invention has the advantages that: the design flexibility of the reverse breakdown voltage of the device is obviously improved by adjusting the outer boundary of the floating island type protection ring.
Example 3
The structure of a device of a high voltage schottky diode with a floating island type guard ring according to embodiment 3 of the present invention is shown in fig. 5. The present embodiment adjusts the isolation structure between the P-type guard ring and the N-type heavily doped active region in the schottky diode,
the shallow trench isolation structure 100 of embodiment 1 is replaced with gate structures 126 a-126 e, 127 a-127 e, with lightly doped drain regions (LDD) 121B, 125B being an option.
Specifically, the gate isolation structure of this example includes gate oxide layers 126B and 127B near the N well region N120, gate polysilicon 126C and 127C disposed above the gate oxide layers 126B and 127B, gate schottky barrier metals 126A and 127A disposed above the gate polysilicon 126C and 127C, and gate side walls 126d to 126e and 127d to 127e disposed on both sides of the gate polysilicon 126C and 127C, wherein one ends of the gate side walls 126d to 126e and 127d to 127e are respectively flush with the upper surfaces of the gate schottky barrier metals 126A and 127A, and the other ends are connected with the gate oxide layers 126B and 127B.
Compared to the shallow trench isolation structure (100) of embodiment 1 and the silicide blocking layers 126, 127 of embodiment 2, the gate isolation structure of this embodiment can achieve the shortest current conduction path, thereby optimizing the forward on-resistance of the device to the greatest extent. It should be noted that the degree of freedom in designing the outer boundary of the floating island type protection ring depends on the process level used for the protection ring, and is described in detail below:
when the process level of the P-type guard ring is manufactured in advance of the gate isolation structure, the ion implantation process of the P-type guard ring is not affected by the gate isolation structure, so that the outer boundary of the P-type guard ring has the maximum design flexibility, similar to the structure in embodiment 2.
When the manufacturing sequence of the process layers adopted by the guard ring is behind the gate structure, the ion implantation procedure of the guard ring is blocked by (part of) the gate isolation structure, so that the outer boundary of the guard ring is relatively fixed, cannot be freely extended any more, and the design flexibility is reduced.
Of course, the isolation structure between heavily doped active regions may be different for different manufacturing processes: besides the isolation structures, namely shallow trench isolation, silicide blocking layer isolation structures and gate isolation structures, which are already listed in the embodiment of the invention, the invention can also adopt a Field Oxide isolation (FOX) structure or a Field Oxide isolation (FOX) structure.
Example 4
The structure of the high voltage schottky diode with floating island guard ring proposed in embodiment 4 of the present invention is shown in fig. 6, which is actually the complementary structure of the structure of embodiment 1 in the mainstream CMOS process. The structure in embodiment 1 is a schottky diode structure formed by a metal silicide and an N-well region, wherein the metal silicide is on the positive side and the N-well region N120 is on the negative side. The Schottky diode has the characteristics of lower on-resistance, good reverse blocking capability and the like; the structure of this embodiment is a schottky diode structure formed by metal silicide and P-well region P120, where the metal silicide is on the negative side and P-well region P120 is on the positive side. The schottky diode has the greatest characteristic of very low forward bias starting voltage and is suitable for the application field of low power consumption. Note that, in order to avoid the P-well region P120 from shorting to the P-type substrate P110 when implementing the structure of the present embodiment in the CMOS process, the deep N-well N130 needs to be isolated, and the potential of the deep N-well N130 may be connected to the power supply terminal through the metal interconnection line 93, or may be kept floating. In addition, the doping type of the protection ring in the structure of this embodiment is N type, which is complementary to the P type of embodiment 1.
For the present embodiment, the morphology of the deep N-well N130 may vary from one fabrication process to another. For large scale processes, the deep N-well ranges from the surface of the silicon wafer to the junction depth thereof, and presents a well shape, as shown in FIG. 6; however, for some advanced CMOS processes, the deep N-well may be evolved into an N-type buried layer only under the N-well and P-well regions, and in order to effectively isolate the P-well from the P-type substrate, a ring of N-well is further required to be disposed around the P-well to jointly realize an electrical isolation function with the deep N-well under the N-well.
In summary, as can be seen from the above embodiments 1-4, the present invention creatively optimizes the structure of the protection ring to make it physically float, thereby suppressing the adverse effects thereof.
In the actual operation process, the strategy of disconnecting the metal silicide on the surface of the protection ring from the metal silicide of the Schottky junction is abandoned, and the active area of the protection ring is separated from the metal silicide on the surface of the protection ring by means of process optimization, so that the floating of the protection ring is finally realized, and the operability is stronger.
The invention can eliminate the barrier capacitance and the diffusion capacitance brought by PN junction while maintaining the reverse voltage-withstanding characteristic of the device, optimize the parasitic characteristic of the device, and remarkably improve the switching speed of the device, so that the device has excellent performance in the field of high-frequency high-voltage application.
On the premise that the structural cross-sectional view is the same as that of the invention, the invention comprises various layout topologies such as (elliptic) circular layout, rectangular layout, octagonal layout and the like.
The above embodiments are preferred embodiments of the present invention, and are not intended to limit the scope of the present invention, which includes but is not limited to the embodiments, and equivalent modifications according to the present invention are within the scope of the present invention.
Claims (10)
1. The utility model provides a high voltage schottky diode with floating island type protection ring, includes first conductivity type well region, sets up first conductivity type active region and the second conductivity type protection ring in the first conductivity type well region, the active region of first conductivity type well region surface all is equipped with schottky barrier metal, its characterized in that:
the second conductive type guard ring is separated from the Schottky barrier metal on the surface of the second conductive type guard ring and is arranged under the Schottky barrier metal in a floating mode, so that the second conductive type guard ring forms a floating island type buried layer region in the first conductive type well region,
the first conductive type active region comprises a first conductive type heavily doped active region which is isolated from the second conductive type guard ring and a well region active region which is connected with the second conductive type guard ring,
a PN junction is formed between the second conduction type protection ring and the first conduction type well region, the PN junction is provided with a depletion region, the active region of the well region and the Schottky barrier metal on the surface of the active region form a Schottky junction,
in the zero bias state, the depletion region of the PN junction can cover the edge of the Schottky barrier metal of the Schottky junction.
2. The high voltage schottky diode with floating island guard ring of claim 1 wherein: the first Schottky barrier metal above the well region active region is connected with the Schottky barrier metal above the second conductivity type protection ring, and the distance between the second conductivity type protection ring and the Schottky barrier metal above the second conductivity type protection ring is W, wherein W is a positive number.
3. The high voltage schottky diode with floating island guard ring of claim 2 wherein: an isolation structure is arranged between the first conductive type heavily doped active region and the second conductive type guard ring.
4. The high voltage schottky diode with floating island guard ring of claim 3 wherein: the isolation structure is a shallow trench isolation structure, a metal silicide blocking layer isolation structure or a field oxide layer isolation structure which is arranged on the upper surface of the first conductive type well region.
5. The high voltage schottky diode with floating island guard ring of claim 4 wherein: when the isolation structure is a metal silicide blocking layer isolation structure or a field oxide layer isolation structure, an extension end is arranged at one end of the second conductive type protection ring, which is close to the first conductive type heavily doped active region, and the extension end extends towards the direction of the first conductive type heavily doped active region and is arranged below the isolation structure.
6. The high voltage schottky diode with floating island guard ring of claim 3 wherein: the isolation structure is a gate isolation structure arranged above the first conductive type well region, the gate isolation structure is arranged between the first conductive type heavily doped active region and the second conductive type guard ring,
the grid isolation structure comprises a grid oxide layer arranged on the first conductive type well region, grid polysilicon arranged above the grid oxide layer, grid Schottky barrier metal arranged above the grid polysilicon, and grid side walls arranged on two sides of the grid polysilicon, one end of each grid side wall is flush with the upper surface of the grid Schottky barrier metal, the other end of each grid side wall is connected with the grid oxide layer,
when the preparation sequence of the second conductive type protection ring is earlier than that of the grid isolation structure, one end of the second conductive type protection ring, which is close to the first conductive type heavily doped active region, is provided with an extension end, and the extension end extends towards the first conductive type heavily doped active region and is arranged below the grid isolation structure or is not provided with the extension end;
when the preparation sequence of the second conductive type guard ring is later than that of the grid isolation structure, one end, close to the first conductive type heavily doped active region, of the second conductive type guard ring is aligned with the boundary of the grid isolation structure.
7. The high voltage schottky diode with floating island guard ring of any of claims 1-6 wherein: the preparation process of the second conductive type protection ring comprises the following steps: the second conductivity type protection ring is manufactured by controlling technological parameters and adjusting impurity distribution.
8. The high voltage schottky diode with floating island guard ring of any of claims 1-6 wherein: the layout topology of the high-voltage Schottky diode with the floating island type protection ring comprises, but is not limited to, a round layout, an elliptic layout, a rectangular layout and an octagonal layout on the premise that the structural section views are the same.
9. The high voltage schottky diode with floating island guard ring of any of claims 1-6 wherein: the high-voltage Schottky diode with the floating island type protection ring further comprises a P-type substrate, the first conduction type is N-type, the first conduction type well region is an N-type well region, and the N-type well region is arranged on the P-type substrate.
10. The high voltage schottky diode with floating island guard ring of any of claims 1-6 wherein: the high-voltage Schottky diode with the floating island type protection ring further comprises a P-type substrate, the first conduction type is P-type, the first conduction type well region is a P-type well region, a deep N well for isolating the P-type well region and the P-type substrate is arranged above the P-type substrate, the P-type well region is arranged in the deep N well, an N-type heavily doped active region which is isolated from the P-type heavily doped active region is arranged on the surface of the deep N well, and Schottky barrier metal is arranged on the surface of the N-type heavily doped active region.
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