CN116072721B - Insulated gate bipolar transistor and carrier concentration control method thereof - Google Patents

Insulated gate bipolar transistor and carrier concentration control method thereof Download PDF

Info

Publication number
CN116072721B
CN116072721B CN202310256833.3A CN202310256833A CN116072721B CN 116072721 B CN116072721 B CN 116072721B CN 202310256833 A CN202310256833 A CN 202310256833A CN 116072721 B CN116072721 B CN 116072721B
Authority
CN
China
Prior art keywords
carrier concentration
layer
drift region
bipolar transistor
insulated gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202310256833.3A
Other languages
Chinese (zh)
Other versions
CN116072721A (en
Inventor
李伟聪
姜春亮
雷秀芳
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shenzhen Vergiga Semiconductor Co Ltd
Original Assignee
Shenzhen Vergiga Semiconductor Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenzhen Vergiga Semiconductor Co Ltd filed Critical Shenzhen Vergiga Semiconductor Co Ltd
Priority to CN202310256833.3A priority Critical patent/CN116072721B/en
Publication of CN116072721A publication Critical patent/CN116072721A/en
Application granted granted Critical
Publication of CN116072721B publication Critical patent/CN116072721B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

The application discloses an insulated gate bipolar transistor and a carrier concentration control method thereof, wherein the insulated gate bipolar transistor comprises a substrate, an insulating layer, a metal layer, a dielectric layer and a sensing layer, wherein at least two grid structures and a drift region arranged between two adjacent grid structures are arranged in the substrate; the insulating layer is arranged on the substrate; the metal layer is arranged on the insulating layer; the sensing layer is arranged on the metal layer, the sensing layer comprises a transmission unit and an induction unit, the transmission unit is connected with the substrate through the insulating layer and the metal layer, and the induction unit extends into the drift region through the insulating layer, the metal layer and part of the substrate; the dielectric layer is arranged between the sensing layer and the metal layer and between the sensing layer and the insulating layer. The scheme can reduce the turn-off loss of the insulated gate bipolar transistor.

Description

Insulated gate bipolar transistor and carrier concentration control method thereof
Technical Field
The application relates to the technical field of semiconductors, in particular to an insulated gate bipolar transistor and a carrier concentration control method thereof.
Background
An insulated gate bipolar transistor (Insulated Gate Bipolar Transistor, IGBT) is a novel power electronic device in which a MOS field effect transistor and a bipolar transistor are combined. The power transistor has the advantages of easiness in driving and controlling, low on-state voltage, high on-state current and low loss, is one of core electronic components in a modern power electronic circuit, and is widely applied to various fields of national economy such as communication, energy, traffic, industry, medicine, household appliances, aerospace and the like. The application of the frequency conversion type insulated gate bipolar transistor plays an important role in improving the performance of a power electronic system.
When the IGBT is conducted, holes are injected into the drift region from the P+ collector region, and the carrier concentration of the drift region is increased, so that the conducting voltage drop of the IGBT is reduced. However, when the IGBT is turned off, holes in the drift region cannot be recombined and extracted in time, which easily causes tailing current, and increases turn-off loss of the IGBT.
Disclosure of Invention
The application provides an insulated gate bipolar transistor and a carrier concentration control method thereof, which can reduce the turn-off loss of the insulated gate bipolar transistor.
The embodiment of the application provides an insulated gate bipolar transistor, which comprises the following components:
the semiconductor device comprises a substrate, wherein at least two grid structures and a drift region arranged between two adjacent grid structures are arranged in the substrate;
an insulating layer disposed on the substrate;
the metal layer is arranged on the insulating layer;
the sensing layer is arranged on the metal layer, the sensing layer comprises a transmission unit and an induction unit, the transmission unit is connected with the substrate through the insulating layer and the metal layer, and the induction unit extends into the drift region through the insulating layer, the metal layer and part of the substrate;
the dielectric layer is arranged between the sensing layer and the metal layer and between the sensing layer and the insulating layer.
In the insulated gate bipolar transistor provided by the application, the transmission unit is electrically connected with the sensing unit.
In the insulated gate bipolar transistor provided by the application, the sensing unit comprises a monitoring module and an analysis module, and the analysis module is electrically connected with the monitoring module.
In the insulated gate bipolar transistor provided by the application, the transmission unit comprises a receiving module and a control module, and the receiving module is electrically connected with the control module.
In the insulated gate bipolar transistor provided by the application, the analysis module is electrically connected with the receiving module.
In the insulated gate bipolar transistor provided by the application, the monitoring module is located in the drift region.
In the insulated gate bipolar transistor provided by the application, the embedding depth of the monitoring module in the drift region is 2 um-4 um.
In the insulated gate bipolar transistor provided by the application, the metal layer comprises gate metal and emitter metal which are arranged at intervals.
In the insulated gate bipolar transistor provided by the application, the gate structure comprises gate polysilicon and a gate oxide layer arranged around the gate polysilicon.
The embodiment of the application also provides a carrier concentration control method, which is applied to the insulated gate bipolar transistor, and comprises the following steps:
when the insulated gate bipolar transistor is turned off, the current carrier concentration in the drift region is obtained;
analyzing the current carrier concentration to obtain an analysis result;
determining the extraction rate of carriers according to the analysis result;
and extracting the current carrier concentration in the drift region until the current carrier concentration in the drift region is zeroed according to the extraction rate.
In summary, the insulated gate bipolar transistor provided by the application comprises a substrate, an insulating layer, a metal layer, a dielectric layer and a sensing layer, wherein at least two gate structures and a drift region arranged between two adjacent gate structures are arranged in the substrate; the insulating layer is arranged on the substrate; the metal layer is arranged on the insulating layer; the sensing layer is arranged on the metal layer, the sensing layer comprises a transmission unit and an induction unit, the transmission unit is connected with the substrate through the insulating layer and the metal layer, and the induction unit extends into the drift region through the insulating layer, the metal layer and part of the substrate; the dielectric layer is arranged between the sensing layer and the metal layer and between the sensing layer and the insulating layer. When the insulated gate bipolar transistor provided by the scheme is turned off, the current carrier concentration in the drift region can be analyzed through the sensing unit to determine the current gear corresponding to the current carrier concentration, then the sensing unit determines the extraction rate of the carriers according to the current gear, and extracts the carriers in the drift region according to the extraction rate, so that the carrier concentration in the drift region is reset to zero, and the turn-off loss of the insulated gate bipolar transistor is reduced.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the description of the embodiments will be briefly introduced below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic structural diagram of an insulated gate bipolar transistor according to an embodiment of the present application.
Fig. 2 is a schematic view of a sectional structure along the direction A-A in fig. 1.
Fig. 3 is a schematic view of a sectional structure along the direction B-B in fig. 1.
Fig. 4 is a schematic structural diagram of a transmission unit according to an embodiment of the present application.
Fig. 5 is a schematic structural diagram of a sensing unit according to an embodiment of the present application.
Fig. 6 is a schematic flow chart of a carrier concentration control method according to an embodiment of the present application.
Detailed Description
Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, the same numbers in different drawings refer to the same or similar elements, unless otherwise indicated. The implementations described in the following exemplary examples are not representative of all implementations consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with some aspects of the present application as detailed in the accompanying claims.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, the element defined by the phrase "comprising one … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element, and furthermore, elements having the same name in different embodiments of the present application may have the same meaning or may have different meanings, a particular meaning of which is to be determined by its interpretation in this particular embodiment or by further combining the context of this particular embodiment.
It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the present application.
In the following description, suffixes such as "module", "component", or "unit" for representing elements are used only for facilitating the description of the present application, and are not of specific significance per se. Thus, "module," "component," or "unit" may be used in combination.
In the description of the present application, it should be noted that the positional or positional relationship indicated by the terms such as "upper", "lower", "left", "right", "inner", "outer", etc. are based on the positional or positional relationship shown in the drawings, are merely for convenience of describing the present application and simplifying the description, and do not indicate or imply that the apparatus or element in question must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
When the IGBT is conducted, holes are injected into the drift region from the P+ collector region, and the carrier concentration of the drift region is increased, so that the conducting voltage drop of the IGBT is reduced. However, when the IGBT is turned off, holes in the drift region cannot be recombined and extracted in time, which easily causes tailing current, and increases turn-off loss of the IGBT.
Based on this, the embodiment of the application provides an insulated gate bipolar transistor and a carrier concentration control method thereof, and the technical schemes shown in the application will be described in detail by specific embodiments respectively. The following description of the embodiments is not intended to limit the priority of the embodiments.
Referring to fig. 1-3, an insulated gate bipolar transistor according to an embodiment of the present application includes a substrate 10, an insulating layer 20, a metal layer 30, a dielectric layer 40, and a sensing layer 50.
At least two gate structures 11 and a drift region 12 disposed between two adjacent gate structures 11 are disposed in the substrate 10.
In some embodiments, the base 10 may be a semiconductor substrate. In another embodiment, the base 10 may include a semiconductor substrate, a buried layer, and an epitaxial layer. The buried layer and the epitaxial layer are sequentially stacked on the semiconductor substrate. In a specific implementation process, the buried layer may be formed by performing ion implantation of a first conductivity type on an upper surface layer of the semiconductor substrate. For example, sb ion implantation may be performed on the upper surface layer of the semiconductor substrate to obtain a buried layer. There are various methods of forming the epitaxial layer, such as physical vapor deposition, chemical vapor deposition, or other suitable methods.
In some embodiments, the material of the epitaxial layer may be an epitaxial semiconductor layer of other materials, such as Si epitaxial layer, ge epitaxial layer, geSi epitaxial layer, gaN epitaxial layer, and the like. Preferably, the semiconductor substrate and the epitaxial layer are made of the same material, so that the high-quality epitaxial layer is formed, defects in the epitaxial layer are reduced, and the performance of a semiconductor device formed subsequently is improved.
It will be appreciated that when the base 10 is a semiconductor substrate, the gate structure 11 and the drift region 12 in this embodiment are provided within the semiconductor substrate. When the base 10 includes a semiconductor substrate, a buried layer, and an epitaxial layer, the gate structure 11 and the drift region 12 in the present embodiment are disposed within the epitaxial layer. The gate structure 11 may include a gate polysilicon 112 and a gate oxide layer 111 disposed around the gate polysilicon 112.
In some embodiments, the buried layer may have a first conductivity type and the epitaxial layer may have a second conductivity type. It should be noted that the first conductivity type is P-type, and the second conductivity type is N-type; or the first conductivity type is N-type and the second conductivity type is P-type.
The semiconductor substrate may be monocrystalline silicon, silicon carbide, gallium arsenide, indium phosphide or germanium silicon, or may be a germanium silicon substrate, a III-V element compound substrate, a silicon carbide substrate or a laminated structure thereof, or a silicon-on-insulator structure, or may be a diamond substrate or other semiconductor material substrate known to those skilled in the art, for example, a semiconductor substrate in which P atoms are implanted into monocrystalline silicon to form N-type conductivity, or a semiconductor substrate in which B atoms are implanted into monocrystalline silicon to form P-type conductivity.
It will be appreciated that the surface of the substrate 10 may have natural oxide layers, surface particles, metal ions, etc., resulting in uneven surfaces of the substrate 10.
In order to solve the above problems, the substrate 10 may be cleaned using a wet cleaning process after ion implantation. For example, the substrate 10 is cleaned with a chemical agent to remove natural oxide layers, surface particles, metal ions, etc. on the surface of the substrate 10. The chemical reagent may include one or a combination of sulfuric acid, hydrochloric acid, nitric acid, hydrofluoric acid. That is, the acidic solution may include any one of the above-mentioned various solutions, or may also include a combination of any two or more of the above-mentioned various solutions, which is not limited herein.
Wherein, the insulating layer 20 is disposed on the substrate 10. In the embodiment of the present application, the material of the insulating layer 20 is borophospho-silicate Glass (BPSG).
Wherein the metal layer 30 is disposed on the insulating layer 20. In the embodiment of the present application, the metal layer 30 may include a gate metal 31 and an emitter metal 32 disposed at intervals. The material of the metal layer 30 may include at least one metal material, such as at least one of titanium, tungsten, copper, aluminum, gold, or silver.
The sensing layer 50 is disposed on the metal layer 30, the sensing layer 50 includes a transmission unit 51 and a sensing unit 52, the transmission unit 51 is connected to the substrate 10 through the insulating layer 20 and the metal layer 30, and the sensing unit 52 extends into the drift region 12 through the insulating layer 20, the metal layer 30 and a portion of the substrate 10.
It is understood that the sensing unit 52 is electrically connected to the transmission unit 51. In an implementation, the sensing unit 52 may be configured to analyze the current carrier concentration in the drift region 12 to determine the carrier extraction rate when the igbt is turned off. The sensing unit 52 is configured to extract carriers in the drift region 12 according to the extraction rate, so that the carrier concentration in the drift region 12 is zeroed.
In some embodiments, as shown in fig. 4, the sensing unit 52 may include a monitoring module 521 and an analysis module 522, the analysis module 522 being electrically connected to the monitoring module 521. As shown in fig. 5, the transmission unit 51 includes a reception module 511 and a control module 512, and the reception module 511 and the control module 512 are electrically connected. Wherein the analysis module 522 is electrically connected to the receiving module 511.
The monitoring module 521 may be configured to monitor the current carrier concentration in the drift region 12 in real time when the insulated gate bipolar transistor is turned off, and send the current carrier concentration to the analysis module 522.
It will be appreciated that since the monitoring module 521 is required to monitor the current carrier concentration in the drift region 12 in real time, the monitoring module 521 needs to be disposed in the drift region 12. In a specific implementation process, in order to ensure accuracy of the current carrier concentration monitored by the monitoring module 521, the embedding depth of the monitoring module 521 in the drift region 12 is 2 um-4 um, so that the monitoring module 521 is located at a central position of the drift region 12, and the carrier concentration at the central position may reflect the carrier concentration in the whole drift. It should be noted that, the embedding depth of the monitoring module in the drift region may be adjusted accordingly according to the depth of the drift region, so that the monitoring module is located at the center of the drift region. That is, the embedding depths of the monitoring modules corresponding to the drift regions with different depths are different.
It should be noted that the monitoring points of the monitoring module 521 in the drift region 12 may be one or more. In a specific implementation process, the number of monitoring points of the monitoring module 521 in the drift region 12 may be set according to practical situations, and may reflect the carrier concentration in the whole drift, without performing global monitoring on the drift region 12.
The analysis module 522 may be configured to analyze the current carrier concentration provided by the monitoring module 521, and determine a current gear corresponding to the current carrier concentration. Specifically, a first relationship mapping table between the current carrier concentration and the current gear may be first established in the analysis module 522. After the current carrier concentration is obtained, the current gear corresponding to the current carrier concentration can be directly determined according to the current carrier concentration and the first relation mapping table.
For example, the carrier concentration can be divided into A, B, C, D four gears, and when the carrier concentration is above 100 atoms/cm 3, the carrier belongs to the A gear; when the carrier concentration is above 70-100 atoms/cm < 3 >, the carrier belongs to the B grade; when the carrier concentration is above 40-70 atoms/cm < 3 >, the carrier belongs to C grade; when the carrier concentration is 0-40 atoms/cm < 3 >, the carrier belongs to the D grade. Wherein A > B > C > D.
The receiving module 511 may be configured to determine the extraction rate of the carriers according to the current gear determined by the analyzing module 522. Specifically, a second relationship mapping table between the current gear and the extraction rate may be preset in the receiving module 511, and after the current gear is obtained, the extraction rate of the carriers may be determined according to the second relationship mapping table and the current gear.
For example, the extraction rate corresponding to the four steps A, B, C, D may be preset in the receiving module 511 to be a, b, c, d in sequence. Wherein a > b > c > d.
The control module 512 may extract carriers in the drift region 12 according to the carrier extraction rate determined by the receiving module 511, until the current carrier concentration in the drift region 12 returns to zero.
It should be noted that, in the carrier extraction process, the carrier extraction rate may be adjusted accordingly according to the current carrier concentration in the drift region 12. For example, when the current carrier concentration is reduced from a-range to B-range, the carrier extraction rate may be reduced from a to B. When the current carrier concentration is reduced from B-range to C-range, the carrier extraction rate may be reduced from B to C.
In a specific implementation process, the control module 512 extracts carriers in the drift region 12 at different rates according to the current carrier concentration, so that the carrier concentration in the drift region 12 can be timely consumed when the insulated gate bipolar transistor is turned off, the turn-off rate of the device is improved, and the turn-off loss of the device is reduced. And voltage oscillation when the device is turned off can be reduced, and the reverse safe working area of the device is improved.
The dielectric layer 40 is disposed between the sensing layer 50 and the metal layer 30, and between the sensing layer 50 and the insulating layer 20. The material of the dielectric layer 40 may be a gate oxide material such as silicon oxide, or may be a high-K dielectric material, for example, may include at least one of hafnium oxide, aluminum oxide, zirconium oxide, and lanthanum oxide, and may have a single-layer or multi-layer structure.
In summary, the insulated gate bipolar transistor provided in the embodiments of the present application includes a substrate 10, an insulating layer 20, a metal layer 30, a dielectric layer 40 and a sensing layer 50, where at least two gate structures 11 and a drift region 12 disposed between two adjacent gate structures 11 are disposed in the substrate 10; the insulating layer 20 is disposed on the substrate 10; the metal layer 30 is disposed on the insulating layer 20; the sensing layer 50 is disposed on the metal layer 30, the sensing layer 50 includes a transmission unit 51 and a sensing unit 52, the transmission unit 51 passes through the insulating layer 20 and the metal layer 30 to be connected with the substrate 10, and the sensing unit 52 passes through the insulating layer 20, the metal layer 30 and a part of the substrate 10 to extend into the drift region 12; the dielectric layer 40 is disposed between the sensing layer 50 and the metal layer 30, and between the sensing layer 50 and the insulating layer 20. When the insulated gate bipolar transistor provided by the scheme is turned off, the current carrier concentration in the drift region 12 can be analyzed through the sensing unit 52 to determine the current gear corresponding to the current carrier concentration, then the sensing unit 52 determines the extraction rate of the carriers according to the current gear, and extracts the carriers in the drift region 12 according to the extraction rate, so that the carrier concentration in the drift region 12 is reset to zero, and the turn-off loss of the insulated gate bipolar transistor is reduced.
As shown in fig. 6, the embodiment of the present application further provides a carrier concentration control method, which may be applied to the insulated gate bipolar transistor in the above embodiment, and the carrier concentration control method may include:
101. when the insulated gate bipolar transistor is turned off, the current carrier concentration in the drift region is obtained;
102. analyzing the current carrier concentration to obtain an analysis result;
103. determining the extraction rate of carriers according to the analysis result;
104. and extracting the current carrier concentration in the drift region until the current carrier concentration in the drift region is zeroed according to the extraction rate.
It should be noted that, in this embodiment, the meaning of the noun is the same as that of the noun in the above-mentioned insulated gate bipolar transistor embodiment, and specific implementation details may be described in the above-mentioned embodiment, which is not described in detail.
In summary, the current gear corresponding to the current carrier concentration can be determined by analyzing the current carrier concentration in the drift region, then the extraction rate of the carrier is determined according to the current gear, and the carrier in the drift region is extracted according to the extraction rate, so that the carrier concentration in the drift region is zeroed, and the turn-off loss of the insulated gate bipolar transistor is reduced.
The insulated gate bipolar transistor and the carrier concentration control method thereof provided by the application are respectively described in detail, and specific examples are applied to illustrate the principles and the implementation modes of the application, and the description of the above examples is only used for helping to understand the core ideas of the application; meanwhile, those skilled in the art will have variations in the specific embodiments and application scope in light of the ideas of the present application, and the present description should not be construed as limiting the present application in view of the above.

Claims (6)

1. An insulated gate bipolar transistor, comprising:
the semiconductor device comprises a substrate, wherein at least two grid structures and a drift region arranged between two adjacent grid structures are arranged in the substrate;
an insulating layer disposed on the substrate;
the metal layer is arranged on the insulating layer;
the sensing layer is arranged on the metal layer, the sensing layer comprises a transmission unit and an induction unit, the transmission unit is connected with the substrate through the insulating layer and the metal layer, and the induction unit extends into the drift region through the insulating layer, the metal layer and part of the substrate;
the sensing unit comprises a monitoring module and an analysis module, the transmission unit comprises a receiving module and a control module, the analysis module is respectively and electrically connected with the monitoring module and the receiving module, the receiving module is electrically connected with the control module, the monitoring module is used for monitoring the current carrier concentration in the drift region in real time when the insulated gate bipolar transistor is turned off and sending the current carrier concentration to the analysis module, the analysis module is used for analyzing the previous carrier concentration and determining the current gear corresponding to the current carrier concentration, the receiving module is used for determining the extraction rate of the carriers according to the current gear, and the control module is used for extracting the carriers in the drift region according to the carrier extraction rate until the current carrier concentration in the drift region returns to zero and stops extracting;
the dielectric layer is arranged between the sensing layer and the metal layer and between the sensing layer and the insulating layer.
2. The insulated gate bipolar transistor of claim 1 wherein said monitor module is located within said drift region.
3. The insulated gate bipolar transistor of claim 2 wherein the monitor module has an embedded depth of 2um to 4um in the drift region.
4. The insulated gate bipolar transistor of claim 1 wherein said metal layer comprises gate metal and emitter metal disposed in spaced apart relation.
5. The insulated gate bipolar transistor of claim 1 wherein the gate structure comprises gate polysilicon and a gate oxide layer disposed around the gate polysilicon.
6. A carrier concentration control method, characterized in that the carrier concentration control method is applied to the insulated gate bipolar transistor according to any one of claims 1 to 5, comprising:
when the insulated gate bipolar transistor is turned off, the current carrier concentration in the drift region is obtained;
analyzing the current carrier concentration to obtain an analysis result;
determining the extraction rate of carriers according to the analysis result;
and extracting the current carrier concentration in the drift region until the current carrier concentration in the drift region is zeroed according to the extraction rate.
CN202310256833.3A 2023-03-17 2023-03-17 Insulated gate bipolar transistor and carrier concentration control method thereof Active CN116072721B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202310256833.3A CN116072721B (en) 2023-03-17 2023-03-17 Insulated gate bipolar transistor and carrier concentration control method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202310256833.3A CN116072721B (en) 2023-03-17 2023-03-17 Insulated gate bipolar transistor and carrier concentration control method thereof

Publications (2)

Publication Number Publication Date
CN116072721A CN116072721A (en) 2023-05-05
CN116072721B true CN116072721B (en) 2023-06-30

Family

ID=86178746

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202310256833.3A Active CN116072721B (en) 2023-03-17 2023-03-17 Insulated gate bipolar transistor and carrier concentration control method thereof

Country Status (1)

Country Link
CN (1) CN116072721B (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014187071A (en) * 2013-03-21 2014-10-02 Shindengen Electric Mfg Co Ltd Igbt and method for manufacturing igbt
CN106206701A (en) * 2015-05-29 2016-12-07 英飞凌科技股份有限公司 Control the IGBT of reversely conduction

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2526960B2 (en) * 1988-01-11 1996-08-21 日本電装株式会社 Conduction modulation type MOSFET
KR101259895B1 (en) * 2011-12-29 2013-05-02 주식회사 동부하이텍 Lateral insulated-gate bipolar transistor and method for configuring thereof
US9911838B2 (en) * 2012-10-26 2018-03-06 Ixys Corporation IGBT die structure with auxiliary P well terminal
CN104701362B (en) * 2015-03-23 2018-01-02 东南大学 A kind of trench isolations landscape insulation bar double-pole-type transistor
US10818785B2 (en) * 2017-12-04 2020-10-27 Ecole Polytechnique Federale De Lausanne (Epfl) Sensing device for sensing minor charge variations
JP7068981B2 (en) * 2018-09-25 2022-05-17 三菱電機株式会社 Semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014187071A (en) * 2013-03-21 2014-10-02 Shindengen Electric Mfg Co Ltd Igbt and method for manufacturing igbt
CN106206701A (en) * 2015-05-29 2016-12-07 英飞凌科技股份有限公司 Control the IGBT of reversely conduction

Also Published As

Publication number Publication date
CN116072721A (en) 2023-05-05

Similar Documents

Publication Publication Date Title
US9240469B2 (en) Transverse ultra-thin insulated gate bipolar transistor having high current density
CN103413824B (en) A kind of RC-LIGBT device and preparation method thereof
CN106653836A (en) Insulated gate bipolar transistor device with low conduction voltage drop, and manufacturing method for insulated gate bipolar transistor device
CN103094121B (en) A kind of method be used for producing the semiconductor devices
CN101330101A (en) Semiconductor device and manufacturing method thereof
CN101826552A (en) Non-punch-through deep trench IGBT with field stop structure and manufacturing method thereof
CN106252397B (en) Semiconductor devices with reduced emitter efficiency
CN107170816B (en) A kind of landscape insulation bar double-pole-type transistor
CN107195678B (en) A kind of superjunction IGBT of carrier storage enhancing
JP2003318399A (en) Semiconductor device and manufacturing method therefor
CN109119463A (en) A kind of lateral trench type MOSFET element and preparation method thereof
CN105932055A (en) Plane gate IGBT and manufacturing method therefor
CN116072721B (en) Insulated gate bipolar transistor and carrier concentration control method thereof
CN104681646A (en) Silicon carbide embedded electrode planar photoconductive switch and manufacture method thereof
CN105814693B (en) The manufacturing method of semiconductor device and semiconductor device
CN103745996A (en) Lateral power device with partially insulated buried layer and manufacturing method
CN104253050B (en) A kind of manufacture method of grooved lateral MOSFET device
CN115548110B (en) Semiconductor device and method for manufacturing the same
CN108010964A (en) A kind of IGBT device and manufacture method
CN107180874A (en) A kind of deep trouth superjunction DMOS devices of accumulation type
CN101819948A (en) CMOS VLSI integrated manufacturing method for longitudinal channel SOI LDMOS
CN112435928A (en) Shielding gate power device and preparation method thereof
CN105655401A (en) Semiconductor component with field electrode between adjacent semiconductor fins and method for producing the same
CN106409903A (en) Multi-trench semiconductor devices
CN204011433U (en) Power semiconductor

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant