CN116054823A - Analog frequency division low-phase noise frequency source circuit - Google Patents

Analog frequency division low-phase noise frequency source circuit Download PDF

Info

Publication number
CN116054823A
CN116054823A CN202310345131.2A CN202310345131A CN116054823A CN 116054823 A CN116054823 A CN 116054823A CN 202310345131 A CN202310345131 A CN 202310345131A CN 116054823 A CN116054823 A CN 116054823A
Authority
CN
China
Prior art keywords
frequency
module
signal
mixer
phase noise
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202310345131.2A
Other languages
Chinese (zh)
Inventor
刘国超
刘畅
王明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Chengdu Weibin Technology Co ltd
Original Assignee
Chengdu Weibin Technology Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Chengdu Weibin Technology Co ltd filed Critical Chengdu Weibin Technology Co ltd
Priority to CN202310345131.2A priority Critical patent/CN116054823A/en
Publication of CN116054823A publication Critical patent/CN116054823A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/185—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using a mixer in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

The invention relates to the technical field of radio frequency microwaves, in particular to an analog frequency division low-phase noise frequency source circuit which comprises a reference source module, a first mixer module, a first filter module, a voltage-controlled oscillator module, a first power divider module, a first amplifier module and a frequency divider module. By using the second mixer module and the frequency multiplier module, the phase shifter module can realize the frequency division effect functionally, and the additional phase noise is low compared with the traditional digital frequency divider, so that the phase noise of the whole loop can be reduced.

Description

Analog frequency division low-phase noise frequency source circuit
Technical Field
The invention relates to the technical field of radio frequency microwaves, in particular to an analog frequency division low-phase noise frequency source circuit.
Background
The low phase noise frequency source is an important component in the rf microwave circuit, and various rf microwave systems need a stable reference source, and the low phase noise frequency source clearly plays an important role in the reference frequency source. The existing low-phase noise frequency source shown in fig. 1 is mostly formed by a constant-temperature crystal oscillator with low phase noise, a phase frequency detector, a loop filter, a voltage-controlled oscillator, an amplifier, a power divider and a filter, and the low-phase noise frequency source can be realized by using a phase-locked loop circuit, but lower phase noise and higher spurious suppression are difficult to realize. The performance of the frequency source seriously affects the performance index of the electronic equipment because the current high-performance radio frequency transceiver component, 5G mobile communication and the like are difficult to meet the requirements.
The low phase noise frequency source has lower phase noise than the conventional frequency source, so that the signal to noise ratio can be optimized, the receiving sensitivity can be improved, and the EVM value can be optimized. The most important technical method of the low-phase noise frequency source is frequency synthesis technology, and the frequency synthesis technology synthesizes new frequency by a series of frequency conversion modes such as frequency mixing, frequency multiplication or frequency division.
The low-phase-noise frequency source circuit commonly used in the market at present comprises a sampling phase-locked medium oscillator, an externally-inserted mixing phase-locked loop, a high-speed DAC and the like, but the pursuit of the low-phase-noise frequency source tends to complicate the circuit design and make debugging difficult.
Chinese patent publication No. CN208479596U discloses an ultra-low phase noise wideband frequency source, in which the phase-locked technology is improved by the combination of a phase discriminator, an operational amplifier, a voltage-controlled oscillator and a filter to generate an ultra-low phase noise wideband frequency source signal, but the input frequency of the conventional digital phase discriminator is high, and the final output is affected by additional phase noise during the phase discrimination processing.
Disclosure of Invention
The present invention addresses the above problems by providing an analog frequency-divided low-phase noise frequency source circuit.
The technical scheme adopted is that the analog frequency division low-phase noise frequency source circuit comprises a reference source module, a first mixer module, a first filter module, a voltage-controlled oscillator module, a first power divider module, a first amplifier module and a frequency divider module;
the reference source module outputs a reference signal Fs;
the first mixer module receives a reference signal Fs and performs phase discrimination;
the first filter module filters the high-frequency signal output by the first mixer module to obtain a stable tuning voltage signal;
the voltage-controlled oscillator module converts the tuning voltage signal into a frequency signal;
the first power divider module divides the frequency signal output by the voltage-controlled oscillator module into two paths of frequency signals, namely a frequency signal Fo and a frequency signal F1;
the first amplifier module amplifies the frequency signal F1 to form an amplified signal F2;
the frequency divider module reduces phase noise of the amplified signal F2 and then transmits the amplified signal F2 to the first mixer module.
Further, the frequency signal Fo and the frequency signal F1 have the same frequency.
Optionally, the frequency divider module includes a second filter module, a second mixer module, a third filter module, a second amplifier module, a second power divider module, a frequency multiplier module, and a phase shifter module.
Optionally, the second filter module receives the amplified signal F2 sent by the first amplifier module, and filters out spurious harmonics to obtain a pure signal F3.
Further, the local oscillator input end of the second mixer module receives the clean signal F3, and outputs a frequency signal F4 from the radio frequency end of the second mixer module.
Further, the third filter module receives the frequency signal F4, and filters the intermodulation signal generated by the second mixer module in the frequency signal F4 to obtain a clean signal F5.
Further, the second amplifier module amplifies the clean signal F5 to form an amplified signal F6, and the second power divider module receives the amplified signal F6 and divides the amplified signal F6 into two frequency signals, which are a frequency signal F7 and a frequency signal F8.
Optionally, the frequency multiplier module receives the frequency signal F8 and multiplies the frequency signal F9, and the phase shifter module receives the frequency signal F9, changes the phase of the frequency signal to form a frequency signal F10, and sends the frequency signal F10 to the second mixer module.
Optionally, the frequency signal F4 and the clean signal F3 satisfy the following relationship:
F4=F3/(N+1)
wherein N is the frequency multiplication times of the frequency multiplier module.
Further, the local oscillator input end of the first mixer module receives the reference signal Fs, and the radio frequency input end of the first mixer module receives the frequency signal F7, and performs feedback phase discrimination.
The beneficial effects of the invention at least comprise one of the following;
1. the first mixer module is used by simulating the phase discriminator, and the mixer module has lower additional phase noise than the digital phase discriminator, so that the output phase noise can be lower, and the phase discriminator has higher phase discrimination frequency than the input frequency of the traditional digital phase discriminator, so that the phase discrimination frequency can be improved to reduce the phase noise;
2. by using the second mixer module, the frequency multiplier module and the phase shifter module, the frequency division effect is realized functionally, and compared with the traditional digital frequency divider, the phase noise is low, so that the phase noise of the whole loop can be reduced;
3. by replacing the voltage controlled oscillator with a dielectric oscillator, far-end phase noise can be reduced.
Drawings
FIG. 1 is a circuit diagram of a conventional low phase noise frequency source;
FIG. 2 is a circuit diagram of a low phase noise frequency source;
FIG. 3 is a diagram showing the phase noise contrast of the conventional digital divide-by-two divider and the digital divide-by-two divider according to the present application;
FIG. 4 is a Leeson model of feedback oscillator noise;
FIG. 5 is a model of an analog frequency divider used in this patent;
Detailed Description
Other advantages and effects of the present invention will become apparent to those skilled in the art from the following disclosure, which describes the embodiments of the present invention with reference to specific examples. The invention may be practiced or carried out in other embodiments that depart from the specific details, and the details of the present description may be modified or varied from the spirit and scope of the present invention. It should be noted that the following embodiments and features in the embodiments may be combined with each other without conflict.
It should be noted that the illustrations provided in the following embodiments merely illustrate the basic concept of the present invention by way of illustration, and only the components related to the present invention are shown in the drawings and are not drawn according to the number, shape and size of the components in actual implementation, and the form, number and proportion of the components in actual implementation may be arbitrarily changed, and the layout of the components may be more complicated.
As shown in fig. 2, an analog frequency-division low-phase-noise frequency source circuit includes a reference source module, a first mixer module, a first filter module, a voltage-controlled oscillator module, a first power divider module, a first amplifier module, and a frequency divider module;
the reference source module outputs a reference signal Fs;
the first mixer module receives a reference signal Fs and performs phase discrimination;
the first filter module filters the high-frequency signal output by the first mixer module to obtain a stable tuning voltage signal;
the voltage-controlled oscillator module converts the tuning voltage signal into a frequency signal;
the first power divider module divides the frequency signal output by the voltage-controlled oscillator module into two paths of frequency signals, namely a frequency signal Fo and a frequency signal F1;
the first amplifier module amplifies the frequency signal F1 to form an amplified signal F2;
the frequency divider module reduces phase noise of the amplified signal F2 and then transmits the amplified signal F2 to the first mixer module.
The purpose of this design is that the first mixer module is used by simulating a phase discriminator, and the mixer module has lower additional phase noise than a digital phase discriminator, so that the output phase noise can be lower, and the phase discriminator has higher phase frequency than the input frequency of the traditional digital phase discriminator, so that the phase discriminator can be improved to reduce the phase noise.
In a specific implementation, the frequency signal Fo and the frequency signal F1 are the same frequency.
Meanwhile, the frequency divider module comprises a second filter module, a second mixer module, a third filter module, a second amplifier module, a second power divider module, a frequency multiplier module and a phase shifter module.
The second filter module receives the amplified signal F2 transmitted by the first amplifier module and filters out spurious harmonics to obtain a pure signal F3.
The local oscillator input end of the second mixer module receives the clean signal F3 and outputs a frequency signal F4 from the radio frequency end of the second mixer module.
The third filter module receives the frequency signal F4 and filters the intermodulation signal generated by the second mixer module in the frequency signal F4 to obtain a clean signal F5.
The second amplifier module amplifies the clean signal F5 to form an amplified signal F6, and the second power divider module receives the amplified signal F6 and divides the amplified signal F6 into two paths of frequency signals, namely a frequency signal F7 and a frequency signal F8.
The frequency multiplier module receives the frequency signal F8, multiplies the frequency signal F9, and the phase shifter module receives the frequency signal F9, changes the phase of the frequency signal F9 to form a frequency signal F10, and transmits the frequency signal F10 to the second mixer module.
The local oscillator input end of the first mixer module receives the reference signal Fs, the radio frequency input end of the first mixer module receives the frequency signal F7, and feedback phase discrimination is carried out.
The purpose of this design is to achieve the effect of frequency division functionally by using the second mixer module and the frequency multiplier module, the phase shifter module, and thus the phase noise of the whole loop can be reduced as well, compared to the conventional digital frequency divider with low additional phase noise.
In the whole circuit structure, the specific connection relation among the modules is as follows:
the mixer modules are two in total, the first mixer module is used as an analog phase discriminator to replace a digital phase-frequency discriminator in a traditional digital phase-locked loop, and the intermediate frequency output end of the first mixer module is connected with the input end of the first filter module. The radio frequency input end of the first mixer module is connected with the output end of the second power divider module. The second mixer module is used as a frequency divider to replace a digital frequency divider in a traditional digital phase-locked loop, and the local oscillation input end of the second mixer module is connected with the output end of the second filter module. The intermediate frequency output end of the second mixer module is connected with the input end of the third filter module. The radio frequency input of the second mixer module is connected to the output of the phase shifter module.
And for the filter module part, the filter modules are three in total, the first filter module is a loop filter, the intermediate frequency output end of the first mixer module is connected with the input end of the first filter module, and the output end of the first filter module is connected with the input end of the voltage-controlled oscillator module. The second filter module is a band-pass filter, and the output end of the first amplifier module is connected with the input end of the second filter module. The third filter module is a band-pass filter, the intermediate frequency output end of the second mixer module is connected with the input end of the third filter module, and the output end of the third filter module is connected with the input end of the second amplifier module.
The output end of the voltage-controlled oscillator module is connected with the input end of the first power divider module, wherein in a specific implementation scene, the voltage-controlled oscillator is replaced by a dielectric oscillator, so that far-end phase noise can be reduced.
The power divider module comprises a first power divider module and a second power divider module, wherein the first output end of the first power divider module outputs final frequency, a frequency signal Fo is output, and the second output end of the first power divider module is connected with the input end of the first amplifier module. The input end of the second power divider module is connected with the output end of the second amplifier module, the first output end of the second power divider module is connected with the radio frequency input end of the first mixer module, and the second output end of the second power divider module is connected with the input end of the frequency multiplier module.
For the amplifier module part, the amplifier modules are two in total and are a first amplifier module and a second amplifier module respectively, the input end of the first amplifier module is connected with the second output end of the first power divider module, and the output end of the first amplifier module is connected with the input end of the second filter module. The input end of the second amplifier module is connected with the output end of the third filter module, and the output end of the second amplifier module is connected with the input end of the second power divider module.
The input end of the frequency multiplier module is connected with the second output end of the second power divider module, and the output end of the frequency multiplier module is connected with the input end of the phase shifter module. The output end of the phase shifter module is connected with the radio frequency input end of the second mixer module.
The working principle of the whole circuit is as follows:
according to the basic phase-locked loop circuit, an input signal of a reference source module is input to a local oscillation input end of a first mixer module, then the local oscillation input end and a radio frequency input end of the first mixer are subjected to internal analog phase discrimination, when phases of the input signal and the local oscillation input end are not constant, an intermediate frequency output end of the first mixer module can generate a high-frequency signal to enter the first filter module, the first filter module filters the high-frequency signal, further generates a control pure control voltage to be linearly related to an output frequency of the voltage-controlled oscillator module, the control voltage is divided into two paths through a first power divider module, the first path becomes final frequency output, the second path is subjected to power amplification through the first amplifier module, then enters the second mixer module through the second filter module, at the moment, the frequency of a feedback signal is subjected to frequency division through the second mixer module and a third filter module, the second amplifier module, the second power divider module, the frequency multiplier module and the phase shifter module, the frequency divider is formed on functions, the frequency divider is further generated, the frequency-divided frequency signal is fed back to the second mixer module, the frequency divider module, the frequency is further, the frequency-divided frequency signal is further fed back to the second mixer module, the frequency divider module is locked, the frequency is stable, and the frequency is locked, and the phase difference is stable, and the frequency is locked, and the input to the frequency of the local oscillation signal is stable, and the phase stable.
As shown in fig. 2, taking double frequency as an example, the reference source module C1 outputs a reference signal Fs, fs enters the local oscillator input end of the first mixer module U1, the first mixer module U1 performs phase discrimination by inputting the signal Fs at the local oscillator end and feeding back the input signal F7 at the radio frequency end, the high-frequency signal generated by the phase discriminator is filtered through the first filter module L1, that is, the loop filter to form a stable tuning voltage to the voltage-controlled oscillator module U2, the voltage-controlled oscillator converts the voltage signal into a frequency signal, then the frequency signal is divided into two paths of identical frequency signals Fo and F1 by the first power divider module U3, one path of signal Fo is directly output, the other path of signal F1 is amplified by the first amplifier module U4 to form an F2 signal to enter the second filter module L2, the second filter module L2 can filter the amplified spurious harmonics and the like to form a pure F3 signal, the pure F3 signal enters the local oscillation input end of the second mixer module U5, a frequency signal F4 related to the local oscillation input end of the mixer is formed through the frequency regeneration technology of the mixer, then the signal F4 of the radio frequency output port of the second mixer module U5 filters the intermodulation signal generated by the mixer through the third filter module L3 to form the pure signal F5, the pure signal is amplified through the second amplifier module U6 and enters the second power divider module U7, the second power divider module U7 divides the input signal F6 into two paths of models F7 and F8 with the same frequency power, the frequency of the F8 signal is multiplied through the frequency multiplier module U8, the frequency of the frequency multiplication added into the frequency multiplier is 2, the frequency output by the signal F9 is twice the input frequency of the signal F8, then the phase change is performed through the phase shifter module U9 to form a signal F10, the frequency input-output relationship of the second mixer module U5 is as follows:
F4=F3/(N+1)
n is the frequency multiplication number of the frequency multiplier module U8, where n=2, and the mixer, the frequency multiplier, the filter, the phase shifter, and the like form a 3-frequency divider, and at this time, the frequency relationship of the signals is as follows:
F3=3F4=3F5=3F6=3F7=3F8
F9=F10=2F8
and then the signal F7 enters a radio frequency port of the first mixer module U1 for feedback phase discrimination, the tuning voltage of the voltage-controlled oscillator module is changed through negative feedback loop adjustment, the output frequency Fo of the voltage-controlled oscillator module is changed, the feedback signal frequency F7 of the second power divider module is changed until the frequency of the F7 is the same as the frequency of the Fs, the phase difference is constant, the frequency source loop is locked, and the voltage-controlled oscillator module outputs a stable signal Fo with low phase noise.
The noise floor of a traditional phase-locked loop can be estimated by the following formula in an analog frequency-division low-phase noise frequency source circuit:
Figure SMS_1
Figure SMS_2
the noise floor is the phase-locked loop;
Figure SMS_3
a phase noise floor for the phase detector;
Figure SMS_4
is phase discrimination frequency;
Figure SMS_5
is the frequency of the voltage controlled oscillator output.
Thus, the higher the phase discrimination frequency, the smaller the loop division ratio, the better the phase noise in the phase-locked loop, while the higher the phase discrimination frequency can also reduce the reference spurs. The frequency mixer is introduced as an analog phase discriminator, namely the frequency division ratio of a loop is directly reduced, meanwhile, the characteristic that the additional phase noise of the frequency mixer is low is utilized, so that the phase noise of the whole frequency source circuit is lower, the limitation of the input frequency of the traditional digital phase discriminator is avoided, the phase noise in the loop is further reduced, the traditional digital frequency divider also has the limiting effect on the phase noise in the loop because the additional phase noise and the bottom noise are not low enough, the bottom noise of the digital frequency divider formed by the D trigger is only about-160 dBc, and the frequency divider formed by the frequency mixer, the frequency multiplier, the filter and the phase shifter can continuously reduce the additional phase noise and the noise bottom of the frequency divider, and the minimum frequency divider can reach-175 dBc. The specific analysis is as follows: as shown in fig. 4, which shows a feedback oscillator Leeson model, the single sideband phase noise spectral density of the oscillator output can be expressed by:
Figure SMS_6
wherein:
Figure SMS_9
is the single sideband phase noise spectral density; />
Figure SMS_12
Is the double sideband phase noise spectral density; />
Figure SMS_14
Is the input equivalent noise spectral density; />
Figure SMS_8
Is the carrier frequency; />
Figure SMS_11
Is the corner frequency; />
Figure SMS_15
Is deviated from carrier frequency>
Figure SMS_17
Is noise figure; ->
Figure SMS_7
Is Boltzmann constant; ->
Figure SMS_10
Absolute temperature; ->
Figure SMS_13
Is signal power; ->
Figure SMS_16
Is the on-load quality factor of the resonant tank. Thus reducing the noise figure and increasing the loaded q of the resonant tank increases the phase noise. When an oscillatorAfter the output signal passes through the ideal frequency divider N, the phase noise power spectral density is expressed as follows by logarithm:
Figure SMS_18
wherein:
Figure SMS_19
is the single sideband phase noise spectrum density output after passing through an ideal N frequency divider; />
Figure SMS_20
Is the single sideband phase noise spectral density; />
Figure SMS_21
Is the frequency division number. Through frequency divider->
Figure SMS_22
After the frequency, the phase noise of the crystal oscillator is improved, the theoretical value of the improvement is +.>
Figure SMS_23
. However, for the low-phase noise signal, the noise floor of the phase noise can not reach below-170 dBc through digital frequency division, so that the conventional digital frequency divider can only be used in the occasion with low phase noise requirement. The frequency divider is formed by the frequency mixer, the frequency multiplier, the filter and the phase shifter, so that the additional phase noise and the noise floor of the frequency divider can be continuously reduced, and the minimum frequency can reach-175 dBc.
Analysis the analog frequency divider model used in this patent is shown in fig. 5 below, and the mixer output after frequency selection by the filter can be expressed as
Figure SMS_24
Since the amplifier simply amplifies the power of the signal, no new frequency is introduced. Therefore, after the signal passes through the power divider, one path is used as output, and the other path is used as return signal to be input to the frequency multiplier after the phase adjustment of the phase shifter. Obviously, obtained after frequency multiplicationThe signal being its local oscillator signal for the mixer
Figure SMS_25
The local oscillator signal LO and the radio frequency input RF together reproduce the IF, and thus the total output frequency can be expressed as:
Figure SMS_26
Figure SMS_27
is the frequency output by the intermediate frequency port of the mixer;
Figure SMS_28
is the mixer radio frequency port frequency;
Figure SMS_29
the frequency multiplication times of the frequency multiplier;
let RF, LO and IF be expressed as follows, respectively:
Figure SMS_30
wherein the method comprises the steps of
Figure SMS_36
Is the radio frequency input signal of the mixer, +.>
Figure SMS_37
Amplitude of the radio frequency input signal for the mixer, < >>
Figure SMS_44
Frequency corresponding to the radio frequency input signal of the mixer, < >>
Figure SMS_39
For time (I)>
Figure SMS_47
Is the local oscillator input signal of the mixer,
Figure SMS_33
amplitude of local oscillator input signal for mixer, +.>
Figure SMS_42
Frequency corresponding to local oscillator input signal of mixer, +.>
Figure SMS_40
For the phase of the local oscillator input signal of the mixer, < >>
Figure SMS_48
Is the intermediate frequency output signal of the mixer, +.>
Figure SMS_31
For the amplitude of the intermediate frequency output signal of the mixer, < >>
Figure SMS_41
For the frequency corresponding to the intermediate frequency output signal of the mixer,/-, for the frequency corresponding to the intermediate frequency output signal of the mixer>
Figure SMS_38
Is the phase of the intermediate frequency output signal of the mixer. Since the mixer is nonlinear, the combined frequency of the multiple input signals is also generated during mixing, which is a pair of signals
Figure SMS_43
The generation of (c) may serve an auxiliary role. The amplifier input to phase noise can be seen as the filter in the circuit introducing a hysteresis phase +.>
Figure SMS_32
Is a micro disturbance->
Figure SMS_45
Hysteresis phase introduced by a frequency multiplier>
Figure SMS_34
Is +.>
Figure SMS_46
Since the two disturbances are independent of each other, the phase of the output signal is +.>
Figure SMS_35
All have the effect that the analog divider phase condition needs to be satisfied:
Figure SMS_49
wherein the method comprises the steps of
Figure SMS_50
Representing phase difference>
Figure SMS_51
And->
Figure SMS_52
All representing phase.
The output phase is represented by
Figure SMS_53
Power spectral density of (c):
Figure SMS_54
wherein, the liquid crystal display device comprises a liquid crystal display device,
Figure SMS_55
、/>
Figure SMS_56
and->
Figure SMS_57
Respectively->
Figure SMS_58
、 />
Figure SMS_59
And->
Figure SMS_60
G is the local oscillator signal of the mixerAnd the phase difference of the intermediate frequency signal (ideal mixer is-1), N is the frequency division times, and the ideal mixer (G= -1) can be used for
Figure SMS_61
The power spectral density of (2) is expressed as:
Figure SMS_62
thus, the phase of the phase shifter
Figure SMS_63
In relation to parameter G by adjusting +.>
Figure SMS_64
The maximum output amplitude can be obtained, so that the maximum working bandwidth is obtained, the aim of low-noise frequency division is fulfilled, meanwhile, the starting and stability of the frequency divider can be optimized, and the noise floor is lower than that of the traditional digital frequency divider by more than 10 dBc. The phase noise of the final output frequency can thus continue to be optimised to a lower phase noise than a conventional phase locked loop.
In a specific implementation, the reference source module is a reference source of ultra-low phase noise, the first mixer module is functionally similar to the phase discriminator, and the model is ADE-4+, which is a passive double balanced mixer, the highest phase discriminator frequency is 1GHz, and the first mixer module has lower additional phase noise than the traditional digital phase discriminator.
The operational amplifier chip in the first filter module is ADA4625, and has low voltage noise density. The voltage-controlled oscillator module adopts HMC416, has a good phase noise curve, and has an output frequency of 2.7-3GHz, and when the voltage-controlled oscillator module outputs 3GHz, the frequency offset is 100kHz, and the phase noise is-114 dBc/Hz.
The first power divider module adopts EP2KU+ and has the working frequency of DC-18GHz. The first amplifier module selects GVA-81+ as a working frequency bit DC-6GHz, the gain can reach 10dB at 1GHz, the first amplifier module has ultralow additional phase noise, the frequency offset is 10kHz at the frequency of 2GHz, and the additional phase noise is-171 dBc/Hz. The second filter module is BFCN-3010+, the third filter module is TA0578A, the second mixer module is a passive double-balanced mixer, the model is HMC557A, the input frequency range is 2.5-7GHz, and the frequency conversion loss is 8dB. The second amplifier module is HMC589, has 21dB gain, has input frequency of DC-4GHz, and has ultra-low additional phase noise. ADP-2-10+ is selected as the second power divider module, the working frequency range is 0.05-1GHz, and the insertion loss is only 0.4dB. The frequency multiplier is KC2-11+, the output frequency is 1-2.2GHz, the frequency conversion loss is 10dB, the phase shifter is a phase shifting network built by a resistor capacitor, and the phase shifting angle is regulated by changing the resistor capacitor value.
As shown in fig. 3, comparing a frequency divider with the actual test of the frequency divider built by the mixer, it is found that the same frequency divider formed by using the mixer module of the present invention has lower noise floor when dividing the 1GHz signal into 500MHz by the frequency divider.
Finally, it should be noted that: the foregoing description of the preferred embodiments of the present invention is not intended to be limiting, but rather, it will be apparent to those skilled in the art that the foregoing description of the preferred embodiments of the present invention can be modified or equivalents can be substituted for some of the features thereof, and any modification, equivalent substitution, improvement or the like that is within the spirit and principles of the present invention should be included in the scope of the present invention.

Claims (10)

1. The analog frequency division low-phase noise frequency source circuit is characterized by comprising a reference source module, a first mixer module, a first filter module, a voltage-controlled oscillator module, a first power divider module, a first amplifier module and a frequency divider module;
the reference source module outputs a reference signal Fs;
the first mixer module receives a reference signal Fs and performs phase discrimination;
the first filter module filters the high-frequency signal output by the first mixer module to obtain a stable tuning voltage signal;
the voltage-controlled oscillator module converts the tuning voltage signal into a frequency signal;
the first power divider module divides the frequency signal output by the voltage-controlled oscillator module into two paths of frequency signals, namely a frequency signal Fo and a frequency signal F1;
the first amplifier module amplifies the frequency signal F1 to form an amplified signal F2;
the frequency divider module reduces phase noise of the amplified signal F2 and then transmits the amplified signal F2 to the first mixer module.
2. An analog crossover low phase noise frequency source circuit according to claim 1, wherein the frequency signal Fo and the frequency signal F1 are the same frequency.
3. The analog crossover low phase noise frequency source circuit according to claim 1, wherein the frequency divider module comprises a second filter module, a second mixer module, a third filter module, a second amplifier module, a second power divider module, a frequency multiplier module, and a phase shifter module.
4. An analog crossover low phase noise frequency source circuit according to claim 3, wherein the second filter module receives the amplified signal F2 from the first amplifier module and filters spurious harmonics to obtain a clean signal F3.
5. The analog crossover low phase noise frequency source circuit of claim 4, wherein the local oscillator input of the second mixer module receives the clean signal F3 and outputs the frequency signal F4 from the second mixer module rf side.
6. The analog crossover low-phase noise frequency source circuit according to claim 5, wherein the third filter module receives the frequency signal F4 and filters the intermodulation signal generated by the second mixer module in the frequency signal F4 to obtain the clean signal F5.
7. The analog crossover low-phase noise frequency source circuit according to claim 6, wherein the second amplifier module amplifies the clean signal F5 to form an amplified signal F6, and the second power divider module receives the amplified signal F6 and divides the amplified signal F6 into two frequency signals, namely a frequency signal F7 and a frequency signal F8.
8. The analog crossover low phase noise frequency source circuit according to claim 7, wherein the frequency multiplier module receives the frequency signal F8 and multiplies the frequency signal F9 to form a frequency signal F10 with a phase change of the frequency signal F9, and sends the frequency signal F10 to the second mixer module.
9. The analog divided low phase noise frequency source circuit of claim 8, wherein said frequency signal F4 and clean signal F3 satisfy the following relationship:
F4=F3/(N+1)
wherein N is the frequency multiplication times of the frequency multiplier module.
10. The analog crossover low phase noise frequency source circuit of claim 7, wherein the first mixer module local oscillator input receives the reference signal Fs, the first mixer module radio frequency input receives the frequency signal F7, and performs feedback phase discrimination.
CN202310345131.2A 2023-04-03 2023-04-03 Analog frequency division low-phase noise frequency source circuit Pending CN116054823A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202310345131.2A CN116054823A (en) 2023-04-03 2023-04-03 Analog frequency division low-phase noise frequency source circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202310345131.2A CN116054823A (en) 2023-04-03 2023-04-03 Analog frequency division low-phase noise frequency source circuit

Publications (1)

Publication Number Publication Date
CN116054823A true CN116054823A (en) 2023-05-02

Family

ID=86122219

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202310345131.2A Pending CN116054823A (en) 2023-04-03 2023-04-03 Analog frequency division low-phase noise frequency source circuit

Country Status (1)

Country Link
CN (1) CN116054823A (en)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SU866694A1 (en) * 1978-05-12 1981-09-23 Московский Институт Электронного Машиностроения Frequency divider of harmonic oscillations with countdown of 2:1
US5703514A (en) * 1995-12-21 1997-12-30 Hughes Electronics Digital frequency divider phase shifter
CN105187060A (en) * 2015-07-23 2015-12-23 中国电子科技集团公司第四十一研究所 Phase-locked loop circuit with low-phase noise and implementation method thereof
CN107835014A (en) * 2017-10-25 2018-03-23 北京无线电计量测试研究所 A kind of rf broadband frequency agility frequency source
CN107925413A (en) * 2016-08-05 2018-04-17 亚库蒂尔·约瑟夫斯伯格 Ultralow phase noise frequency synthesizer
CN212935881U (en) * 2021-03-12 2021-04-09 成都好启科技有限公司 Low-phase-noise frequency synthesizer module capable of rapidly setting frequency

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SU866694A1 (en) * 1978-05-12 1981-09-23 Московский Институт Электронного Машиностроения Frequency divider of harmonic oscillations with countdown of 2:1
US5703514A (en) * 1995-12-21 1997-12-30 Hughes Electronics Digital frequency divider phase shifter
CN105187060A (en) * 2015-07-23 2015-12-23 中国电子科技集团公司第四十一研究所 Phase-locked loop circuit with low-phase noise and implementation method thereof
CN107925413A (en) * 2016-08-05 2018-04-17 亚库蒂尔·约瑟夫斯伯格 Ultralow phase noise frequency synthesizer
CN107835014A (en) * 2017-10-25 2018-03-23 北京无线电计量测试研究所 A kind of rf broadband frequency agility frequency source
CN212935881U (en) * 2021-03-12 2021-04-09 成都好启科技有限公司 Low-phase-noise frequency synthesizer module capable of rapidly setting frequency

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
刘国超: "基于PLL低相噪快捷变频率源的研究与设计", 《中国优秀硕士学位论文全文数据库 信息科技辑》, pages 135 - 905 *
徐林: "5MHz-400MHz低相噪本振源研究与实现", 《中国优秀硕士学位论文全文数据库 信息科技辑》, pages 135 - 766 *

Similar Documents

Publication Publication Date Title
Yu et al. A Single-Chip 125-MHz to 32-GHz Signal Source in 0.18-$\mu $ m SiGe BiCMOS
CN111142078A (en) Radar radio frequency integrated system
CN116170009B (en) Broadband, low phase noise and fine stepping frequency source generating circuit
CN109450445A (en) A kind of variable loop bandwidth frequency synthesizer, system and method
WO2003001692A2 (en) Low leakage local oscillator system
Rong et al. A 0.05-to 10-GHz, 19-to 22-GHz, and 38-to 44-GHz Frequency Synthesizer for Software-Defined Radios in 0.13-$\mu\mbox {m} $ CMOS Process
CN112688686B (en) Miniaturized broadband frequency synthesizer
CN114978156B (en) Method for realizing fine stepping frequency
CN116470909A (en) Low-phase noise fine stepping frequency synthesis circuit and synthesis method thereof
CN117081583B (en) Frequency source for improving phase noise
Liu et al. A 59-to-276-GHz CMOS signal generator using varactor-less VCO and dual-mode ILFD
CN108512548A (en) A kind of broadband frequency of phase locking source device
CN107947790B (en) Broadband fine stepping low-noise frequency source
CN116054823A (en) Analog frequency division low-phase noise frequency source circuit
CN212850458U (en) Broadband local oscillator circuit
CN115720091A (en) Frequency hopping source circuit and electronic system
CN113162617B (en) Low-phase-noise X-band frequency source and modulation method thereof
Iotti et al. A multi-core VCO and a frequency quadrupler for E-Band adaptive-modulation links in 55nm BiCMOS
US8995506B2 (en) Transceiver with sub-sampling based frequency synthesizer
CN111769830A (en) Broadband local oscillation circuit and local oscillation signal generating method
CN113193869A (en) Ultra-low phase noise frequency synthesizer based on sound surface filter
KR101007211B1 (en) Wideband high frequency synthesizer for airborne
Kuo et al. A broadband phase-locked Ka-band single-tuning VCO with reconfigurable loop filters
US7626464B2 (en) Multi-frequency signal source
CN111355451A (en) Up-conversion circuit

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination