CN113193869A - Ultra-low phase noise frequency synthesizer based on sound surface filter - Google Patents
Ultra-low phase noise frequency synthesizer based on sound surface filter Download PDFInfo
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- H—ELECTRICITY
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- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
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Abstract
The invention provides an ultra-low phase noise frequency synthesizer based on a sound surface filter.A microwave signal generated by a constant temperature crystal oscillator is divided into a plurality of paths by a frequency divider, wherein one path is used as a main frequency signal, and the other path is used as a reference clock signal and is output to a direct digital frequency synthesizer to generate a secondary frequency signal; the main frequency signal and the secondary frequency signal are subjected to frequency mixing through a frequency mixer, and the output radio frequency signal is subjected to band-pass filtering through a surface acoustic wave filter to obtain a sum frequency signal; and the sum frequency signal is amplified in power and then sent to a phase discriminator to be compared with the radio frequency signal output by the dielectric oscillator after passing through the frequency divider in phase to obtain an error signal, the output signal of the phase discriminator is input into the voltage control end of the dielectric oscillator through a loop filter, the frequency of the dielectric oscillator is locked to a local oscillator, and finally the required target frequency is obtained. The invention has simple structure, the phase noise is close to the theoretical frequency multiplication noise limit, and the invention is suitable for small and miniaturized microwave atomic clocks.
Description
Technical Field
The invention belongs to the field of microwaves and atomic clocks, and particularly relates to a frequency synthesizer technology which can realize an ultra-low phase noise microwave source and is applied to a miniaturized and miniaturized coherent layout imprisoned (CPT) atomic clock.
Background
Coherent Population Trapping (CPT) based on the quantum interference principle can realize miniaturized atomic clocks and is the only atomic clock for realizing the chip at present. In the application of limited volume, weight and power consumption and requiring precise time, such as a micro-nano satellite, an unmanned aerial vehicle, a portable GNSS receiver, a submarine and the like, the micro-miniature atomic clock is an ideal choice.
At present, the short-term frequency stability of a small Coherent Population Trapping (CPT) atomic clock in the world is 10-11τ-1/2On-chip CPT atomic clock is 10-10τ-1/2The magnitude, in which the phase noise of the microwave is an important influence factor, affects the frequency stability of the atomic clock through the intermodulation effect, which can be specifically expressed as:
wherein f isc、fmRespectively a clock transition frequency and a microwave modulation frequency,
is microwave at frequency deviation 2fmThe power spectral density of the phase noise. To be based on87CPT atomic clock of Rb, clock transition frequency fcAbout 6.83468GHz, microwave modulation frequency fmUsually about 100Hz, to stabilize the short-term frequency of the CPT atomic clock at 10-13τ-1/2In order of magnitude, the phase noise of the microwave needs to be below-100 dBc/Hz @200Hz, which puts high requirements on the phase noise of the microwave.
In the microwave source method for realizing ultra-low phase noise, the scheme based on the photo-generated microwave and the ultra-low temperature sapphire oscillator (CSO) is difficult to be applied to the micro atomic clock because of large volume, high power consumption, complex system and high cost. The microwave source based on the ultra-low noise constant temperature crystal oscillator (OCXO) is a better and feasible solution because of smaller volume, power consumption and weight.
The current microwave frequency synthesizer based on OCXO increases the complexity of the frequency synthesis link in order to achieve lower phase noise. Taking the technical scheme given in the article "a low phase noise microwave frequency synthesis for a high-performance medium capacitor cell atomic clock" as an example, the frequency synthesizer has a complex structure due to the use of multiple filtering amplification and multiple mixing processing, and the introduction of multiple amplifiers can deteriorate the phase noise. The link structure of the frequency synthesizer is optimized for the micro CPT atomic clock, and the phase noise of the micro CPT atomic clock is close to the performance of ideal frequency multiplication, so that the micro CPT atomic clock is necessary to be researched and manufactured.
Disclosure of Invention
In order to solve the problems of complex structure, poor phase noise and the like of the conventional microwave frequency synthesizer based on OCXO, the invention provides an ultra-low phase noise frequency synthesizer based on an acoustic surface filter, which is applied to a Coherent Population Trapping (CPT) atomic clock.
The technical scheme adopted by the invention for solving the technical problems is as follows: an ultra-low phase noise frequency synthesizer based on a sound surface filter comprises a constant temperature crystal oscillator, a frequency divider, a direct digital frequency synthesizer, a frequency mixer, a sound surface band-pass filter, a power amplifier, a phase discriminator, a loop filter, a frequency divider and a dielectric oscillator.
The microwave signal generated by the constant temperature crystal oscillator is divided into a plurality of paths by a frequency divider, wherein one path is used as the frequency f0The other path of the main frequency signal is used as a reference clock signal and output to a direct digital frequency synthesizer to generate a frequency f1A secondary frequency signal of (a); mixing the primary frequency signal and the secondary frequency signal by a mixer, and outputtingThe radio frequency signal is subjected to band-pass filtering by a surface acoustic wave filter to obtain a sum frequency signal; the sum frequency signal is sent to a phase discriminator as a reference signal after passing through a power amplifier, the phase comparison is carried out on the sum frequency signal and a radio frequency signal output by a dielectric oscillator after passing through a frequency divider to obtain an error signal, an output signal of the phase discriminator is input to a voltage control end of the dielectric oscillator through a loop filter, the frequency of the dielectric oscillator is locked to a local oscillator, and finally the required target frequency f is obtaineds。
The constant temperature crystal oscillator adopts a 100MHz constant temperature crystal oscillator.
The microwave signal generated by the constant temperature crystal oscillator also outputs a path of signal through the frequency divider, and a 10MHz standard frequency signal is output through the frequency divider.
Frequency f of said secondary frequency signal1＝fs/N-f0Wherein the frequency division factor N is an integer, take f1Minimum value of f1min＝Min[fs/N-f0]At this time, the frequency division factor takes the optimum value Nopt。
The center frequency of the surface acoustic wave filter is f0+f1Or f0-f1With passband bandwidth less than (f)1/3), out-of-band pair f0，f0+/-2f1Harmonic rejection is greater than 60 dB.
The medium oscillator, the frequency divider, the loop filter and the phase discriminator are replaced by a phase-locked loop chip with a voltage-controlled oscillator.
The invention has the beneficial effects that:
1. the invention can realize frequency synthesis of ultralow phase noise. The frequency synthesizer carries out frequency mixing before radio frequency output, avoids introducing unnecessary frequency, can avoid variable frequency loss at the same time, and increases the power of output frequency signals.
2. Compared with the traditional band-pass filter, the surface acoustic wave band-pass filter can realize accurate filtering of amplitude-frequency characteristics and phase-frequency characteristics of required frequency accuracy, and is narrow in passband width, small in passband fluctuation, low in insertion loss, high in out-of-band rejection, pure in output frequency spectrum and greater than 60dB in harmonic clutter rejection.
3. Simple structure, the whole consumption is lower to have high flexibility. The dielectric oscillator, the frequency divider and the phase discriminator adopted in the structure can be replaced by a phase-locked loop chip with a Voltage Controlled Oscillator (VCO) with extremely small volume and power consumption, so that the power consumption can be further reduced, the frequency stability of the chip atomic clock is improved, and the high-performance chip atomic clock is realized.
Drawings
FIG. 1 shows an application of the present invention87Structural schematic diagram of Rb CPT atomic clock for generating 3.417GHz microwaves based on 100MHz crystal oscillator
Fig. 2 is a schematic diagram of the spectrum of the mixer of the present invention before filtering.
Fig. 3 is a schematic diagram of the spectrum of the mixer of the present invention before filtering.
FIG. 4 is a typical phase noise test chart of 3.417GHz microwave generated by the present invention.
Wherein, 1-constant temperature crystal oscillator (OCXO), 2-frequency divider, 3-N0A frequency divider, a 4-direct digital frequency synthesizer (DDS), a 5-mixer, a 6-surface acoustic band-pass filter (SAW), a 7-power amplifier, an 8-phase detector, a 9-loop filter, a 10-N frequency divider, and an 11-dielectric oscillator.
Detailed Description
The present invention will be further described with reference to the following drawings and examples, which include but are not limited to the following examples, and all techniques realized based on the present disclosure are within the scope of the present invention.
The invention provides an ultra-low phase noise frequency synthesizer based on a sound surface filter, which comprises a 100MHz constant temperature crystal oscillator (OXCO)1, a frequency divider 2 with an input end connected with a 100MHz crystal oscillator signal, a direct digital frequency synthesizer 4 with an input end connected with an output end of the frequency divider, a mixer 5 with an input end connected with an output end of the direct digital frequency synthesizer and an output end of the frequency divider, a sound surface filter (SAW)6 with an input end connected with an output end of the mixer, a power amplifier 7 with an input end connected with an output end of the filter, a phase discriminator 8 with an input end connected with the power amplifier, a loop filter 9 with an input end connected with the phase discriminator, a dielectric oscillator 11 with an input end connected with the loop filter, an N frequency divider 10 with an input end connected with the dielectric oscillator, and an output end of the N frequency divider connected with an input end of the phase discriminator.
The invention generates the main frequency (f) through the OCXO and DDS with ultra-low phase noise0) And a secondary frequency (f)1) Signal, optimally setting the frequency (f) of the secondary frequency signal1min) (ii) a The main frequency signal and the secondary frequency signal are mixed, a sum frequency (or difference frequency) signal is obtained after high-Q value sound surface band-pass filtering, and DRO is locked through a phase discriminator, so that ultra-low phase noise microwave close to an ideal frequency multiplier can be realized.
Wherein the frequency of the secondary frequency signal is f1＝fs/N-f0Wherein the frequency division factor N is an integer, fsTo minimize phase noise of the sub-frequency signal generated by the DDS, f is required to represent the desired target frequency1The minimum is reached; at the same time, f is needed to optimize the phase noise of the mixer output sum (or difference) frequency signal1/(f0+f1) To a minimum, both require f1To a minimum, thus take f1Minimum value of f1min＝Min[fs/N-f0]At this time, the frequency division factor takes the optimal value: n is a radical ofopt。
In the following, a Coherent Population Trapping (CPT) atomic clock based on half-wave modulation (half the clock transition frequency) is taken as an example, as shown in fig. 1, a 100MHz oven controlled crystal oscillator (OXCO) is adopted, a frequency divider with an input end connected with a 100MHz crystal oscillator signal, a direct digital frequency synthesizer with an input end connected with an output end of the frequency divider, a mixer with an input end connected with an output end of the direct digital frequency synthesizer and an output end of the frequency divider, a Surface Acoustic Wave (SAW) with an input end connected with an output end of the mixer, a power amplifier with an input end connected with an output end of the filter, a phase discriminator with an input end connected with the power amplifier, a loop filter with an input end connected with the phase discriminator, a dielectric oscillator with an input end connected with the loop filter, an N-frequency divider with an input end connected with the dielectric oscillator, and an output end of the N-frequency divider connected with an input end of the phase discriminator.
In this embodiment, an input 100MHz microwave signal (f)0) Is generated by a low-noise 100MHz constant temperature crystal oscillator 1, and is divided into a plurality of paths after passing through a frequency divider 2,wherein the first path is taken as a main frequency signal of 100 MHz; the second path is used as a reference clock signal and output to a direct digital frequency synthesizer (DDS)3 to generate a secondary frequency signal 0.5MHz (f) with modulated and tuned frequency1) Since its frequency is much lower than the reference clock signal (f)1≤f0100), low phase noise can be achieved. The third path is a frequency divider with low phase noise and the frequency division factor is N0＝f0/107And outputting a 10MHz standard frequency signal. The first path of main frequency signal and the second path of secondary frequency signal are respectively connected to a local oscillator and an intermediate frequency port of the frequency mixer 4 for frequency mixing so as to generate a radio frequency signal of 100MHz +0.5MHz, the output radio frequency signal is subjected to high Q value band-pass filtering by a surface acoustic wave filter (SAW)5 to obtain a sum frequency signal, and other signals are effectively filtered. After passing through a low-noise power amplifier 7, the sum frequency signal is sent to a phase discriminator 8 as a reference signal, the phase comparison is carried out on the sum frequency signal and a radio frequency signal of a dielectric oscillator 11 after passing through a frequency divider (the frequency division factor is N)10 to obtain an error signal, the frequency of the dielectric oscillator is locked to a local oscillator after passing through a loop filter 9 and a proportional integral circuit, and finally the required target frequency f is obtaineds3.417 GHz. And within the feedback bandwidth, the phase noise of the microwave signal output by the dielectric oscillator is mainly determined by the local oscillator.
The embodiment adopts f with better phase noise of frequency deviation 100Hz (corresponding to the modulation frequency of an atomic clock) accessory0Local oscillator of 100MHz, for87Rb atom, fs＝3417.34MHz，f1min＝0.51MHz，Nopt34; for the85Rb atom, fs＝3035.7MHz，f1min＝1.19MHz，Nopt15; for the133Cs atom, fs＝4596.3MHz，f1min＝0.08MHz，Nopt46; in the case of the CPT atomic clock using full-wave modulation, compared with the case of half-wave modulation, since the target frequency f is outputsDoubling, f1minInvariable, NoptDoubled.
The invention uses PLL and DRO to carry out frequency multiplication, and PLL carries out phase locking, so that the frequency signal output by DRO is directly synchronized to the filtered mixer output sum frequency (or difference frequency) signal.
The loop filter of the invention performs low-pass filtering on the voltage error signal output by the phase discriminator and then sends the voltage error signal as a control signal to the voltage control end of the dielectric oscillator, so that the frequency of the dielectric oscillator is locked to the local oscillator.
The SAW filter of the present invention is a surface acoustic wave filter, and FIG. 2 is a comparison graph before and after filtering using a surface acoustic wave filter (SAW) using a surface acoustic wave band pass filter having a center frequency f0+f1(or f)0-f1) And the temperature coefficient of the central frequency is smaller (less than or equal to 1 ppm/DEG C), in order to obtain the sum frequency (or difference frequency) component signal output by the mixer and filter other components, the Q value is higher (more than or equal to 100), and the bandwidth of the 3dB passband is far less than f1(less than f)1And/3), the passband fluctuation is small (less than or equal to 1dB), and the out-of-band rejection is large (more than or equal to 60 dB).
The final output signal of the invention is a DRO signal, so under the action of a loop filter, the module output has better clutter suppression performance. The digital frequency divider and the digital phase discriminator with low phase noise base are selected, so that the loop finally outputs lower phase noise which is close to theoretical phase noise, namely the loop is deteriorated according to 20logN on the basis of the phase noise of an input 100.5MHz signal.
The frequency source with low phase noise provided by the embodiment realizes model machine development in a modularized mode, and each component module has an independent structure, can form a complete machine, and can also be used independently. The phase noise instrument APPH20G is used for testing, the output signal achieves the purpose of ultra-low phase noise, and the performance is excellent.
In summary, the 3.417GHz frequency synthesizer system generated by the invention has a simple structure, the phase noise is close to the theoretical frequency multiplication noise limit, and the frequency synthesizer has the characteristics of small stray, high resolution of a frequency table, easiness in debugging and the like, and can be applied to a Coherent Population Trapping (CPT) atomic clock with high performance.
While the present invention has been described in detail with reference to the embodiments shown in the drawings, the present invention is not limited to the above embodiments, and various modifications and alterations can be made by those skilled in the art without departing from the spirit and scope of the claims of the present application.
Claims (4)
1. An ultra-low phase noise frequency synthesizer based on a sound surface filter comprises a constant temperature crystal oscillator, a frequency divider, a direct digital frequency synthesizer, a mixer, a sound surface band-pass filter, a power amplifier, a phase discriminator, a loop filter, a frequency divider and a dielectric oscillator, and is characterized in that a microwave signal generated by the constant temperature crystal oscillator is divided into a plurality of paths through the frequency divider, wherein one path is taken as a frequency f0The other path of the main frequency signal is used as a reference clock signal and output to a direct digital frequency synthesizer to generate a frequency f1A secondary frequency signal of (a); the main frequency signal and the secondary frequency signal are subjected to frequency mixing through a frequency mixer, and the output radio frequency signal is subjected to band-pass filtering through a surface acoustic wave filter to obtain a sum frequency signal; the sum frequency signal is sent to a phase discriminator as a reference signal after passing through a power amplifier, the phase comparison is carried out on the sum frequency signal and a radio frequency signal output by a dielectric oscillator after passing through a frequency divider to obtain an error signal, an output signal of the phase discriminator is input to a voltage control end of the dielectric oscillator through a loop filter, the frequency of the dielectric oscillator is locked to a local oscillator, and finally the required target frequency f is obtaineds。
2. The SAW-based ULP frequency synthesizer according to claim 1, wherein the frequency f of the sub-frequency signal is1＝fs/N-f0Wherein the frequency division factor N is an integer, take f1Minimum value of f1min＝Min[fs/N-f0]At this time, the frequency division factor takes the optimum value Nopt。
3. The SAW-based ULP frequency synthesizer according to claim 1, wherein the SAW center frequency is f0+f1Or f0-f1With passband bandwidth less than (f)1/3), out-of-band pair f0，f0+/-2f1Harmonic rejection is greater than 60 dB.
4. The SAW-based ULP frequency synthesizer of claim 1, wherein the dielectric oscillator, divider, loop filter and phase detector are replaced by a VCO PLL chip.
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| CN115065361A (en) * | 2022-08-19 | 2022-09-16 | 深圳芯盛思技术有限公司 | Frequency synthesizer architecture for optimizing phase noise |
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