CN111142078A - Radar radio frequency integrated system - Google Patents
Radar radio frequency integrated system Download PDFInfo
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- CN111142078A CN111142078A CN201911420398.3A CN201911420398A CN111142078A CN 111142078 A CN111142078 A CN 111142078A CN 201911420398 A CN201911420398 A CN 201911420398A CN 111142078 A CN111142078 A CN 111142078A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
- G01S7/02—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00
- G01S7/28—Details of pulse systems
- G01S7/282—Transmitters
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
- G01S7/02—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00
- G01S7/28—Details of pulse systems
- G01S7/285—Receivers
Abstract
The invention provides a radar seeker system, which comprises a frequency synthesizer and a receiver, wherein the frequency synthesizer is connected with the receiver; the frequency synthesizer provides a complete coherent transmitting excitation signal transmitting excitation coupling signal, a frequency conversion local oscillator signal and a frequency conversion local oscillator coupling signal for the complete machine; the transmitting signal can be subjected to waveform control and pulse modulation according to an instruction sent by the whole machine; the frequency conversion local oscillation signal can hop frequency within a certain frequency range to realize the function of final carrier frequency hopping, the X-band receiver is a down-conversion and intermediate frequency amplification component comprising four channels and is used for down-converting four paths of X-band radio frequency signals input by a microwave front end to intermediate frequency and carrying out intermediate frequency amplification, and the amplification amount of an intermediate frequency receiving system can be adjusted under the action of an external input AGC control code; the switch with high isolation is provided, and the function of receiving link blocking is realized.
Description
Technical Field
The invention relates to the technical field of wireless communication, in particular to a radar radio frequency integrated system.
Background
Currently, a radar seeker is an on-missile radar device which is used for detecting a target, tracking and providing a target position and motion parameters for a missile control system, and guiding a missile to fly to the target. The method can be divided into an active radar seeker, a semi-active radar seeker, a passive radar seeker and a composite radar seeker according to the energy source condition of target information acquired by the radar seeker. The active frequency synthesis receiving assembly is an active radar seeker with a radiation source.
Disclosure of Invention
This section is for the purpose of summarizing some aspects of embodiments of the invention and to briefly introduce some preferred embodiments. In this section, as well as in the abstract and the title of the invention of this application, simplifications or omissions may be made to avoid obscuring the purpose of the section, the abstract and the title, and such simplifications or omissions are not intended to limit the scope of the invention.
Therefore, the technical problem to be solved by the invention is to overcome the defects of high stray and high phase noise frequency source and the like in the prior art, thereby providing a radar radio frequency comprehensive system.
In order to solve the technical problems, the invention provides the following technical scheme: a radar radio frequency integrated system comprises a frequency synthesizer, wherein the frequency synthesizer provides a complete coherent transmitting excitation signal transmitting excitation coupling signal, a frequency conversion local oscillator signal and a frequency conversion local oscillator coupling signal for the complete machine; the transmitting signal can be subjected to waveform control and pulse modulation according to an instruction sent by the whole machine; the frequency conversion local oscillation signal can hop frequency within a certain frequency range so as to realize the function of final carrier frequency hopping; the X-band receiver is a down-conversion and intermediate frequency amplification component comprising four channels, is used for down-converting four paths of X-band radio frequency signals input by a microwave front end to intermediate frequency, carrying out intermediate frequency amplification, and can adjust the amplification amount of an intermediate frequency receiving system under the action of an externally input AGC control code; the switch with high isolation is provided, and the function of receiving link blocking is realized.
As a preferred scheme of the radar radio frequency integrated system of the present invention, wherein: the frequency synthesizer comprises a crystal oscillator clock generating unit, a sampling clock generating unit, a transmitting generating unit and a local oscillator generating unit.
As a preferred scheme of the radar radio frequency integrated system of the present invention, wherein: the crystal oscillator clock generating unit is used for performing power division on a crystal oscillator signal, generating a plurality of paths of full-phase-coherent signals for providing reference clock signals for other units, and simultaneously outputting a crystal oscillator clock signal 1 and a crystal oscillator clock signal 2; the sampling clock generating unit generates three paths of sampling clock signals by adopting a dot frequency source working mode; the emission generating unit generates a path of emission signal and a path of emission coupling signal by adopting a DDS point frequency source up-conversion method; the local oscillator generating unit generates broadband frequency hopping local oscillator signals and local oscillator coupling signals with the bandwidth of 740MHz by adopting a mode of combining down-conversion phase locking and frequency multiplication.
As a preferred scheme of the radar radio frequency integrated system of the present invention, wherein: the crystal oscillator clock generating unit comprises a first attenuator, a first amplifier, a first power divider, a second power divider, a third power divider, a first filter, a second amplifier, a fourth power divider, a second filter and a third filter; the output signal of the crystal oscillator is divided into two paths by the first power divider after the power of the output signal of the crystal oscillator is adjusted by the attenuator and the first amplifier, wherein one path of signal is output to the emission generating unit and the local oscillator generating unit, the second path of signal is divided into two paths by the second power divider, one path of signal is output to the sampling clock generating unit, the second path of signal is divided into two paths by the fourth power divider after the power of the second path of signal is adjusted by the first filter and the second amplifier, the two paths of signal are respectively filtered by the filter, one path of signal is output as the reference clock 1 after the power of the first path of signal is adjusted by the attenuator, and the second path of signal is directly output as the reference clock 2.
As a preferred scheme of the radar radio frequency integrated system of the present invention, wherein: the sampling clock generating unit point generates three paths of sampling clock signals by adopting a point frequency source working mode, and the sampling clock signals comprise a first power divider, a first phase-locked source, a first filter, a second phase-locked source, a second power divider, a first frequency divider, a second filter, a third power divider, a second amplifier, a third filter and a fourth filter; the crystal oscillator signal is divided into two paths after passing through a first power divider, wherein the first path of crystal oscillator signal is directly output as a sampling clock 1 after passing through a phase-locked source and filtered, the second path of signal is subjected to power division after passing through a second phase-locked source, one path of signal is output to a DDS reference clock, the second path of signal is divided into two paths after being subjected to frequency division by the first frequency divider, power adjustment is carried out through a second filter and an amplifier, and then the two paths of signal are directly output as the sampling clock 1 and a sampling clock 2 after being respectively filtered.
As a preferred scheme of the radar radio frequency integrated system of the present invention, wherein: the transmitting and generating unit adopts a DDS point frequency source up-conversion method and comprises a DDS, a first filter, a first phase-locked source, a first amplifier, a first frequency mixer, a second filter, a second amplifier, a third filter, a first directional coupler and a first numerical control attenuator; the down-conversion phase-locked source outputs a signal, the signal is used as a local oscillation signal after the power of the signal is adjusted by the first amplifier to perform up-conversion with a baseband signal output by the DDS, then the signal is filtered by the second filter, the power of the signal is adjusted by the second amplifier, the signal is coupled out by the third filter after the signal is filtered by the third filter, the signal is used as a transmitting coupling signal to be directly output, and a direct signal passes through the numerical control attenuator to output a transmitting signal.
As a preferred scheme of the radar radio frequency integrated system of the present invention, wherein: the local oscillator generating unit generates broadband frequency hopping local oscillator signals and local oscillator coupling signals with the bandwidth of 740MHz by adopting a mode of combining down-conversion phase locking and frequency multiplication. The frequency-division-based phase-locked loop power divider comprises a first power divider, a first phase discriminator, a first loop filter, a first voltage-controlled oscillator, a first amplifier, a first frequency mixer, a second filter, a first phase-locked source, a first frequency multiplier, a third filter and a second power divider; the crystal oscillator signal is divided into two paths by the first power divider, wherein one path enters the first phase discriminator as a reference clock signal, the second path directly enters the phase-locked source, the output signal of the phase-locked source is used as a radio frequency signal of down-conversion phase-locked, and the radio frequency signal and the output signal of the voltage-controlled oscillator are fed back to the phase discriminator after down-conversion through filtering, so that a down-conversion phase-locked loop is formed. The loop outputs 370MHz frequency hopping signals, then the signals are widened to 740MHz broadband frequency hopping sources through frequency doubling of a frequency multiplier, and the signals are divided into two paths of signals through a second power divider after being filtered by a second filter and directly output as local oscillation signals and local oscillation coupling signals.
As a preferred scheme of the radar radio frequency integrated system of the present invention, wherein: the X-band receiver comprises a local oscillator power dividing circuit and four receiving channels; the local oscillator power dividing circuit comprises three power dividers and four amplifiers, four receiving channels are completely consistent in circuit structure, and each channel comprises a first numerical control attenuator, a first amplifier, a first mixer + electric bridge, a first filter, a second voltage-controlled amplifier, a first temperature compensation attenuator, a third amplifier, a second filter and a second attenuator; radio frequency signals received by the antenna are subjected to dynamic range adjustment through the first numerical control attenuator, then are subjected to low-noise amplification through the first amplifier, are mixed with a first local oscillator signal at the first frequency mixer, and the mixed signals sequentially pass through the first filter, the second voltage-controlled amplifier, the first temperature compensation attenuator, the third amplifier and the second filter, and then are subjected to power adjustment through the attenuator to output intermediate frequency signals.
The invention has the beneficial effects that:
the invention provides a radar radio frequency comprehensive system which has the technical advantages of low stray, low phase noise frequency source, small volume, complex wave form transformation, emission channel clutter suppression, high transceiving isolation and the like, and has a sleep recovery function.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive exercise.
Wherein:
FIG. 1 is a general schematic block diagram of a radar radio frequency integration system;
FIG. 2 is a block diagram of the operating principle of a frequency synthesizer;
FIG. 3 is a schematic diagram of a crystal oscillator clock generation unit;
FIG. 4 is a schematic block diagram of a sampling clock generation unit;
FIG. 5 is a functional block diagram of a transmit generating unit;
FIG. 6 is a schematic block diagram of a local oscillation generating unit;
FIG. 7 is a functional block diagram of a receiver;
FIG. 8 is a schematic diagram of power distribution;
Detailed Description
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below.
In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention, but the present invention may be practiced in other ways than those specifically described and will be readily apparent to those of ordinary skill in the art without departing from the spirit of the present invention, and therefore the present invention is not limited to the specific embodiments disclosed below.
With reference to fig. 1, an active frequency synthesizer receiver system includes a frequency synthesizer and a receiver. The frequency synthesizer provides a complete coherent transmitting excitation signal, a transmitting excitation coupling signal, a frequency conversion local oscillator signal and a frequency conversion local oscillator coupling signal for the complete machine; the receiver is a down-conversion and intermediate frequency amplification assembly comprising four channels, is used for down-converting four paths of radio frequency signals input by a microwave front end to intermediate frequency and carrying out intermediate frequency amplification, can adjust the amplification amount of an intermediate frequency receiving system under the action of an external input AGC control code, has a high-isolation switch and realizes the function of receiving link blocking. The system also comprises a power supply and control unit which is used for finishing the communication function with the whole machine, the baseband signal generation function, the power supply isolation among all unit modules, the voltage conversion and the protection of devices.
Referring to fig. 2, the frequency synthesizer includes a crystal oscillator clock generating unit, a sampling clock generating unit, a local oscillator generating unit, and a transmission generating unit. The crystal oscillator clock generating unit has the main functions of performing power division on crystal oscillator signals, generating a plurality of paths of full-coherent signals for providing reference clock signals for other units, and simultaneously outputting two paths of crystal oscillator clock signals; the sampling clock generating unit generates three paths of sampling clock signals by adopting a dot frequency source working mode; the emission generating unit generates an emission signal with an instantaneous bandwidth of 400MHz and an emission coupling signal by adopting a DDS plus point frequency source up-conversion method; the local oscillator generating unit firstly generates a frequency hopping source with the bandwidth of 370MHz by adopting a down-conversion phase-locking mode, and then generates a broadband frequency hopping local oscillator signal with the bandwidth of 740MHz and a local oscillator coupling signal by frequency doubling.
The invention is further described below with reference to specific examples.
1. Frequency synthesizer
1) Crystal oscillator clock generating unit
Referring to fig. 3, the crystal oscillator clock generating unit in the frequency synthesizer includes an attenuator, a first amplifier, a first power divider, a second power divider, a third power divider, a first filter, a second amplifier, a fourth power divider, a second filter, and a third filter. The output signal of the crystal oscillator is divided into two paths by the first power divider after the power of the output signal of the crystal oscillator is adjusted by the attenuator and the first amplifier, wherein one path of signal is output to the emission generating unit and the local oscillator generating unit, the second path of signal is divided into two paths by the second power divider, one path of signal is output to the sampling clock generating unit, the second path of signal is divided into two paths by the fourth power divider after the power of the second path of signal is adjusted by the first filter and the second amplifier, the two paths of signal are respectively filtered by the filter, one path of signal is output as the reference clock 1 after the power of the first path of signal is adjusted by the attenuator, and the second path of signal is directly output as the reference clock 2.
The indexes of the crystal oscillator clock unit for finally outputting 60MHz signals are as follows:
2) sampling clock generating unit
With reference to fig. 4, a sampling clock generating unit in the frequency synthesizer generates three sampling clock signals in a point-to-point frequency source operating mode, and the three sampling clock signals include a first power divider, a first phase-locked source, a first filter, a second phase-locked source, a second power divider, a first frequency divider, a second filter, a third power divider, a second amplifier, a third filter, and a fourth filter. The crystal oscillator signal is divided into two paths after passing through a first power divider, wherein the first path of crystal oscillator signal is directly output as a sampling clock 1 after passing through a phase-locked source and filtered, the second path of signal is subjected to power division after passing through a second phase-locked source, one path of signal is output to a DDS reference clock, the second path of signal is divided into two paths after being subjected to frequency division by the first frequency divider, power adjustment is carried out through a second filter and an amplifier, and then the two paths of signal are directly output as the sampling clock 1 and a sampling clock 2 after being respectively filtered.
The final output signal indexes of the sampling clock generation unit are as follows:
3) emission generating unit
With reference to fig. 5, the method for up-converting the transmit generating unit in the frequency synthesizer by using the DDS plus point frequency source includes a DDS, a first filter, a first phase-locked source, a first amplifier, a first mixer, a second filter, a second amplifier, a third filter, a first directional coupler, and a first digitally controlled attenuator. The crystal oscillator signal directly enters a phase-locked source, is used as a local oscillator signal after the power of the crystal oscillator signal is adjusted by a first amplifier to perform up-conversion with a baseband signal output by the DDS, and then is filtered by a second filter, the power of the crystal oscillator signal is adjusted by a second amplifier, a third filter is used for filtering and then is coupled by a directional coupler to form a path of signal which is used as a transmitting coupling signal to be directly output, and a direct-connection signal passes through a numerical control attenuator and then is output as a transmitting signal.
The main functions of the emission generating unit are as follows:
a) clutter suppression
The DDS in the emission generating unit selects domestic GM4912C, outputs linear frequency modulation signals with the central frequency of 1.2GHz and the instantaneous bandwidth of 400MHz, the stray suppression degree in the central frequency of 500MHz bandwidth is larger than 55dBc, but the stray suppression degree outside 2.1GHz is only about 5dBc, so that a first-level band-pass filter is added at the output end of the DDS to suppress far-end stray, and the suppression degrees of 900MHz and 2.1GHz are respectively 7dBc and 35 dBc.
The intermodulation stray is calculated through primary up-conversion, the main spectrum near-end stray is mainly local oscillation leakage and third-order intermodulation signals, the suppression degree of the local oscillation signals by the selected MEMS filter is 60dBc, the suppression degree of the third-order intermodulation signals is 35dBc, and the requirement that the suppression degree of the spurious emission signals is superior to 55dBc can be met through cascade connection of two stages of filters considering the saturation of the power of a final-stage signal.
b) Phase noise
The phase noise of the DDS output signal is much better than that of the phase locked loop, so the phase noise of the transmitted signal depends mainly on the point frequency source in the up-conversion link, whose phase noise: -95dBc/Hz @1kHz, -100dBc/Hz @10kHz, -100dBc/Hz @100kHz, meeting the phase noise indicator requirements of the transmitted signal.
c) Pulse response time
The GM4912C pulse response time is formed by adding two parts of time, the first is that the response delay of the FPGA to the pulse modulation signal is about 5 FPGA work cycles (1/16 of 4 × GHz is used as an FPGA pulse generation reference clock, namely, a 300MHz cycle is 3.34ns) and about 35ns, the second is that the pulse response delay of the GM4912C in the linear frequency modulation mode is 392 SYSCLK (4 × GHz cycle is about 0.208ns) clock cycles and about 82ns, and the pulse response delay obtained by adding the two parts of time is about 117ns and meets the index requirement of less than 250 ns.
d) On-off isolation
The on-off isolation index requirement of the transmitting signal is more than or equal to 75dB, the scheme is realized by combining the OSK function of the GM4912C with the numerical control attenuator of the transmitting port, and the on-off isolation in a normal transmitting state can be ensured to be more than 75 dB.
e) Numerical control attenuation
The numerical control attenuator BW178D is a 6-bit numerical control attenuator for controlling the 0.5dB stepping maximum attenuation amount to be 31dB, the insertion loss is about 4dB, the numerical control attenuator with the stepping 1dB and the maximum attenuation amount to be 62dB can be obtained by adopting two-stage cascade control, and the numerical control attenuation index requirements of indexes of 0dB, 20dB, 40dB and 60dB can be met.
4) Local oscillator generating unit
With reference to fig. 6, the local oscillator generating unit in the frequency synthesizer generates a broadband frequency hopping local oscillator signal and a local oscillator coupling signal with a bandwidth of 740MHz by combining a down-conversion phase-lock with a frequency multiplication. The phase locked loop power divider comprises a first power divider, a first phase discriminator, a first loop filter, a first voltage-controlled oscillator, a first amplifier, a first frequency mixer, a second filter, a first phase-locked source, a first frequency multiplier, a third filter and a second power divider. The crystal oscillator signal is divided into two paths by the first power divider, wherein one path enters the first phase discriminator as a reference clock signal, the second path directly enters the phase-locked source, the output signal of the phase-locked source is used as a radio frequency signal of down-conversion phase-locked, and the radio frequency signal and the output signal of the voltage-controlled oscillator are fed back to the phase discriminator after down-conversion through filtering, so that a down-conversion phase-locked loop is formed. The loop outputs 370MHz frequency hopping signals, then the signals are widened to 740MHz broadband frequency hopping sources through frequency doubling of a frequency multiplier, and the signals are divided into two paths of signals through a second power divider after being filtered by a second filter and directly output as local oscillation signals and local oscillation coupling signals.
a) Phase noise and spurs
The local oscillator generating unit adopts an analog phase-locked loop, a phase discriminator in the phase-locked loop adopts HMC704 produced by ADI company, a VCO is a device of Miaojie thirteen institute, the bandwidth of the phase-locked loop is 370MHz, the phase discrimination frequency is 5MHz, an active loop is adopted, and design software of ADI company is utilized to carry out simulation optimization. The phase noise of the down-conversion phase-locked based on the integer frequency division is about-105 dBc/Hz @1kHz, -106dBc/Hz @10kHz, -101dBc/Hz @100kHz, the phase detection leakage stray rejection degree is better than 100dBc, and the frequency hopping time is less than 20 us. After double frequency, the phase noise is deteriorated by 6dB, the phase detection leakage stray is deteriorated by 6dB, so that the phase noise of the final output signal is about-99 dBc/Hz @1kHz, -100dBc/Hz @1kHz, -95dBc/Hz @1kHz, the phase detection leakage stray suppression degree is superior to 70dBc, and the index requirement is met.
b) Output power
The frequency doubler adopts an active frequency doubler HMC576 of Hittite company, and the output power is 17 dBm. After frequency doubling, a first-level MEMS filter is adopted to suppress fundamental waves and third harmonics of the X-band signals, and the stray suppression degree of the output K-band signals can be ensured to be better than 70 dBc. The insertion loss of the MEMS filter is about 2dB, the insertion loss of a chip of the power divider is about 4dB, the insertion loss of a microstrip transmission line is 0.5dB and the insertion loss of a connector is 0.5dB, the final output power is about 10dBm, and the index requirement is met.
c) Port standing wave
BW496 is selected for the power divider chip, the standing wave of the port is better than 1.3, and the standing wave of the output port can be guaranteed to be better than 1.8.
2. Receiver with a plurality of receivers
Referring to fig. 7, the receiver includes one local oscillator power dividing circuit and four receiving channels. The local oscillation power dividing circuit comprises three power dividers and four amplifiers, four receiving channels are completely consistent in circuit structure, and each channel comprises a first numerical control attenuator, a first amplifier, a first mixer + electric bridge, a first filter, a second voltage-controlled amplifier, a first temperature compensation attenuator, a third amplifier, a second filter and a second attenuator. Radio frequency signals received by the antenna are subjected to dynamic range adjustment through the first numerical control attenuator, then are subjected to low-noise amplification through the first amplifier, are mixed with a first local oscillator signal at the first frequency mixer, and the mixed signals sequentially pass through the first filter, the second voltage-controlled amplifier, the first temperature compensation attenuator, the third amplifier and the second filter, and then are subjected to power adjustment through the attenuator to output intermediate frequency signals.
The main indexes of the receiver are as follows
The signals and functions of the main components of the receiving channel are as follows:
(1) noise figure
The calculation formula of the system cascade noise coefficient is as follows:
calculating according to the system cascade noise coefficient:
the noise figure was calculated to be about 6.8dB at normal temperature and 0.7dB, about 7.5dB worse at high temperature.
(2) Gain of
The typical gain value at normal temperature is calculated to be 52dB, according to the device information, the low-noise amplification is performed, the gain at low temperature becomes about 0.8dB, the gain at high temperature becomes about 0.5dB, the insertion loss of a plurality of passive devices is calculated according to the low-temperature decrease of 1dB and the high-temperature increase of 1dB, and the intermediate-frequency amplifier is calculated according to the low-temperature increase of 1dB and the high-temperature decrease of 1.5dB, which is specifically shown in the following table.
The total reception gain can be controlled within (52 + -1) dB in consideration of the inter-channel inconsistency.
(3) Input and output P-1
The output P-1 has a direct relation with the output P-1 of the final amplifier, the output P-1 of the final amplifier is 12dBm, 3dB of insertion loss of the output band-pass filter and 3dB of an attenuation chip are subtracted, namely 12-3-3 is 6 dBm.
On the premise that the numerical control attenuation does not work at all, the final-stage intermediate frequency amplifier determines the output P-1, the output P-1 is 6dBm, the total gain is 52dB, and the input P-1 can be deduced to be about-46 dBm.
When the numerical control attenuation of the intermediate frequency VGA is 47dB of full attenuation, the input P-1 depends on the output P-1 of the low noise amplifier and the input P-1 of the mixer before the VGA, the input P-1 of the low noise amplifier is 12-16 to-4 dBm, and the maximum input P-1 is about-2 dBm after the insertion loss of the numerical control attenuator is subtracted by 2 dB.
When the 77dB digital controlled attenuation is fully active, the input P-1 at this time is the digital controlled attenuation input P-1, i.e., 18 dBm.
(4) AGC gain control
The radio frequency numerical control attenuation selects a numerical control attenuator with 30dB attenuation, the attenuator amount is 30dB, the attenuation precision is plus or minus (0.3+ A4%), the intermediate frequency numerical control attenuator selects VGA, the attenuation digits are 1dB, 2dB, 4dB, 8dB, 16dB and 16dB, the total attenuation amount is 47dB, and the attenuation precision is plus or minus (0.3+ A3%). The two-stage numerical control attenuation cascade can realize the control dynamic range of 77dB and the control precision of +/-0.3 + A + 4%.
The AGC control response time is typically 0.14us, the communication transition time is about 0.1us, and the two are added together, with an AGC gain control response time of 0.24 us.
(5) Image rejection
The image rejection is realized by selecting an image rejection mixer and a bridge, the image rejection degree of the selected image rejection mixer is more than or equal to 30dB, the isolation degree of the selected bridge is more than or equal to 23dB, the phase unbalance degree is less than or equal to 2 degrees, and according to engineering experience, the image rejection degree is deteriorated to a certain extent after the two are combined, and can reach more than or equal to 23 dB.
(6) Inter-channel phase consistency
Each receiving channel is designed into the same circuit form, and the local oscillation power is divided into one-to-two and two-to-four. Theoretically, the transmission paths among the channels can be ensured to be the same.
The phase consistency of the intermediate frequency band-pass filter is strictly required, and the index of the phase consistency is +/-5 degrees.
According to early engineering experience, the phase consistency among the channels can reach +/-9 degrees, and index requirements can be met.
(7) Inter-channel gain uniformity
Each channel selects the same batch of devices, and the inconsistency of gain caused by the dispersion of the devices is reduced as much as possible. In addition, a gain adjusting circuit is reserved on each channel to adjust the gain of each channel, so that the gain consistency among the channels is ensured to meet the index requirement.
(8) Degree of isolation between channels
Circuit isolation: the calculated value must be greater than the index requirement. The isolation between channels is (18+30-22+40) dB (66 dB) from local oscillator power division, the isolation between channels + the gain of the reverse isolation-amplifier of the amplifier + the local oscillator to radio frequency isolation of the mixer.
Space isolation: the 4 channels are all positioned in different metal cavities which are shielded independently, so that the space radiation and the space coupling are reduced as much as possible;
power isolation: the feed end of the amplifier is added with a decoupling capacitor or processed in a pi-type filtering mode, and the switch control end is mainly processed in a mode of driving a circuit independently for each channel.
According to early engineering experience, the inter-channel isolation can be achieved to be greater than 40 dB.
4. Power supply and control unit
Referring to fig. 8, the system provides power (+6V, -6V) to each functional module, and the power is filtered, each functional module performs internal voltage stabilization, and the device power supply circuit performs decoupling processing to prevent signal leakage through the power supply circuit.
The control devices such as the FPGA and the like generate a PLL control signal and a DDS control signal according to an external control instruction so as to generate a broadband frequency hopping signal with the bandwidth of 740MHz and the stepping 10MHz and various novel complex signals such as linear frequency modulation, single tone pulse, single tone continuous wave and the like, have a sleep recovery function, return product working state information and the like, and ensure normal communication of the whole machine.
It is important to note that the construction and arrangement of the present application as shown in the various exemplary embodiments is illustrative only. Although only a few embodiments have been described in detail in this disclosure, those skilled in the art who review this disclosure will readily appreciate that many modifications are possible (e.g., variations in sizes, dimensions, structures, shapes and proportions of the various elements, values of parameters (e.g., temperatures, pressures, etc.), mounting arrangements, use of materials, colors, orientations, etc.) without materially departing from the novel teachings and advantages of the subject matter recited in this application. For example, elements shown as integrally formed may be constructed of multiple parts or elements, the position of elements may be reversed or otherwise varied, and the nature or number of discrete elements or positions may be altered or varied. Accordingly, all such modifications are intended to be included within the scope of this invention. The order or sequence of any process or method steps may be varied or re-sequenced according to alternative embodiments. In the claims, any means-plus-function clause is intended to cover the structures described herein as performing the recited function and not only structural equivalents but also equivalent structures. Other substitutions, modifications, changes and omissions may be made in the design, operating conditions and arrangement of the exemplary embodiments without departing from the scope of the present inventions. Therefore, the present invention is not limited to a particular embodiment, but extends to various modifications that nevertheless fall within the scope of the appended claims.
Moreover, in an effort to provide a concise description of the exemplary embodiments, all features of an actual implementation may not be described (i.e., those unrelated to the presently contemplated best mode of carrying out the invention, or those unrelated to enabling the invention).
It should be appreciated that in the development of any such actual implementation, as in any engineering or design project, numerous implementation-specific decisions may be made. Such a development effort might be complex and time consuming, but would nevertheless be a routine undertaking of design, fabrication, and manufacture for those of ordinary skill having the benefit of this disclosure, without undue experimentation.
It should be noted that the above-mentioned embodiments are only for illustrating the technical solutions of the present invention and not for limiting, and although the present invention has been described in detail with reference to the preferred embodiments, it should be understood by those skilled in the art that modifications or equivalent substitutions may be made on the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention, which should be covered by the claims of the present invention.
Claims (8)
1. A radar radio frequency integration system, comprising: comprises the steps of (a) preparing a mixture of a plurality of raw materials,
the frequency synthesizer provides a complete coherent transmitting excitation signal transmitting excitation coupling signal, a frequency conversion local oscillator signal and a frequency conversion local oscillator coupling signal for the whole machine; the transmitting signal can be subjected to waveform control and pulse modulation according to an instruction sent by the whole machine; the frequency conversion local oscillation signal can hop frequency within a certain frequency range so as to realize the function of final carrier frequency hopping;
the X-band receiver is a down-conversion and intermediate frequency amplification component comprising four channels, is used for down-converting four paths of X-band radio frequency signals input by a microwave front end to intermediate frequency, carrying out intermediate frequency amplification, and can adjust the amplification amount of an intermediate frequency receiving system under the action of an externally input AGC control code; the switch with high isolation is provided, and the function of receiving link blocking is realized.
2. The radar radio frequency integration system of claim 1, wherein: the frequency synthesizer comprises a crystal oscillator clock generating unit, a sampling clock generating unit, a transmitting generating unit and a local oscillator generating unit.
3. The radar radio frequency integration system of claim 2, wherein: the crystal oscillator clock generating unit is used for performing power division on a crystal oscillator signal, generating a plurality of paths of full-phase-coherent signals for providing reference clock signals for other units, and simultaneously outputting a crystal oscillator clock signal 1 and a crystal oscillator clock signal 2; the sampling clock generating unit generates three paths of sampling clock signals by adopting a dot frequency source working mode; the emission generating unit generates a path of emission signal and a path of emission coupling signal by adopting a DDS point frequency source up-conversion method; the local oscillator generating unit generates broadband frequency hopping local oscillator signals and local oscillator coupling signals with the bandwidth of 740MHz by adopting a mode of combining down-conversion phase locking and frequency multiplication.
4. A radar radio frequency integration system according to claim 3, wherein: the crystal oscillator clock generating unit comprises a first attenuator, a first amplifier, a first power divider, a second power divider, a third power divider, a first filter, a second amplifier, a fourth power divider, a second filter and a third filter; the output signal of the crystal oscillator is divided into two paths by the first power divider after the power of the output signal of the crystal oscillator is adjusted by the attenuator and the first amplifier, wherein one path of signal is output to the emission generating unit and the local oscillator generating unit, the second path of signal is divided into two paths by the second power divider, one path of signal is output to the sampling clock generating unit, the second path of signal is divided into two paths by the fourth power divider after the power of the second path of signal is adjusted by the first filter and the second amplifier, the two paths of signal are respectively filtered by the filter, one path of signal is output as the reference clock 1 after the power of the first path of signal is adjusted by the attenuator, and the second path of signal is directly output as the reference clock 2.
5. The radar radio frequency integration system of claim 2, wherein: the sampling clock generating unit point generates three paths of sampling clock signals by adopting a point frequency source working mode, and the sampling clock signals comprise a first power divider, a first phase-locked source, a first filter, a second phase-locked source, a second power divider, a first frequency divider, a second filter, a third power divider, a second amplifier, a third filter and a fourth filter; the crystal oscillator signal is divided into two paths after passing through a first power divider, wherein the first path of crystal oscillator signal is directly output as a sampling clock 1 after passing through a phase-locked source and filtered, the second path of signal is subjected to power division after passing through a second phase-locked source, one path of signal is output to a DDS reference clock, the second path of signal is divided into two paths after being subjected to frequency division by the first frequency divider, power adjustment is carried out through a second filter and an amplifier, and then the two paths of signal are directly output as the sampling clock 1 and a sampling clock 2 after being respectively filtered.
6. The radar radio frequency integration system of claim 2, wherein: the transmitting and generating unit adopts a DDS point frequency source up-conversion method and comprises a DDS, a first filter, a first phase-locked source, a first amplifier, a first frequency mixer, a second filter, a second amplifier, a third filter, a first directional coupler and a first numerical control attenuator; the down-conversion phase-locked source outputs a signal, the signal is used as a local oscillation signal after the power of the signal is adjusted by the first amplifier to perform up-conversion with a baseband signal output by the DDS, then the signal is filtered by the second filter, the power of the signal is adjusted by the second amplifier, the signal is coupled out by the third filter after the signal is filtered by the third filter, the signal is used as a transmitting coupling signal to be directly output, and a direct signal passes through the numerical control attenuator to output a transmitting signal.
7. The radar radio frequency integration system of claim 2, wherein: the local oscillator generating unit generates broadband frequency hopping local oscillator signals and local oscillator coupling signals with the bandwidth of 740MHz by adopting a mode of combining down-conversion phase locking and frequency multiplication. The frequency-division-based phase-locked loop power divider comprises a first power divider, a first phase discriminator, a first loop filter, a first voltage-controlled oscillator, a first amplifier, a first frequency mixer, a second filter, a first phase-locked source, a first frequency multiplier, a third filter and a second power divider; the crystal oscillator signal is divided into two paths by the first power divider, wherein one path enters the first phase discriminator as a reference clock signal, the second path directly enters the phase-locked source, the output signal of the phase-locked source is used as a radio frequency signal of down-conversion phase-locked, and the radio frequency signal and the output signal of the voltage-controlled oscillator are fed back to the phase discriminator after down-conversion through filtering, so that a down-conversion phase-locked loop is formed. The loop outputs 370MHz frequency hopping signals, then the signals are widened to 740MHz broadband frequency hopping sources through frequency doubling of a frequency multiplier, and the signals are divided into two paths of signals through a second power divider after being filtered by a second filter and directly output as local oscillation signals and local oscillation coupling signals.
8. The radar radio frequency integration system of claim 1, wherein: the X-band receiver comprises a local oscillator power dividing circuit and four receiving channels; the local oscillator power dividing circuit comprises three power dividers and four amplifiers, four receiving channels are completely consistent in circuit structure, and each channel comprises a first numerical control attenuator, a first amplifier, a first mixer + electric bridge, a first filter, a second voltage-controlled amplifier, a first temperature compensation attenuator, a third amplifier, a second filter and a second attenuator; radio frequency signals received by the antenna are subjected to dynamic range adjustment through the first numerical control attenuator, then are subjected to low-noise amplification through the first amplifier, are mixed with a first local oscillator signal at the first frequency mixer, and the mixed signals sequentially pass through the first filter, the second voltage-controlled amplifier, the first temperature compensation attenuator, the third amplifier and the second filter, and then are subjected to power adjustment through the attenuator to output intermediate frequency signals.
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