CN115979313A - Acquisition circuit of Hall element output signal - Google Patents
Acquisition circuit of Hall element output signal Download PDFInfo
- Publication number
- CN115979313A CN115979313A CN202211623549.7A CN202211623549A CN115979313A CN 115979313 A CN115979313 A CN 115979313A CN 202211623549 A CN202211623549 A CN 202211623549A CN 115979313 A CN115979313 A CN 115979313A
- Authority
- CN
- China
- Prior art keywords
- common
- mode voltage
- common mode
- voltage
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Landscapes
- Measuring Magnetic Variables (AREA)
- Hall/Mr Elements (AREA)
Abstract
The application provides a hall element output signal's acquisition circuit includes: a flow stabilizing module; the common-mode voltage output module comprises a Hall element taking four terminals as a physical model, wherein one pair of opposite two terminals are used as a first input end and a second input end of the module, the first input end is connected to the current stabilization module, the other pair of opposite two terminals are used as a first output end and a second output end of the module, the first output end outputs a first common-mode voltage of the Hall element, and the second output end is used for a second common-mode voltage of the Hall element; the common mode voltage feedback module receives the first and second common mode voltages, and is used for comparing the first and second common mode voltages with a reference voltage respectively so as to keep the static working state of the circuit and stabilize the first and second common mode voltages at the same potential as the reference voltage in the dynamic working state. The circuit can accurately acquire the differential mode small signal between the first differential mode voltage and the second differential mode voltage under the condition of a stable common mode signal.
Description
Technical Field
The application relates to the technical field of electronics, especially, relate to a hall element output signal's acquisition circuit.
Background
Please refer to fig. 1, which is a schematic diagram of a physical circuit model of a hall device in the prior art. As shown in fig. 1, the circuit includes four hall elements, shown as four R. The common working mode of the hall element is that current is input at the end A, current is output at the end C, differential mode signals are collected at the end B and the end D and are output as hall voltage signals, and the hall voltage is used as a basis for judging the signal behavior sensed by the hall. However, in order to prevent the output signals from having inherent signal differences due to the impedance differences of the four hall elements R, in practical applications, the four ports of the hall elements are generally powered by switches in turn, which is divided into four cases: at the first moment, the CK1 clock mode is entered: a differential signal of a current detection BD end is introduced into an AC end; at the second instant, the CK2 clock mode is entered: a differential signal of a current detection CA end is introduced to the BD end; at the third instant, the CK3 clock mode is entered: a differential signal of a current detection DB end is introduced to the CA end; at the fourth time, the CK4 clock mode is entered: and a differential signal of the current detection AC end is led into the DB end. And then the signal asymmetry caused by the impedance difference of the Hall elements is eliminated through the calculation of the results of the four situations.
However, in the process of eliminating the signal asymmetry caused by the impedance difference of the hall element according to the above-mentioned scheme, no matter one end of the hall element is grounded and the common-mode voltage at the output end is determined by the self voltage drop ir/2 of the hall element, or one end of the hall element is connected to the power supply and the common-mode voltage at the output end is determined by the difference between the power supply voltage and the self voltage drop ir/2 of the hall element, the impedance of the hall element itself is changed greatly due to the change of the hall element itself with the process angle or the change of the temperature, and finally, the output common-mode signal is changed greatly when the constant current source driving circuit is used, and unnecessary difficulty is brought to the design of the subsequent circuit.
Therefore, it is an urgent technical problem to provide an acquisition circuit for a hall element output signal, which can obtain an accurate differential mode signal and a stable common mode signal.
Disclosure of Invention
The technical problem that this application will be solved provides a collection circuit of hall element output signal to when obtaining accurate differential mode signal, can obtain stable common mode signal.
In order to solve the above problem, the present application provides an acquisition circuit for a hall element output signal, including: a flow stabilizing module; the common-mode voltage output module comprises a Hall element taking four terminals as a physical model, wherein one pair of opposite two terminals are used as a first input end and a second input end of the common-mode voltage output module, the first input end is connected to the current stabilization module, the other pair of opposite two terminals are used as a first output end and a second output end of the common-mode voltage output module, the first output end is used for outputting a first common-mode voltage of the Hall element, and the second output end is used for outputting a second common-mode voltage of the Hall element; the common mode voltage feedback module is connected to a first output end, a second output end and a second input end of the common mode voltage output module, and is used for receiving the first common mode voltage and the second common mode voltage, and comparing the first common mode voltage and the second common mode voltage with a reference voltage respectively so as to keep the static working state of the circuit and stabilize the first common mode voltage and the second common mode voltage at the same potential as the reference voltage in the dynamic working state.
In some embodiments, the flow stabilization module comprises: the current source, a first PMOS transistor and a second PMOS transistor which are connected in a common grid mode; the first end of the first PMOS transistor is connected to a power supply, and the second end of the first PMOS transistor is connected to the first input end of the common-mode voltage output module; the first end of the second PMOS transistor is connected to a power supply, and the second end of the second PMOS transistor is connected to the first end of the current source and is in short circuit with the grid electrode of the current source; the second terminal of the current source is connected to a common voltage terminal.
In some embodiments, the flow stabilization module comprises: the transistor comprises a current source, a first NMOS transistor and a second NMOS transistor, wherein the first NMOS transistor and the second NMOS transistor share a grid; the first end of the first NMOS transistor is connected to a common voltage end, and the second end of the first NMOS transistor is connected to the first input end of the common mode voltage output module; the first end of the second NMOS transistor is connected to a common voltage end, and the second end of the second NMOS transistor is connected to the first end of the current source and is in short circuit with the grid electrode of the current source; the second end of the current source is connected to a power supply.
In some embodiments, the four terminals of the common mode voltage output module are powered on in turn to eliminate the asymmetry of the first common mode voltage and the second common mode voltage caused by the impedance difference of the hall elements.
In some embodiments, the reference voltage is less than a supply voltage value of the circuit.
In some embodiments, the common mode voltage feedback module comprises a comparison amplifier having a first input terminal receiving the reference voltage, a second input terminal connected to the first output terminal of the common mode voltage output module for stabilizing the first common mode voltage, and a third input terminal connected to the second output terminal of the common mode voltage output module.
According to the technical scheme, the common-mode voltage feedback module is connected to the second input end of the common-mode voltage output module to form a negative feedback circuit of the first common-mode voltage and a negative feedback circuit of the second common-mode voltage, so that the first common-mode voltage and the second common-mode voltage are stabilized. Therefore, the differential mode small signal between the first differential mode voltage and the second differential mode voltage can be accurately acquired by the acquisition circuit of the Hall element output signal under the condition of a stable common mode signal.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the application. Techniques, methods, and apparatus known to those of ordinary skill in the relevant art may not be discussed in detail but are intended to be part of the specification where appropriate.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for the detailed description of the present application will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained by those skilled in the art without inventive efforts.
FIG. 1 is a schematic diagram of a physical circuit model of a Hall element in the prior art;
FIG. 2 is a block diagram of an embodiment of a circuit for collecting an output signal of a Hall element;
FIG. 3 is a schematic diagram of a circuit for acquiring an output signal of a Hall element according to an embodiment of the present disclosure;
fig. 4 is a schematic diagram of a circuit for acquiring an output signal of a hall element according to another embodiment of the present application.
Detailed Description
The technical solutions of the present application will be described below clearly and completely with reference to the accompanying drawings, and it is to be understood that the described embodiments are only a part of the specific embodiments of the present application, and not all of the specific embodiments of the present application. All other embodiments that can be derived by a person skilled in the art from the detailed description of the embodiments given herein without making any creative effort belong to the protection scope of the present application.
It should be noted that the present application solves the problem of signal asymmetry caused by the impedance difference of the hall elements in the prior art, so the hall elements are simplified into a resistance model in the present application. The following describes an acquisition circuit for the output signal of the hall element in the present application.
Please refer to fig. 2, which is a block diagram of an output signal acquisition circuit according to an embodiment of the present application. As shown in fig. 2, the circuit for acquiring the output signal of the hall element in this embodiment includes: the common-mode voltage feedback circuit comprises a current stabilizing module 1, a common-mode voltage output module 2 and a common-mode voltage feedback module 3. The common-mode voltage output module 2 comprises a hall element taking four terminals as a physical model, wherein one pair of two opposite terminals are used as a first input end and a second input end of the common-mode voltage output module 2, the first input end is connected to the current stabilization module 1, the other pair of two opposite terminals are used as a first output end and a second output end of the common-mode voltage output module 2, the first output end is used for outputting a first common-mode voltage of the hall element, and the second output end is used for outputting a second common-mode voltage of the hall element. The common mode voltage feedback module 3 is connected to the first output terminal, the second output terminal, and the second input terminal of the common mode voltage output module, and configured to receive the first common mode voltage and the second common mode voltage, and compare the first common mode voltage and the second common mode voltage with a reference voltage, respectively, so as to maintain a static operating state of the circuit and stabilize the first common mode voltage and the second common mode voltage at a potential same as the reference voltage in a dynamic operating state. In this embodiment, the terminal is a common terminal of the two hall elements. The first output end of the common mode voltage output module 2 is used for outputting a first differential mode signal and a first common mode signal, and the second output end thereof is used for outputting a second differential mode signal and a second common mode signal.
Please refer to fig. 3, which is a schematic diagram of an acquisition circuit for an output signal of a hall element according to an embodiment of the present application. As shown in fig. 3, in the present embodiment, the flow stabilization module 1 includes: a current source I, a first PMOS transistor P1, and a second PMOS transistor P2. The first PMOS transistor P1 and the second PMOS transistor P2 are connected to each other by common gates. The first PMOS transistor P1 has a first terminal connected to the power supply VDD of the circuit, and a second terminal connected to the first input terminal 11 of the common mode voltage output module 2. The first end of the second PMOS transistor P2 is connected to a power supply VDD, the second end thereof is connected to the first end of the current source I and shorted to the gate thereof, and the second end of the current source I is connected to a common voltage end.
In this embodiment, the common mode voltage feedback module 3 includes a comparison amplifier 4, a first input terminal of which receives the reference voltage Vref, a second input terminal of which is connected to the first output terminal of the common mode voltage output module 2 to stabilize the first common mode voltage Vcm1, a third input terminal of which is connected to the second output terminal of the common mode voltage output module 2 to stabilize the second common mode voltage Vcm2, and an output terminal of which outputs a signal Vf which is a voltage signal. In this embodiment, the reference voltage Vref is smaller than the voltage value of the power supply VDD of the circuit, for example, the reference voltage Vref is one half of the value of the power supply VDD.
In this embodiment, the common mode voltage output module 2 includes four hall elements, the hall elements are equivalent to four resistors R1 to R4 in this application, and a first common mode voltage Vcm1 output by a first output end of the common mode voltage output module 2 is: signal Vf + I R4; the second common mode voltage Vcm2 output by the second output terminal of the common mode voltage output module 2 is: signal Vf + I R3. When the resistance values of the hall elements are mismatched, that is, R3 is not equal to R4, the first common-mode voltage Vcm1 is not equal to the second common-mode voltage Vcm2, and the first common-mode voltage Vcm1 and the second common-mode voltage Vcm2 are not equal to the theoretical common-mode voltage Vcm, the first common-mode voltage Vcm1 is stabilized by connecting the second input terminal of the common-mode voltage feedback module 3 to the first output terminal of the common-mode voltage output module 2; the third input end of the common mode voltage output module 2 is connected with the second output end of the common mode voltage output module 2 to stabilize the second common mode voltage Vcm2; and the output end of the common mode voltage feedback module 3 outputs a signal Vf to the second input end 12 of the common mode voltage output module 2, so as to form a negative feedback circuit of the first common mode voltage Vcm1 and a negative feedback circuit of the second common mode voltage Vcm2, so as to stabilize the voltages of the four terminals of the common mode voltage output module 2. In this embodiment, the gain of the comparison amplifier 4 is also adjusted to limit the first common mode voltage Vcm1 and the second common mode voltage Vcm2 to be equal to the theoretical common mode voltage Vcm.
In some embodiments, the four terminals of the common mode voltage output module 2 are powered on by turns to eliminate the asymmetry of the first and second common mode voltages Vcm1 and Vcm2 caused by the hall element impedance difference. Specifically, the four terminals of the common mode voltage output module 2 can be controlled to be powered on in turn through the switches CK1 to CK 4. In other embodiments, the bandwidth of the comparison amplifier 4 can be adjusted to quickly stabilize the common mode voltage Vcm during the switching of the switches CK1 to CK 4.
Please refer to fig. 4, which is a schematic diagram of a circuit for acquiring an output signal of a hall element according to another embodiment of the present disclosure. As shown in fig. 4, in the present embodiment, the flow stabilization module 1 includes: a current source I, a first NMOS transistor N1, and a second NMOS transistor N2. The first NMOS transistor N1 and the second NMOS transistor N2 are connected in a common grid mode. The first end of the first NMOS transistor N1 is connected to a common voltage terminal, and the second end thereof is connected to the first input terminal 11 of the common mode voltage output module 2. The first end of the second NMOS transistor N2 is connected to a common voltage end, the second end of the second NMOS transistor is connected to the first end of the current source I and is in short circuit with the grid electrode of the current source I, and the second end of the current source I is connected to a power supply VDD.
As in the previous embodiments, in this embodiment, the common mode voltage feedback module 3 includes a comparison amplifier 4, a first input terminal of which receives the reference voltage Vref, a second input terminal of which receives the first common mode voltage Vcm1, a third terminal of which receives the second common mode voltage Vcm2, and an output terminal of which outputs a signal Vf. The reference voltage Vref is one half of the value of the power supply voltage VDD, and the signal Vf is a voltage signal.
In this embodiment, the first common mode voltage Vcm1 output by the first output terminal of the common mode voltage output module 2 is: signal Vf-I × R1; the second common mode voltage Vcm2 output by the second output terminal of the common mode voltage output module 2 is: signal Vf-I R2. When the resistance values of the hall elements are mismatched, that is, R1 is not equal to R2, the first common-mode voltage Vcm1 is not equal to the second common-mode voltage Vcm2, and the first common-mode voltage Vcm1 and the second common-mode voltage Vcm2 are not equal to the theoretical common-mode voltage Vcm, the first common-mode voltage Vcm1 is stabilized by connecting the second input terminal of the common-mode voltage feedback module 3 to the first output terminal of the common-mode voltage output module 2; the third input end of the common mode voltage output module 2 is connected with the second output end of the common mode voltage output module 2 to stabilize the second common mode voltage Vcm2; and the output end of the common mode voltage feedback module 2 outputs a signal Vf to the second input end 12 of the common mode voltage output module 2, so as to form a negative feedback circuit of the first common mode voltage Vcm1 and a negative feedback circuit of the second common mode voltage Vcm2, so as to stabilize the voltages of the four terminals of the common mode voltage output module 2. In this embodiment, the gain of the comparison amplifier 4 is also adjusted to limit the first common mode voltage Vcm1 and the second common mode voltage Vcm2 to be equal to the theoretical common mode voltage Vcm.
In some embodiments, the four terminals of the common mode voltage output module 2 are powered by turns to eliminate the asymmetry of the first and second common mode voltages Vcm1 and Vcm2 caused by the hall element impedance difference. Specifically, the four terminals of the common mode voltage output module 2 can be controlled to be powered on in turn through the switches CK1 to CK 4. In other embodiments, the bandwidth of the comparison amplifier 4 can be adjusted to quickly stabilize the common mode voltage Vcm during the switching of the switches CK1 to CK 4.
In the above technical solution, the common mode voltage feedback module 3 is connected to the second input end of the common mode voltage output module 2 to form a negative feedback circuit of the first common mode voltage Vcm1 and a negative feedback circuit of the second common mode voltage Vcm2, so as to stabilize the first common mode voltage Vcm1 and the second common mode voltage Vcm2. And by adjusting the gain of the comparison amplifier 4, the first common mode voltage Vcm1 and the second common mode voltage Vcm2 are limited to be equal to the theoretical common mode voltage Vcm. And the bandwidth of the comparison amplifier 4 is also adjusted, so that the common-mode voltage Vcm is rapidly stabilized in the switching process of the switches CK1 to CK 4. Therefore, the acquisition circuit of the Hall element output signal can accurately acquire the differential mode small signal between the first differential mode voltage and the second differential mode voltage under the condition of a stable common mode signal.
It is noted that, herein, relational terms such as second and third, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, the phrase "further includes one of 8230, and" defining an element does not exclude the presence of additional like elements in the process, method, article, or apparatus that includes the element.
The embodiments in the present description are described in a related manner, and the same and similar parts among the embodiments are referred to each other, and each embodiment focuses on the differences from the other embodiments.
The above description is only a preferred embodiment of the present application and is not intended to limit the scope of the present application. It should be noted that various modifications and adaptations can be made by those skilled in the art without departing from the principles of the present application, and should be considered within the scope of the present application.
Claims (6)
1. An acquisition circuit of Hall element output signal, characterized by, includes:
a flow stabilizing module;
the common-mode voltage output module comprises a Hall element taking four terminals as a physical model, wherein one pair of opposite two terminals are used as a first input end and a second input end of the common-mode voltage output module, the first input end is connected to the current stabilization module, the other pair of opposite two terminals are used as a first output end and a second output end of the common-mode voltage output module, the first output end is used for outputting a first common-mode voltage of the Hall element, and the second output end is used for outputting a second common-mode voltage of the Hall element;
the common mode voltage feedback module is connected to a first output end, a second output end and a second input end of the common mode voltage output module, and is used for receiving the first common mode voltage and the second common mode voltage, and comparing the first common mode voltage and the second common mode voltage with a reference voltage respectively so as to keep the static working state of the circuit and stabilize the first common mode voltage and the second common mode voltage at the same potential as the reference voltage in the dynamic working state.
2. The circuit of claim 1, wherein the current stabilization module comprises: the current source, the first PMOS transistor and the second PMOS transistor which are connected in a common grid mode;
the source electrode of the first PMOS transistor is connected to a power supply of the circuit, and the drain electrode of the first PMOS transistor is connected to the first input end;
the source electrode of the second PMOS transistor is connected to the power supply, and the drain electrode of the second PMOS transistor is in short circuit with the grid electrode of the second PMOS transistor and is connected to the first end of the current source;
the second terminal of the current source is connected to the common voltage terminal.
3. The circuit of claim 1, wherein the current stabilization module comprises: the current source, the first NMOS transistor and the second NMOS transistor which are connected in a common grid mode;
the source electrode of the first NMOS transistor is connected to a common voltage end, and the drain electrode of the first NMOS transistor is connected to the first input end;
the source electrode of the second NMOS transistor is connected to the common voltage end, and the drain electrode of the second NMOS transistor is in short circuit with the grid electrode of the second NMOS transistor and is connected to the first end of the current source;
the second end of the current source is connected to a power supply.
4. The circuit of claim 1, wherein the four terminals are alternately energized to eliminate the first and second common mode voltage asymmetries caused by hall element impedance differences.
5. The circuit of claim 1, wherein the reference voltage is less than a voltage value of a power supply of the circuit.
6. The circuit of claim 1, wherein the common mode voltage feedback module comprises a comparison amplifier having a first input terminal receiving the reference voltage, a second input terminal connected to the first output terminal of the common mode voltage output module for stabilizing the first common mode voltage, and a third input terminal connected to the second output terminal of the common mode voltage output module.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211623549.7A CN115979313A (en) | 2022-12-16 | 2022-12-16 | Acquisition circuit of Hall element output signal |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211623549.7A CN115979313A (en) | 2022-12-16 | 2022-12-16 | Acquisition circuit of Hall element output signal |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN115979313A true CN115979313A (en) | 2023-04-18 |
Family
ID=85957269
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202211623549.7A Pending CN115979313A (en) | 2022-12-16 | 2022-12-16 | Acquisition circuit of Hall element output signal |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN115979313A (en) |
-
2022
- 2022-12-16 CN CN202211623549.7A patent/CN115979313A/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR100991699B1 (en) | Voltage regulator circuit and control method therefor | |
| CN110045778A (en) | Device for generating voltage and its calibration method | |
| WO2006134175A2 (en) | Cmos integrated circuit for correction of duty cycle of clock signal | |
| KR20150048059A (en) | Magnetic sensor circuit | |
| US7548115B1 (en) | Common mode rejection ratio trim circuit and methodology | |
| TW201800722A (en) | Sensing circuit and method for controlling sensing circuit | |
| WO2018005084A1 (en) | Apparatus and method for correcting baseline wander and offset insertion in ac coupling circuits | |
| EP1435693B1 (en) | Amplification circuit | |
| CN111751693B (en) | Method and circuit for detecting current amplification factor of bipolar transistor | |
| CN112825476B (en) | Operational amplifier | |
| CN115979313A (en) | Acquisition circuit of Hall element output signal | |
| CN117200713A (en) | Meter amplifier | |
| US7057445B2 (en) | Bias voltage generating circuit and differential amplifier | |
| US9444405B1 (en) | Methods and structures for dynamically reducing DC offset | |
| CN116224033A (en) | Fast common mode detection circuit of full differential amplifier | |
| JP2003163550A (en) | Amplifier circuit | |
| CN209930214U (en) | Novel common mode level shift circuit for operational amplifier | |
| JP2005345199A (en) | Differential peak detection circuit | |
| TWI780301B (en) | Signal detection circuit and signal detection method | |
| CN210041789U (en) | Biasing circuit, integrated clock circuit and integrated circuit chip | |
| CN217561964U (en) | Threshold voltage adjusting circuit | |
| JP2007110233A (en) | Operational amplifier | |
| CN112242823A (en) | Differential input circuit, control method thereof and differential amplifier | |
| CN216086592U (en) | Electronic device | |
| CN112600521B (en) | Switch circuit for adjusting offset voltage of amplifier, adjusting circuit and amplifier |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |