CN209930214U

CN209930214U - Novel common mode level shift circuit for operational amplifier

Info

Publication number: CN209930214U
Application number: CN201920860211.0U
Authority: CN
Inventors: 王博; 刘昱; 王小松; 胡海; 王明华; 秦梦莹; 箫延彬; 陈思超
Original assignee: Shanghai Yiyi Semiconductor Co Ltd
Current assignee: Shanghai Yiyi Semiconductor Co Ltd
Priority date: 2019-06-10
Filing date: 2019-06-10
Publication date: 2020-01-10
Anticipated expiration: 2029-06-10

Abstract

The utility model provides a novel common mode level shift circuit for fortune is put, wherein, common mode level shift circuit includes three input operational amplifier and self-adaptation current biasing circuit. The utility model controls the output of the self-adaptive current bias circuit to always keep the working level of the preset differential input pair of the subsequent main operational amplifier through the three-input operational amplifier; the self-adaptive current bias circuit controls the switching of the N/PMOS voltage-controlled current source by taking a common-mode voltage from the input differential signal, so that the main operational amplifier can normally work in a wide common-mode input range. Compared with the prior art, the utility model the advantage lies in circuit structure is simple, has invariable input bias current, has increased the stability that main fortune was put.

Description

Novel common mode level shift circuit for operational amplifier

Technical Field

The utility model relates to an integrated circuit technical field especially relates to a novel common mode level offset circuit for fortune is put.

Background

In the field of integrated circuits, with the development of mos technology, the power supply voltage decreases in equal proportion to the reduction of mos size, but the threshold voltage of mos is not reduced in equal proportion. Typically, the common mode voltage is 1/2Vdd in the design to ensure a good swing and a small signal maximum input range. For a standard CMOS process, the threshold voltage is generally between 0.6-0.7V, so the minimum operating voltage of a conventional operational amplifier is generally above about 1.4V. However, when the power supply voltage is reduced with the reduction of mos size, the common mode voltage is not enough to ensure the operational amplifier to work properly. Under the condition that a mos tube with low threshold voltage is adopted without increasing the process cost, the circuit structure must be optimally designed, so that the operational amplifier has an input common mode level irrelevant to Vdd.

A common solution is to add a level shift circuit to the operational amplifier input stage, where a conventional level shift circuit is shown in fig. 1, and the input common mode level is raised/lowered by dividing voltage through resistors, and two sets of amplifier tubes respectively work in different common mode regions, and the input common mode voltage is clamped by feedback to ensure that the subsequent main operational amplifier works at a fixed common mode level. However, it is difficult to ensure smooth switching of the two amplifier tubes and to ensure matching and the same bias current of the two amplifier tubes. When the current flowing through the resistor is high, the whole circuit is caused to enter an unstable state.

In view of the above, the present invention provides a novel common mode level shift circuit for operational amplifier to overcome the above-mentioned problems.

SUMMERY OF THE UTILITY MODEL

The utility model aims at providing a novel common mode level offset circuit for fortune is put, compare the advantage with the conventional art and lie in circuit structure simply, have invariable input bias current, increased the stability that main fortune was put.

The utility model discloses a realize through following technical scheme:

a novel common mode level shift circuit for operational amplifier, characterized in that: the common mode level shift circuit includes a three input operational amplifier and an adaptive current bias circuit. The three-input operational amplifier controls the output of the self-adaptive current bias circuit to be always kept at a preset working level of a differential input pair of a subsequent main operational amplifier; the self-adaptive current bias circuit controls the switching of the N/PMOS voltage-controlled current source by taking a common-mode voltage from the input differential signal, so that the main operational amplifier can normally work in a wide common-mode input range.

In one embodiment, the three-input operational amplifier comprises current sources I1-I2, mos tubes M13-M20; wherein,

one end of the current source I1 and one end of the current source I2 are both connected with the power supply voltage Vdd; the other end of the current source I1 is connected with the drain electrode of the mos tube M13 and the adaptive current bias circuit; the grid electrode of the mos tube M13 is connected with the drain electrode of the mos tube M16, the source electrode of the mos tube M18 and the source electrode of the mos tube M19; the source electrode of the mos tube M13 is connected with the source electrode of the mos tube M14 and the source electrode of the mos tube M15, and the source electrodes are grounded; the grid electrode of the mos tube M14 is connected with the grid electrode of the mos tube M15, the drain electrode of the mos tube M17 and the source electrode of the mos tube M20; the drain electrode of the mos tube M14 is connected with the source electrode of the mos tube M16; the drain electrode of the mos tube M15 is connected with the source electrode of the mos tube M17; the grid of the mos tube M16 is connected with the grid of the mos tube M17 and is connected with a bias voltage V2; the grid electrode of the mos tube M18 is connected with the adaptive current bias circuit; the source electrode of the mos tube M18 is connected with the source electrode of the mos tube M19, the source electrode of the mos tube M20 and the other end of the current source I2; the gate of the mos transistor M19 is connected to the adaptive current bias circuit.

In one embodiment, the adaptive current bias circuit comprises a current source I3, resistors R1-R6, mos tubes M1-M12 and a comparator; wherein,

one end of the resistor R1 is connected with the positive input end, one end of the resistor R3 and one end of the resistor R5; the other end of the resistor R1 is connected with the source electrode of the mos tube M1, one end of the resistor R2 and the negative input end of the comparator; the other end of the resistor R2 is connected with the negative input end, one end of the resistor R4 and one end of the resistor R6; the other end of the resistor R3 is connected with the source electrode of the mos tube M2; the other end of the resistor R4 is connected with the source electrode of the mos tube M3; the other end of the resistor R5 is connected with the source electrode of the mos tube M4; the other end of the resistor R6 is connected with the source electrode of the mos tube M5; the grid electrode of the mos tube M1 is connected with the drain electrode of the mos tube M1, one end of the current source I3, the grid electrode of the mos tube M2 and the grid electrode of the mos tube M3; the drain electrode of the mos tube M2 is connected with the source electrode of the mos tube M4, the drain electrode of the mos tube M7 and the drain electrode of the mos tube M10; the drain electrode of the mos tube M3 is connected with the source electrode of the mos tube M5, the drain electrode of the mos tube M6 and the drain electrode of the mos tube M9; the grid of the mos tube M4 is connected with the output end of the comparator, and the grid of the mos tube M5 is connected; the source electrode of the mos tube M6, the source electrode of the mos tube M7 and the source electrode of the mos tube M8 are connected with a power supply voltage Vdd; the grid electrode of the mos tube M6 is connected with the grid electrode of the mos tube M7, the grid electrode of the mos tube M8 and the drain electrode of the mos tube M8, and the grid electrodes are all connected with a current source I4; the grid of the mos tube M9 is connected with the grid of the mos tube M10, and bias voltage V1 is connected; the source electrode of the mos tube M9 is connected with the drain electrode of the mos tube M11 and the three-input operational amplifier; the drain electrode of the mos tube M10 is connected with the drain electrode of the mos tube M12 and the three-input operational amplifier; the grid electrode of the mos tube M11 is connected with the grid electrode of the mos tube M12 and is connected into the three-input operational amplifier; the source of the mos transistor M11 is connected with the source of the mos transistor M12, and both are grounded.

Description of the drawings:

FIG. 1 is a diagram of a conventional common mode level shift circuit;

fig. 2 is a schematic diagram of the novel common mode level shift circuit for operational amplifier of the present invention.

Detailed Description

The following provides a more detailed description of the embodiments of the present invention, with reference to the accompanying drawings.

As shown in fig. 2, a novel common mode level shift circuit for an operational amplifier, wherein the common mode level shift circuit comprises a three-input operational amplifier and an adaptive current bias circuit. The utility model controls the output of the self-adaptive current bias circuit to always keep the working level of the preset differential input pair of the subsequent main operational amplifier through the three-input operational amplifier; the self-adaptive current bias circuit controls the switching of the N/PMOS voltage-controlled current source by taking a common-mode voltage from the input differential signal, so that the main operational amplifier can normally work in a wide common-mode input range.

In one embodiment, the novel common mode level shift circuit for operational amplifier is characterized in that the three-input operational amplifier comprises current sources I1-I2 and mos tubes M13-M20; wherein,

The mos tube M1 adopts a diode connection method to form a current mirror with the mos tubes M1-M3, the early effect is ignored, and the direct current bias current of the mos tube M2 and the mos tube M3 is equal to the direct current bias current I3 of the mos tube M1; the resistor R1 and the resistor R2 adopt small resistors and are connected in parallel to obtain common-mode voltage Vcm of input signals Vinp and Vinn; for circuit matching, R3 ═ R4 ═ 1/2R1 ═ 1/2R2 is generally taken; when the common-mode voltage Vcm of the input signals Vinp and Vinn is larger than Vsg1, the comparator outputs low level, the mos tubes M1-M3 are conducted, and the mos tubes M4-M5 are disconnected; with the change of Vcm, the source electrode potential of the mos transistor M1-M3 connected with the diode will change along with the change of Vcm, and the voltage at the two ends of the resistors R3-R4 is kept constant; therefore, as long as Vcm is large enough, the mos transistor M1-M3 can be ensured to work in an amplification region, and meanwhile, the bias current is constant; the mos tube M4-M5 forms a pair of voltage-controlled current sources, and the grid electrodes of the voltage-controlled current sources are controlled by output signals of the comparator; the input signals Vinp and Vinn and the two pairs of resistors R5 and R6 form a loop, and in order to reduce the influence of the loop on the input signals, the resistors R5 and R6 are large resistors; when the common mode voltage of the input signals Vinp and Vinn is smaller than the predetermined working voltage Vref, the output signal of the comparator is pulled to Vdd from low level, so that the mos transistors M1-M3 are turned off, the mos transistors M4-M5 are turned on and supply current to the resistors R5-R6, and the input common mode voltage is divided by the resistors to be shifted from low level to high level. Therefore, the switching of the P/NMOS voltage-controlled current source is controlled through common-mode detection and negative feedback, the input common-mode level is stabilized near the preset working voltage, the small signal is hardly influenced in the process because the internal resistance of the alternating current small signal of the current source is very high, and various influences of the common-mode signal on the operational amplifier can be avoided by inputting the adjusted signal into the main operational amplifier.

The mos tube M20 is the positive phase input end of the operational amplifier, and the mos tubes M18-M19 are equivalent to the negative phase input end of the operational amplifier; in order to reduce the influence of the channel length modulation effect on the circuit, the load tubes M14-M17 adopt a cascode connection mode, the width-to-length ratios of the mos tubes M16-M17 and the mos tubes M14-M15 are all 1:1, and in order to realize circuit matching, the current flowing through the mos tubes M18-M20 is in a ratio of 1:1: 2; the three input ends of the operational amplifier are fixed on the same potential by utilizing the virtual short characteristic of the operational amplifier working in the linear amplification area, so that the common-mode potential of the input signal can be kept at Vref.

The embodiment just is for explaining above the utility model discloses a technique and characteristics, nevertheless the utility model discloses do not limit to above the embodiment, do not deviate from the utility model discloses under the prerequisite of principle, all the utility model discloses the equivalent change and the decoration that the application for patent range was made all belong to the utility model discloses a protection scope.

Claims

1. A novel common mode level shift circuit for operational amplifier is characterized by comprising a three-input operational amplifier and a self-adaptive current bias circuit which are electrically connected in sequence; wherein,

the three-input operational amplifier is used for controlling the output of the self-adaptive current bias circuit to be always kept at the preset working level of a differential input pair of a subsequent main operational amplifier;

the self-adaptive current bias circuit is used for taking a common mode for the input differential signal and controlling the switching of the N/PMOS voltage-controlled current source so as to ensure that the main operational amplifier can normally work in a wide common mode input range.

2. The novel common mode level shift circuit for operational amplifiers of claim 1 wherein the three input operational amplifier comprises a current source I₁-I₂Mos tube M₁₃-M₂₀(ii) a Wherein,

current source I₁One terminal of (1) and a current source I₂And are all connected to the supply voltage V_ddConnecting; current source I₁The other end of (2) and a mos tube M₁₃The drain electrode of the self-adaptive current biasing circuit is connected with the self-adaptive current biasing circuit; mos tube M₁₃Grid and mos tube M₁₆Drain electrode of (M), mos tube₁₈Source electrode of (M), mos tube₁₉The source electrodes of the two-way transistor are connected; mos tube M₁₃Source electrode of (1) and mos tube M₁₄Source electrode of (M), mos tube₁₅The source electrodes are connected and are all grounded; mos tube M₁₄Grid and mos tube M₁₅Grid electrode of (M), mos tube₁₇Drain electrode of (M), mos tube₂₀The source electrodes of the two-way transistor are connected; mos tube M₁₄Drain electrode of (2) and mos tube M₁₆The source electrodes of the two-way transistor are connected; mos tube M₁₅Drain electrode of (2) and mos tube M₁₇The source electrodes of the two-way transistor are connected; mos tube M₁₆Grid and mos tube M₁₇Is connected to a bias voltage V₂(ii) a mos tube M₁₈The grid of the self-adaptive current bias circuit is connected with the self-adaptive current bias circuit; mos tube M₁₈Source electrode of (1) and mos tube M₁₉Source electrode of (M), mos tube₂₀Source electrode, current source I₂The other ends of the two are connected; mos tube M₁₉Is connected to the adaptive current bias circuit.

3. The novel common-mode level-shift circuit for operational amplifiers of claim 1 wherein the adaptive current bias circuit comprises a current source I₃Resistance R₁-R₆Mos tube M₁-M₁₂And a comparator; wherein，

Resistance R₁One end of (1) and the positive input end, a resistor R₃One terminal of (1), resistance R₅One end of the two ends are connected; resistance R₁The other end of (2) and a mos tube M₁Source electrode, resistance R₂One end of the comparator is connected with the negative input end of the comparator; resistance R₂The other end of the resistor R, the negative input end of the resistor R₄One terminal of (1), resistance R₆One end of the two ends are connected; resistance R₃The other end of (2) and a mos tube M₂The source electrodes of the two-way transistor are connected; resistance R₄The other end of (2) and a mos tube M₃The source electrodes of the two-way transistor are connected; resistance R₅The other end of (2) and a mos tube M₄The source electrodes of the two-way transistor are connected; resistance R₆The other end of (2) and a mos tube M₅The source electrodes of the two-way transistor are connected; mos tube M₁Grid and mos tube M₁Drain electrode of (1), current source I₃One end of (mo) tube M₂Grid electrode of (M), mos tube₃The grid electrodes are connected; mos tube M₂Drain electrode of (2) and mos tube M₄Source electrode of (M), mos tube₇Drain electrode of (M), mos tube₁₀The drain electrodes of the two electrodes are connected; mos tube M₃Drain electrode of (2) and mos tube M₅Source electrode of (M), mos tube₆Drain electrode of (M), mos tube₉The drain electrodes of the two electrodes are connected; mos tube M₄Gate of (2) and output of comparator, mos transistor M₅The grid electrodes are connected; mos tube M₆Source electrode of (M), mos tube₇Source electrode and mos tube M of₈Is equal to the power supply voltage V_ddConnecting; mos tube M₆Grid and mos tube M₇Grid electrode of (M), mos tube₈Grid electrode of (M), mos tube₈Are connected with each other and are all connected with a current source I₄(ii) a mos tube M₉Grid and mos tube M₁₀Are connected with each other and are all connected with a bias voltage V₁(ii) a mos tube M₉Source electrode of (1) and mos tube M₁₁The drain electrode of the operational amplifier is connected with the three-input operational amplifier; mos tube M₁₀Drain electrode of (2) and mos tube M₁₂The drain electrode of the operational amplifier is connected with the three-input operational amplifier; mos tube M₁₁Grid and mos tube M₁₂The grid electrodes are connected and are all connected into the three-input operational amplifier; mos tube M₁₁Source electrode of (1) and mos tube M₁₂Are connected and are all grounded.