CN115904835A

CN115904835A - Cable detection method and server

Info

Publication number: CN115904835A
Application number: CN202211383775.2A
Authority: CN
Inventors: 冯维雄; 秦颂力; 郑世贵
Original assignee: XFusion Digital Technologies Co Ltd
Current assignee: XFusion Digital Technologies Co Ltd
Priority date: 2022-11-07
Filing date: 2022-11-07
Publication date: 2023-04-04

Abstract

The application provides a cable detection method and a server, relates to the technical field of cable connection, and can ensure the accuracy of cable detection in a multi-cable connection scene. The method comprises the following steps: acquiring a first signal value on a first high-speed connector of a mainboard connected with external equipment; the first high-speed connector of the mainboard is connected with the second high-speed connector of the external equipment through a cable; acquiring a second signal value on a second high-speed connector of the external equipment; and comparing the first signal value with the second signal value, and determining the cable wiring condition between the first high-speed connector and the second high-speed connector according to the comparison result. The method and the device can be used in the process that the server is connected with the peripheral.

Description

Cable detection method and server

Technical Field

The application relates to the technical field of cable connection, in particular to a cable detection method and a server.

Background

With the high-speed development of the computer industry, more high-speed signal interfaces are integrated on a motherboard of a computer, and an external device (e.g., a riser card, etc.) can be connected through a high-speed connector on the motherboard, for example, the riser card can be butted with the high-speed connector on the motherboard through a plurality of signal cables (or simply referred to as cables). Functional cards with stronger functions, such as network cards or video cards, are inserted into the riser card to support the functional cards inserted into the riser card to transmit signals with different functions through the high-speed connector.

Therefore, in order to ensure that the external device normally transmits signals through the high-speed connector, cable detection needs to be performed on one or more cables connected between the external device and the high-speed connector. The cable detection refers to a detection processing mechanism for detecting connection conditions of cables (such as power cables or signal cables) in a computer, and the connection conditions of the cables are used for indicating connection relations of connectors at two ends of the cables.

In the current cable detection scheme, a Complex Programmable Logic Device (CPLD) on a motherboard sends Pulse Width Modulation (PWM) waves with different duty ratios to loop back (output after input to an external device) on the external device, and the CPLD on the motherboard receives the PWM waves after the loop back and identifies the looped PWM waves to determine the cable connection condition. However, in a multi-cable wiring scenario, different cables need PWM waves with different duty ratios to be distinguished, but the PWM waves have signal attenuation conditions, which may cause the duty ratios of different cables to fluctuate, so that the CPLD is difficult to distinguish different cables according to the duty ratios, and the cable detection is inaccurate.

Disclosure of Invention

The application provides a cable detection method and a server, which can ensure the accuracy of cable detection in a multi-cable connection scene.

In a first aspect, the present application provides a cable detection method, including: acquiring a first signal value on a first high-speed connector of a mainboard connected with external equipment; the first high-speed connector of the mainboard is connected with the second high-speed connector of the external equipment through a cable; acquiring a second signal value on a second high-speed connector of the external equipment; and comparing the first signal value with the second signal value, and determining the cable wiring condition between the first high-speed connector and the second high-speed connector according to the comparison result.

According to the cable detection method, the first signal value on the first high-speed connector of the mainboard connected with the external equipment is obtained, the second signal value on the second high-speed connector of the external equipment is obtained, the first signal value and the second signal value are compared, and the cable wiring condition between the external equipment and the high-speed connector of the mainboard is determined according to the comparison result. According to the scheme, the effect of rapidly determining whether the wiring is correct is achieved by comparing the signal value in the initial state with the connected signal value. Compared with the traditional cable detection scheme, the method does not need to send PWM waves, and the scheme for comparing the signal values is more accurate in detection effect and less prone to error.

In one possible implementation, the first high speed connector and the second high speed connector include one or more ports; one or more ports of the first high-speed connector correspond to one or more ports of the second high-speed connector one by one; the first signal value is a register value corresponding to one or more ports of the first high-speed connector after the ports are arranged according to a preset sequence; the second signal value is a data combination of level values output by one or more ports of the second high-speed connector arranged according to a preset sequence.

In another possible implementation manner, determining the cable connection condition between the external device and the high-speed connector according to the comparison result includes: if the first signal value is consistent with the second signal value, the cable is determined to be correctly wired; and if the first signal value is inconsistent with the second signal value, determining that the cable is in a wrong wiring state and generating an alarm.

In another possible implementation manner, the method further includes: and storing the corresponding relation between the second signal value and the identification information of the external equipment.

In another possible implementation manner, the method further includes: comparing the first signal value with the third signal value, and determining whether external equipment is in place on the mainboard according to the comparison result; the third signal value is a register value corresponding to the first high-speed connector of the mainboard when no external equipment is in place. Obtaining a second signal value on a second high-speed connector of the external device, comprising: and when the external equipment is determined to be on the mainboard, acquiring a second signal value on a second high-speed connector of the external equipment.

In another possible implementation manner, the obtaining a second signal value on a second high-speed connector of the external device includes: reading identification information of the external equipment; inquiring the corresponding relation according to the read identification information of the external equipment to obtain a second signal value; the corresponding relation is used for indicating that the second signal value corresponds to the identification information of the external equipment.

In another possible implementation manner, the method is executed by a board management controller BMC on the motherboard; the mainboard further comprises a Complex Programmable Logic Device (CPLD) coupled with the first high-speed connector, and the CPLD is used for reading and reporting a first signal value on the first high-speed connector to the BMC; acquiring a first signal value on a first high speed connector, comprising: the BMC obtains a first signal value on the first high-speed connector reported by the CPLD.

In a second aspect, the present application provides a cable detection apparatus, the apparatus comprising: the device comprises an acquisition module and a determination module. The acquisition module is used for acquiring a first signal value on a first high-speed connector of a mainboard connected with external equipment; the first high-speed connector of the mainboard is connected with the second high-speed connector of the external equipment through a cable; the acquisition module is also used for acquiring a second signal value on a second high-speed connector of the external equipment; the determining module is used for comparing the first signal value with the second signal value and determining the cable wiring condition between the first high-speed connector and the second high-speed connector according to the comparison result.

In another possible implementation manner, the determining module is specifically configured to determine that the cable is correctly wired if the first signal value is consistent with the second signal value; and if the first signal value is inconsistent with the second signal value, determining that the cable is in a wrong wiring state and generating an alarm.

In another possible implementation manner, the apparatus further includes: and a storage module. And the storage module is used for storing the corresponding relation between the second signal value and the identification information of the external equipment.

In another possible implementation manner, the determining module is further configured to compare the first signal value with the third signal value, and determine whether the external device is in place on the motherboard according to a comparison result; the third signal value is a register value corresponding to the first high-speed connector of the mainboard when no external equipment is in place. The obtaining module is specifically configured to obtain a second signal value on a second high-speed connector of the external device when it is determined that the external device is on the motherboard.

In another possible implementation manner, the obtaining module is specifically configured to read identification information of the external device; inquiring the corresponding relation according to the read identification information of the external equipment to obtain a second signal value; the corresponding relation is used for indicating that the second signal value corresponds to the identification information of the external equipment.

In another possible implementation manner, the obtaining module is specifically configured to obtain a first signal value on the first high-speed connector reported by the CPLD.

In a third aspect, the present application provides a server, including a motherboard and an external device; the mainboard is provided with a first high-speed connector, a CPLD and a BMC; one end of the CPLD is coupled with the first high-speed connector, and the other end of the CPLD is coupled with the BMC; the external equipment is provided with a second high-speed connector; the first high-speed connector on the mainboard is connected with the second high-speed connector of the external equipment through a cable; the CPLD is used for acquiring a first signal value of the first high-speed connector and sending the first signal value to the BMC, the BMC is used for acquiring a second signal value of the second high-speed connector and determining the cable wiring condition between the first high-speed connector and the second high-speed connector according to a comparison result of the first signal value and the second signal value, and the comparison result comprises consistency or inconsistency.

In one possible implementation, the second high-speed connector includes one or more ports; the second signal value is a data combination formed by arranging level values output by one or more ports of the second high-speed connector according to a preset sequence; each port of the second high-speed connector is coupled with a pull-up resistor or a pull-down resistor; the pull-up resistor is used for setting a level value on a port coupled with the pull-up resistor to be a high level; the pull-down resistor is used to set a level value on a port coupled to the pull-up resistor to a low value.

In another possible implementation manner, the BMC is further configured to compare the first signal value and the third signal value, and determine whether an external device is in place on the motherboard according to a comparison result; the third signal value is a register value corresponding to the first high-speed connector of the mainboard when no external equipment is in place.

In a fourth aspect, the present application provides a computing device comprising: a processor and a memory; the memory stores instructions executable by the processor; the processor is configured to execute the instructions, such that the computing device implements the method of the first aspect described above.

In a fifth aspect, the present application provides a computer-readable storage medium comprising: computer software instructions; the computer software instructions, when executed in a computing device, cause the computing device to carry out the method of the first aspect described above.

In a sixth aspect, the present application provides a computer program product which, when run on a computing device, causes the computing device to perform the steps of the related method described in the first aspect above, so as to implement the method of the first aspect above.

The beneficial effects of the second to sixth aspects may refer to the corresponding descriptions of the first aspect, and are not described again.

Drawings

Fig. 1 is a schematic application environment diagram of a cable detection method provided in the present application;

fig. 2 is a schematic wiring diagram of a lift card 1 provided in the present application;

FIG. 3 is a schematic diagram of a high-speed connector on a motherboard according to the present application;

fig. 4 is a schematic flow chart of a cable detection method provided in the present application;

FIG. 5 is a schematic flow chart of an in-situ detection method provided by the present application;

fig. 6 is a schematic diagram illustrating a connection between a riser card and a motherboard according to the present application;

fig. 7 is a schematic diagram of a connection between a riser card and a motherboard according to the present application;

FIG. 8 is a schematic diagram of a cable detection process provided herein;

FIG. 9 is a schematic diagram of a server provided in the present application;

FIG. 10 is a schematic diagram of a cable detecting device according to the present application;

fig. 11 is a schematic composition diagram of a computing device provided in the present application.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

It should be noted that in the embodiments of the present application, words such as "exemplary" or "for example" are used to mean serving as examples, illustrations or descriptions. Any embodiment or design described herein as "exemplary" or "e.g.," is not necessarily to be construed as preferred or advantageous over other embodiments or designs. Rather, use of the word "exemplary" or "such as" is intended to present concepts related in a concrete fashion.

For the convenience of clearly describing the technical solutions of the embodiments of the present application, in the embodiments of the present application, the terms "first", "second", and the like are used for distinguishing the same items or similar items with basically the same functions and actions, and those skilled in the art can understand that the terms "first", "second", and the like are not limited in number or execution order.

In order to facilitate understanding of the technical solutions of the present application, the following briefly introduces terms related to the present application.

1. An external device, referred to as a peripheral for short, is a component for extending the functions of a server. Such as a video card, a riser card, a network card, a sound card, etc. The external device includes a Field Replacement Unit (FRU). The FRU is a component which can be directly disassembled, replaced and upgraded on external equipment. The board name of the external device is stored in the FRU and used for indicating the conditions of the upgrading version of the device and the like, and the board name can be used as the unique identifier of the device.

2. The riser card may also be referred to as a function expansion card, riser card (riser), or adaptor card. The device is a device for plugging various function cards, which is led out on the basis that various function cards (such as network cards, display cards and the like) cannot be plugged on a mainboard of the server due to the design limitation of the mechanism of the server. The lift card can be connected to a motherboard of a server through a cable, for example, a plug is provided on a cable drawn out from the lift card, and the plug can be plugged into an interface slot (or referred to as a slot) of a high-speed connector on the motherboard, so as to support various function cards plugged into an external device to transmit signals and/or data between the external device, the high-speed connector and other function components on the motherboard.

3. High-speed connector, interface for signal transmission on the mainboard or external equipment. The high-speed connector may be a peripheral component interconnect express (PCIe) interface. For example, a motherboard of the server provides a slot (non-standard PCIe interface), and then the PCIe riser card is plugged into the slot by a cable, while the PCIe riser card provides at least one slot of standard PCIe interface, which supports plugging at least one functional card (e.g., a network card, a video card, etc.) into the PCIe riser card. The standard PCIe interface and the non-standard PCIe interface provide different rated voltages.

4. The clamping is a measure for limiting the potential at a certain point to a predetermined potential or higher.

5. Pull-up resistor: the pull-up is to connect a signal to the power supply through a resistor to clamp the signal at a high level, and the resistor also plays a role of current limiting. This resistance is called the pull-up resistance.

6. And (3) pulling down a resistor: pulling down is to connect a signal to ground through a resistor to clamp the signal low, which is called a pull-down resistor. It is understood that high and low are relative terms, and generally speaking, high is 3.5-5 volts and low is 0-0.25 volts. In the embodiment of the present application, the high and low levels are described as digital signals, that is, the high level may be represented by 1, and the low level may be represented by 0.

As described in the background art, with the rapid development of the computing industry, the CPU of the current server integrates more high-speed signal interfaces, and can interface with more powerful external devices through a high-speed connector on the motherboard. In order to ensure that the external equipment can normally operate after being accessed into the server, the cable detection is indispensable. The cable detection is a detection processing mechanism of the connection condition of a power supply or a signal cable in a server/computer, can detect the connection relationship of two end connectors of the cable, and can give an alarm in time when the connection is wrong.

At present, the functions of external equipment are increasingly enhanced, and a plurality of cables are required to be connected with a mainboard. For example, for a lift card, the current lift card itself supports the plugging of multiple network cards or video cards, so that the lift card needs multiple cables to communicate with a motherboard to transmit signals with different functions, and this wiring scenario is called a multi-cable wiring scenario. For a multi-line wiring scene, the current cable detection scheme is to distinguish the connection conditions of different cables through PWM waves with different duty ratios. If a plurality of external devices are connected to the main board, the number of cables is dozens, and thus the corresponding duty ratio is dozens. Furthermore, the PWM wave has a problem of signal attenuation, which causes duty ratio fluctuation, so that it is required to have high identification precision enough to distinguish different cables, but it is difficult to realize such high-precision identification effect by the current technical means. In summary, how to ensure the cable detection effect in the multi-cable connection scene is a problem that needs to be solved urgently.

In this background, an embodiment of the present application provides a cable detection method, where in a case where it is determined that an external device is plugged into a first high-speed connector on a motherboard, a first signal value on the first high-speed connector of the motherboard to which the external device is connected is obtained, a second signal value on a second high-speed connector of the external device is obtained, the first signal value and the second signal value are further compared, and a cable connection condition between the external device and the high-speed connector of the motherboard is determined according to a comparison result. By using the method, whether the wiring of the cable between the external equipment and the main board is correct can be determined by comparing the signal values of the high-speed connectors on the external equipment side and the main board side, the traditional scheme of sending PWM waves can be replaced, and the detection effect is more accurate.

The cable detection method provided by the application can be applied to the application environment shown in fig. 1. As shown in fig. 1, the application environment may include: a server motherboard (abbreviated as motherboard), a riser card, and other peripherals. The lifting card and other peripheral equipment are the external equipment. The other peripheral devices may be a backplane, a graphics card, a network card, a Host Bus Adapter (HBA) card, and the like. The specific number of the external devices may be determined according to an actual scene, and fig. 1 illustrates that the number of the riser cards is two (the riser card 1 and the riser card 2, respectively), and the number of the other peripheral devices is also two. In addition, the number of cables corresponding to different elevator cards is different, for example, the number of cables corresponding to the elevator cards with different specifications is different between the elevator cards with x8 specification and the elevator cards with x16 specification. Fig. 1 illustrates an example in which the elevator card 1 uses two cable connection boards, and the elevator card 2 uses three cable connection boards.

Note that the first high-speed connector is a high-speed connector on the main board side. The second high-speed connector is a high-speed connector on the external device side. The embodiment of the present application does not limit the specific form of the first high-speed connector and the second high-speed connector, for example, the form of the first high-speed connector may be a slot on a motherboard, and the form of the second high-speed connector may be a cable with a metal pin (or referred to as a gold finger) led out from an external device. For another example, the first high-speed connector may be in the form of a female port on a motherboard, and the second high-speed connector may be a cable with a male port that is led out from an external device. For example, the first high-speed connector and the second high-speed connector are both female connectors and are connected by a cable having male connectors at both ends. In addition, the second high speed connector may also refer to a plurality of high speed connectors. For example, in fig. 1, the elevator card 1 uses two cables, and the second high-speed connector of the elevator card 1 refers to two high-speed connectors corresponding to the two cables in the elevator card 1. This is not particularly limited by the examples of the present application.

The cable detection method provided by the embodiment of the present application is described in detail below with reference to specific embodiments.

First, the second high-speed connector on the external device is configured with the level value combination of the sideband signal (i.e., the second signal value described in the independent claim).

The sideband signal is a signal output to the mainboard after the external equipment is powered on, and the external equipment can output the sideband signal through the high-speed connector to perform data interaction with the mainboard. Specifically, the sideband signal is output to the motherboard through each port (or called pin) on the high-speed connector, and a set of some ports corresponds to one cable. According to the method and the device, the level value combination (namely the second signal value) of the side band signal of the external equipment is configured by configuring the level value of each port output side band signal, and the level value combination is used for detecting the cable connection condition between the external equipment and the mainboard.

Specifically, a pull-up resistor or a pull-down resistor is coupled to a port of the second high-speed connector to configure a second signal value on the second high-speed connector of the external device. In this example, the second signal value may also be referred to as a pull-up-down combination or a pull-up-down combination signal.

As mentioned above, the pull-up refers to connecting an indeterminate signal to a power supply through a resistor to clamp high, and the pull-down refers to connecting an indeterminate signal to ground through a resistor to clamp low. Therefore, in the method adopted by the embodiment of the present application, each port of the second high-speed connector is coupled with a pull-up or pull-down resistor, so that the level value of the sideband signal output by each port of the external device is at a low level or a high level (i.e., outputs a high level or outputs a low level).

For example, fig. 2 is a schematic diagram illustrating that the second signal value of the card 1 is set by the pull-up resistor and the pull-down resistor according to the embodiment of the present application. As described with reference to fig. 1, the riser card 1 is connected to the main board via two cables. Thus, the riser card shown in FIG. 2 includes two high speed connectors, high speed connector 0 and high speed connector 1. The high-speed connector 0 is illustrated as an example, and includes four ports, which are ports abcd from top to bottom in the figure. It is to be understood that the terms "upper", "lower", and the like used herein to describe various aspects of the invention are used in a generic and descriptive sense only and not for purposes of limitation. Among them, the port a and the port b are connected to the power source through the pull-up resistor, that is, the port a and the port b may output a high level. The port c and the port d are grounded through a pull-down resistor, that is, the port c and the port d can output a low level. Thus, the combination of level values output by the high speed connector 0 may be represented as "1100" in the preset order of a-d. Similarly, the high-speed connector 1 may include four ports, which are illustrated as ports abcd from top to bottom in the drawing. Wherein, the port a and the port b are grounded through a pull-down resistor, that is, the port a and the port b can output a low level. The port c and the port d are connected with the power supply through a pull-up resistor, namely, the port c and the port d can output high level. Thus, the combination of level values output by the high speed connector 1 in the preset order of a-d may be denoted as "0011".

In summary, the second signal value (level value combination of signals on the side of the external device) output by the second high-speed connector of the riser card 1 may be represented as "1100 0011" in the order of the high-speed connector 0+ the high-speed connector 1. Similarly, the riser card 2 corresponds to three cables, and the second signal value thereof may be represented as "1000 0100 0001", for example.

It should be noted that the above description is only an example, the number of high speed connectors in the peripheral device, the number of ports in each high speed connector, and the pull-up and pull-down combination of the port configuration may all be determined according to an actual scenario, and the number and level value combination are not limited in the embodiment of the present application.

In addition, in order to ensure the effect of multi-cable detection, the values of the signals output by the high-speed connector 0 and the high-speed connector 1 in the riser card 1 should be different, so as to determine whether the cable connection conditions corresponding to different high-speed connectors are correct or not according to the level value combination output by different high-speed connectors on the riser card 1. That is, if there are a plurality of high-speed connectors corresponding to a plurality of cables in the external device, the combination of the pull-up and pull-down resistors disposed in any two high-speed connectors in the plurality of high-speed connectors is different, that is, any two cables correspond to different combinations of level values.

Further, a second signal value configured for the external device may be stored in a storage space of a controller provided on the motherboard, so that a subsequent controller may determine a cable connection condition corresponding to the external device according to the second signal value. Therefore, the staff can configure and store the corresponding relationship between the identification information of the external device and the second signal value in the controller on the mainboard, so that the controller can correspondingly store the second signal value and the identification information of the external device. For example, the controller may be a Micro Controller Unit (MCU) on a motherboard, such as a Board Management Controller (BMC), a CPLD (e.g., a motherboard CPLD for short) on the motherboard, or the like. Also illustratively, the controller may be a combination of both a BMC and a motherboard CPLD.

The identification information of the external device may be used to identify the external device, for example, the identification information of the external device may be a device model or a serial number of the external device or a board name of the external device.

Specifically, the staff can be according to "external device's identification information to different external devices: and in the form of a second signal value, establishing a cable detection white list and storing the cable detection white list in the controller. For example, in connection with the above example, the "cable detection white list" may be expressed as: "identification information of the expansion card 1: 1100 0011; identification information of the expansion card 2: 1000 0100 0001". The identification information of the expansion card may be a board name of the expansion card.

Optionally, the first high-speed connector on the motherboard may also configure the initial signal value by connecting the pull-up resistor and the pull-down resistor. For example, FIG. 3 provides a wiring schematic of a high speed connector on a motherboard. As shown in FIG. 3, the number of first high speed connectors shown in FIG. 3 is two, high speed connectors 1-1 and high speed connectors 1-2. The left side of the first high-speed connector can be used for connecting a second high-speed connector on the external equipment, and the right side of the first high-speed connector is coupled with a controller on the mainboard, so that the controller can read a signal value of the controller conveniently. Similarly, the terms "left", "right", etc. used herein to describe orientation are also intended to be used in a generic sense as defined in the drawings and not for purposes of limitation. For convenience of configuration, the level values of the sideband signals of the first high-speed connector port may be set to 1 or 0, respectively.

For the high-speed connector 1-1, the ABCD comprises four ports, wherein the first path of the ports A-C is connected with a power supply through a pull-up resistor, and the right side of the second path is connected with a controller on a mainboard. The first path of the port D is connected with a power supply on the controller through two resistors (33 k and 1 k), and the second path is grounded through a resistor 47 k. In addition, a line is also led out from the controller to connect the node o, so that the level value of the node o is read by the controller as the level value corresponding to the port D. Since the resistance of the first path is much smaller than that of the second path, the level value of the port D is also set to 1 in the initial condition. For the high speed connector 1-2, the connection condition is the same as that of the high speed connector 1-1, and the description is not repeated here.

Fig. 4 is a schematic flowchart of a cable detection method according to an embodiment of the present application. Illustratively, the cable detection method provided by the present application can be applied to the application environment shown in fig. 1.

As shown in fig. 4, the cable detection method provided by the present application may specifically include the following steps:

s401, a first signal value on a first high-speed connector of a mainboard connected with external equipment is obtained.

The first high-speed connector of the mainboard is connected with the second high-speed connector of the external equipment through a cable.

As previously described, one end of the first high speed connector is coupled to the controller. Therefore, in some embodiments, the controller may obtain the first signal value on the first high-speed connector connected to the external device by reading the register value corresponding to the first high-speed connector. The register is an internal component of the controller, is a storage unit, and can be used as an interface for coupling the controller with the first high-speed connector, and the level value corresponding to each port of the first high-speed connector is stored in the register. Thus, the controller may obtain the first signal value on the first high speed connector by reading the register value.

S402, acquiring a second signal value on a second high-speed connector of the external equipment. In some embodiments, the controller may obtain a second signal value on a second high speed connector of the peripheral. Specifically, as described above, the controller is configured with a "cable detection white list" in advance, which includes the second signal value of each external device. Therefore, after the external device is connected to the high-speed connector, the controller may send a signal for reading the identification information to the external device, and the response signal returned by the external device carries its own identification information. Further, the controller may query from the cable detection white list according to the identification information of the plugged external device to obtain a corresponding second signal value.

The first high-speed connector and the second high-speed connector comprise one or more ports, and the one or more ports of the first high-speed connector correspond to the one or more ports of the second high-speed connector in a one-to-one mode. The first signal value is a register value corresponding to one or more ports of the first high-speed connector after the ports are arranged according to a preset sequence. The second signal value is a data combination of level values output by one or more ports of the second high-speed connector arranged according to a preset sequence.

It should be noted that, for the in-place identification of the external device, an extra low-speed connector needs to be connected, that is, an extra low-speed cable is added to identify the in-place situation. In the multi-cable connection scenario, adding an additional low-speed connector may result in complex wiring and increased cost. According to the cable detection method provided by the embodiment of the application, an extra low-speed connector is not needed, and the function of in-place identification can be realized through the inherent high-speed connector for transmitting the functional signal. As shown in fig. 5, the specific steps of in-place identification may include the following S4021-S4022:

s4021, comparing the first signal value with the third signal value, and determining whether the external equipment is in place on the main board according to the comparison result.

And the third signal value is a register value corresponding to the first high-speed connector of the mainboard when no external equipment is in place on the first high-speed connector.

In some embodiments, as mentioned above, the third signal value is a default initial value when the motherboard-side high-speed connector is not connected to any external device. After the controller obtains the first signal value on the first high-speed connector of the motherboard, the controller may compare the first signal value with a previously configured third signal value, and if the first signal value is different from the third signal value (that is, it is detected that the register value on the motherboard side has changed), the controller may determine that the external device is in place on the high-speed connector.

Specifically, the controller may further determine which external device is in place according to a change of the first signal value compared with the third signal value. For example, the description is made in conjunction with the foregoing examples. The main board is provided with lifting card slots with different specifications for connecting lifting cards with different specifications. Two high-speed connectors exist in the promotion card 1, each connector is provided with 4 ports, four bits are taken as one group in the register values read by the controller after the promotion card 1 is connected to the mainboard, and two groups of values can be changed (any one bit of data in each group of data is changed, namely the group of data is changed). Three high-speed connectors exist in the riser card 2, and each connector has 4 ports, so that after the riser card 2 is connected to the mainboard, 3 groups of values in the register values read by the controller will change. Therefore, the controller can determine the in-place conditions of different riser cards according to the number of the numerical value groups of which the register values change.

It can be understood that the scheme can automatically judge the on-site conditions of different external devices by accessing the register value on the fixed high-speed connector, can save low-speed cables to realize the on-site identification condition, simplifies the circuit design and saves the production cost.

S4022, acquiring a second signal value on a second high-speed connector of the external device when the external device is in place.

In some embodiments, the controller may obtain a second signal value on a second high speed connector of the peripheral while the peripheral is in place. Specifically, the method for acquiring the second signal value on the second high-speed connector of the external device includes the following steps a and b:

a. and reading the identification information of the external equipment.

According to the changed register address, the controller determines that the first high-speed connector with the equipment in place exists, and further can read the identification information of the external equipment through the cable between the first high-speed connector and the second high-speed connector.

Specifically, the external device is provided with an FRU, and the FRU stores identification information of the external device. Such as the version number of the external device or the board name of the external device, etc. It should be understood that the present application is not limited to the functional module storing the identification information as an FRU, and other functional modules having the storage identification information may be substituted. The controller may send an acquisition request to an FRU on the external device via the cable for acquiring the identification information. After the FRU receives the fetch request, the identification information may be sent to the controller over the cable in response to the fetch request.

b. And inquiring the corresponding relation according to the read new type of the identifier of the external equipment to obtain a second signal value.

And the corresponding relation is used for indicating that the second signal value corresponds to the identification information of the external equipment.

After the identification information of the external device in place is obtained, the controller may query the corresponding relationship according to the read identification information of the external device to obtain a second signal value. That is, the controller may use the identification information to query the corresponding second signal value from its own stored "cable detection white list". For example, if the controller determines that the elevator card 1 is in place, the controller reads the identification information of the elevator card 1 and queries and obtains a second signal value of 1100 0011 on the second high-speed connector of the elevator card 1 from the cable detection white list according to the identification information.

The following description of the cable detection method is continued with reference to fig. 4. After acquiring the first signal value and the second signal value, the controller may further perform S403 as follows.

And S403, comparing the first signal value with the second signal value, and determining the cable connection condition between the first high-speed connector and the second high-speed connector according to the comparison result.

In some embodiments, the controller may compare the first signal value on the main board side with the second signal value on the external device side, and then determine the cable connection condition between the external device and the main board according to the comparison result. Specifically, if the first signal value is consistent with the second signal value, the cable is determined to be correctly wired; and if the first signal value is inconsistent with the second signal value, determining that the cable is in a wrong wiring state.

Further, in case of a cable connection error, an alarm signal may be issued. For example, the controller may instruct a light-emitting diode (LED) on the motherboard to flash to alert a wiring error.

The following description will specifically describe a process of comparing a first signal value and a second signal value by taking an external device as a riser card and referring to the accompanying drawings. For example, fig. 6 is a schematic diagram of a wiring between a riser card and a motherboard according to an embodiment of the present disclosure. As shown in fig. 6, the cable 1 led out from the high-speed connector 0 on the riser card 1 is connected to the high-speed connector 1-1 on the motherboard, and the cable 2 led out from the high-speed connector 1 on the riser card 1 is connected to the high-speed connector 1-2 on the motherboard. For the high-speed connector 1-1 and the high-speed connector 1-2 on the main board side, the pull-up resistor is connected to the port ABCD, so the corresponding register value is 1 initially, i.e. the third signal value on the main board side is denoted as "1111". For the high-speed connector 1-1, the ports ABCD of the high-speed connector 0 on the elevator card 1 are correspondingly plugged with the ports ABCD on the high-speed connector 1-1 one by one. As described above, the combination of the level values of the output signals of the high-speed connector 0 on the riser card 1 is "1100". After the cable 1 is plugged, the level values output by the port C and the port D are different from the original level values of the board-side high-speed connector 1-1 and are low, and the level values of the port C and the port D are pulled down to be 0. Therefore, the controller acquires the level value combination of the high-speed connector 1-1 by reading the register value as "1100". Similarly, the combination of the level values of the high-speed connectors 1-2 is denoted as "0011". Therefore, the first signal value acquired by the controller may be represented as "1100 0011" in the order of "high-speed connector 1-1+ high-speed connector 1-2".

In addition, the controller inquires and acquires that the second signal value of the elevator card 1 is represented as '1100 0011' from the cable detection white list, namely, the second signal value is determined to be consistent with the first signal value, which indicates that the cable between the elevator card 1 and the mainboard is correctly wired.

For another example, as shown in fig. 7, fig. 7 is a schematic diagram of a connection between a riser card and a motherboard according to an embodiment of the present application. As shown in fig. 7, the riser card 2 side includes a high-speed connector 2, a high-speed connector 3, and a high-speed connector 4, and their corresponding level value combinations are "1000", "0100", and "0001", respectively. The second signal value of the riser card 2 is therefore denoted as "1000 01000011". The main board side includes three high speed connectors, high speed connectors 1-3, high speed connectors 1-4, and high speed connectors 1-5, respectively. The high-speed connector 2 is connected with the high-speed connectors 1-3 through a cable 3, the high-speed connector 3 is connected with the high-speed connectors 1-5 through a cable 4, and the high-speed connector 4 is connected with the high-speed connectors 1-4 through a cable 5. It will be appreciated that the cable 4 is misaligned with the cable 5 connection.

After the riser card 2 is plugged into the motherboard, similarly, according to the sequence from top to bottom, the controller obtains the first signal value corresponding to the riser card 2 by reading the register value and indicates that the first signal value is "1000 0001 0100", and the second signal value of the riser card 2 obtained from the "cable detection white list" is "1000 0100 0001", so that the controller determines that the first signal value is inconsistent with the second signal value, and determines that the cable wiring between the riser card 2 and the motherboard is misaligned, and performs cable alarm prompting. For example by an indicator LED to indicate a cable wiring error.

In other embodiments, the detection method may be executed by a Board Management Controller (BMC) on the motherboard. In addition, the mainboard CPLD is coupled with the first high-speed connector and used for reading and reporting a first signal value on the first high-speed connector to the BMC. Specifically, the CPLD may read the register value, and report the read register value to the BMC through a local bus (local bus), so that the BMC may obtain a first signal value on the first high-speed connector reported by the CPLD.

Fig. 8 is a schematic flow chart of cable detection according to an embodiment of the present application. As shown in fig. 8, first, a cable detection white list is generated after configuring the high-speed connector on the card-lifting side to perform pull-up and pull-down combination (i.e., the high-speed connector port is coupled with a pull-up resistor or a pull-down resistor). In addition, the CPLD reads data (pull-up and pull-down combination) and reports the register value to the BMC. The BMC judges the position condition of the lifting card according to the acquired register value, and further can access the lifting card in place and read the FRU identification board name. And finally, determining whether the read data is matched with a cable detection white list, if so, correctly wiring the cable, and giving no alarm. If not, the cable gives an alarm.

According to the cable detection method provided by the embodiment of the application, the first signal value on the first high-speed connector of the mainboard connected with the external equipment is obtained, the second signal value on the second high-speed connector of the external equipment is obtained, then the first signal value and the second signal value are compared, and the cable wiring condition between the external equipment and the high-speed connector of the mainboard is determined according to the comparison result. According to the scheme, the effect of rapidly determining whether the wiring is correct is achieved by comparing the signal value in the initial state with the connected signal value. Compared with the traditional cable detection scheme, the method does not need to send PWM waves, and the scheme for comparing the signal values is more accurate in detection effect and less prone to error.

Furthermore, the scheme provides reading of the signal value on the high-speed connector, in-place detection of the external equipment can be achieved, an additional low-speed connector does not need to be configured, and production cost is reduced. In addition, in the scheme, the external equipment can be a lifting card, a network card and a display card, the controller can be BMC, CPLD and the like, and the replacement of parts of the external equipment is strong, so that the cable detection scheme provided by the scheme is also strong in universality and supports flexible expansion under various scenes. The signal value of the upper port of the high-speed connector is realized by configuring a pull-up resistor and a pull-down resistor, the circuit is simple in structure, and the cable detection effect is reliable.

It can be seen that the foregoing describes the solution provided by the embodiments of the present application primarily from a methodological perspective. In order to implement the functions described above, the embodiments of the present application provide corresponding hardware structures and/or software modules for performing the respective functions. Those of skill in the art will readily appreciate that the various illustrative modules and algorithm steps described in connection with the embodiments disclosed herein may be implemented as hardware or combinations of hardware and computer software. Whether a function is performed in hardware or computer software drives hardware depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.

The embodiment of the present application further provides a computing device, where the computing device may be a server, a notebook, a tablet, a terminal, and the like. For example, fig. 9 is a schematic composition diagram of a server according to an embodiment of the present application. As shown in fig. 9, the server includes: mainboard and external device. Wherein the content of the first and second substances,

the mainboard is provided with a first high-speed connector, a CPLD and a BMC; one end of the CPLD is coupled with the first high-speed connector, and the other end of the CPLD is coupled with the BMC; the external equipment is provided with a second high-speed connector; the first high-speed connector on the motherboard is connected with the second high-speed connector of the external device through a cable (two cables are exemplified in the figure).

The CPLD is used for acquiring a first signal value of the first high-speed connector and sending the first signal value to the BMC, the BMC is used for acquiring a second signal value of the second high-speed connector and determining the cable wiring condition between the first high-speed connector and the second high-speed connector according to the comparison result of the first signal value and the second signal value, and the comparison result comprises consistency or inconsistency.

In some embodiments, the second high speed connector includes one or more ports; each port of the second high-speed connector is coupled with a pull-up resistor or a pull-down resistor; the pull-up resistor is used for setting a level value on a port coupled with the pull-up resistor to be a high level; the pull-down resistor is used to set a level value on a port coupled to the pull-up resistor to a low value. For a specific connection situation, reference may be made to fig. 2 and the corresponding description, and repeated description is not repeated here.

In some embodiments, the BMC is further configured to compare the first signal value with the third signal value, and determine whether the external device is in place on the motherboard according to a comparison result; the third signal value is a register value corresponding to the first high-speed connector of the mainboard when no external equipment is in place.

Optionally, a unit (shown in the figure by using FRU as an example) for storing the identification information is further disposed on the external device. The BMC can send an obtaining request to the FRU through the cable to obtain the identification information of the external device, and then queries the corresponding relation according to the identification information to obtain a second signal value. In an exemplary embodiment, the present application further provides a cable detection device. The cable detection means may be the controller described above. The cable detection device may comprise one or more functional modules for implementing the cable detection method of the above method embodiments.

For example, fig. 10 is a schematic composition diagram of a cable detection device according to an embodiment of the present application. The cable detection means may be the controller described above. As shown in fig. 10, the cable device includes: an acquisition module 1001 and a determination module 1002.

The obtaining module 1001 is configured to obtain a first signal value on a first high-speed connector of a motherboard connected to an external device; the first high-speed connector of the mainboard is connected with the second high-speed connector of the external equipment through a cable.

The obtaining module 1001 is further configured to obtain a second signal value on a second high-speed connector of the external device.

The determining module 1002 is configured to compare the first signal value with the second signal value, and determine a cable connection condition between the first high-speed connector and the second high-speed connector according to a comparison result.

In some embodiments, the first high speed connector and the second high speed connector comprise one or more ports; one or more ports of the first high-speed connector correspond to one or more ports of the second high-speed connector in a one-to-one mode; the first signal value is a register value corresponding to one or more ports of the first high-speed connector after the ports are arranged according to a preset sequence; the second signal value is a data combination of level values output by one or more ports of the second high-speed connector arranged according to a preset sequence.

In some embodiments, the determining module 1002 is specifically configured to determine that the cable is correctly wired if the first signal value is consistent with the second signal value; and if the first signal value is inconsistent with the second signal value, determining that the cable is in a wrong wiring state and generating an alarm.

In some embodiments, the above apparatus further comprises: a save module 1003. The saving module 1003 is configured to save a corresponding relationship between the second signal value and the identification information of the external device.

In some embodiments, the determining module 1002 is further configured to compare the first signal value with the third signal value, and determine whether an external device is in place on the motherboard according to a comparison result; the third signal value is a register value corresponding to the first high-speed connector of the mainboard when no external equipment is in place. The obtaining module 1001 is specifically configured to obtain a second signal value on a second high-speed connector of the external device when it is determined that the external device is on the motherboard.

In some embodiments, the obtaining module 1001 is specifically configured to read identification information of the external device; inquiring the corresponding relation according to the read identification information of the external equipment to obtain a second signal value; the corresponding relation is used for indicating that the second signal value corresponds to the identification information of the external equipment.

In some embodiments, the obtaining module 1001 is specifically configured to obtain a first signal value on a first high-speed connector reported by the CPLD.

In the case of implementing the functions of the integrated modules in the form of hardware, the embodiment of the present application provides a schematic composition diagram of a computing device. As shown in fig. 11, the computing device 1100 includes: a processor 1102, a communication interface 1103, and a bus 1104. Optionally, the computing device may also include a memory 1101.

The processor 1102 may be any means that implements or executes the various illustrative logical blocks, modules, and circuits described in connection with the present disclosure. The processor 1102 may be a central processing unit, general purpose processor, digital signal processor, application specific integrated circuit, field programmable gate array or other programmable logic device, transistor logic, hardware component, or any combination thereof. Which may implement or perform the various illustrative logical blocks, modules, and circuits described in connection with the disclosure. The processor 1102 may also be a combination of computing functions, e.g., comprising one or more microprocessors, a combination of a DSP and a microprocessor, or the like.

A communication interface 1103 for connecting with other devices through a communication network. The communication network may be an ethernet network, a radio access network, a Wireless Local Area Network (WLAN), etc.

The memory 1101 may be, but is not limited to, a read-only memory (ROM) or other type of static storage device that may store static information and instructions, a Random Access Memory (RAM) or other type of dynamic storage device that may store information and instructions, an electrically erasable programmable read-only memory (EEPROM), a magnetic disk storage medium or other magnetic storage device, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer.

As a possible implementation, the memory 1101 may exist separately from the processor 1102, and the memory 1101 may be connected to the processor 1102 by a bus 1104 for storing instructions or program code. The processor 1102, when calling and executing instructions or program code stored in the memory 1101, is capable of implementing the cable detection method provided by the embodiments of the present application.

In another possible implementation, the memory 1101 may also be integrated with the processor 1102.

The bus 1104 may be an Extended Industry Standard Architecture (EISA) bus or the like. The bus 1104 may be divided into an address bus, a data bus, a control bus, and the like. For ease of illustration, only one thick line is shown in FIG. 11, but this is not intended to represent only one bus or type of bus.

Through the description of the above embodiments, it is clear to those skilled in the art that, for convenience and simplicity of description, the foregoing division of the functional modules is merely used as an example, and in practical applications, the above functions may be distributed by different functional modules according to needs, that is, the internal structure of the cable detection device may be divided into different functional modules to complete all or part of the above described functions.

The embodiment of the application also provides a computer readable storage medium. All or part of the processes in the above method embodiments may be performed by computer instructions to instruct related hardware, and the program may be stored in the above computer-readable storage medium, and when executed, may include the processes in the above method embodiments. The computer readable storage medium may be that of any of the preceding embodiments or memory. The computer readable storage medium may also be an external storage device of the cable detection apparatus, such as a plug-in hard disk, a Smart Memory Card (SMC), a Secure Digital (SD) card, a flash card (flash card), and the like, which are provided on the cable detection apparatus. Further, the computer-readable storage medium may include both an internal storage unit and an external storage device of the cable detection apparatus. The computer-readable storage medium stores the computer program and other programs and data required by the cable detection device. The above-described computer-readable storage medium may also be used to temporarily store data that has been output or is to be output.

Embodiments of the present application further provide a computer program product, which contains a computer program and when the computer program product runs on a computing device, causes the computing device to execute any one of the cable detection methods provided in the foregoing embodiments.

While the present application has been described in connection with various embodiments, other variations to the disclosed embodiments can be understood and effected by those skilled in the art in practicing the claimed application, from a review of the drawings, the disclosure, and the appended claims. In the claims, the word "Comprising" does not exclude other elements or steps, and the word "a" or "an" does not exclude a plurality. A single processor or other unit may fulfill the functions of several items recited in the claims. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage.

Although the present application has been described in conjunction with specific features and embodiments thereof, it will be evident that various modifications and combinations can be made thereto without departing from the spirit and scope of the application. Accordingly, the specification and figures are merely exemplary of the present application as defined in the appended claims and are intended to cover any and all modifications, variations, combinations, or equivalents within the scope of the present application. It will be apparent to those skilled in the art that various changes and modifications may be made in the present application without departing from the spirit and scope of the application. Thus, if such modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is intended to include such modifications and variations as well.

The above is only an embodiment of the present application, but the scope of the present application is not limited thereto, and any changes or substitutions within the technical scope of the present disclosure should be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A method of cable testing, the method comprising:

acquiring a first signal value on a first high-speed connector of a mainboard connected with external equipment; the first high-speed connector of the mainboard is connected with the second high-speed connector of the external equipment through a cable;

acquiring a second signal value on a second high-speed connector of the external equipment;

and comparing the first signal value with the second signal value, and determining the cable wiring condition between the first high-speed connector and the second high-speed connector according to the comparison result.

2. The method of claim 1, wherein the first high speed connector and the second high speed connector comprise one or more ports; one or more ports of the first high-speed connector correspond to one or more ports of the second high-speed connector one to one; the first signal value is a register value corresponding to one or more ports of the first high-speed connector after the ports are arranged according to a preset sequence; the second signal value is a data combination of level values output by one or more ports of the second high-speed connector arranged according to a preset sequence.

3. The method according to claim 2, wherein the determining the cable connection condition between the peripheral device and the high-speed connector according to the comparison result comprises:

if the first signal value is consistent with the second signal value, determining that the cable is correctly wired;

and if the first signal value is inconsistent with the second signal value, determining that the cable is in a wiring error and generating an alarm.

4. The method according to any one of claims 1-3, further comprising:

and storing the corresponding relation between the second signal value and the identification information of the external equipment.

5. The method according to any one of claims 1-4, further comprising:

comparing the first signal value with the third signal value, and determining whether external equipment is in place on the mainboard according to a comparison result; the third signal value is a register value corresponding to a first high-speed connector of the mainboard when no external equipment is in place;

the obtaining a second signal value on a second high-speed connector of the external device includes:

and when the external equipment is determined to be on the mainboard, acquiring a second signal value on a second high-speed connector of the external equipment.

6. The method of claim 5, wherein obtaining a second signal value on a second high-speed connector of the peripheral device comprises:

reading the identification information of the external equipment;

inquiring the corresponding relation according to the read identification information of the external equipment to obtain the second signal value; the corresponding relation is used for indicating that the second signal value corresponds to the identification information of the external equipment.

7. The method according to any of claims 1 to 6, characterized in that the method is performed by a board management controller, BMC, on a motherboard; the mainboard further comprises a Complex Programmable Logic Device (CPLD) coupled with the first high-speed connector, wherein the CPLD is used for reading and reporting a first signal value on the first high-speed connector to the BMC;

the obtaining a first signal value on the first high speed connector comprises:

and the BMC acquires a first signal value on the first high-speed connector reported by the CPLD.

8. A server is characterized by comprising a mainboard and an external device; wherein the content of the first and second substances,

the mainboard is provided with a first high-speed connector, a CPLD and a BMC; one end of the CPLD is coupled with the first high-speed connector, and the other end of the CPLD is coupled with the BMC;

a second high-speed connector is arranged on the external equipment; the first high-speed connector on the mainboard is connected with the second high-speed connector of the external equipment through a cable;

9. The server of claim 8, wherein the second high-speed connector comprises one or more ports; the second signal value is a data combination of level values output by one or more ports of the second high-speed connector arranged according to a preset sequence; each port of the second high-speed connector is coupled with a pull-up resistor or a pull-down resistor;

the pull-up resistor is used for setting a level value on a port coupled with the pull-up resistor to be a high level;

the pull-down resistor is used for setting a level value on a port coupled with the pull-up resistor to a low level value.

10. The server according to claim 8 or 9,

the BMC is further used for comparing the first signal value with the third signal value and determining whether external equipment is in place on the mainboard according to a comparison result; and the third signal value is a register value corresponding to the first high-speed connector of the mainboard when no external equipment is in place.