CN115903319A - 显示面板 - Google Patents
显示面板 Download PDFInfo
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- CN115903319A CN115903319A CN202111015248.1A CN202111015248A CN115903319A CN 115903319 A CN115903319 A CN 115903319A CN 202111015248 A CN202111015248 A CN 202111015248A CN 115903319 A CN115903319 A CN 115903319A
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- electrode
- pixel
- display panel
- pixel structure
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- G—PHYSICS
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- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
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- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
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Abstract
本发明提供一种显示面板包括第一基板、多条扫描线、多条数据线以及多个像素结构。这些扫描线和这些数据线设置在第一基板上,且彼此相交。这些像素结构分别设置在这些数据线和这些扫描线之间。这些像素结构的至少一者包括主动元件、像素电极、电容电极、共电极以及修补图案。主动元件具有源极、漏极和栅极。栅极电性连接这些扫描线的其中一条。源极电性连接这些数据线的其中一条。像素电极电性连接主动元件的漏极。电容电极电性连接像素电极,并且自漏极延伸而出。共电极投影重叠像素电极和电容电极。修补图案投影重叠这些扫描线的其中一条、共电极和像素电极。
Description
技术领域
本发明涉及一种显示面板,尤其是涉及一种具有修补结构的显示面板。
背景技术
随着液晶显示技术的发展,液晶显示面板已广泛地应用在不同的领域。在实际的生产过程中,液晶显示面板常因为制造工艺或其他因素而面临异常亮暗点的问题。为了降低这些亮暗点对显示质量的影响,通常会在像素阵列基板上设置多个修补结构。这些修补结构可提高液晶显示面板的成品率,并且能降低生产成本。然而,修补结构与信号线的电容耦合效应容易对像素结构的操作电性产生影响,造成显示画面的亮度不均。
发明内容
本发明是针对一种显示面板,其修补结构对显示像素的操作电性影响较不明显,且修补流程较为简化。
根据本发明的实施例的显示面板,包括第一基板、多条扫描线、多条数据线以及多个像素结构。这些扫描线和这些数据线设置在第一基板上,且彼此相交。这些像素结构分别设置在这些数据线和这些扫描线之间。这些像素结构的至少一者包括主动元件、像素电极、电容电极、共电极以及修补图案。主动元件具有源极、漏极和栅极。栅极电性连接这些扫描线的其中一条。源极电性连接这些数据线的其中一条。像素电极电性连接主动元件的漏极。电容电极电性连接像素电极,并且自漏极延伸而出。共电极投影重叠像素电极和电容电极。修补图案投影重叠这些扫描线的其中一条、共电极和像素电极。
在根据本发明的实施例的显示面板中,多个像素结构的至少一者包括第一像素结构。多条扫描线包括第一扫描线,且第一像素结构的修补图案和漏极的一部分重叠于第一扫描线。
在根据本发明的实施例的显示面板中,修补图案、电容电极和主动元件的漏极为一体。
在根据本发明的实施例的显示面板中,第一像素结构的修补图案和主动元件的栅极电性连接第一扫描线。
在根据本发明的实施例的显示面板中,共电极具有第一延伸部、第二延伸部和连接部。第一延伸部和第二延伸部设置在像素电极沿着第一方向的相对两侧并且在第二方向上延伸。连接部延伸在第一方向上。连接部连接第一延伸部和第二延伸部。第一方向与第二方向相交。电容电极重叠于共电极的连接部。
在根据本发明的实施例的显示面板中,电容电极还重叠于共电极的第一延伸部与第二延伸部的其中一者。
在根据本发明的实施例的显示面板中,多条数据线、多个第一延伸部和多个第二延伸部沿着第一方向交替排列。
在根据本发明的实施例的显示面板中,多个像素结构的至少一者还包括第二像素结构。第一像素结构和第二像素结构沿着第一方向排列并且电性连接多条数据线的第一数据线。多条扫描线还包括第二扫描线。第一扫描线和第二扫描线位于第一像素结构和第二像素结构沿着第二方向的相对两侧。第一方向与第二方向相交。第一像素结构电性连接第一扫描线,且第二像素结构电性连接第二扫描线。
在根据本发明的实施例的显示面板中,共电极具有连接部、第一延伸部和第二延伸部。第一延伸部和第二延伸部沿着第一方向设置在连接部的相对两侧并且与连接部连接。电容电极重叠于多个共电极的连接部。
在根据本发明的实施例的显示面板中,第一像素结构的共电极的第一延伸部连接第二像素结构的共电极的第一延伸部并界定出开口,且开口投影重叠于第一数据线。
在根据本发明的实施例的显示面板中,电容电极还投影重叠于共电极的第二延伸部。
在根据本发明的实施例的显示面板中,多个像素结构的至少一者包括第一像素结构。第一像素结构的修补图案和主动元件的漏极分别投影重叠于多条扫描线的其中两条。
在根据本发明的实施例的显示面板中,多个像素结构的至少一者还包括第二像素结构。第一像素结构和第二像素结构沿着第一方向排列并且电性连接多条数据线的其中一条。多条扫描线包括第一扫描线和第二扫描线。第一扫描线和第二扫描线位于第一像素结构和第二像素结构沿着第二方向的相对两侧。第一方向与第二方向相交。第一像素结构电性连接第一扫描线,且第二像素结构电性连接第二扫描线。
在根据本发明的实施例的显示面板中,共电极具有连接部、第一延伸部和第二延伸部。第一延伸部和第二延伸部沿着第一方向设置在连接部的相对两侧并且与连接部连接。修补图案投影重叠于共电极的第二延伸部。
在根据本发明的实施例的显示面板中,第一像素结构的共电极的第一延伸部连接第二像素结构的共电极的第一延伸部并界定出开口,且开口投影重叠于多条数据线的其中一条。
在根据本发明的实施例的显示面板中,电容电极投影重叠于共电极的连接部。
在根据本发明的实施例的显示面板中,修补图案包括第一端部、第二端部与第三端部。第一端部投影重叠于多条扫描线的其中一条。第二端部投影重叠于像素电极。第三端部投影重叠于共电极的第二延伸部。第二端部在第二方向上位于第一端部和第三端部之间。
在根据本发明的实施例的显示面板中,第一像素结构的主动元件的栅极和修补图案分别电性连接第一扫描线和第二扫描线。
在根据本发明的实施例中,显示面板还包括第二基板、第一配向层、第二配向层、液晶层、第一偏光片和第二偏光片。第二基板与第一基板相对设置。第一配向层设置在第一基板上,且具有第一配向方向。第二配向层设置在第二基板上,且具有第二配向方向。第一配向方向垂直于第二配向方向。液晶层设置于第一配向层和第二配向层之间,且具有多个液晶分子。多个像素结构的多个像素电极用以驱使这些液晶分子转动。第一偏光片和第二偏光片设置在液晶层的相对两侧,且分别具有第一穿透轴和第二穿透轴。第一穿透轴的轴向垂直于第二穿透轴的轴向。
在根据本发明的实施例的显示面板中,多个像素结构的至少一者包括第一像素结构。第一像素结构的像素电极经由修补图案与多条扫描线的其中一条电性连接。
基于上述,在本发明一实施例的显示面板中,像素结构具有投影重叠于扫描线、共电极和像素电极的修补图案以及自主动元件的漏极延伸而出的电容电极。通过电容电极与共电极的重叠关系,可有效抑制像素电极因修补图案、扫描线和像素电极间的电容耦合效应所产生的电压偏移,从而提升显示面板的多个像素结构在同一显示灰阶下的亮度均匀性。
附图说明
图1是依照本发明的第一实施例的显示面板的剖视示意图;
图2是图1的显示面板的俯视示意图;
图3是图2的共电极和扫描线的俯视示意图;
图4是依照本发明的第二实施例的显示面板的俯视示意图;
图5是依照本发明的第三实施例的显示面板的俯视示意图;
图6是图5的共电极和扫描线的俯视示意图;
图7是依照本发明的第四实施例的显示面板的俯视示意图;
图8是依照本发明的第五实施例的显示面板的俯视示意图。
附图标记说明
10、10A、20、20A、30:显示面板;
101:第一基板;
102:第二基板;
110:像素驱动层;
112h:接触孔;
114h、114h1、114h2:熔接通孔;
121:第一配向层;
122:第二配向层;
140:液晶层;
161:第一偏光片;
162:第二偏光片;
AD1:第一配向方向;
AD2:第二配向方向;
CE、CE-A:共电极;
CEs1、CEs1A:第一延伸部;
CEs2、CEs2A:第二延伸部;
CEs3、CEs3A:连接部;
CSE、CSE-A、CSE-B、CSE-C、CSE-D:电容电极;
CSEs1、CSEs2:延伸段;
DE:漏极;
DL:数据线;
GE:栅极;
GL、GL1、GL2:扫描线;
LC:液晶分子;
OP:开口;
PE:像素电极;
PX、PX-X、PX1、PX2、PX-A、PX-B、PX-C、PX-D:像素结构;
RP、RP-A:修补图案;
RPe1:第一端部;
RPe2:第二端部;
RPe3:第三端部;
SC:半导体图案;
SE:源极;
T:主动元件;
TA1:第一穿透轴;
TA2:第二穿透轴;
X、Y、Z:方向。
具体实施方式
现将详细地参考本发明的示范性实施例,示范性实施例的实例说明于附图中。只要有可能,相同元件符号在附图和描述中用来表示相同或相似部分。先说明的是,在以下的示范性实施例中提及的“投影重叠”是指两个物件沿着一个方向的重叠关系。若未特别指出,所述方向可以是附图中的方向Z。
图1是依照本发明的第一实施例的显示面板的剖视示意图。图2是图1的显示面板的俯视示意图。图3是图2的共电极和扫描线的俯视示意图。为清楚呈现起见,图2仅示出图1的第一基板101和像素驱动层110。
请参照图1及图2,显示面板10包括第一基板101、第二基板102、像素驱动层110、第一配向层121、第二配向层122和液晶层140。第一基板101与第二基板102相对设置。像素驱动层110设置在第一基板101上。第一配向层121和第二配向层122分别设置在第一基板101和第二基板102上。液晶层140设置在第一配向层121与第二配向层122之间,且具有多个液晶分子LC。第一基板101和第二基板102的材料例如是玻璃、石英、高分子聚合物、或其他合适的透光板材。
在本实施例中,第一配向层121具有第一配向方向AD1。第二配向层122具有第二配向方向AD2,且第一配向方向AD1可垂直于第二配向方向AD2。更具体地说,液晶层140的这些液晶分子LC是以扭转向列(twisted nematic,TN)的排列模式进行驱动。另一方面,液晶层140的相对两侧还设有第一偏光片161和第二偏光片162,且第一偏光片161的第一穿透轴TA1垂直于第二偏光片162的第二穿透轴TA2。显示面板10例如是以常白(normally white)模式进行操作。举例来说,当液晶层140未被电场驱动时,来自背光模块的光线可直接通过显示面板10而达到亮态的显示效果。反之,当液晶层140被电场驱动时,来自背光模块的光线则无法通过显示面板10而达到暗态的显示效果。应可理解的是,此处的光线也可以是来自显示侧的环境光,也即,显示面板也可以是反射式显示面板或透反式显示面板,且液晶层140的多个液晶分子LC也可以反向平行(anti-parallel)配向或垂直配向(verticalalignment,VA)的排列模式进行驱动。
像素驱动层110包括多条扫描线GL、多条数据线DL以及多个像素结构PX。这些扫描线GL相交于这些数据现DL,并且定义出多个像素区。这些像素结构PX分别设置在这些数据线DL和这些扫描线GL之间的这些像素区内。举例来说,在本实施例中,这些扫描线GL沿着方向Y排列于第一基板101上,并且延伸于方向X上。这些数据线DL沿着方向X排列于第一基板101上,并且延伸于方向Y上。方向X与方向Y相交。然而,本发明不限于此。在其他实施例中,扫描线GL可沿着方向X排列于第一基板101上,而数据线DL可沿着方向Y排列于第一基板101上。基于导电性的考量,扫描线GL和数据线DL一般是选用金属材料(例如:钼、铝、铜、镍、或上述的组合)制作而成,但不以此为限。
像素结构PX包括主动元件T和像素电极PE。主动元件T包括栅极GE、源极SE、漏极DE和半导体图案SC。栅极GE和源极SE分别电性连接对应的一条扫描线GL和一条数据线DL。源极SE和漏极DE分别与半导体图案SC的不同两区(例如源极区和漏极区)电性连接。像素电极PE电性连接主动元件T的漏极DE。在本实施例中,主动元件T可以是底部栅极型薄膜晶体管(bottom-gate thin-film-transistor),也即,栅极GE可选地设置在半导体图案SC背离源极SE和漏极DE的一侧,但不以此为限。在其他实施例中,主动元件T的栅极GE也可设置在半导体图案SC的上方(即半导体图案SC设有源极SE和漏极DE的一侧),以形成顶部栅极型薄膜晶体管(top-gate thin-film-transistor)。在本实施例中,源极SE可为数据线DL的一部分,而栅极GE可为扫描线GL的一部分。由于主动元件T的半导体图案SC投影重叠于扫描线GL,因此,漏极DE的一部分重叠于扫描线GL。
主动元件T例如是多晶硅(Polysilicon)薄膜晶体管、非晶硅(amorphousSilicon,a-Si)薄膜晶体管、或金属氧化物半导体(Metal-Oxide Semiconductor,MOS)晶体管,但不以此为限。需说明的是,栅极GE、源极SE、漏极DE、半导体图案SC以及共电极CE分别可由任何所属技术领域的技术人员所周知的用于显示面板的任一栅极、任一源极、任一漏极、任一半导体图案以及任一共电极来实现,且栅极GE、源极SE、漏极DE、半导体图案SC以及共电极CE分别可经由任何所属技术领域的技术人员所周知的任一方法来形成,故于此不加以赘述。
另一方面,像素电极PE例如是光穿透式电极,而光穿透式电极的材料包括金属氧化物(例如:铟锡氧化物、铟锌氧化物、铝锡氧化物、铝锌氧化物、或其它合适的氧化物、或者是上述至少两者的堆叠层),但不以此为限。在其他实施例中,像素电极PE也可以包括反射式电极,而反射式电极的材料包括金属、合金、金属材料的氮化物、金属材料的氧化物、金属材料的氮氧化物、或其他合适的材料、或是金属材料与其他导电材料的堆叠层。
举例来说,在本实施例中,第二基板102上还可设有共电极层(未示出),且像素电极PE被致能时与所述共电极层间所产生的电场,适于驱使液晶层140的多个液晶分子LC转动并形成相对应的光轴分布,进而调变入射光线的偏振状态。更具体地说,显示面板10可通过多条扫描线GL和多条数据线个别地控制多个像素结构PX的多个像素电极PE的电压水平使多个像素区具有相同或不同的出光亮度来达到显示的效果。
请同时参照图3,为了形成像素结构PX的存储电容(storage capacitor),像素结构PX还包括共电极CE,且共电极CE投影重叠于像素电极PE。在本实施例中,共电极CE可包括第一延伸部CEs1、第二延伸部CEs2和连接部CEs3。第一延伸部CEs1和第二延伸部CEs2设置在像素电极PE沿着方向X(即第一方向)的相对两侧并且在方向Y(即第二方向)上延伸。更具体的是,多条数据线DL、多个共电极CE的多个第一延伸部CEs1和多个第二延伸部CEs2沿着方向X交替排列。连接部CEs3延伸在方向X上并且连接于第一延伸部CEs1和第二延伸部CEs2之间。沿着方向X排列的多个像素结构PX的多个共电极CE相互连接。在本实施例中,共电极CE和扫描线GL可选地为同一金属导电层,但不以此为限。
在本实施例中,像素结构PX还包括电容电极CSE和修补图案RP。特别注意的是,电容电极CSE是延伸自主动元件T的漏极DE,且投影重叠于共电极CE的连接部CEs3。修补图案RP是自电容电极CSE延伸而出,且投影重叠于一条扫描线GL和像素电极PE。换句话说,本实施例的漏极DE、电容电极CSE和修补图案RP可选地为一体,但不以此为限。举例来说,在本实施例中,主动元件T的漏极DE是经由电容电极CSE与像素电极PE电性连接。像素电极PE是经由绝缘层(未示出)的接触孔112h与电容电极CSE电性连接。
特别说明的是,修补图案RP是用于像素结构PX的修补用。例如:当显示面板10的其中一个像素结构PX-X无法被致能而被检测为异常时,可进行激光熔接(laser welding)程序使修补图案RP与对应的扫描线GL相互熔接而电性导通。因此,在激光熔接的步骤完成后,修补图案RP与扫描线GL之间的绝缘层或平坦层会形成一个熔接通孔114h。修补后的像素结构PX-X,其像素电极PE是经由电容电极CSE和修补图案RP而电性连接扫描线GL。因此,无论像素结构PX-X所电性连接的扫描线GL是否接收到栅极驱动信号,异常像素结构PX-X的像素电极PE始终具有较高的电压水平。也就是说,在显示面板10是以常白(normally white)模式进行操作的情况下,显示画面对应异常像素结构PX-X的像素区始终维持暗态,以避免显示质量的下降。
另一方面,通过电容电极CSE与共电极CE的重叠关系,可进一步抑制像素电极PE因修补图案RP、扫描线GL和像素电极PE间的电容耦合效应所产生的电压偏移,从而提升显示面板10的多个像素结构PX在同一显示灰阶下的亮度均匀性。此外,在本实施例中,异常像素结构PX-X的修补程序仅包含一次的激光熔接步骤,因此,通过上述的电容电极CSE和修补图案RP的配置,还可达到修补流程的简化效果。
以下将列举另一些实施例以详细说明本公开,其中相同的构件将标示相同的符号,并且省略相同技术内容的说明,省略部分请参考前述实施例,以下不再赘述。
图4是依照本发明的第二实施例的显示面板的俯视示意图。请参照图4,本实施例的显示面板10A与图2的显示面板10的差异在于:电容电极的配置方式不同。具体而言,显示面板10A的像素结构PX-A的电容电极CSE-A还重叠于共电极CE的第一延伸部CEs1和第二延伸部CEs2。在本实施例中,电容电极CSE-A具有两个延伸段CSEs1、CSEs2,延伸段CSEs1和延伸段CSEs2分别投影重叠于共电极CE的第一延伸部CEs1和第二延伸部CEs2。据此,以增加像素结构PX-A的存储电容量,从而抑制像素电极PE因修补图案RP、扫描线GL和像素电极PE间的电容耦合效应所产生的电压偏移,有助于提升显示面板10A的多个像素结构PX-A在同一显示灰阶下的亮度均匀性。
图5是依照本发明的第三实施例的显示面板的俯视示意图。图6是图5的共电极和扫描线的俯视示意图。请参照图5及图6,本实施例的显示面板20与图2的显示面板10的主要差异在于:像素结构、数据线和扫描线的配置方式不同。在本实施例中,显示面板20包括多条第一扫描线GL1和多条第二扫描线GL2。这些第一扫描线GL1和这些第二扫描线GL2沿着方向Y交替排列于第一基板101上。多个像素结构PX-B包括多个第一像素结构PX1和多个第二像素结构PX2。这些第一像素结构PX1和这些第二像素结构PX2沿着方向X交替排列成多个像素行,且每一个像素行在方向Y上的相对两侧都设有一条第一扫描线GL1和一条第二扫描线GL2。每一个像素行中两两相邻的第一像素结构PX1和第二像素结构PX2电性连接同一条数据线DL,并分别电性连接第一扫描线GL1和第二扫描线GL2。
另一方面,相似于图3的共电极CE,本实施例的共电极CE-A具有第一延伸部CEs1A、第二延伸部CEs2A和连接部CEs3A,第一延伸部CEs1A和第二延伸部CEs2A沿着方向X设置在连接部CEs3A的相对两侧并且连接连接部CEs3A。特别注意的是,在方向X上彼此相邻的第一像素结构PX1的共电极CE-A的第一延伸部CEs1A连接第二像素结构PX2的共电极CE-A的第一延伸部CEs1A并界定出开口OP。此开口OP投影重叠于数据线DL。据此,可降低共电极CE-A与数据线DL的电容耦合效应。
在本实施例中,由于电性连接同一条数据线DL且彼此相邻的第一像素结构PX1和第二像素结构PX2分别电性连接不同的扫描线(例如第一扫描线GL1和第二扫描线GL2),因此,这两个像素结构PX-B的修补图案RP也分别重叠于这两条扫描线。更具体地说,第一像素结构PX1的修补图案RP是自第一像素结构PX1的电容电极CSE-B延伸而出,且投影重叠于第一扫描线GL1。第二像素结构PX2的修补图案RP是自第二像素结构PX2的电容电极CSE-B延伸而出,且投影重叠于第二扫描线GL2。
当显示面板20的其中一个像素结构PX-B,例如第一像素结构PX1,无法被致能而被检测为异常的像素结构PX-X时,可进行激光熔接(laser welding)程序使修补图案RP与对应的第一扫描线GL1相互熔接而电性导通。因此,在显示面板20以常白(normally white)模式进行操作时,显示画面对应异常像素结构PX-X的像素区始终维持暗态,以避免显示质量的下降。
值得一提的是,通过电容电极CSE-B与共电极CE-A的重叠关系,可进一步抑制像素电极PE因修补图案RP、第一扫描线GL1(或第二扫描线GL2)和像素电极PE间的电容耦合效应所产生的电压偏移,从而提升显示面板20的多个像素结构PX-B在同一显示灰阶下的亮度均匀性。此外,在本实施例中,由于像素结构PX-B的修补图案RP是自电容电极CSE-B延伸而出并且投影重叠于第一扫描线GL1或第二扫描线GL2,因此异常像素结构PX-X的修补程序仅包含一次的激光熔接步骤,,从而达到修补流程的简化效果。
由于本实施例的电容电极CSE-B和共电极CE-A的重叠关系相似于图2的电容电极CSE和共电极CE的重叠关系,因此,详细的说明请参见前述实施例的相关段落,于此便不再赘述。
图7是依照本发明的第四实施例的显示面板的俯视示意图。请参照图7,本实施例的显示面板20A与图5的显示面板20的差异在于:电容电极的配置方式不同。具体而言,显示面板20A的像素结构PX-C的电容电极CSE-C还重叠于共电极CE-A的第二延伸部CEs2A。在本实施例中,电容电极CSE-C仅具有一个延伸段CSEs1,此延伸段CSEs1投影重叠于共电极CE-A的第二延伸部CEs2A。据此,以增加像素结构PX-C的存储电容量,从而抑制像素电极PE因修补图案RP、第一扫描线GL1(或第二扫描线GL2)和像素电极PE间的电容耦合效应所产生的电压偏移,有助于提升显示面板20A的多个像素结构PX-C在同一显示灰阶下的亮度均匀性。
图8是依照本发明的第五实施例的显示面板的俯视示意图。请参照图8,本实施例的显示面板30与图5的显示面板20的差异在于:修补图案的配置方式不同。在本实施例中,显示面板30的每一个像素结构PX-D的主动元件T和修补图案RP-A分别投影重叠不同的扫描线,且彼此电性独立。例如:第一像素结构PX1的主动元件T和修补图案RP-A分别投影重叠第一扫描线GL1和第二扫描线GL2,第二像素结构PX2的主动元件T和修补图案RP-A分别投影重叠第二扫描线GL2和第一扫描线GL1。
特别注意的是,修补图案RP-A投影重叠共电极CE-A的第二延伸部CEs2A,且包括第一端部RPe1、第二端部RPe2和第三端部RPe3。第一端部RPe1投影重叠于一条扫描线。第二端部RPe2投影重叠于像素电极PE。第三端部RPe3投影重叠于共电极CE-A的第二延伸部CEs2A。其中,修补图案RP-A的第二端部RPe2在方向Y上位于第一端部RPe1和第三端部RPe3之间。
当显示面板30的其中一个像素结构PX-D,例如第一像素结构PX1,无法被致能而被检测为异常的像素结构PX-X时,可进行一次激光熔接(laser welding)步骤使修补图案RP-A与对应的第二扫描线GL2相互熔接而电性导通。由于本实施例的像素结构PX-D的修补图案RP-A电性独立于电容电极CSE-D和主动元件T,因此还需要进行另一次激光熔接步骤,使修补图案RP-A的第二端部RPe2与相重叠的像素电极PE相互熔接而电性导通。因此,在两次的激光熔接步骤完成后,修补图案RP-A与第二扫描线GL2之间的绝缘层或平坦层会分别形成两个熔接通孔114h1、114h2。
修补后的像素结构PX-X,其像素电极PE还可经由修补图案RP-A而电性连接第二扫描线GL2。因此,无论像素结构PX-X所电性连接的第一扫描线GL1是否接收到栅极驱动信号,异常像素结构PX-X的像素电极PE始终具有较高的电压水平。也就是说,在显示面板30以常白(normally white)模式进行操作的情况下,显示画面对应异常像素结构PX-X的像素区始终维持暗态,以避免显示质量的下降。另一方面,通过电容电极CSE与共电极CE的重叠关系,可进一步抑制像素电极PE因修补图案RP-A、扫描线和像素电极PE间的电容耦合效应所产生的电压偏移,从而提升显示面板30的多个像素结构PX-D在同一显示灰阶下的亮度均匀性。
纵上所述,在本发明一实施例的显示面板中,像素结构具有投影重叠于扫描线、共电极和像素电极的修补图案以及自主动元件的漏极延伸而出的电容电极。通过电容电极与共电极的重叠关系,可有效抑制像素电极因修补图案、扫描线和像素电极间的电容耦合效应所产生的电压偏移,从而提升显示面板的多个像素结构在同一显示灰阶下的亮度均匀性。
最后应说明的是:以上各实施例仅用以说明本发明的技术方案,而非对其限制;尽管参照前述各实施例对本发明进行了详细的说明,本领域的普通技术人员应当理解:其依然可以对前述各实施例所记载的技术方案进行修改,或者对其中部分或者全部技术特征进行等同替换;而这些修改或者替换,并不使相应技术方案的本质脱离本发明各实施例技术方案的范围。
Claims (20)
1.一种显示面板,其特征在于,包括:
第一基板;
多条扫描线,设置在所述第一基板上;
多条数据线,设置在所述第一基板上,且相交于所述多条扫描线;以及
多个像素结构,分别设置在所述多条数据线和所述多条扫描线间,所述多个像素结构的至少一者包括:
主动元件,具有源极、漏极和栅极,所述栅极电性连接所述多条扫描线的其中一条,所述源极电性连接所述多条数据线的其中一条;
像素电极,电性连接所述主动元件的所述漏极;
电容电极,电性连接所述像素电极,所述电容电极自所述漏极延伸而出;
共电极,投影重叠所述像素电极和所述电容电极;以及
修补图案,投影重叠所述多条扫描线的其中一条、所述共电极和所述像素电极。
2.根据权利要求1所述的显示面板,其特征在于,所述多个像素结构的所述至少一者包括第一像素结构,所述多条扫描线包括第一扫描线,且所述第一像素结构的所述修补图案和所述漏极的一部分重叠于所述第一扫描线。
3.根据权利要求2所述的显示面板,其特征在于,所述修补图案、所述电容电极和所述主动元件的所述漏极为一体。
4.根据权利要求2所述的显示面板,其特征在于,所述第一像素结构的所述修补图案和所述主动元件的所述栅极电性连接所述第一扫描线。
5.根据权利要求2所述的显示面板,其特征在于,所述共电极具有第一延伸部、第二延伸部和连接部,所述第一延伸部和所述第二延伸部设置在所述像素电极沿着第一方向的相对两侧并且在第二方向上延伸,所述连接部延伸在所述第一方向上,所述连接部连接所述第一延伸部和所述第二延伸部,所述第一方向与所述第二方向相交,所述电容电极重叠于所述共电极的所述连接部。
6.根据权利要求5所述的显示面板,其特征在于,所述电容电极还重叠于所述共电极的所述第一延伸部与所述第二延伸部的其中一者。
7.根据权利要求5所述的显示面板,其特征在于,所述多条数据线、多个所述第一延伸部和多个所述第二延伸部沿着所述第一方向交替排列。
8.根据权利要求2所述的显示面板,其特征在于,所述多个像素结构的所述至少一者还包括第二像素结构,所述第一像素结构和所述第二像素结构沿着第一方向排列并且电性连接所述多条数据线的第一数据线,所述多条扫描线还包括第二扫描线,所述第一扫描线和所述第二扫描线位于所述第一像素结构和所述第二像素结构沿着第二方向的相对两侧,所述第一方向与所述第二方向相交,所述第一像素结构电性连接所述第一扫描线,且所述第二像素结构电性连接所述第二扫描线。
9.根据权利要求8所述的显示面板,其特征在于,所述共电极具有连接部、第一延伸部和第二延伸部,所述第一延伸部和所述第二延伸部沿着所述第一方向设置在所述连接部的相对两侧并且连接所述连接部,所述电容电极重叠于所述多个共电极的所述连接部。
10.根据权利要求9所述的显示面板,其特征在于,所述第一像素结构的所述共电极的所述第一延伸部连接所述第二像素结构的所述共电极的所述第一延伸部并界定出开口,且所述开口投影重叠于所述第一数据线。
11.根据权利要求9所述的显示面板,其特征在于,所述电容电极还投影重叠于所述共电极的所述第二延伸部。
12.根据权利要求1所述的显示面板,其特征在于,所述多个像素结构的所述至少一者包括第一像素结构,所述第一像素结构的所述修补图案和所述主动元件的所述漏极分别投影重叠于所述多条扫描线的其中两条。
13.根据权利要求12所述的显示面板,其特征在于,所述多个像素结构的所述至少一者还包括第二像素结构,所述第一像素结构和所述第二像素结构沿着第一方向排列并且电性连接所述多条数据线的其中一条,所述多条扫描线包括第一扫描线和第二扫描线,所述第一扫描线和所述第二扫描线位于所述第一像素结构和所述第二像素结构沿着第二方向的相对两侧,所述第一方向与所述第二方向相交,所述第一像素结构电性连接所述第一扫描线,且所述第二像素结构电性连接所述第二扫描线。
14.根据权利要求13所述的显示面板,其特征在于,所述共电极具有连接部、第一延伸部和第二延伸部,所述第一延伸部和所述第二延伸部沿着所述第一方向设置在所述连接部的相对两侧并且连接所述连接部,所述修补图案投影重叠于所述共电极的所述第二延伸部。
15.根据权利要求14所述的显示面板,其特征在于,所述第一像素结构的所述共电极的所述第一延伸部连接所述第二像素结构的所述共电极的所述第一延伸部并界定出开口,且所述开口投影重叠于所述多条数据线的其中一条。
16.根据权利要求14所述的显示面板,其特征在于,所述电容电极投影重叠于所述共电极的所述连接部。
17.根据权利要求14所述的显示面板,其特征在于,所述修补图案包括:
第一端部,投影重叠于所述多条扫描线的其中一条;
第二端部,投影重叠于所述像素电极;以及
第三端部,投影重叠于所述共电极的所述第二延伸部,其中所述第二端部在所述第二方向上位于所述第一端部和所述第三端部之间。
18.根据权利要求13所述的显示面板,其特征在于,所述第一像素结构的所述主动元件的所述栅极和所述修补图案分别电性连接所述第一扫描线和所述第二扫描线。
19.根据权利要求1所述的显示面板,其特征在于,还包括:
第二基板,与所述第一基板相对设置;
第一配向层,设置在所述第一基板上,且具有第一配向方向;
第二配向层,设置在所述第二基板上,且具有第二配向方向,所述第一配向方向垂直于所述第二配向方向;
液晶层,设置于所述第一配向层和所述第二配向层之间,且具有多个液晶分子,其中所述多个像素结构的多个所述像素电极用以驱使所述多个液晶分子转动;以及
第一偏光片和第二偏光片,设置在所述液晶层的相对两侧,且分别具有第一穿透轴和第二穿透轴,所述第一穿透轴的轴向垂直于所述第二穿透轴的轴向。
20.根据权利要求1所述的显示面板,其特征在于,所述多个像素结构的所述至少一者包括第一像素结构,所述第一像素结构的所述像素电极经由所述修补图案与所述多条扫描线的其中一条电性连接。
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JP2002214584A (ja) * | 2001-01-05 | 2002-07-31 | Internatl Business Mach Corp <Ibm> | 表示パネル装置、表示パネルユニット、表示装置 |
JP2004325953A (ja) * | 2003-04-25 | 2004-11-18 | Nec Lcd Technologies Ltd | 液晶表示装置 |
US7649580B2 (en) * | 2007-01-11 | 2010-01-19 | Hannstar Display Corp. | Liquid crystal display panel and repairing method thereof |
JP5302101B2 (ja) * | 2009-05-25 | 2013-10-02 | パナソニック液晶ディスプレイ株式会社 | 表示装置 |
JP5888557B2 (ja) * | 2012-03-14 | 2016-03-22 | Nltテクノロジー株式会社 | 液晶表示装置 |
TWI526755B (zh) * | 2014-09-01 | 2016-03-21 | 群創光電股份有限公司 | 液晶顯示面板 |
CN105572981B (zh) * | 2016-02-23 | 2018-05-25 | 武汉华星光电技术有限公司 | 阵列基板、显示面板以及液晶显示装置 |
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2021
- 2021-08-31 CN CN202111015248.1A patent/CN115903319A/zh active Pending
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2022
- 2022-08-11 US US17/885,571 patent/US20230066074A1/en active Pending
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US20230066074A1 (en) | 2023-03-02 |
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