CN115902357B - Method and device for detecting unknown waveform voltage signal and storage medium - Google Patents
Method and device for detecting unknown waveform voltage signal and storage medium Download PDFInfo
- Publication number
- CN115902357B CN115902357B CN202310114534.6A CN202310114534A CN115902357B CN 115902357 B CN115902357 B CN 115902357B CN 202310114534 A CN202310114534 A CN 202310114534A CN 115902357 B CN115902357 B CN 115902357B
- Authority
- CN
- China
- Prior art keywords
- voltage signal
- voltage value
- reference voltage
- value
- measured
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000000034 method Methods 0.000 title claims abstract description 41
- 238000001514 detection method Methods 0.000 claims description 19
- 230000001105 regulatory effect Effects 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 6
- 238000013459 approach Methods 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 239000012467 final product Substances 0.000 description 2
- 230000000737 periodic effect Effects 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/04—Measuring peak values or amplitude or envelope of ac or of pulses
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Measurement Of Current Or Voltage (AREA)
Abstract
The application relates to a method and a device for detecting an unknown waveform voltage signal, and a storage medium, wherein the cycle period and the peak voltage of the detected voltage signal can be easily determined, and the waveform of the detected voltage signal can be obtained based on the determined cycle period and peak voltage. Respectively connecting a measured voltage signal and a reference voltage signal into two input ends of a comparator; increasing the voltage value of the reference voltage signal by a first amplitude value every a first preset duration, and acquiring first comparison information in real time; when all the voltage values of the first comparison information representing the measured voltage signals are smaller than the reference voltage signals within a certain first preset duration, the voltage values of the reference voltage signals are reduced by a second amplitude value every second preset duration, and second comparison information is obtained in real time.
Description
Technical Field
The present disclosure relates to the field of voltage signal detection technologies, and in particular, to a method and an apparatus for detecting an unknown waveform voltage signal, and a storage medium.
Background
In the manufacturing process of the display panel, in order to reduce the reject ratio of the final product, it is necessary to detect by an image generator (Pattern Generator, PG) before forming the final product, so as to screen out the CELL panel having bad performances such as bright spots, dark spots, bright lines, screen flicker, etc.
The image generator applies various different waveform voltage signals to the display panel to be tested, and charges each pixel circuit to a state capable of emitting light so as to achieve the detection purpose. In case of distortion of the waveform voltage signal output by the image generator, the panel may be damaged or the picture may be abnormal, so that the waveform voltage signal output by the image generator needs to be detected and corrected after the image generator is used for a plurality of times. In this regard, the applicant has proposed a method for detecting a waveform voltage signal output from an image generator in the past, but the method can detect only when the approximate waveform of the detected voltage signal is already known, and cannot detect a waveform voltage signal which is not known at all.
Disclosure of Invention
In view of this, the present application proposes a method and apparatus for detecting an unknown waveform voltage signal, a storage medium, capable of easily determining a cycle period and a peak voltage of a measured voltage signal, and capable of deriving a waveform of the measured voltage signal based on the determined cycle period and peak voltage.
In a first aspect, the present application proposes a method of acquiring a cycle period and a peak voltage of a voltage signal, comprising:
Respectively connecting a measured voltage signal and a reference voltage signal into a first input end and a second input end of a first comparator, wherein the reference voltage signal is a constant voltage signal, and the initial voltage value of the reference voltage signal is smaller than a preset voltage value;
increasing the voltage value of the reference voltage signal by a first amplitude value every a first preset duration, and acquiring first comparison information of the measured voltage signal and the reference voltage signal from the output end of the first comparator in real time in the process;
when all the voltage values of the measured voltage signal, which are characterized by the first comparison information, are smaller than the first current voltage value of the reference voltage signal within a certain first preset time period, then: reducing the voltage value of the reference voltage signal by a second amplitude value every second preset time length, and acquiring second comparison information of the measured voltage signal and the reference voltage signal from the output end of the first comparator in real time in the process; wherein the second amplitude is not greater than the first amplitude, and the second preset duration is not less than the first preset duration;
when the second comparison information characterizes that the measured voltage signal has a voltage value higher than a second current voltage value of the reference voltage signal within a certain second preset time period, the second comparison information comprises the following steps: and determining the peak voltage of the detected voltage signal according to the second current voltage value, and determining the cycle period of the detected voltage signal according to the second comparison information within a certain second preset duration.
In one possible implementation manner, the determining the peak voltage of the measured voltage signal according to the second current voltage value includes one of the following:
determining the second current voltage value as the peak voltage of the measured voltage signal;
determining the sum of the second current voltage value and the second amplitude value as the peak voltage of the measured voltage signal;
and determining the sum of half of the second amplitude and the second current voltage value as the peak voltage of the measured voltage signal.
In a possible implementation manner, the determining the cycle period of the measured voltage signal according to the second comparison information within the certain second preset time period includes:
determining a plurality of target time points within the certain second preset time length includes: determining a point in time as the target point in time once the second comparison information obtained at the point in time characterizes that the voltage value of the current measured voltage signal is higher than the voltage value of the reference voltage signal;
determining the cycle period of the measured voltage signal according to the time interval relation among the target time points; the cycle period of the measured voltage signal is the interval duration between two target time points.
In one possible implementation manner, the determining the cycle period of the measured voltage signal according to the duration interval relation among the multiple target time points includes:
judging whether a plurality of continuous target time lengths are equal or not, wherein each target time length is the total interval time length between i adjacent target time points, and the initial value of i is 2;
if the target durations are not equal, then: repeatedly executing the 'judging whether the continuous multiple target time durations are equal', and when the 'judging whether the multiple target time durations which are not overlapped are equal' is executed each time, making i=i+1 until the multiple target time durations are equal;
and if the target time lengths are equal, determining the target time length as the cycle period.
In one possible embodiment, the method further comprises:
judging whether the number of the target time points reaches a preset number or not;
if the number of the target time points does not reach the preset number, determining a plurality of additional target time points within a third preset duration, wherein the third preset duration is continuous with the certain second preset duration and is after the certain second preset duration; comprising the following steps: once the comparison information obtained from the output end of the first comparator at a certain time point within the third preset duration represents that the voltage value of the current measured voltage signal is higher than the voltage value of the reference voltage signal, determining the time point as the additional target time point, wherein in the process, the voltage value of the reference voltage signal is equal to the voltage value of the reference voltage signal within the certain second preset duration;
The additional target time point is also set as a target time point.
In a second aspect, the present application proposes a voltage signal detection method, including:
determining a cycle period and a peak voltage of the measured voltage signal by the method according to the first aspect, wherein the cycle period is composed of a plurality of clock cycles in succession;
the measured voltage signal and a second reference voltage signal are respectively connected into a first input end and a second input end of a second comparator, wherein in an initial state, the second reference voltage signal is a constant voltage signal with a voltage value equal to the determined peak voltage;
under each clock cycle of the clock cycles, acquiring comparison information of the measured voltage signal and the second reference voltage signal through the second comparator to obtain a plurality of comparison results corresponding to the clock cycles one by one;
if the comparison result obtained in the first clock period represents that the second reference voltage value is higher than the voltage value of the measured voltage signal, the second reference voltage value corresponding to the first clock period in the next cycle period is regulated down; wherein the first clock cycle is any one of the plurality of clock cycles, and the second reference voltage value is a voltage value of the second reference voltage signal;
If the comparison result obtained in the first clock period represents that the second reference voltage value is lower than the voltage value of the measured voltage signal for the first time, determining the voltage value of the measured voltage signal in the first clock period according to the second reference voltage value in the current first clock period until determining the voltage value corresponding to each clock period of the measured voltage signal in the plurality of clock periods;
and determining the waveform of the measured voltage signal according to the determined voltage value of the measured voltage signal corresponding to each clock cycle in the plurality of clock cycles.
In one possible implementation manner, the step of reducing the reference voltage corresponding to the first clock period in the next cycle period includes:
the reference voltage corresponding to the first clock period in the next cycle period is reduced by the second amplitude.
In one possible implementation manner, the determining the voltage value of the measured voltage signal in the first clock cycle according to the second reference voltage value in the current first clock cycle includes one of the following:
determining a second reference voltage value in a current first clock cycle as a voltage value of the measured voltage signal in the first clock cycle;
Determining the sum of a second reference voltage value and the second amplitude value in the current first clock cycle as the voltage value of the measured voltage signal in the first clock cycle;
and determining the sum of half of the second amplitude and a second reference voltage value in the current first clock cycle as the voltage value of the measured voltage signal in the first clock cycle.
In a third aspect, the present application provides a voltage signal detection apparatus, including
The memory device is used for storing the data,
a processor coupled to the memory, an
A program stored in the memory and executable by the processor;
wherein the processor implements when executing the program: the method according to the first aspect or the method according to the second aspect.
In a fourth aspect, the present application proposes a computer-readable storage medium, in which a program is stored, which when executed by a computer device realizes: the method according to the first aspect or the method according to the second aspect.
According to the method and the device for detecting the unknown waveform voltage signal of the image signal generator and the storage medium, the cycle period and the peak voltage of the detected voltage signal can be easily determined, and the waveform of the detected voltage signal can be obtained based on the determined cycle period and peak voltage.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following brief description of the drawings of the embodiments will make it apparent that the drawings in the following description relate only to some embodiments of the present application and are not limiting of the present application.
Fig. 1 is a schematic structural diagram of a voltage signal detection device according to an embodiment of the present application.
Fig. 2 is a flow chart of a voltage signal detection method according to an embodiment of the present application.
Fig. 3 is a detailed flowchart of step S1 in fig. 2 provided in an embodiment of the present application.
Fig. 4 is an actual waveform of a measured voltage signal provided in an embodiment of the present application.
Fig. 5 is a diagram showing a change of the second reference voltage signal when the voltage signal detection method is performed according to the embodiment of the present application.
Fig. 6 is a waveform of a measured voltage signal determined in an embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more clear, the technical solutions of the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present application. It will be apparent that the described embodiments are some, but not all, of the embodiments of the present application. All other embodiments, which can be made by one of ordinary skill in the art without the benefit of the present disclosure, are intended to be within the scope of the present application based on the described embodiments. It is to be understood that some of the technical means of the various embodiments described herein may be interchanged or combined without conflict.
In the description of the present specification and claims, the terms "first," "second," and the like, if any, are used merely to distinguish between the described objects and do not have any sequential or technical meaning. Thus, an object defining "first," "second," etc. may explicitly or implicitly include one or more such objects. Also, the terms "a" or "an" and the like do not denote a limitation of quantity, but rather denote the presence of at least one.
The embodiment of the application provides a voltage signal detection method, which can be executed by the voltage signal detection device shown in fig. 1 or other electronic equipment with a functional structure similar to that of the voltage signal detection device. In fig. 1, the voltage signal detecting apparatus includes a standard voltage generating unit capable of generating a reference voltage signal with adjustable size and waveform. In addition, for ease of understanding, fig. 1 also shows a tested device that generates a voltage signal to be tested, and the voltage signal detection apparatus and the corresponding voltage signal detection method can detect an unknown voltage signal (i.e., the voltage signal to be tested) generated by the tested device in fig. 1, so as to obtain a waveform of the unknown voltage signal (the unknown voltage signal needs to be a periodic waveform signal).
Next, referring to fig. 1 to 6, a voltage signal detection method according to the present embodiment is described, and includes:
s1, determining a cycle period and a peak voltage of a measured voltage signal, wherein the cycle period is composed of a plurality of continuous clock periods.
In practice, the cycle period and peak voltage of the unknown voltage signal may be determined first, and then the waveform of the unknown voltage signal may be further determined based on the determined cycle period and peak voltage. Referring to fig. 1 in combination with fig. 3, fig. 3 shows a method for determining a cycle period and a peak voltage of a measured voltage signal, the method includes the following steps S101 to S103:
s101, a measured voltage signal and a reference voltage signal are respectively connected into a first input end and a second input end of a comparator, and comparison information of the measured voltage signal and the reference voltage signal is obtained from an output end of the comparator, wherein the reference voltage signal is a constant voltage signal, and an initial voltage value of the reference voltage signal is smaller than a preset voltage value.
The reference voltage signal may be provided by the standard voltage generating unit in fig. 1, and the waveform and size parameter of the reference voltage signal provided by the standard voltage generating unit may be adjusted and known information to the detection device. In an implementation, the reference voltage signal provided by the standard voltage generating unit is connected to the second input end of the comparator, the measured voltage signal generated by the measured device is connected to the first input end of the comparator, the input end can be an inverting input end of the comparator, and the second input end can be a non-inverting input end of the comparator.
According to the electrical property of the comparator, when the voltage value of the non-inverting input terminal of the comparator is higher than the inverting input terminal, a high-level signal is generated at the output terminal of the comparator, and when the voltage value of the non-inverting input terminal of the comparator is lower than the inverting input terminal, a low-level signal is generated at the output terminal of the comparator. Therefore, the level signals of the output end of the comparator can be monitored in real time to judge the reference voltage and the measured voltage in the current state. Based on this, in step S101, the initial voltage value of the control reference voltage signal is smaller than the preset voltage value, that is, the initial voltage value of the control reference voltage signal cannot be excessively large (for example, zero, or several millivolts) for the purpose of: so that in the initial state the measured voltage signal has a higher voltage value than the reference voltage signal (e.g. the peak voltage of the measured voltage signal), thereby enabling a high level signal to be obtained at the output of the comparator.
S102, increasing the voltage value of the reference voltage signal by a first amplitude value every a first preset duration, and acquiring first comparison information of the measured voltage signal and the reference voltage signal from the output end of the comparator in real time in the process.
S103, when all the voltage values of the first comparison information representing the measured voltage signal are smaller than the first current voltage value of the reference voltage signal (namely, the voltage value of the reference voltage signal under the certain first preset time period) within the certain first preset time period, the method comprises the following steps: reducing the voltage value of the reference voltage signal by a second amplitude value every second preset time length, and acquiring second comparison information of the measured voltage signal and the reference voltage signal from the output end of the comparator in real time in the process; the second amplitude is not larger than the first amplitude, and the second preset duration is not smaller than the first preset duration.
S104, when the second comparison information indicates that the measured voltage signal has a voltage value higher than the second current voltage value of the reference voltage signal (i.e., the voltage value of the reference voltage signal under the certain second preset duration) within the certain second preset duration, then: and determining the peak voltage of the detected voltage signal according to the second current voltage value, and determining the cycle period of the detected voltage signal according to the second comparison information within a certain second preset time period.
According to the above description, in the initial state, since the voltage value of the reference voltage signal is low, the measured voltage signal generally has a higher voltage value than the reference voltage signal, and thus at least an intermittent high-level signal (and possibly a high-level signal that is always continuous) can be obtained from the output terminal of the comparator. And increasing the voltage value of the reference voltage signal by a first amplitude value every a first preset duration, namely, increasing the voltage value of the reference voltage signal in a stepwise manner. When the first amplitude is increased a sufficient number of times so that the voltage value of the reference voltage signal rises above the voltage value at each point in time over the entire cycle of the voltage signal to be measured, no high level signal can be obtained from the output of the comparator. At this time, the voltage value of the reference voltage signal may be reduced by a second amplitude value every second preset time period, that is, the voltage value of the reference voltage signal may be turned to be reduced stepwise. When the second amplitude is reduced by a sufficient number of times to reduce the voltage value of the reference voltage signal to be lower than the peak voltage of the measured voltage signal, the high-level signal can be obtained from the output end of the comparator intermittently. The smaller the second amplitude is, the closer the voltage value (i.e., the second current voltage value) of the reference voltage signal is to the peak voltage of the measured voltage signal, so that the peak voltage of the measured voltage signal can be determined according to the second current voltage value. In addition, the longer the second preset duration, the more high-level signals (corresponding to the second comparison information) are obtained from the output end of the comparator, and the high-level signals can be obtained only in the peak voltage wave band (the wave band near the peak point) of the measured voltage signal, so if the number of the high-level signals obtained from the output end of the comparator is enough, the cycle period of the measured voltage signal can be determined by analyzing the time nodes where the high-level signals appear.
It will be appreciated that S102 is a coarse tuning step on the reference voltage signal, which aims to find a suitable reference voltage value that is higher than the peak voltage of the measured voltage signal, as a basis for the subsequent fine tuning. To improve efficiency, the first amplitude may be suitably large, for example the first amplitude may be 100 millivolts and the first preset duration may be suitably short. S103 is a step of fine-tuning the reference voltage signal, which aims to find a reference voltage value as close as possible to the peak voltage of the measured voltage signal, and to determine the period of the measured voltage signal by a sufficient number of comparison results, in order to improve the accuracy, the second amplitude may be as small as possible, for example, the second amplitude may be 0.1 millivolt, and the first preset duration may be appropriately long.
It will be appreciated that, in case the second amplitude is equal to the first amplitude, the aforementioned current second voltage value may be derived only when the voltage value of the reference voltage signal is reduced for the first time in step S103.
The "determining the peak voltage of the measured voltage signal according to the second current voltage value" in the aforementioned step S104 may specifically be:
determining the second current voltage value as the peak voltage of the measured voltage signal; or,
Determining the sum of the second current voltage value and the second amplitude value (namely, the second current voltage value plus the second amplitude value) as the peak voltage of the measured voltage signal; or,
the sum of half the second amplitude and the second present voltage value (i.e., the second present voltage value + the second amplitude/2) is determined as the peak voltage of the measured voltage signal.
The "determining the cycle period of the measured voltage signal according to the second comparison information within a certain second preset time period" in the aforementioned step S104 may specifically include the following steps S104a to S104b:
s104a, determining a plurality of target time points within the certain second preset time length, which specifically includes: once the second comparison information obtained at a certain time point represents that the voltage value of the current measured voltage signal is higher than the voltage value of the reference voltage signal, the time point is determined as a target time point;
s104b, determining the cycle period of the measured voltage signal according to the time interval relation among the target time points; the cycle period of the measured voltage signal is the interval duration between two target time points.
The "determining the cycle period of the measured voltage signal according to the time interval relationship between the multiple target time points" in the above step S104b may specifically include:
Judging whether a plurality of continuous target time lengths are equal or not, wherein each target time length is the total interval time length between i adjacent target time points, and the initial value of i is 2;
if the target durations are not equal, then: repeatedly executing the foregoing "judging whether or not the continuous plurality of target durations are equal", and when the foregoing "judging whether or not the plurality of target durations that do not overlap are equal" is executed each time, making i=i+1 (i.e., increasing the value of i by 1) until the plurality of target durations are equal;
and if the target time lengths are equal, determining the target time length as a cycle period.
The foregoing "total interval duration between the adjacent i target time points" can be understood as follows: for example, the total interval duration (i=4) between the four target time points of the 101 th target time point, the 102 th target time point, the 103 th target time point and the 104 th target time point, which are adjacent, is the interval duration between the 101 th target time point and the 104 th target time point, and is also equal to the interval duration between the 101 th target time point and the 102 th target time point+the interval duration between the 102 th target time point and the 103 th target time point+the interval duration between the 103 th target time point and the 104 th target time point.
In an example a, it is assumed that it is determined that there are 14 target time points in total within a corresponding certain second preset time period, which are respectively 0 time point, 1ms time point, 3ms time point, 4ms time point, 6ms time point, 7ms time point, 9ms time point, 10ms time point, 12ms time point, 13ms time point and 14ms time point. First, when i=2, it is determined whether or not a target time length between 0 time point and 1ms time point (the target time length is 1 ms), a target time length between 1ms time point and 3ms time point (the target time length is 2 ms), and a target time length between 3ms time point and 4ms time point (the target time length is 1 ms) are equal, with the result that 1 ms+.2 ms+.1ms. Therefore, by increasing the value of i by 1 from 2 to 3, it is determined whether or not the target time length (3 ms) between the three adjacent 0 time points, 1ms time points, and 3ms time points, the target time length (3 ms) between the three adjacent 3ms time points, 4ms time points, and 6ms time points, and the target time length (3 ms) between the three adjacent 6ms time points, 7ms time points, and 9ms time points are equal, and as a result, 3 ms=3 ms, whereby the cycle period of the measured voltage signal can be determined to be 3ms.
In some embodiments, the method of determining the cycle period and peak voltage of the measured voltage signal further comprises:
judging whether the number of the target time points reaches a preset number or not;
if the number of the plurality of target time points does not reach the preset number, determining a plurality of additional target time points within a third preset time period, wherein the third preset time period is continuous with the certain second preset time period and is after the certain second preset time period; the method specifically comprises the following steps: once the comparison information (i.e., the comparison information of the measured voltage signal and the reference voltage signal) obtained from the output terminal of the comparator at a certain time point within the third preset duration represents that the voltage value of the current measured voltage signal is higher than the voltage value of the reference voltage signal, determining the time point as the additional target time point, and in the process, configuring the voltage value of the reference voltage signal to be equal to the voltage value of the reference voltage signal within the certain second preset duration;
the additional target time point is also referred to as a target time point.
Assuming that in the above example a, the preset number is set to 20, and only 14 target time points actually determined to be within the certain second preset duration are found, and the preset number is not reached, it is possible to continuously acquire the high level signal in the third preset duration added later, and record the time point when the added high level signal appears, which is equivalent in effect to extending the last second preset duration. In this way, a sufficient number of target time points can be derived, and the period of the measured voltage signal, particularly those that would have a number of peak voltages in one cycle period, can be more easily determined based on the sufficient number of target time points.
Referring to fig. 4, fig. 4 shows an example of a measured voltage signal, which is a periodic voltage signal having a cycle period, each cycle period including a plurality of consecutive clock cycles. In fig. 4, three consecutive cycles of the measured voltage signal are shown, where the duration of a single cycle is T and the duration of a single clock cycle is T (e.g. T may be 10 ns), and one cycle consists of 20 consecutive clock cycles, i.e. t=20t. And, among these 20 clock periods, the voltage values corresponding to the first 4 clock periods are the same and are peak voltages, the voltage values corresponding to the following 4 clock periods are the same, the voltage values corresponding to the following 2 clock periods are the same and are peak voltages, the voltage values corresponding to the following 3 clock periods are the same, the voltage values corresponding to the following 1 clock period are peak voltages, and the final 1 clock period corresponds to another voltage value. It will be appreciated that in the above-described scheme of step S104a, if the comparison result is obtained once every 1 clock cycle, then it will be able to obtain (4+2+2+1) ×2=18 high level signals in total in two cycles, and the obtaining time of the high level signals is only one clock cycle apart.
According to the above method, the interval duration between the time point of acquiring the leftmost marked "peak voltage" in fig. 4 and the time point of acquiring the rightmost marked "peak voltage" in fig. 4 is the cycle period of the measured voltage signal.
S2, the measured voltage signal and the second reference voltage signal are respectively connected into a first input end and a second input end of the comparator, wherein in an initial state, the second reference voltage signal is a constant voltage signal with a voltage value equal to the determined peak voltage.
The second reference voltage signal and the aforementioned reference voltage signal may also be provided by the standard voltage generating unit in fig. 1. For convenience of distinction and description, the reference voltage signal in S2 will be referred to as a second reference voltage signal.
In other embodiments, the voltage signal detecting apparatus may have a plurality of standard voltage generating units and a plurality of comparators, wherein the reference voltage signal corresponding to the step S101 and the second reference voltage signal corresponding to the step S2 are provided by two different standard voltage generating units, and the comparator corresponding to the step S101 and the comparator corresponding to the step S2 are two different comparators.
And S3, under each clock cycle of the plurality of clock cycles, obtaining comparison information of the tested voltage signal and the second reference voltage signal through a comparator, and obtaining a plurality of comparison results corresponding to the plurality of clock cycles one by one.
S4, if the comparison result obtained in the first clock period represents that the second reference voltage value is higher than the voltage value of the measured voltage signal, the second reference voltage value corresponding to the first clock period in the next cycle period is regulated down; the first clock period is any one of the clock periods, and the second reference voltage value is the voltage value of the second reference voltage signal.
And S5, if the comparison result obtained in a certain first clock period represents that the second reference voltage value is lower than the voltage value of the measured voltage signal for the first time, determining the voltage value of the measured voltage signal in the first clock period according to the second reference voltage value in the current first clock period until determining the voltage value corresponding to each clock period of the measured voltage signal in a plurality of clock periods.
S6, determining the waveform of the measured voltage signal according to the determined voltage value corresponding to each clock cycle of the measured voltage signal in the clock cycles.
It can be understood that, along with the two input ends of the comparator respectively receiving the measured voltage signal and the second reference voltage signal, the comparison operation circuit in the comparator can compare the voltage values of the measured voltage signal and the second reference voltage signal in real time. In the initial state, the second reference voltage signal is a constant voltage signal, and the voltage value of the second reference voltage signal is equivalent to the actual peak voltage of the measured voltage signal, so that the electric signal obtained from the comparator is a high level signal at least at all time nodes except the peak voltage.
Fig. 5 is a variation demonstration diagram of the second reference voltage signal when the voltage signal detection method is performed in the present embodiment, the uppermost coordinate diagram in fig. 5 shows waveforms of the measured voltage signal and the second reference voltage signal (the second reference voltage signal in the initial state at this time) in the previous cycle, the middle coordinate diagram in fig. 5 shows waveforms of the level signal generated by the comparator output terminal in the previous cycle, and the lowermost coordinate diagram in fig. 5 shows waveforms of the measured voltage signal and the second reference voltage signal in the subsequent cycle.
Referring to fig. 4 and 5, for convenience of explanation, the 20 clock cycles in each cycle in fig. 4 and 5 are sequentially referred to as 1 st clock cycle, 2 nd clock cycle, and 20 th clock cycle (1 st clock cycle is before 2 nd clock cycle), then:
in the 1 st to 4 th clock cycles, the second reference voltage is lower than the measured voltage, and thus, the comparator generates a low level signal (see the middle graph in fig. 5) sent to the standard voltage generating unit, which can be regarded as the second reference voltage is lower than the measured voltage for the first time, and the second reference voltage at this time is equal to the actual peak voltage of the measured voltage signal, and the current second reference voltage value is substantially consistent with the measured voltage value of the 1 st to 4 th clock cycles, so that the current second reference voltage value can be regarded as the voltage of the measured voltage signal in the 1 st to 4 th clock cycles, and the reference voltage value output in the 1 st to 4 th clock cycles of the next 1 cycle is unchanged.
At the 5 th to 8 th clock cycles (see the uppermost graph in fig. 5), the second reference voltage value is higher than the measured voltage value, and thus the comparator generates a high level signal (see the middle graph in fig. 5) to the standard voltage generating unit. When the standard voltage generating unit receives the high-level signal, it knows that the emitted reference voltage in the 5 th to 8 th clock cycles is higher (higher than the measured voltage), and the trigger of the high-level signal causes the standard voltage generating unit to output lower reference voltage in the 5 th to 8 th clock cycles of the next 1 cycle (see the bottom graph in fig. 5).
Similarly, in the 9 th to 10 th clock cycles, the 14 th to 15 th clock cycles and the 19 th clock cycles, the second reference voltage is lower than the measured voltage for the first time, and the second reference voltage is equivalent to the actual peak voltage of the measured voltage signal. The second reference voltage value is higher than the measured voltage value in the 11 th to 13 th clock cycles, the 16 th to 18 th clock cycles, and the 20 th clock cycles, and thus the comparator generates a high level signal (see middle graph in fig. 5) to the standard voltage generating unit. When the standard voltage generating unit receives the high-level signal, it knows that the reference voltage sent by the standard voltage generating unit in 11 th to 13 th clock cycles, 16 th to 18 th clock cycles and 20 th clock cycles is higher (higher than the measured voltage), and the standard voltage generating unit outputs lower reference voltages in 11 th to 13 th clock cycles, 16 th to 18 th clock cycles and 20 th clock cycles in the next 1 cycle (see the bottom graph in fig. 5) through triggering of the high-level signal.
Repeating the above operations (so as to continuously adjust the second reference voltage signal generated by the standard voltage generating unit in the following third, fourth, fifth, etc. cycle periods and gradually approach the measured voltage signal), and in the course of repeating the above operations:
once the standard voltage generating unit receives the high level signal (the standard voltage generating unit receives the low level signal in the last 5 th clock period and receives the high level signal in the current 5 th clock period) in the 5 th clock period (and the 6 th clock period, the 7 th clock period, the 8 th clock period, the 11 th clock period and the like), the second reference voltage value generated by the standard voltage generating unit in the 5 th clock period is very close to the measured voltage value of the 5 th clock period, more specifically, the measured voltage value of the 5 th clock period is between the second reference voltage value of the 5 th clock period in the previous cycle period and the second reference voltage value of the 5 th clock period in the current cycle period, so that the measured voltage of the measured voltage signal in the 5 th clock period can be determined according to the reference voltage of the current 5 th clock period, and the reference voltage value output in the 5 th clock period in the next cycle period remains unchanged. And the like, finally, the voltage value corresponding to each clock period of the measured voltage signal in one cycle period can be obtained, and then the waveform of the measured voltage signal can be determined as shown in fig. 6.
The "determining the measured voltage value of the measured voltage signal in the first clock cycle according to the second reference voltage value of the current first clock cycle" in the aforementioned step S5 may specifically be:
determining a second reference voltage value in a current first clock cycle as a measured voltage value of a measured voltage signal in the first clock cycle; or,
determining the sum of a second reference voltage value and a second amplitude value in the current first clock cycle as a measured voltage value of the measured voltage signal in the first clock cycle; or,
the sum of half of the second amplitude and the second reference voltage value at the current first clock cycle is determined as the measured voltage value of the measured voltage signal at the first clock cycle.
In combination with the above description, in implementation, the standard voltage generating unit may generate the reference voltage signal with the same cycle period based on the determined cycle period and peak voltage of the measured voltage signal, except that all voltage values of the reference voltage signal in one cycle period in the initial state are equal (the determined peak voltage, the waveform is a straight line), but the waveform of the reference voltage signal generated later starts to be wavy and gradually approaches the measured voltage signal. To ensure that the reference voltage signal and the measured voltage signal remain chronologically synchronized (i.e., the respective clock periods of the two correspond to each other), this can be achieved by:
The tested voltage signals are cloned into two identical paths, one path is sent to the inverting input end of the comparator I, and the other path is sent to the inverting input end of the other comparator II. The constant voltage signal having the voltage value equal to the second current voltage value in step S104 is supplied to the non-inverting input terminal of the comparator i, and the reference voltage signal generated by the standard voltage generating unit in fig. 1 is supplied to the non-inverting input terminal of the comparator ii. When the output terminal of the comparator I generates a high-level signal at a certain time point, the clock period position of the measured voltage signal at the moment can be known by combining the time of one or more high-level signals acquired before the time point, and based on the information, the standard voltage generating unit can be controlled to generate a reference voltage value corresponding to the clock period.
An embodiment of the present application further provides an electronic device, including
The memory device is used for storing the data,
processor connected with memory
A program stored in the memory and executable by the processor;
the various methods described above can be implemented when the processor executes the program.
In addition, an embodiment of the present application also provides a computer-readable storage medium storing a program, which when executed by a computer device, can implement the above-described various methods.
Claims (8)
1. A method of acquiring a cycle period and a peak voltage of a voltage signal, comprising:
respectively connecting a measured voltage signal and a reference voltage signal into a first input end and a second input end of a first comparator, wherein the reference voltage signal is a constant voltage signal, and the initial voltage value of the reference voltage signal is smaller than a preset voltage value;
increasing the voltage value of the reference voltage signal by a first amplitude value every a first preset duration, and acquiring first comparison information of the measured voltage signal and the reference voltage signal from the output end of the first comparator in real time in the process;
when all the voltage values of the measured voltage signal, which are characterized by the first comparison information, are smaller than the first current voltage value of the reference voltage signal within a certain first preset time period, then: reducing the voltage value of the reference voltage signal by a second amplitude value every second preset time length, and acquiring second comparison information of the measured voltage signal and the reference voltage signal from the output end of the first comparator in real time in the process; wherein the second amplitude is not greater than the first amplitude, and the second preset duration is not less than the first preset duration;
When the second comparison information characterizes that the measured voltage signal has a voltage value higher than a second current voltage value of the reference voltage signal within a certain second preset duration, the method comprises the following steps: determining the peak voltage of the detected voltage signal according to the second current voltage value, and determining the cycle period of the detected voltage signal according to the second comparison information within a certain second preset duration;
wherein the determining the cycle period of the measured voltage signal according to the second comparison information within the certain second preset time period includes:
determining a plurality of target time points within the certain second preset time length includes: determining a point in time as the target point in time once the second comparison information obtained at the point in time characterizes that the voltage value of the current measured voltage signal is higher than the voltage value of the reference voltage signal;
determining the cycle period of the measured voltage signal according to the time interval relation among the target time points; the cycle period of the measured voltage signal is the interval duration between two target time points;
Wherein, the determining the cycle period of the measured voltage signal according to the time interval relation among the target time points includes:
judging whether a plurality of continuous target time lengths are equal or not, wherein each target time length is the total interval time length between i adjacent target time points, and the initial value of i is 2;
if the target durations are not equal, then: repeatedly executing the 'judging whether the continuous multiple target time durations are equal', and when the 'judging whether the continuous multiple target time durations are equal' is executed each time, making i=i+1 until the multiple target time durations are equal;
and if the target time lengths are equal, determining the target time length as the cycle period.
2. The method of claim 1, wherein determining the peak voltage of the measured voltage signal based on the second current voltage value comprises one of:
determining the second current voltage value as the peak voltage of the measured voltage signal;
determining the sum of the second current voltage value and the second amplitude value as the peak voltage of the measured voltage signal;
And determining the sum of half of the second amplitude and the second current voltage value as the peak voltage of the measured voltage signal.
3. The method of deriving a cycle period and peak voltage of a voltage signal according to claim 1, further comprising:
judging whether the number of the target time points reaches a preset number or not;
if the number of the target time points does not reach the preset number, determining a plurality of additional target time points within a third preset duration, wherein the third preset duration is continuous with the certain second preset duration and is after the certain second preset duration; comprising the following steps: once the comparison information obtained from the output end of the first comparator at a certain time point within the third preset duration represents that the voltage value of the current measured voltage signal is higher than the voltage value of the reference voltage signal, determining the time point as the additional target time point, wherein in the process, the voltage value of the reference voltage signal is equal to the voltage value of the reference voltage signal within the certain second preset duration;
the additional target time point is also set as a target time point.
4. A voltage signal detection method, comprising:
determining a cycle period and a peak voltage of the measured voltage signal by the method of any one of claims 1 to 3, wherein the cycle period is composed of a continuous plurality of clock cycles;
the measured voltage signal and a second reference voltage signal are respectively connected into a first input end and a second input end of a second comparator, wherein in an initial state, the second reference voltage signal is a constant voltage signal with a voltage value equal to the determined peak voltage;
under each clock cycle of the clock cycles, acquiring comparison information of the measured voltage signal and the second reference voltage signal through the second comparator to obtain a plurality of comparison results corresponding to the clock cycles one by one;
if the comparison result obtained in the first clock period represents that the second reference voltage value is higher than the voltage value of the measured voltage signal, the second reference voltage value corresponding to the first clock period in the next cycle period is regulated down; wherein the first clock cycle is any one of the plurality of clock cycles, and the second reference voltage value is a voltage value of the second reference voltage signal;
If the comparison result obtained in the first clock period represents that the second reference voltage value is lower than the voltage value of the measured voltage signal for the first time, determining the voltage value of the measured voltage signal in the first clock period according to the second reference voltage value in the current first clock period until determining the voltage value corresponding to each clock period of the measured voltage signal in the plurality of clock periods;
and determining the waveform of the measured voltage signal according to the determined voltage value of the measured voltage signal corresponding to each clock cycle in the plurality of clock cycles.
5. The method of claim 4, wherein said step of reducing the reference voltage corresponding to the first clock period in the next cycle period comprises:
the reference voltage corresponding to the first clock period in the next cycle period is reduced by the second amplitude.
6. The method of claim 5, wherein determining the voltage value of the measured voltage signal in the first clock cycle based on the second reference voltage value in the current first clock cycle comprises one of:
Determining a second reference voltage value in a current first clock cycle as a voltage value of the measured voltage signal in the first clock cycle;
determining the sum of a second reference voltage value and the second amplitude value in the current first clock cycle as the voltage value of the measured voltage signal in the first clock cycle;
and determining the sum of half of the second amplitude and a second reference voltage value in the current first clock cycle as the voltage value of the measured voltage signal in the first clock cycle.
7. A voltage signal detection device is characterized by comprising
The memory device is used for storing the data,
a processor coupled to the memory, an
A program stored in the memory and executable by the processor;
wherein the processor implements when executing the program: a method of acquiring a cycle period and a peak voltage of a voltage signal according to any one of claims 1 to 3, or a voltage signal detection method according to any one of claims 4 to 6.
8. A computer-readable storage medium, wherein a program is stored in the storage medium, which when executed by a computer device, implements: a method of acquiring a cycle period and a peak voltage of a voltage signal according to any one of claims 1 to 3, or a voltage signal detection method according to any one of claims 4 to 6.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310413720.XA CN116559520B (en) | 2023-02-15 | 2023-02-15 | Voltage signal detection method, device and storage medium |
| CN202310413649.5A CN116223886B (en) | 2023-02-15 | 2023-02-15 | Method and device for detecting voltage signal and storage medium |
| CN202310114534.6A CN115902357B (en) | 2023-02-15 | 2023-02-15 | Method and device for detecting unknown waveform voltage signal and storage medium |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310114534.6A CN115902357B (en) | 2023-02-15 | 2023-02-15 | Method and device for detecting unknown waveform voltage signal and storage medium |
Related Child Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202310413649.5A Division CN116223886B (en) | 2023-02-15 | 2023-02-15 | Method and device for detecting voltage signal and storage medium |
| CN202310413720.XA Division CN116559520B (en) | 2023-02-15 | 2023-02-15 | Voltage signal detection method, device and storage medium |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN115902357A CN115902357A (en) | 2023-04-04 |
| CN115902357B true CN115902357B (en) | 2023-06-06 |
Family
ID=86493485
Family Applications (3)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202310413649.5A Active CN116223886B (en) | 2023-02-15 | 2023-02-15 | Method and device for detecting voltage signal and storage medium |
| CN202310413720.XA Active CN116559520B (en) | 2023-02-15 | 2023-02-15 | Voltage signal detection method, device and storage medium |
| CN202310114534.6A Active CN115902357B (en) | 2023-02-15 | 2023-02-15 | Method and device for detecting unknown waveform voltage signal and storage medium |
Family Applications Before (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202310413649.5A Active CN116223886B (en) | 2023-02-15 | 2023-02-15 | Method and device for detecting voltage signal and storage medium |
| CN202310413720.XA Active CN116559520B (en) | 2023-02-15 | 2023-02-15 | Voltage signal detection method, device and storage medium |
Country Status (1)
| Country | Link |
|---|---|
| CN (3) | CN116223886B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117318681B (en) * | 2023-11-29 | 2024-03-22 | 深圳鹏城新能科技有限公司 | Self-adaptive adjustment method, system and storage medium of PWM generator |
Family Cites Families (48)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4069452A (en) * | 1976-09-15 | 1978-01-17 | Dana Laboratories, Inc. | Apparatus for automatically detecting values of periodically time varying signals |
| DE2650556C2 (en) * | 1976-11-04 | 1978-05-24 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Device for displaying a measurement voltage, e.g. EKG, on the screen of an oscilloscope tube |
| JP2602330Y2 (en) * | 1993-04-15 | 2000-01-11 | 株式会社アドバンテスト | Simultaneous measurement of pulse width and peak value |
| JP3541509B2 (en) * | 1995-07-28 | 2004-07-14 | 株式会社デンソー | Waveform shaping device |
| JP2001255948A (en) * | 2000-03-08 | 2001-09-21 | Nec Corp | Adjustment device for comparator reference voltage |
| US6388906B1 (en) * | 2001-04-20 | 2002-05-14 | Bogen Communications, Inc. | Backslope regulator system |
| CN101470173B (en) * | 2007-12-29 | 2012-09-26 | 鸿富锦精密工业（深圳）有限公司 | Battery detection apparatus and method |
| CN101441230B (en) * | 2008-12-18 | 2012-05-30 | 华为技术有限公司 | Method and apparatus for implementing voltage detection |
| CN101477152B (en) * | 2008-12-24 | 2011-08-17 | 北京希格玛和芯微电子技术有限公司 | Capacitance detection apparatus and method |
| CN101776713B (en) * | 2009-01-13 | 2012-05-30 | 纬拓科技股份有限公司 | direct capacitance-to-digital converter |
| CN101582580B (en) * | 2009-06-09 | 2011-03-02 | 广州金升阳科技有限公司 | Input/output over-voltage protection circuit |
| CN102237812B (en) * | 2010-04-26 | 2013-06-12 | 辉芒微电子（深圳）有限公司 | Primary side feedback (FB) switching power supply controller and switching power supply system |
| JP5665571B2 (en) * | 2011-01-28 | 2015-02-04 | ルネサスエレクトロニクス株式会社 | Semiconductor integrated circuit and operation method thereof |
| US20130015837A1 (en) * | 2011-07-13 | 2013-01-17 | International Business Machines Corporation | On-chip signal waveform measurement circuit |
| CN102426286B (en) * | 2011-09-26 | 2013-06-12 | 中环天仪股份有限公司 | Polarization voltage detection circuit used in electromagnetic flow meter |
| CN103178570A (en) * | 2011-12-26 | 2013-06-26 | 曹先国 | Constant-current automatic adjusting charging method and charger |
| JP5228128B1 (en) * | 2012-05-28 | 2013-07-03 | タナシン電機株式会社 | Signal generation device, measurement device, leakage detection device, and signal generation method |
| CN202631623U (en) * | 2012-06-12 | 2012-12-26 | 深圳世强电讯有限公司 | Device and system for measuring alternating current voltage with variable frequency |
| CA2876842A1 (en) * | 2012-06-18 | 2013-12-27 | Master Lock Company | Rfid detection system |
| CN103237180B (en) * | 2013-04-03 | 2015-12-09 | 南京邮电大学 | A kind of high dynamic range infrared focal plane read-out circuit |
| CN103499742B (en) * | 2013-10-18 | 2016-05-11 | 河南省计量科学研究院 | Reduce because of the method for signal amplitude variation on high-precision phase measurement impact |
| CN203858282U (en) * | 2013-12-30 | 2014-10-01 | 长沙理工大学 | Intermediate frequency broadband digital peak detection circuit |
| DE102014100982B4 (en) * | 2014-01-28 | 2019-03-14 | Phoenix Contact Gmbh & Co. Kg | Measuring device for detecting an input voltage |
| CN203745525U (en) * | 2014-03-18 | 2014-07-30 | 北京富桦明电子有限公司 | Detection circuit |
| CN104333203B (en) * | 2014-11-10 | 2017-03-08 | 矽力杰半导体技术(杭州)有限公司 | A kind of frequency locking circuit and switching power source control circuit |
| DE102014226136B3 (en) * | 2014-12-16 | 2016-02-11 | Dialog Semiconductor (UK) Ltd | measuring circuit |
| KR102282401B1 (en) * | 2015-01-02 | 2021-07-26 | 삼성전자주식회사 | Device and Method for training reference voltage |
| CN104880174A (en) * | 2015-06-04 | 2015-09-02 | 绍兴文理学院 | Laser digital display type level testing instrument |
| CN105356863B (en) * | 2015-09-29 | 2018-04-13 | 贵州剑星科技有限公司 | A kind of fast recovery detection delay circuit with monostable step response |
| CN106772185B (en) * | 2017-01-11 | 2020-03-10 | 深圳市鼎阳科技股份有限公司 | Signal interval or period detection method and device for oscilloscope |
| CN207164127U (en) * | 2017-07-07 | 2018-03-30 | 佛山科学技术学院 | A kind of voltage peak detection circuit of numeral output |
| CN107527022B (en) * | 2017-08-04 | 2020-10-13 | 丁大良 | Signal period calculation method |
| CN107505498B (en) * | 2017-08-31 | 2019-12-10 | 东南大学 | Peak and valley value detection circuit |
| CN207304102U (en) * | 2017-10-31 | 2018-05-01 | 福建省福芯电子科技有限公司 | A kind of self- recoverage protection circuit and over-discharge protection circuit |
| CN208984705U (en) * | 2018-10-17 | 2019-06-14 | 苏州大学 | A kind of device of non-contact measurement sinusoidal current signal frequency and peak value |
| CN109669070A (en) * | 2019-01-02 | 2019-04-23 | 中电和瑞科技有限公司 | A kind of frequency measurement method and frequency measurement circuit |
| JP7208075B2 (en) * | 2019-03-20 | 2023-01-18 | アズビル株式会社 | frequency detection circuit |
| CN110208589B (en) * | 2019-05-08 | 2021-06-01 | 深圳市鼎阳科技股份有限公司 | Time domain signal waveform measuring method and device and digital oscilloscope |
| CN110646744A (en) * | 2019-09-25 | 2020-01-03 | 深圳市华思旭科技有限公司 | Detection circuit and power supply device |
| CN110763922B (en) * | 2019-11-01 | 2021-12-31 | 龙迅半导体（合肥）股份有限公司 | Differential reference voltage generation circuit, peak signal detection circuit, and electronic device |
| CN110928352B (en) * | 2019-11-21 | 2021-09-10 | 思瑞浦微电子科技（苏州）股份有限公司 | Large-capacitance slow-start circuit and method |
| CN110995268B (en) * | 2019-12-24 | 2023-06-20 | 中山大学 | Multi-order successive approximation type n bit analog-to-digital converter |
| CN112285406B (en) * | 2021-01-04 | 2021-06-15 | 深圳市鼎阳科技股份有限公司 | High-precision time domain measuring method and device and storage medium |
| CN113109618B (en) * | 2021-03-22 | 2024-10-22 | 成都芯源系统有限公司 | Quick input voltage signal detection circuit and method thereof |
| CN113376428A (en) * | 2021-06-09 | 2021-09-10 | 上海光之虹光电通讯设备有限公司 | Repetitive pulse and high-speed repetitive pulse amplitude detection method |
| CN113495188A (en) * | 2021-06-22 | 2021-10-12 | 瀚昕微电子(无锡)有限公司 | Voltage fluctuation detection circuit |
| CN114050710B (en) * | 2021-10-08 | 2023-08-04 | 广州市慧芯电子科技有限公司 | Switching power supply circuit |
| CN114839423A (en) * | 2022-04-08 | 2022-08-02 | 中山大学 | Voltage amplitude detection method, detection system and device |
-
2023
- 2023-02-15 CN CN202310413649.5A patent/CN116223886B/en active Active
- 2023-02-15 CN CN202310413720.XA patent/CN116559520B/en active Active
- 2023-02-15 CN CN202310114534.6A patent/CN115902357B/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN116223886A (en) | 2023-06-06 |
| CN116223886B (en) | 2023-09-29 |
| CN116559520B (en) | 2023-10-17 |
| CN116559520A (en) | 2023-08-08 |
| CN115902357A (en) | 2023-04-04 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN115902357B (en) | Method and device for detecting unknown waveform voltage signal and storage medium | |
| JP2006258686A (en) | Reliability measuring device and measuring method | |
| US7940058B2 (en) | Capacitive measurements with fast recovery current return | |
| CN109116266B (en) | Power module testing method | |
| CN107799043B (en) | GOA circuit detection method and system and electronic equipment | |
| US6998893B2 (en) | Circuit and method for inducing jitter to a signal | |
| JP2013036998A (en) | Electronic load device and method of providing variable reactance load function on electronic load device | |
| CN118038776B (en) | Fault detection method, device, equipment and medium of time sequence display driving circuit | |
| CN210119310U (en) | Thermocouple conditioning module response time test system | |
| JP5492892B2 (en) | Device for measuring at least one value of a voltage applied to an electronic component | |
| US8433990B2 (en) | Semiconductor test apparatus and test method | |
| US9625520B2 (en) | Latch-up test device and method for testing wafer under test | |
| CN111679762B (en) | Method for transmitting touch driving signal, touch chip and electronic equipment | |
| CN110176200B (en) | Method and system for generating panel detection signal | |
| CN116092403B (en) | Method and device for detecting voltage waveform of image signal generator and storage medium | |
| CN111781411A (en) | Partial discharge pulse sequence generation method and device | |
| CN114123975A (en) | Crystal oscillator and phase noise reduction method thereof | |
| US8451030B2 (en) | Output device and test apparatus | |
| US7551504B2 (en) | Apparatus and method of detecting refresh cycle of semiconductor memory | |
| EP0652444A1 (en) | Method and apparatus for forming a potential distribution image of a semiconductor integrated circuit | |
| US7206713B2 (en) | Method of adjusting strobe timing and function testing device for semiconductor device | |
| JP5240135B2 (en) | Semiconductor memory device testing method and semiconductor memory device | |
| CN116169994A (en) | Signal trigger output method and device | |
| CN106847247B (en) | Chord tone output control method and system | |
| KR100193207B1 (en) | Refresh Circuit for Memory Test |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |