CN115859904A - PCB laminated structure short circuit detection system for EDA software - Google Patents
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Abstract
The invention relates to the technical field of EDA (electronic design automation) software, in particular to a PCB (printed circuit board) laminated structure short-circuit detection system for EDA software, which comprises a short-circuit detection stack, a short-circuit group set, a memory storing a computer program and a processor, wherein the short-circuit detection stack is empty initially, and the short-circuit group set is empty initially. The system only performs the stacking and unstacking operation on the conducting layers, simplifies the short circuit detection logic of the PCB laminated structure, reduces the number of short circuit detection objects, reduces the complexity of the short circuit detection of the PCB laminated structure, and improves the detection efficiency and accuracy.
Description
Technical Field
The invention relates to the technical field of EDA (electronic design automation) software, in particular to a PCB (printed circuit board) laminated structure short-circuit detection system for EDA software.
Background
With the development of technologies such as processes and materials, the scale of Circuit design is getting larger, and the demand for a PCB laminated structure composed of a multi-layer PCB (Printed Circuit Board) Board is increasing, and a dielectric layer must be disposed between conductive layers of the PCB laminated structure, otherwise, a short Circuit may occur. When EDA (Electronic Design Automation) software is used for EDA engineering Design, short circuit detection needs to be performed on a PCB stack structure, and due to the huge scale of circuit Design, one circuit Design may include a plurality of PCB stack structures, and one PCB stack structure may include a plurality of layer objects.
In the prior art, EDA software needs to judge whether each two adjacent layers have short circuits one by one, the current detection position needs to be marked, the same layer object needs to form a group with an upper layer adjacent layer object and a lower layer adjacent layer object respectively for short circuit detection, the detection times are many, the detection process is complex, the detection efficiency is low, and due to the large number, the detection omission possibly occurs. In addition, the existing detection mode has low legibility of the prompt message generated after the short circuit is determined. Therefore, how to provide a short-circuit detection technology for a PCB laminated structure of EDA software, which reduces the complexity of short-circuit detection of the PCB laminated structure, improves the detection efficiency and accuracy, and improves the readability of the detection result becomes a technical problem to be solved urgently.
Disclosure of Invention
The invention aims to provide a PCB laminated structure short circuit detection system for EDA software, which reduces the complexity of PCB laminated structure short circuit detection and improves the detection efficiency and accuracy.
According to an aspect of the present invention, there is provided a short detection system for a PCB stack structure of EDA software, comprising a short detection stack, a short group set, a memory storing a computer program, and a processor, wherein the short detection stack is initially empty, the short group set is initially empty, and when the processor executes the computer program, the following steps are implemented:
s1, obtaining a PCB laminated structure (P) to be detected 1 ,P 2 ,…,P m ,…,P M ），P m The value range of M is 1 to M for the mth layer object of the PCB laminated structure to be detected, M is the total layer number of the PCB laminated structure to be detected, and P is the total layer number of the PCB laminated structure to be detected m The device comprises a layer object identifier and a layer type identifier, wherein the layer type identifier is a dielectric layer or a conductive layer;
s2, setting a first counter and a second counter, setting the initial value of the first counter to be 1, setting the value of m to be the value of the first counter, setting the value of the second counter to be N, and setting the initial value of N to be 0;
step S3, identifyingPin P m If the layer type identifier is a conductive layer, performing step S4, and if the layer type identifier is a dielectric layer, performing step S5;
step S4, adding P m Storing the short circuit detection stack, adding 1 to the value of a second counter, and executing the step S8;
step S5, if the value of the second counter is larger than 1, executing step S6, otherwise, executing step S7;
s6, executing stack-out operation on all layer objects stored in the current short circuit detection stack to generate a stack-out layer object sequence (P) i1 ,P i2 ,…,P in ,…,P iN ），P in Is the nth popped layer object in the popped layer object sequence, the value range of N is 1 to N, P in Is P 1 ,P 2 ,…,P m ,…,P M Based on a sequence of pop layer objects (P) i1 ,P i2 ,…,P in ,…,P iN ) Generating a short-circuit group (P) i1 ,P i2 )、(P i2 ,P i3 )、…、(P i（n-1） ,P in )、(P in ,P i(n+1) )、…、(P i(N-2) ,P i(N-1) )、(P i(N-1) ,P iN ) Adding the generated short circuit group into the short circuit group set, and executing the step S8;
s7, clearing the current short circuit detection stack, and executing the step S8;
and S8, if M is less than M, adding 1 to the value of the first counter, returning to execute the step S3, and otherwise, determining the short circuit group in the current short circuit group set as the short circuit group corresponding to the PCB laminated structure to be detected.
Compared with the prior art, the invention has obvious advantages and beneficial effects. By means of the technical scheme, the PCB laminated structure short circuit detection system for the EDA software can achieve considerable technical progress and practicability, has industrial wide utilization value, and at least has the following beneficial effects:
the system only performs the stacking and unstacking operation on the conducting layers, simplifies the short circuit detection logic of the PCB laminated structure, reduces the number of short circuit detection objects, reduces the complexity of short circuit detection of the PCB laminated structure, and improves the detection efficiency and accuracy.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic diagram of a short-circuit detection process of a PCB laminated structure for EDA software according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a display interface according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The embodiment of the invention provides a short circuit detection system for a PCB laminated structure of EDA software, which comprises a short circuit detection stack, a short circuit group set, a memory storing a computer program and a processor, wherein the short circuit detection stack is initially empty, the short circuit group set is initially empty, and when the processor executes the computer program, as shown in figure 1, the following steps are realized:
s1, acquiring a PCB laminated structure (P) to be detected 1 ,P 2 ,…,P m ,…,P M ），P m The value range of M is 1 to M for the mth layer object of the PCB laminated structure to be detected, M is the total layer number of the PCB laminated structure to be detected, and P is the total layer number of the PCB laminated structure to be detected m The method comprises a layer object identifier and a layer type identifier, wherein the layer type identifier is a dielectric layer or a conductive layer.
Can understand thatIs that P 1 ,P 2 ,…,P m ,…,P M The PCB is arranged according to the lamination sequence, and each layer of object corresponds to one layer of PCB. Preferably, each layer of object identification has uniqueness.
And S2, setting a first counter and a second counter, setting the initial value of the first counter to be 1, setting the value of m to be the value of the first counter, setting the value of the second counter to be N, and setting the initial value of N to be 0.
It will be appreciated that the value of m is updated as the value of the first counter is updated; the value of N is updated as the value of the second counter is updated.
Step S3, identifying P m And if the corresponding layer type identifier is a conductive layer, performing step S4, and if the corresponding layer type identifier is a dielectric layer, performing step S5.
Step S4, adding P m And storing the short circuit detection stack with the value of the second counter added by 1, and executing the step S8.
It should be noted that only layer objects of the conductive layer type are always stacked or popped in the short circuit detection stack, and the second counter records the number of layer objects currently stored in the short circuit detection stack.
And S5, if the value of the second counter is greater than 1, executing the step S6, otherwise, executing the step S7.
S6, executing stack-out operation on all layer objects stored in the current short circuit detection stack to generate a stack-out layer object sequence (P) i1 ,P i2 ,…,P in ,…,P iN ），P in Is the nth popped layer object in the popped layer object sequence, the value range of N is 1 to N, P in Is P 1 ,P 2 ,…,P m ,…,P M Based on a sequence of pop layer objects (P) i1 ,P i2 ,…,P in ,…,P iN ) Generating a short-circuit group (P) i1 ,P i2 )、(P i2 ,P i3 )、…、(P i（n-1） ,P in )、(P in ,P i(n+1) )、…、(P i(N-2) ,P i(N-1) )、(P i(N-1) ,P iN ) The generated short circuit groupAnd adding the short circuit group set to the short circuit group set, and executing the step S8.
It should be noted that, after all the layer objects stored in the current short circuit detection stack are popped, the short circuit detection stack is restored to be empty. P is in The layer type identifiers of (1) are all conductive layers. P i1 ,P i2 ,…,P in ,…,P iN Is P 1 ,P 2 ,…,P m ,…,P M A part of the layer types in (1) are identified as layer objects of the conductive layer. The resulting short circuit sets may be one or more sets, which when multiple sets, illustrate that there are a succession of multiple layer objects, identified as conductive layers, stacked together.
And S7, clearing the current short circuit detection stack, and executing the step S8.
It is understood that if m =1, the process proceeds to step S7, and at this time N =0, the current short detection stack is originally empty, so that the process may proceed to step S8 without performing a clearing operation. When the value of the second counter is 1, it indicates that only one layer type in the short circuit detection stack is identified as the layer object of the conductive layer, and the type of the next layer object of the layer object is the dielectric layer, which indicates that short circuit does not occur.
And S8, if M is less than M, adding 1 to the value of the first counter, returning to execute the step S3, and otherwise, determining the short circuit group in the current short circuit group set as the short circuit group corresponding to the PCB laminated structure to be detected.
It will be appreciated that when no short circuit condition exists in the PCB stack-up, the set of last-generated short circuit groups is empty, i.e. there are no short circuit groups. Furthermore, in an extreme case, when the PCB stack structure is entirely dielectric, the set of the finally generated short-circuit groups is also empty, i.e. there are no short-circuit groups.
It should be noted that the existing ways of generating the PCB laminate structure to be tested all fall within the scope of the present invention. In building an electronic design based on EDA software, an electronic design will typically include multiple PCB stack structures to facilitate PCB stack-upThe invention further provides a mode for generating the PCB laminated structure to be detected, and as an example, the system further comprises a display interface, wherein the display interface is used for displaying the first row area and the second row area. Wherein the first column region includes X attribute display columns (L1) 1 ,L1 2 ,…,L1 x ,…,L1 X ), L1 x And displaying columns for the X-th attribute, wherein the value range of X is 1 to X, and X is the total number of the attribute display columns. L1 x The xth attribute information is used for displaying the layer object, and the attribute information at least comprises a layer object name and a layer type identifier; l1 x Comprises Y attribute display lines (L1) 1 x ,L1 2 x ,…,L1 y x ,…,L1 Y x ）, L1 y x Is L1 x The Y-th attribute display line, the value range of Y is 1 to Y, and Y is the total number of the attribute display lines. It can be understood that L1 1 ,L1 2 ,…,L1 x ,…,L1 X The corresponding layer type identifications are alternately arranged. L1 y x And the attribute information display module is used for displaying the x attribute information corresponding to the y row layer object. The attribute information may further include layer object material information, layer object thickness information, a layer number, validity information, and the like.
The second column area includes Z PCB stack creation columns (L2) 1 ,L2 2 ,…,L2 z ,…,L2 Z )，L2 z Column, L2, is created for the z-th PCB stack z The creation of the z-th PCB stack, i.e. each stack creation column, may create a corresponding PCB stack. L2 z Comprises Y layer object check lines (L2) 1 z ,L2 2 z ,…,L2 y z ,…,L2 Y z )，L2 y z Is L2 z The y-th layer object of (2) colludes the row y z And the checking option state is used for setting the checking option state of the y layer object of the z-th PCB laminated structure, and the checking option state comprises a selection state and a non-selection state. L2 y z And L1 y x And correspondingly. Said system is throughThe PCB laminated structures are generated by setting the option hooking state, the method is convenient and quick, the number of the generated PCB laminated structures can be flexibly set, the layer object corresponding to each PCB laminated structure can be flexibly selected, and errors are not easy to occur. It should be noted that the layer object names may be multiplexed, and the column identifiers created based on the layer object names and the corresponding stack structures may be combined to construct a unique layer object identifier.
As shown in fig. 2, the display interface, "Layer #", "Layer Name", "Layer Type", "Thickness", "Material", and "Main" all belong to the first column region, and "Layer #" represents a conductive Layer number attribute column. The "Layer Name" indicates a Layer object Name attribute column, and in this example, only the Layer object Name of the conductive Layer is shown, and the Layer object Name of the dielectric Layer may be set at the same time. "Layer Type" indicates a Layer Type identification attribute column, "Conductor", "Plane" each indicates a conductive Layer Type, and "Dielectric" indicates a Dielectric Layer Type. "Thickness" indicates a layer object Thickness information attribute column, and the unit is set to "mm". "Material" represents a layer object Material information attribute column. The 'Main' represents an effective information attribute column, and only when the column of the 'Main' is selected, the row of information can be enabled to be effective, so that a PCB laminated structure can be constructed, and the flexibility of selecting layer objects is increased. However, it is understood that if the total number of layer objects is not large, the attribute column of "Main" may not be set, and all layer objects may be selected by default. In fig. 2, "Newstackup1", "Newstackup2", "Newstackup3", and "Newstackup4" belong to the second column region, and represent 4 PCB laminated structure creation columns, column-check layer objects are created based on each PCB laminated structure, and corresponding attribute information is extracted from the first column region, so that a corresponding PCB laminated structure can be generated.
As an example, if the short circuit detection mode set by the system is the non-real-time detection mode, when the processor executes the computer program, the following steps are further implemented:
step S10, receiving user input based on a plurality of L2 y z The set checking instruction is to check each L2 corresponding to the instruction y z The checking option of (2) is set to a selection state.
The user can select a plurality of stacked structure creating columns to create a plurality of stacked structures, each stacked structure creating column selects a corresponding layer object to check a row according to specific application requirements, and the corresponding check option state is set to be a selection state.
Step S20, traversing the second row area, and sequentially acquiring L2 with each check option in each PCB laminated structure establishing row as a selection state y z Corresponding L1 in the first column region y x And generating a corresponding PCB laminated structure to be detected.
It should be noted that, through steps S10 to S20, one PCB stacked structure to be detected may be generated, and a plurality of PCB stacked structures to be detected may also be generated. As an example, the step S20 is followed by:
and S30, if a plurality of PCB laminated structures to be detected exist, respectively executing the steps S1-S8 based on each PCB laminated structure to be detected, and acquiring a short circuit group corresponding to each PCB laminated structure to be detected.
And finally, acquiring short circuit groups corresponding to all the PCB laminated structures to be detected by respectively detecting the PCB laminated structures to be detected.
As an example, the step S30 is followed by:
and S40, highlighting the short circuit groups corresponding to the PCB laminated structures to be detected on the display interface.
For example, the display may be performed in a highlight mode, or a mark may be formed on a display interface using a predetermined color. The display interface may specifically be a GUI interface.
As another embodiment, if the short circuit detection mode set by the system is a real-time detection mode, when the processor executes the computer program, the following steps are further implemented:
step (ii) ofS100, receiving current input of a user based on a target L2 y z The set target checking instruction is used for checking the target L2 y z The checking option of (2) is set to a selection state.
Step S200, obtaining a target L2 y z Corresponding PCB laminated structure creates L2 with each current check option in the column as a selection state y z Corresponding L1 in the first column region y x And generating a target PCB laminated structure.
As an example, the step S200 is followed by:
step S300, setting the target PCB laminated structure as the PCB laminated structure to be detected, executing the step S1 to the step S8, and obtaining a short circuit group corresponding to the target PCB laminated structure.
Step S400, if the target L2 exists in the short circuit group corresponding to the target PCB laminated structure y z Then the target L2 is identified y z Is set to a non-selection state and short circuit prompt information is generated.
The short circuit condition can be timely found by extracting the target PCB laminated structure in real time and carrying out short circuit detection on the target PCB laminated structure in real time, and when the short circuit exists, the target L2 is forced to be arranged y z The state of the short circuit is set to be a non-selection state, and the user is prompted to reselect, so that the short circuit can be avoided in time. However, it can be understood that a missing inspection may occur, and therefore, after all the layer objects to be added are set, or after a part of the layer objects are changed, the finally generated PCB laminated structure may be used as the PCB laminated structure to be inspected, and the steps S1 to S8 are performed again to perform the short circuit inspection.
The system only performs the stacking and unstacking operation on the conducting layers, simplifies the short circuit detection logic of the PCB laminated structure, reduces the number of short circuit detection objects, reduces the complexity of short circuit detection of the PCB laminated structure, and improves the detection efficiency and accuracy.
It should be noted that some exemplary embodiments are described as processes or methods depicted as flowcharts. Although a flowchart may describe the steps as a sequential process, many of the steps can be performed in parallel, concurrently or simultaneously. In addition, the order of the steps may be rearranged. A process may be terminated when its operations are completed, but may have additional steps not included in the figure. A process may correspond to a method, a function, a procedure, a subroutine, a subprogram, etc.
Although the present invention has been described with reference to a preferred embodiment, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (8)
1. A short-circuit detection system of PCB laminated structure for EDA software is characterized in that,
the method comprises a short circuit detection stack, a short circuit group set, a memory storing a computer program and a processor, wherein the short circuit detection stack is initially empty, the short circuit group set is initially empty, and when the processor executes the computer program, the following steps are realized:
s1, obtaining a PCB laminated structure (P) to be detected 1 ,P 2 ,…,P m ,…,P M ），P m The value range of M is 1 to M, M is the total number of layers of the PCB laminated structure to be detected, and P is the mth layer object of the PCB laminated structure to be detected m The device comprises a layer object identifier and a layer type identifier, wherein the layer type identifier is a dielectric layer or a conductive layer;
s2, setting a first counter and a second counter, setting the initial value of the first counter to be 1, setting the value of m to be the value of the first counter, setting the value of the second counter to be N, and setting the initial value of N to be 0;
step S3, identifying P m If the layer type identifier is a conductive layer, performing step S4, and if the layer type identifier is a dielectric layer, performing step S5;
step S4, adding P m Storing the short circuit detection stack, adding 1 to the value of a second counter, and executing the step S8;
step S5, if the value of the second counter is larger than 1, executing step S6, otherwise, executing step S7;
s6, executing stack-out operation to all layer objects stored in the current short circuit detection stack to generate a stack-out layer object sequence (P) i1 ,P i2 ,…,P in ,…,P iN ），P in Is the nth popped layer object in the popped layer object sequence, the value range of N is 1 to N, P in Is P 1 ,P 2 ,…,P m ,…,P M Based on a sequence of pop layer objects (P) i1 ,P i2 ,…,P in ,…,P iN ) Generating a short-circuit group (P) i1 ,P i2 )、(P i2 ,P i3 )、…、(P i（n-1） ,P in )、(P in ,P i(n+1) )、…、(P i(N-2) ,P i(N-1) )、(P i(N-1) ,P iN ) Adding the generated short circuit group into the short circuit group set, and executing the step S8;
s7, clearing the current short circuit detection stack, and executing the step S8;
and S8, if M is less than M, adding 1 to the value of the first counter, returning to execute the step S3, and otherwise, determining the short circuit group in the current short circuit group set as the short circuit group corresponding to the PCB laminated structure to be detected.
2. The system of claim 1,
the system also includes a display interface for displaying a first column region and a second column region, wherein the first column region includes X attribute display columns (L1) 1 ,L1 2 ,…,L1 x ,…,L1 X ), L1 x Displaying columns for the x-th attribute, x having a value ranging from 1 toX，L1 x The xth attribute information is used for displaying the layer object, and the attribute information at least comprises a layer object name and a layer type identifier; l1 x Comprises Y attribute display lines (L1) 1 x ,L1 2 x ,…,L1 y x ,…,L1 Y x ）, L1 y x Is L1 x The Y-th attribute of (1) is displayed, the value range of Y is 1 to Y, L1 y x The attribute information display module is used for displaying the x attribute information corresponding to the y row layer object;
the second column area includes Z PCB stack creation columns (L2) 1 ,L2 2 ,…,L2 z ,…,L2 Z )，L2 z Column, L2, is created for the z-th PCB stack z For creating a z-th PCB stack; l2 z Comprises Y layer object check lines (L2) 1 z ,L2 2 z ,…,L2 y z ,…,L2 Y z )，L2 y z Is L2 z The y-th layer object of (2) colludes the row y z The system generates the PCB laminated structure by setting the checking option state, and creates a column identification combination to construct a unique layer object identification based on the layer object name and the corresponding laminated structure.
3. The system of claim 2,
the attribute information further includes layer object material information and layer object thickness information.
4. The system of claim 2,
if the short circuit detection mode set by the system is a non-real-time detection mode, when the processor executes the computer program, the following steps are also implemented:
step S10, receiving user input based on a plurality of L2 y z The set checking instruction is to check each L2 corresponding to the checking instruction y z The checking option is set to be in a selection state;
step S20, traversing the second row area, and sequentially acquiring L2 with each check option in each PCB laminated structure establishing row as a selection state y z Corresponding L1 in the first column region y x And generating a corresponding PCB laminated structure to be detected.
5. The system of claim 4,
the step S20 is followed by:
and S30, if a plurality of PCB laminated structures to be detected exist, respectively executing the steps S1-S8 based on each PCB laminated structure to be detected, and acquiring a short circuit group corresponding to each PCB laminated structure to be detected.
6. The system of claim 5,
the step S30 is followed by:
and S40, highlighting the short circuit groups corresponding to the PCB laminated structures to be detected on the display interface.
7. The system of claim 2,
if the short circuit detection mode set by the system is a real-time detection mode, when the processor executes the computer program, the following steps are also realized:
step S100, receiving current input of user based on target L2 y z The set target checking instruction is used for checking the target L2 y z The checking option is set to be in a selection state;
step S200, obtaining target L2 y z Corresponding PCB laminated structure creates L2 taking each current check option in the column as a selection state y z Corresponding L1 in the first column region y x And generating a target PCB laminated structure.
8. The system of claim 7,
the step S200 is followed by:
step S300, setting the target PCB laminated structure as the PCB laminated structure to be detected, executing the step S1 to the step S8, and acquiring a short circuit group corresponding to the target PCB laminated structure;
step S400, if the target L2 exists in the short circuit group corresponding to the target PCB laminated structure y z Then the target L2 is identified y z Is set to a non-selection state and short circuit prompt information is generated.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN116521576A (en) * | 2023-05-11 | 2023-08-01 | 上海合见工业软件集团有限公司 | EDA software data processing system |
| CN116521576B (en) * | 2023-05-11 | 2024-03-08 | 上海合见工业软件集团有限公司 | EDA software data processing system |
| CN117829044A (en) * | 2024-03-01 | 2024-04-05 | 上海合见工业软件集团有限公司 | EDA constraint detection system |
| CN117829044B (en) * | 2024-03-01 | 2024-05-14 | 上海合见工业软件集团有限公司 | EDA constraint detection system |
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