CN114997103B - One-to-many component connectivity detection system based on interconnection design data - Google Patents
One-to-many component connectivity detection system based on interconnection design data Download PDFInfo
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Abstract
The invention relates to a one-to-many component connectivity detection system based on interconnection design data, which comprises a design mapping relation library, a memory and a processor, wherein the memory is used for storing computer programs, the design mapping relation library is used for storing interconnection design data, the interconnection design data comprises M pieces of pre-generated design mapping information, and the design mapping information comprises father node component identifiers, hierarchical identifiers of father nodes, child node component identifiers and hierarchical identifiers of child nodes. The invention obtains one-to-many component combination based on the design mapping relation library, selects the corresponding pin set from the pins corresponding to the components based on the bounding box, and calculates the one-to-many component connectivity detection according to the selected pin set, thereby greatly reducing the calculation amount and improving the performance and efficiency of the one-to-many component connectivity detection.
Description
Technical Field
The invention relates to the technical field of electronic design, in particular to a one-to-many component connectivity detection system based on interconnection design data.
Background
In designs (devices) such as a PCB (Printed Circuit Board), a Package, an Interposer (Package carrier), an IC (integrated Circuit), and the like, different manufacturers typically manufacture the devices independently, so that each design data is independent, and networks configured by different design data may differ based on a Device connectivity detection system, a pin name, a pin number, and the like between different design data. In the design data detection process, all the design data are required to be nested together for detection. With the development of electronic technology, tens of thousands or even tens of designs may be involved in a system to form a multi-level interconnection, and components of different types of design data may be suitable for different detection standards. CN113919252A discloses a system for detecting connectivity of components between different design data, but only one-to-one detection of connectivity of components in design data can be performed. However, in some interconnect design data, there are cases where there are one-to-many ICs, for example, a plurality of ICs are disposed on a PCB, and in such cases, if the connectivity detection method for one-to-one components disclosed in CN113919252A is further adopted, the system performance is greatly reduced, and a unified connectivity detection report cannot be generated for the PCB, so that the detection efficiency is low. Therefore, how to improve the performance and efficiency of the one-to-many component connectivity detection becomes an urgent technical problem to be solved.
Disclosure of Invention
The invention aims to provide a one-to-many component connectivity detection system based on interconnection design data, and the performance and efficiency of the one-to-many component connectivity detection are improved.
The invention provides a one-to-many component connectivity detection system based on interconnection design data, which comprises a design mapping relation library, a memory and a processor, wherein the memory is used for storing computer programs, the design mapping relation library is used for storing interconnection design data, the interconnection design data comprises M pieces of pre-generated design mapping information, and the design mapping information comprises father node component identifiers, hierarchical identifiers of father nodes, child node component identifiers and hierarchical identifiers of child nodes;
when the processor executes the computer program, the following steps are implemented:
step C1, acquiring one-to-many component combination { D) based on the design mapping relation library 1 ，D 2 ，…D N }, D n For the nth group of one-to-many component combinations, D n =（A n ,B 1 n ,B 2 n ,…B f(n) n ）, A n 、B 1 n 、B 2 n 、…B f(n) n Is a component, B 1 n ,B 2 n ,…B f(n) n Is located at the same sideA level, A n At B 1 n ,B 2 n ,…B f(n) n Adjacent to the level, N ranges from 1 to N, and f (N) is equal to A n The number of interconnected components at the same level;
step C2, adding D n Corresponding design data are imported into a preset coordinate system to establish A n 、B 1 n 、B 2 n 、…B f(n) n And A n To generate A n 、B 1 n 、B 2 n 、…B f(n) n Pin coordinate information of (2);
step C3, based on B i n Pin information determination of (B) i n Of (2) a bounding box P i n Based on P i n And A n Pin coordinate information of from A n Selecting B from the pins i n Corresponding pin set AX i n I ranges from 1 to f (n);
step C4, based on B i n And AX i n Pin coordinate information pair B i n And A n And carrying out connectivity detection.
Compared with the prior art, the invention has obvious advantages and beneficial effects. By means of the technical scheme, the one-to-many component connectivity detection system based on the interconnection design data can achieve considerable technical progress and practicability, has wide industrial utilization value and at least has the following advantages:
the invention obtains one-to-many component combination based on the design mapping relation library, selects the corresponding pin set from the pins corresponding to the components based on the bounding box, and calculates the one-to-many component connectivity detection according to the selected pin set, thereby greatly reducing the calculation amount and improving the performance and efficiency of the one-to-many component connectivity detection.
The foregoing description is only an overview of the technical solutions of the present invention, and in order to make the technical means of the present invention more clearly understood, the present invention may be implemented in accordance with the content of the description, and in order to make the above and other objects, features, and advantages of the present invention more clearly understood, the following preferred embodiments are described in detail with reference to the accompanying drawings.
Drawings
Fig. 1 is a schematic diagram of a system for detecting connectivity of a component based on one-to-many interconnection design data according to an embodiment of the present invention.
Detailed Description
To further illustrate the technical means and effects of the present invention adopted to achieve the predetermined objects, the following detailed description will be given with reference to the accompanying drawings and preferred embodiments of a system for detecting connectivity of components based on one-to-many interconnection design data according to the present invention.
The embodiment of the invention provides a one-to-many component connectivity detection system based on interconnection design data, which comprises a design mapping relation library, a memory and a processor, wherein the memory stores a computer program, the design mapping relation library is used for storing interconnection design data, the interconnection design data comprise M pieces of pre-generated design mapping information, and M is a positive integer greater than or equal to 2. The design mapping information comprises father node component identifiers, level identifiers of father nodes, child node component identifiers and level identifiers of child nodes.
When the processor executes the computer program, the following steps are implemented:
step C1, acquiring one-to-many component combination { D } based on the design mapping relation library 1 ，D 2 ，…D N }, D n For the nth group of one-to-many component combinations, D n =（A n ,B 1 n ,B 2 n ,…B f(n) n ）, A n 、B 1 n 、B 2 n 、…B f(n) n Is a component, B 1 n ,B 2 n ,…B f(n) n At the same level, A n At B 1 n ,B 2 n ,…B f(n) n At the adjacent level of the level, N ranges from 1 to N, f (N) is equal to A n The number of interconnected components at the same level, f (n) is a function of n.
The components may be different types of components, and the types of the components include a Printed Circuit Board (PCB), a Package, an Interposer, an Integrated Circuit (IC), and other design (Device) types.
Step C2, adding D n Corresponding design data are imported into a preset coordinate system to establish A n 、B 1 n 、B 2 n 、…B f(n) n And A n To generate A n 、B 1 n 、B 2 n 、…B f(n) n Pin coordinate information of (2).
Wherein, each component can be firstly placed at the coordinate origin, and then the A is established by operations such as moving, overturning and/or rotating n 、B 1 n 、B 2 n 、…B f(n) n And A n The interconnection relationship of (c).
Step C3, based on B i n Pin information determination of (B) i n Of (2) a bounding box P i n Based on P i n And A n Pin coordinate information of from A n Selecting B from the base pins i n Corresponding pin set AX i n And i ranges from 1 to f (n).
It should be noted that all the existing bounding box calculation methods fall within the scope of the present invention, and are not described herein again. By calculating B i n Of (2) a bounding box P i n Can be directly from A n Selecting B from the pins i n Corresponding pin set AX i n Avoid B i n For A n All the pins are calculated, so that the calculation amount is greatly reduced, and the system performance is improved.
Step C4, based on B i n And AX i n Pin coordinate information pair B i n And A n And carrying out connectivity detection.
In step C4, each group B can be individually identified i n And A n Connectivity detection is carried out, and a plurality of groups B can be parallelly detected i n And A n Performing connectivity check, as a preferred embodiment, in the step C4, based on all B i n And AX i n Pin coordinate information of (a), performing B in parallel 1 n 、B 2 n 、…B f(n) n And A n And the connectivity detection efficiency is improved.
As an embodiment, the system further includes a display interface, and after the step C4, the method further includes:
step C5, based on B 1 n 、B 2 n 、…B f(n) n And A n To generate A as a result of the connectivity test n The connectivity detection report is presented on the display interface.
It should be noted that, if the detection method of a pair of unary devices in the prior art is adopted, only each group B can be calculated respectively i n And A n Connectivity check, and need to be for A n All the pins in the system are calculated, the calculation efficiency is low, the performance is poor, and the final presented result can only present B i n And A n Results of connectivity check, for B i n Is complete, but for A n In terms of display only part, not intuitive, and relative to the display due to A n Relative to B i n There are a large number of unconnected pins, which also results in a very large number of unconnected pins being generated, and a pin with a real defect cannot be found intuitively. The embodiment of the invention selects B i n Corresponding pin set AX i n The above problems can be solved as a preferred embodiment: the step C5 comprises the following steps:
step C51, based on B i n And A n The connectivity detection result generates a set BA of connected pin pairs i n And A is n AT pin set i n The connection pin pair comprises B i n And a pin in A communicating with the pin n Of the pin of (a).
Step C52, based on all BAs i n Generation of A n Is reported to the institute AT i n Pooling based on AT i n Generating A n A non-connected sub-report of (a); the connected sub report comprises a pin name of a connected pin pair and a corresponding network identification name; the non-connected sub-report comprises A n The pin names which are not successfully connected and the corresponding connection failure prediction information.
Step C53, displaying A on the display interface n And/or a n Is reported.
Through the steps C51 to C53, A can be generated quickly and intuitively n The accuracy and the efficiency of the connectivity check are improved.
As an example, B i n Pin of (2) includes { pB 1 ni ,pB 2 ni ,…pB g(i) ni }，PB j ni Is B i n J ranges from 1 to g (i), g (i) is B i n G (i) is a function of i, said step C4 comprising:
step C41, adding AX i n Corresponding region division into E 1 A first sub-area, PB j ni The corresponding first sub-area is taken as a first target sub-area, E 1 The number of the first divided areas is preset.
Step C42, dividing the y target subarea into E y A y sub-area, PB j ni The Y target subarea is determined as the Y target subarea, the value range of Y is 2 to Y, Y is the total division times, E y Is a preset oney is the number of divided regions.
In addition, E is 1 And E y The values may be the same or different, E 1 、E y And the value of Y is comprehensively determined according to the requirements of the specific application scene such as the calculation efficiency and the calculation accuracy.
Step C43, corresponding AX of the Yth target subregion i n Pin coordinate information AXY in i n Is determined as PB j ni And corresponding candidate pin coordinate information.
From AX by steps C41-C43 i n Corresponding pins are selected to obtain the possible sum PB j ni The connected candidate pin coordinate information further accelerates the connectivity detection efficiency and accuracy.
Step C44, based on PB j ni Pin coordinate information of (A) and (Y) i n Until PB is determined j ni In A n If AXY is the corresponding connecting pin i n If no corresponding connection pin exists, prompt information is generated.
Wherein PB can be executed in parallel j ni And AXY i n Can be calculated one by one, but each pin can only be communicated with one pin of the same adjacent level, therefore, when PB can be determined j ni At A n And the calculation can be stopped when the corresponding pin is communicated.
As an example, in the step C44, the PB basis is adopted j ni Pin coordinate information of (2) and AXY i n Performing connectivity detection on each pin coordinate information, including:
step C441, based on PB j ni Pin coordinate information of (2) and AXY i n Per pin coordinate information in (1), according to B i n And A n Corresponding connectivity check configuration information for PB j ni Pin coordinate information of (A) and (Y) i n Each of which isAnd performing connectivity detection on the pin coordinate information, wherein the connectivity detection configuration information comprises detection modes, and the detection modes comprise a pin center corresponding mode and a pin area corresponding mode.
If the detection mode is the pin center corresponding mode, step C441 includes:
step C4411, PB-based j ni Pin coordinate information of (A) and (Y) i n Each pin coordinate information acquisition PB in (1) j ni Pin center coordinate information and AXY i n Each pin center coordinate information.
Step C4412, if PB j ni Pin center coordinate information and AXY i n Determines PB if the coordinate information of one pin center is within a preset error range j ni Pin of (2) and corresponding AXY i n The middle pins are communicated, otherwise, the middle pins are determined to be not communicated.
If the detection mode is the pin area corresponding mode, step C441 includes:
step C4411 ， Based on PB j ni Pin coordinate information of (2) and AXY i n Obtaining PB for each pin coordinate information in j ni Pin area and AXY i n Each pin area.
Step C4411 ， If PB is j ni Pin area and AXY i n If there is an intersection in one of the pin areas, PB is determined j ni Pin of (2) and corresponding AXY i n The middle pins are communicated, otherwise, the middle pins are determined to be not communicated.
The system of the embodiment of the invention acquires the one-to-many component combination based on the design mapping relation library, selects the corresponding pin set from the pins corresponding to the components based on the bounding box, and calculates the one-to-many component connectivity detection according to the selected pin set, thereby greatly reducing the calculation amount and improving the performance and efficiency of the one-to-many component connectivity detection.
It should be noted that the existing connectivity detection method can set a unified detection mode only through a unified standard to perform connectivity detection on components in design data, and has low accuracy and poor flexibility. Based on this, the embodiment of the invention is further improved as follows:
the display interface is used for presenting a configuration interface, the configuration interface comprises M pieces of configuration information, the configuration information comprises a father node element identification data segment, a son node element identification data segment, a hierarchy identification information data segment, a detection mode data segment, an error range data segment and a data segment whether to be displayed, and the hierarchy identification information data segment is used for storing a hierarchy identification of the father node element and a hierarchy identification of the son node element; as an embodiment, the configuration interface may include a plurality of column regions, where a parent node component identification data segment, a child node component identification data segment, a hierarchy identification information data segment, a detection mode data segment, an error range data segment, and whether or not to display a data segment occupy one column region, respectively, and a hierarchy identification pair is formed by a hierarchy identification where a parent node component is located and a hierarchy identification where a child node component is located in one column region, but it may be understood that a column region may also be set to present a hierarchy identification where a parent node component is located and a hierarchy identification where a child node component is located, respectively, but whichever presentation mode may visually display a corresponding relationship between a component identification and a hierarchy identification where a component is located. When the processor executes the computer program, the following steps are also implemented:
step S1, receiving a first connectivity detection configuration instruction.
And S2, calling the design mapping relation library based on the first connectivity detection to present an initial configuration interface on the display interface, wherein in the initial configuration interface, all detection modes corresponding to M pieces of configuration information are set as default detection modes, all error range data segments are set as default error ranges, and whether all display data segments are set as display identifications.
And S3, receiving a second connectivity detection configuration instruction, and determining configuration information to be modified and corresponding target modification information based on the second connectivity detection configuration instruction, wherein the target modification information comprises at least one of a change detection mode, a change error range and a change display.
And S4, modifying the configuration information to be modified based on the target modification information to generate target configuration information.
And S5, performing connectivity detection on the design data based on the target configuration information.
As an embodiment, the detection mode includes a pin center corresponding mode and a pin area corresponding mode; if the detection mode data segment is set to be in a mode corresponding to the pin center, the error range data segment is configured to be in a modifiable mode; if the detection mode data segment is set to be in a pin area corresponding mode, the error range data segment is configured to be in an unalterable mode and is always set to be in a default error range. As a preferred embodiment, the default error ranges are all 0.
The component identification includes component type information and number information, such as pkg _0820, pcb _0821, it being understood that the identification of each component is unique, but the number information may not be unique. And determining a corresponding detection mode and an error range based on the component type information corresponding to the component identification and the detection precision requirement.
When the M value is small, the M pieces of configuration information may be directly configured, but when the M value is large and it is necessary to reserve a certain kind of configuration information for subsequent reuse, the configuration information may also be stored for subsequent direct loading use, as an embodiment, the system further includes a configuration file library for storing the template configuration file, and the step S4 further includes:
and step S41, receiving a template configuration file saving instruction.
And S42, generating a corresponding template configuration file based on the target configuration information, and storing the template configuration file into the configuration file library.
It can be understood that step S4 may be executed multiple times, and the template configuration file may also be saved after any one time of configuration information modification is completed, so as to improve the efficiency and flexibility of configuration.
As an embodiment, the step S42 further includes:
and S43, receiving a third connectivity detection configuration instruction, and determining a target template configuration file based on the third connectivity detection configuration instruction.
And step S44, acquiring the target template configuration file from the configuration file library, presenting the corresponding configuration information in a configuration interface, and then returning to execute the step S3, or directly executing the step S5 based on the current configuration information as the target configuration information.
It can be understood that, after the configuration information corresponding to the target template configuration file is directly presented on the configuration interface, connectivity detection can be directly performed based on the current configuration information, and the configuration information can be further modified on the basis, thereby improving configuration efficiency and flexibility.
The information of connectivity detection can be flexibly configured based on the configuration interface, which is described in detail below by using several specific embodiments:
the first embodiment,
The step S3 includes:
step S31, analyzing father node component identification to be modified, child node component identification to be modified, father node component level identification to be modified, child node component level identification to be modified and corresponding target modification information from the second connectivity detection configuration instruction.
And S32, retrieving configuration information in the current configuration interface, and determining the configuration information of which the father node component identification data segment is the father node component identification to be modified, the child node component identification data segment is the child node component identification to be modified, the level identification of the father node component is the level identification of the father node component to be modified, and the level identification of the child node component is the level identification of the child node component to be modified as the configuration information to be modified.
And S33, modifying all the configuration information to be modified based on the target modification information.
It should be noted that, only one piece of corresponding configuration information can be modified by performing steps S31 to S33 once, but multiple times of modifying multiple pieces of corresponding configuration information one by one may be performed, so that the same parent node component and child node component are combined in the same adjacent hierarchy and different adjacent hierarchies, or different parent node components and child node components are combined in the same adjacent hierarchy and different adjacent hierarchies, and the configuration information for connectivity detection may be independently and flexibly set in different adjacent hierarchies, respectively, without mutual influence.
Example II,
The step S3 includes:
step S31 ， And analyzing the father node component identifier to be modified, the child node component identifier to be modified and the corresponding target modification information from the second connectivity detection configuration instruction.
Step S32 ， And retrieving configuration information in the current configuration interface, and determining the configuration information of which all father node component identification data segments are the father node component identifications to be modified and the son node component identification data segments are the son node component identifications to be modified as the configuration information to be modified.
Step S33 ， And uniformly modifying all the configuration information to be modified based on the target modification information.
It should be noted that, in a system design, there may be a group of parent node components and child node components that are located at different adjacent levels, and in some application scenarios, the same group of parent node components and child node components may need to set the same connectivity detection configuration information, so that step S31 may be performed to obtain connectivity detection configuration information ， Step S33 ， Batch modification is realized, and the connectivity detection configuration efficiency is improved.
Example III,
The step S3 includes:
step S31 ，， And analyzing the parent node component level identifier to be modified, the child node component level identifier to be modified and corresponding target modification information from the second connectivity detection configuration instruction.
Step S32 ，， Retrieving current configuration interfaceAnd configuring information, namely determining the configuration information of which the parent node component level identifier in all the level identifier information data segments is the parent node component level identifier to be modified and the level identifier of the child node component is the child node component level identifier to be modified as the configuration information to be modified.
Step S33 ，， And uniformly modifying all the configuration information to be modified based on the target modification information.
It should be noted that, in some application scenarios, in a system design, all parent node components and child node components in the same adjacent hierarchy may exist, the same connectivity detection configuration information needs to be set, and step S31 may be performed ，， Step S33 ，， Batch modification is realized, and the connectivity detection configuration efficiency is improved.
As an example, the step S5 includes:
step S51, whether the data segment is displayed is analyzed, target configuration information is obtained, a target father node component identifier, a target child node component identifier, a target father node component level identifier, a target child node component level identifier, a target detection mode and a target error range are obtained, if the target detection mode is a pin center corresponding mode, the step S52 is executed, and if the target detection mode is a pin area corresponding mode, the step S53 is executed.
And S52, determining the coordinate corresponding to the pin center of the target parent node component based on the target parent node component identifier and the target parent node component level identifier, determining the coordinate corresponding to the pin center of the target child node based on the target child node component identifier and the target child node component level identifier, determining that the pin of the target parent node is communicated with the pin corresponding to the target child node if the coordinate corresponding to the pin center of the target parent node and the coordinate error corresponding to the pin center of the target child node are within a target error range, and otherwise, determining that the pin is not communicated.
And S53, determining a pin area corresponding to the pin center of a target father node of the target father node component based on the target father node component identifier and the target father node component level identifier, determining a pin area corresponding to the pin center of a target child node based on the target child node component identifier and the target child node component level identifier, determining that the pin of the target father node is not communicated with the pin corresponding to the target child node if the pin area of the target father node is intersected with the pin area corresponding to the target child node component, and otherwise, determining that the pin is not communicated.
The display interface is further configured to present a connectivity detection report, and the step S5 further includes:
and S54, generating a connectivity detection report based on all target father node component identifiers, target child node component identifiers, target father node component hierarchy identifiers, target child node component hierarchy identifiers, pins of the target father nodes and pin connectivity detection results corresponding to the target child nodes, and displaying the connectivity detection report on the display interface.
It should be noted that, the step S54 may be implemented in a manner disclosed in CN113935272A or in other manners, and specific implementation manners are not described herein again.
The system provided by the embodiment of the invention can flexibly set the connectivity detection configuration information between any two components positioned in any two adjacent levels through the configuration interface, and improves the accuracy and flexibility of the design data connectivity detection based on the corresponding configuration information memorability connectivity detection.
It should be noted that some exemplary embodiments are described as processes or methods depicted as flowcharts. Although a flowchart may describe the steps as a sequential process, many of the steps can be performed in parallel, concurrently or simultaneously. In addition, the order of the steps may be rearranged. A process may be terminated when its operations are completed, but may have additional steps not included in the figure. A process may correspond to a method, a function, a procedure, a subroutine, a subprogram, etc.
Although the present invention has been described with reference to the preferred embodiments, it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted for elements thereof without departing from the scope of the present invention.
Claims (7)
1. A one-to-many component connectivity detection system based on interconnection design data,
the system comprises a design mapping relation library, a memory and a processor, wherein the memory stores a computer program, the design mapping relation library is used for storing interconnection design data, the interconnection design data comprise M pieces of pre-generated design mapping information, and the design mapping information comprises father node component identifiers, hierarchy identifiers of father nodes, child node component identifiers and hierarchy identifiers of child nodes;
when the processor executes the computer program, the following steps are implemented:
step C1, acquiring one-to-many component combination { D) based on the design mapping relation library 1 ，D 2 ，…D N }, D n For the nth group of one-to-many component combinations, D n =（A n ,B 1 n ,B 2 n ,…B f(n) n ）, A n 、B 1 n 、B 2 n 、…B f(n) n Is a component, B 1 n ,B 2 n ,…B f(n) n At the same level, A n At B 1 n ,B 2 n ,…B f(n) n At the adjacent level of the level, N ranges from 1 to N, f (N) is equal to A n The number of interconnected components at the same level;
step C2, adding D n Corresponding design data are imported into a preset coordinate system to establish A n 、B 1 n 、B 2 n 、…B f(n) n And A n Is interconnected to generate A n 、B 1 n 、B 2 n 、…B f(n) n Pin coordinate information of (2);
step C3, based on B i n Pin information determination of (B) i n Of (2) a bounding box P i n Based on P i n And A n Pin coordinate information of from A n Selecting B from the pins i n Corresponding pin set AX i n The value range of i is 1 to f (n);
step C4, based on B i n And AX i n Pin coordinate information pair B i n And A n Carrying out connectivity detection;
B i n pin of (2) includes { P B 1 ni ,P B 2 ni ,…P B g(i) ni }，PB j ni Is B i n J ranges from 1 to g (i), g (i) is B i n The step C4 includes:
step C41, adding AX i n Corresponding region division into E 1 A first sub-area, PB j ni The corresponding first sub-region is taken as a first target sub-region, E 1 The number of the preset first divided areas is set;
step C42, dividing the y target subarea into E y A y sub-area, PB j ni The Y target sub-area is determined as the Y target sub-area, the value range of Y is 2 to Y, Y is the total division times, E y Dividing the number of the regions for the preset y;
step C43, corresponding AX to the Y-th target subregion i n Pin coordinate information AXY in i n Is determined as PB j ni Corresponding candidate pin coordinate information;
step C44, based on PB j ni Pin coordinate information of (A) and (Y) i n Until PB is determined j ni At A n If AXY is the corresponding connecting pin i n If no corresponding connection pin exists, prompt information is generated.
2. The system of claim 1,
in said step C4, based on all B i n And AX i n Pin coordinate information of (a), performing B in parallel 1 n 、B 2 n 、…B f(n) n And A n And (5) detecting connectivity.
3. The system of claim 1,
the system further comprises a display interface, and the step C4 is followed by:
step C5, based on B 1 n 、B 2 n 、…B f(n) n And A n To generate A as a result of the connectivity test n The connectivity detection report is presented on the display interface.
4. The system of claim 3,
the step C5 comprises the following steps:
step C51, based on B i n And A n The connectivity detection result generates a set BA of connected pin pairs i n And A is n AT pin set i n The connection pin pair comprises B i n And a pin in A communicating with the pin n One pin of (a);
step C52, based on all BAs i n Generation of A n All ATs are reported i n Pooling based on AT i n Generating A n A non-connected sub-report of (a); the connectivity sub-report includes the pin name of the connectivity pin pairA scale and a corresponding network identification name; the non-connexon report comprises A n The pin names which are not successfully connected and corresponding connection failure prediction information are obtained;
step C53, displaying A on the display interface n And/or a n Is reported.
5. The system of claim 1,
in said step C44, based on PB j ni Pin coordinate information of (2) and AXY i n Performing connectivity detection on each pin coordinate information, including:
step C441, based on PB j ni Pin coordinate information of (2) and AXY i n Per pin coordinate information in (1), according to B i n And A n Corresponding connectivity check configuration information for PB j ni Pin coordinate information of (A) and (Y) i n The connectivity detection configuration information comprises detection modes, wherein the detection modes comprise a pin center corresponding mode and a pin area corresponding mode.
6. The system of claim 5,
if the detection mode is the pin center corresponding mode, step C441 includes:
step C4411, PB-based j ni Pin coordinate information of (A) and (Y) i n Obtaining PB for each pin coordinate information in j ni Pin center coordinate information and AXY i n Center coordinate information of each pin in the group;
step C4412, if PB j ni Pin center coordinate information and AXY i n Determines PB if the coordinate information of one pin center is within a preset error range j ni Pin of (2) and corresponding AXY i n The middle pins are communicated, otherwise, the middle pins are determined to be not communicated.
7. The system of claim 5,
if the detection mode is the pin area corresponding mode, step C441 includes:
step C4411 ， Based on PB j ni Pin coordinate information of (A) and (Y) i n Obtaining PB for each pin coordinate information in j ni Pin area and AXY i n Each pin area in (1);
step C4412 ， If PB is j ni Pin area and AXY i n If there is an intersection in one of the pin areas, PB is determined j ni Pin of (2) and corresponding AXY i n The middle pins are communicated, otherwise, the middle pins are determined to be not communicated.
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