CN115715052A - HDI circuit board and method for detecting blind hole offset of HDI circuit board - Google Patents

HDI circuit board and method for detecting blind hole offset of HDI circuit board Download PDF

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Publication number
CN115715052A
CN115715052A CN202211482057.0A CN202211482057A CN115715052A CN 115715052 A CN115715052 A CN 115715052A CN 202211482057 A CN202211482057 A CN 202211482057A CN 115715052 A CN115715052 A CN 115715052A
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China
Prior art keywords
copper ring
copper
test
blind hole
ring group
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Pending
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CN202211482057.0A
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Chinese (zh)
Inventor
田晓露
黎用顺
刘绪军
瞿宏宾
贺小平
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Olympic Circuit Technology Co ltd
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Olympic Circuit Technology Co ltd
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Application filed by Olympic Circuit Technology Co ltd filed Critical Olympic Circuit Technology Co ltd
Priority to CN202211482057.0A priority Critical patent/CN115715052A/en
Publication of CN115715052A publication Critical patent/CN115715052A/en
Pending legal-status Critical Current

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Abstract

The invention discloses an HDI circuit board and discloses a method for detecting the blind hole offset of the HDI circuit board, wherein the HDI circuit board comprises a substrate and a test module, the substrate is provided with a through hole and a blind hole, the test module comprises a first copper ring group and a second copper ring group, the first copper ring group is arranged at the periphery of the through hole, the second copper ring group is arranged at the periphery of the blind hole, the first copper ring group comprises a conducting layer and a plurality of first copper rings, the conducting layer is arranged on the side wall of the through hole, the plurality of first copper rings are electrically connected through the conducting layer, the second copper ring group comprises a conducting rod and a plurality of second copper rings, the inner diameter of the second copper ring at the bottom is larger than that of the copper ring at the top, the second copper ring at the bottom is electrically connected with the corresponding first copper ring, the conducting rod is inserted into the blind hole, an isolating ring is formed between the outer peripheral side of the conducting rod close to one end of the blind hole and the inner side of the second copper ring at the bottom, and if the first copper ring at the top and the second copper ring at the top are connected, the HDI circuit board can be judged to be unqualified.

Description

HDI circuit board and method for detecting blind hole offset of HDI circuit board
Technical Field
The invention relates to the technical field of circuit boards, in particular to an HDI circuit board and a method for detecting blind hole offset of the HDI circuit board.
Background
HDI is a technology of producing printed circuit boards, and HDI circuit boards are circuit boards with high circuit distribution density by using a micro blind hole burying technology.
In HDI circuit board production process, the blind hole is through radium-shine drilling mode preparation, probably because radium-shine skew leads to the inlayer skew of HDI circuit board, and the inlayer skew can not in time be confirmed in the production process, just can discover after the electricity is surveyed and is accomplished, causes manufacturing cost extravagant.
Disclosure of Invention
The present invention is directed to solving at least one of the problems of the prior art. Therefore, the invention provides the HD I circuit board which can confirm whether blind hole machining is qualified or not in time.
The invention further provides a method for detecting the blind hole offset of the HDI circuit board.
The HDI circuit board comprises a substrate and a test module, wherein the substrate is provided with a through hole and a blind hole, the through hole and the blind hole are arranged along the thickness direction of the substrate, the test module is arranged on the substrate, the test module comprises a first copper ring group and a second copper ring group, the first copper ring group is arranged at the periphery of the through hole, the second copper ring group is arranged at the periphery of the blind hole, the first copper ring group comprises a conductive layer and a plurality of first copper rings arranged at intervals along the thickness direction of the substrate, the conductive layer is arranged on the side wall of the through hole, and the first copper rings are electrically connected through the conductive layer; the second copper ring set comprises a conductive rod and a plurality of second copper rings arranged at intervals along the thickness direction of the substrate, the inner diameter of each second copper ring positioned at the bottom is larger than that of the corresponding second copper ring positioned at the top, the second copper rings positioned at the bottom are electrically connected with the corresponding first copper rings, the conductive rod is inserted into the blind hole, and an isolation ring is formed between the outer peripheral side of one end, close to the blind hole, of the conductive rod and the inner side of the corresponding second copper ring positioned at the bottom.
The HD I circuit board provided by the embodiment of the first aspect of the invention has at least the following beneficial effects:
during laser drilling, an operator can design the diameter of the blind hole according to the inner diameter of the second copper ring at the bottom through the technological requirement of the blind hole so that the width of the isolating ring is the offset threshold of the blind hole, if the first copper ring at the top is conducted with the second copper ring at the top, the conductive rod can be judged to be partially overlapped with the second copper ring at the bottom, the offset of the conductive rod is larger than the width of the isolating ring, the offset of the blind hole is too large, and the HD I circuit board is unqualified; if the first copper ring at the top and the second copper ring at the top are not conducted, the conductive rod and the second copper ring at the bottom can be judged to be not overlapped, the offset of the conductive rod is smaller than the width of the isolating ring, and whether the offset of the blind hole is within the process requirement range can be judged in time so as to determine that the HD I circuit board is qualified.
According to some embodiments of the invention, the test module is configured in a plurality, the test modules are arranged at intervals along the length direction of the substrate, and the width of the isolation rings gradually increases or gradually decreases along the length direction of the substrate.
According to some embodiments of the invention, the widths of the plurality of isolation rings form an arithmetic progression along the length of the substrate.
According to some embodiments of the invention, the width of the plurality of isolation rings is sequentially increased by 0.5mil along the length direction of the substrate.
According to some embodiments of the present invention, the substrate further comprises a plurality of first test PADs and second test PADs, the first test PADs and the second test PADs are disposed on the surface of the substrate, the first test PADs are electrically connected to the conductive layer, and the second test PADs are electrically connected to the conductive bars.
According to some embodiments of the present invention, the first copper ring group and the second copper ring group are disposed along a width direction of the substrate, the first test PAD is disposed on a side of the first copper ring group away from the second copper ring group, and the second test PAD is disposed on a side of the second copper ring group away from the first copper ring group.
According to some embodiments of the invention the diameter of the first test PAD or the second test PAD is 0.5mm to 1.5mm.
According to some embodiments of the invention, the blind hole has a diameter of 2mil to 6mil.
The method for detecting the blind hole offset of the HD I circuit board according to the embodiment of the second aspect of the invention comprises the following steps:
s1: the method comprises the steps of obtaining a substrate, manufacturing a plurality of test modules on the substrate, wherein the test modules comprise a first copper ring group and a second copper ring group, the first copper ring group comprises a plurality of first copper rings arranged at intervals along the thickness direction of the substrate, the second copper ring group comprises a plurality of second copper rings arranged along the thickness direction of the substrate, the inner diameter of the second copper ring positioned at the bottom is larger than that of the second copper ring positioned at the top, and the inner diameters of the second copper rings positioned at the bottom of different second copper ring groups are different; s2: processing a through hole in the first copper ring set, and plating copper on the inner wall of the through hole so as to electrically connect the first copper ring set with the second copper ring at the bottom of the corresponding second copper ring set; s3: the second copper ring groups are subjected to laser drilling to process the blind holes, and the diameters of the blind holes in the second copper ring groups are consistent; s4: filling copper in the blind hole to form a conductive rod, forming an isolation ring between the outer peripheral side of one end, close to the bottom wall of the blind hole, of the conductive rod and the inner side of the second copper ring at the bottom, wherein the width of the isolation ring is the distance between the outer side of the conductive rod and the second copper ring at the bottom; s5; acquire the universal meter, with the red pen-shape metre of universal meter and black pen-shape metre respectively with first copper ring group and second copper ring group electric connection on the same test module to test one by one a plurality of test modules, the analysis of test result is as follows:
s5.1, if the test modules all display short circuits, the offset of the blind hole is larger than the minimum value of the widths of the different isolating rings; s5.2, if the test modules display open circuits, the offset of the blind hole is smaller than the maximum value of the widths of different isolating rings; s5.3, if some test modules display short circuit and some test modules display open circuit, the offset of the blind hole is smaller than the minimum value of the width of the isolating ring in the test module displaying open circuit and larger than the maximum value of the width of the isolating ring in the test module displaying short circuit.
The method for detecting the blind hole offset of the HD I circuit board according to the embodiment of the second aspect of the invention at least has the following beneficial effects:
when the plurality of test modules display short circuits, judging that the offset of the blind hole is larger than the minimum value of the widths of different isolating rings; when the plurality of test modules all display open circuits, judging that the offset of the blind hole is smaller than the maximum value of the widths of different isolating rings; when some test modules display short circuit and some test modules display open circuit, the offset of the blind hole is judged to be smaller than the minimum value of the width of the isolating ring in the test module displaying the open circuit and larger than the maximum value of the width of the isolating ring in the test module displaying the short circuit, so that the offset of the blind hole can be accurately judged, and the drilling quality of the blind hole can be monitored conveniently.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
The above and/or additional aspects and advantages of the present invention will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:
FIG. 1 is a top view of an HD I wiring board of an embodiment of the invention;
fig. 2 isbase:Sub>A sectional view taken along linebase:Sub>A-base:Sub>A of fig. 1.
Reference numerals:
the semiconductor device includes a substrate 100, a via 110, a blind via 120, a first copper ring set 210, a conductive layer 211, a first copper ring 212, a second copper ring set 220, a conductive bar 221, a second copper ring 222, a first test PAD310, and a second test PAD320.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are illustrative only for the purpose of explaining the present invention, and are not to be construed as limiting the present invention.
In the description of the present invention, it should be understood that the orientation or positional relationship referred to in the description of the orientation, such as the upper, lower, front, rear, left, right, etc., is based on the orientation or positional relationship shown in the drawings, and is only for convenience of description and simplification of description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present invention.
In the description of the present invention, the meaning of a plurality of means is one or more, the meaning of a plurality of means is two or more, and larger, smaller, larger, etc. are understood as excluding the number, and larger, smaller, inner, etc. are understood as including the number. If the first and second are described for the purpose of distinguishing technical features, they are not to be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated or implicitly indicating the precedence of the technical features indicated.
In the description of the present invention, unless otherwise explicitly limited, terms such as arrangement, installation, connection and the like should be understood in a broad sense, and those skilled in the art can reasonably determine the specific meanings of the above terms in the present invention in combination with the specific contents of the technical solutions.
Referring to fig. 1 and 2, the HD I circuit board according to the embodiment of the first aspect of the present invention includes a substrate 100 and a test module, the substrate 100 is provided with a through hole 110 and a blind hole 120, the through hole 110 and the blind hole 120 are both disposed along a thickness direction of the substrate 100, the test module is disposed on the substrate 100, the test module includes a first copper ring set 210 and a second copper ring set 220, the first copper ring set 210 is disposed on a periphery of the through hole 110, the second copper ring set 220 is disposed on a periphery of the blind hole 120, wherein the first copper ring set 210 includes a conductive layer 211 and a plurality of first copper rings 212 spaced apart from each other along the thickness direction of the substrate 100, the conductive layer 211 is disposed on a sidewall of the through hole 110, and the plurality of first copper rings 212 are electrically connected through the conductive layer 211, the second copper ring set 220 includes a conductive rod 221 and a plurality of second copper rings 222 arranged at intervals along the thickness direction of the substrate 100, the inner diameter of the second copper ring 222 at the bottom is greater than the inner diameter of the second copper ring 222 at the top, the second copper ring 222 at the bottom is electrically connected with the corresponding first copper ring 212, the conductive rod 221 is inserted into the blind hole 120, an isolation ring is formed between the outer periphery of one end of the conductive rod 221 near the blind hole 120 and the inner side of the second copper ring 222 at the bottom, if the first copper ring 212 at the top and the second copper ring 222 at the top are conducted, it can be determined that the conductive rod 221 and the second copper ring 222 at the bottom are partially overlapped, the offset of the conductive rod 221 is greater than the width of the isolation ring, the offset of the blind hole 120 is too large, and the HD I circuit board is unqualified; if the first copper ring 212 on the top and the second copper ring 222 on the top are not conducted, it can be determined that the conductive rod 221 is not overlapped with the second copper ring 222 on the bottom, the offset of the conductive rod 221 is smaller than the width of the isolation ring, and the HD I circuit board is qualified.
Specifically, during laser drilling, an operator can design the diameter of the blind hole 120 according to the inner diameter of the second copper ring 222 located at the bottom through the process requirement of the blind hole 120, so that the width of the isolating ring is the offset threshold of the blind hole 120, if the first copper ring 212 located at the top is conducted with the second copper ring 222 located at the top, it can be determined that the conductive rod 221 is partially overlapped with the second copper ring 222 located at the bottom, and if the offset of the conductive rod 221 is greater than the width of the isolating ring, the offset of the blind hole 120 is too large, and the HD I circuit board is not qualified; if the first copper ring 212 on the top and the second copper ring 222 on the top are not conducted, it can be determined that the conductive rod 221 is not overlapped with the second copper ring 222 on the bottom, and the offset of the conductive rod 221 is smaller than the width of the isolation ring, so as to determine whether the offset of the blind hole 120 is within the process requirement range in time, so as to determine that the HD I circuit board is qualified.
In some embodiments of the present invention, five test modules are configured, and the five test modules are arranged at intervals along the length direction of the substrate 100, and the widths of the plurality of isolation rings gradually increase along the length direction of the substrate 100, so that the offset range of the blind holes 120 can be detected, and the drilling quality of the blind holes 120 can be effectively monitored.
Specifically, the second copper rings 222 located at the bottom are sequentially arranged along the length direction of the substrate 100 at intervals, so that the detecting personnel can conveniently and sequentially detect whether the first copper ring group 210 and the second copper ring group 220 are conducted or not, and whether the offset of the blind hole 120 is qualified or not is judged.
It is understood that the width of the plurality of isolation rings may also gradually decrease along the length direction of the substrate 100, which is not limited herein.
It should be noted that, the test module may also be configured with two or three, etc., and is not limited herein.
In some embodiments of the present invention, the widths of the five isolation rings form an arithmetic progression along the length direction of the substrate 100, which is convenient for a tester to orderly detect whether the first copper ring set 210 and the second copper ring set 220 are conducted, so as to determine whether the offset of the blind via 120 is qualified.
In some embodiments of the present invention, the widths of the five isolation rings are sequentially increased by 0.5mil along the length direction of the substrate 100, so that a tester can conveniently and orderly detect whether the first copper ring group 210 and the second copper ring group 220 are conducted, so as to determine whether the offset of the blind via 120 is qualified.
It should be noted that 1 mil is equal to 0.0254mm, and is not limited thereto.
In some embodiments of the present invention, a plurality of first test PADs 310 and second test PADs 320 are further included, the first test PADs 310 and the second test PADs 320 are disposed on the surface of the substrate 100, the first test PADs 310 are electrically connected to the conductive layer 211, and the second test PADs 320 are electrically connected to the conductive bars 221, so that, by disposing the first test PADs 310 and the second test PADs 320, a detection person can conveniently contact the first test PADs 310 and the second test PADs 320 with a red stylus pen and a black stylus pen of a universal meter, respectively, to test whether the first copper ring group 210 and the second copper ring group 220 are connected.
Specifically, by setting the first test PAD310 and the second test PAD320, the test area of the first copper ring group 210 and the test area of the second copper ring group 220 can be increased to reduce the detection difficulty of the inspector, so that the inspector can conveniently test whether the first copper ring group 210 and the second copper ring group 220 are communicated.
It should be noted that the first test PAD310 and the second test PAD320 are both copper layers disposed on the surface of the substrate 100, and will not be described in detail herein.
In some embodiments of the present invention, the first copper ring group 210 and the second copper ring group 220 are disposed along a width direction of the substrate 100, the first test PAD310 is disposed on a side of the first copper ring group 210 away from the second copper ring group 220, and the second test PAD320 is disposed on a side of the second copper ring group 220 away from the first copper ring group 210, so as to reduce the occurrence of false detection of the first copper ring group 210 and the second copper ring group 220 between different test modules by a detection person, thereby improving the detection reliability of the detection person.
In some embodiments of the present invention, the diameter of the first test PAD310 or the second test PAD320 is 0.5mm to 1.5mm, when the diameter of the first test PAD310 or the second test PAD320 is less than 0.5mm, the first test PAD310 or the second test PAD320 is too small to be convenient for the detection of the inspector, and when the diameter of the first test PAD310 or the second test PAD320 is greater than 1.5mm, the first test PAD310 or the second test PAD320 is too large to occupy the space of the substrate 100, resulting in a decrease in the winding displacement density of the substrate 100, and by setting the diameter of the first test PAD310 or the second test PAD320 to 0.5mm to 1.5mm, not only the detection of the inspector can be facilitated, but also the winding displacement density of the substrate 100 can be ensured.
Specifically, the diameter of the first test PAD310 or the second test PAD320 is 0.5mm, 0.6mm, 0.7mm, 0.8mm, 0.9mm, 1.0mm, 1.1mm, 1.2mm, 1.3mm, 1.4mm, 1.5mm, which is not limited herein.
In some embodiments of the present invention, the diameter of the blind hole 120 is 2mi to 6mi, when the diameter of the blind hole 120 is smaller than 2mi, the diameter of the blind hole 120 is too small, which increases the processing difficulty of the blind hole 120, and when the diameter of the blind hole 120 is larger than 6mi, the diameter of the blind hole 120 is too large, which decreases the winding displacement density of the substrate 100, and by setting the diameter of the blind hole 120 to 2mi to 6mi, not only the processing difficulty of the blind hole 120 can be reduced, but also the winding displacement density of the substrate 100 can be ensured.
Specifically, the diameter of the blind hole 120 may be 2mil, 3 mil, 4 mil, 5mil, 6mil, without limitation.
Referring to fig. 1 and 2, the method for detecting the offset of the blind hole 120 of the HD I circuit board according to the embodiment of the second aspect of the present invention includes the following steps: s1: obtaining a substrate 100, manufacturing a plurality of test modules on the substrate 100, testing a first copper ring group 210 and a second copper ring group 220 of the modules, wherein the first copper ring group 210 comprises a plurality of first copper rings 212 arranged at intervals along the thickness direction of the substrate 100, the second copper ring group 220 comprises a plurality of second copper rings 222 arranged along the thickness direction of the substrate 100, the inner diameter of the second copper ring 222 at the bottom is larger than that of the second copper ring 222 at the top, and the inner diameters of the second copper rings 222 at the bottom of different second copper ring groups 220 are different; s2: processing a through hole 110 in the first copper ring set 210, and plating copper on the inner wall of the through hole 110, so that the first copper ring set 210 is electrically connected with a second copper ring 222 located at the bottom of the corresponding second copper ring set 220; s3: blind holes 120 are machined in the second copper ring groups 220 through laser drilling, and the diameters of the blind holes 120 in each second copper ring group 220 are consistent; s4: filling copper in the blind hole 120 to form a conductive rod 221, wherein an isolation ring is formed between the outer peripheral side of one end, close to the bottom wall of the blind hole 120, of the conductive rod 221 and the inner side of the second copper ring 222 located at the bottom, and the width of the isolation ring is the distance between the outer side of the conductive rod 221 and the second copper ring 222 located at the bottom; s5; acquiring a universal meter, electrically connecting a red meter pen and a black meter pen of the universal meter with a first copper ring group 210 and a second copper ring group 220 on the same test module respectively, and testing the test modules one by one;
wherein the test results are analyzed as follows: s5.1, if the plurality of test modules all display short circuits, the offset of the blind hole 120 is larger than the minimum value of the widths of different isolation rings; s5.2, if the test modules all show open circuits, the offset of the blind hole 120 is smaller than the maximum value of the widths of different isolating rings; s5.3, if some test modules display short circuit and some test modules display open circuit, the offset of the blind hole 120 is smaller than the minimum value of the width of the isolating ring in the test module displaying open circuit and larger than the maximum value of the width of the isolating ring in the test module displaying short circuit, and the offset range of the blind hole 120 can be detected to determine whether the offset of the blind hole 120 is qualified.
Specifically, when a plurality of test modules all show a short circuit, it is determined that the offset of the blind hole 120 is greater than the minimum value of the widths of different isolation rings; when a plurality of test modules all show open circuits, judging that the offset of the blind hole 120 is smaller than the maximum value of the widths of different isolating rings; when some test modules display short circuit and some test modules display open circuit, the offset of the blind hole 120 is judged to be smaller than the minimum value of the width of the isolating ring in the test module displaying the open circuit and larger than the maximum value of the width of the isolating ring in the test module displaying the short circuit, so that the offset of the blind hole 120 can be accurately judged, and the drilling quality of the blind hole 120 can be monitored conveniently.
The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The present embodiment has been described in detail with reference to the drawings, but the present invention is not limited to the above embodiment, and various changes can be made within the knowledge of those skilled in the art without departing from the present invention.

Claims (9)

1. The utility model provides a HDI circuit board which characterized in that includes:
the circuit board comprises a substrate (100) provided with a through hole (110) and a blind hole (120), wherein the through hole (110) and the blind hole (120) are arranged along the thickness direction of the substrate (100);
the test module is arranged on the substrate (100) and comprises a first copper ring group (210) and a second copper ring group (220), the first copper ring group (210) is arranged on the periphery of the through hole (110), and the second copper ring group (220) is arranged on the periphery of the blind hole (120);
the first copper ring group (210) comprises a conductive layer (211) and a plurality of first copper rings (212) arranged at intervals along the thickness direction of the substrate (100), the conductive layer (211) is arranged on the side wall of the through hole (110), and the plurality of first copper rings (212) are electrically connected through the conductive layer (211);
the second copper ring group (220) comprises a conductive rod (221) and a plurality of second copper rings (222) arranged at intervals along the thickness direction of the substrate (100), the inner diameter of the second copper rings (222) at the bottom is larger than that of the second copper rings (222) at the top, the second copper rings (222) at the bottom are electrically connected with the corresponding first copper rings (212), the conductive rod (221) is inserted into the blind hole (120), and an isolation ring is formed between the outer peripheral side of one end, close to the blind hole (120), of the conductive rod (221) and the inner side of the second copper rings (222) at the bottom.
2. An HDI circuit board according to claim 1, characterized in that, the test module disposes a plurality of, a plurality of the test module is along the length direction of base plate (100) interval arrangement setting, along the length direction of base plate (100), a plurality of the width of isolating ring gradually increases or gradually reduces.
3. An HDI wiring board according to claim 2, characterized in that the widths of the plurality of isolation rings form an arithmetic progression along the length of the substrate (100).
4. An HDI wiring board according to claim 3, characterized in that along the length direction of substrate (100), the width of a plurality of said spacer rings increases by 0.5mil in sequence.
5. The HDI wiring board of claim 1, further comprising a plurality of first test PADs (310) and second test PADs (320), wherein the first test PADs (310) and the second test PADs (320) are both disposed on the surface of the substrate (100), the first test PADs (310) are electrically connected to the conductive layer (211), and the second test PADs (320) are electrically connected to the conductive bars (221).
6. An HDI circuit board according to claim 5, characterized in that the first copper ring group (210) and the second copper ring group (220) are arranged along the width direction of the substrate (100), the first test PAD (310) is arranged on the side of the first copper ring group (210) far away from the second copper ring group (220), and the second test PAD (320) is arranged on the side of the second copper ring group (220) far away from the first copper ring group (210).
7. An HDI wiring board according to claim 5, characterized in that the diameter of the first test PAD (310) or the second test PAD (320) is 0.5mm to 1.5mm.
8. An HDI wiring board according to claim 1, characterized in that the diameter of the blind hole (120) is 2-6 mil.
9. The method for detecting the offset of the blind hole (120) of the HDI circuit board is characterized by comprising the following steps of:
s1: obtaining a substrate (100), and manufacturing a plurality of test modules on the substrate (100), wherein each test module comprises a first copper ring group (210) and a second copper ring group (220), each first copper ring group (210) comprises a plurality of first copper rings (212) arranged at intervals in the thickness direction of the substrate (100), each second copper ring group (220) comprises a plurality of second copper rings (222) arranged in the thickness direction of the substrate (100), the inner diameter of the second copper ring (222) at the bottom is larger than that of the second copper ring (222) at the top, and the inner diameters of the second copper rings (222) at the bottom of different second copper ring groups (220) are different;
s2: processing a through hole (110) in the first copper ring set (210), and plating copper on the inner wall of the through hole (110) so as to electrically connect the first copper ring set (210) with the second copper ring (222) at the bottom of the corresponding second copper ring set (220);
s3: machining the blind holes (120) in the second copper ring group (220) through laser drilling, wherein the diameters of the blind holes (120) on each second copper ring group (220) are consistent;
s4: filling copper in the blind hole (120) to form a conductive rod (221), wherein an isolation ring is formed between the outer periphery of one end, close to the bottom wall of the blind hole (120), of the conductive rod (221) and the inner side of the second copper ring (222) at the bottom, and the width of the isolation ring is the distance between the outer side of the conductive rod (221) and the second copper ring (222) at the bottom;
s5; acquire the universal meter, with the red pen-shape metre of universal meter and black pen-shape metre respectively with first copper ring group (210) and second copper ring group (220) electric connection on the same test module to test one by one a plurality of test modules, the analysis of test result is as follows:
s5.1, if the test modules all display short circuits, the offset of the blind hole (120) is larger than the minimum value of the widths of the different isolating rings;
s5.2, if the test modules all show open circuits, the offset of the blind hole (120) is smaller than the maximum value of the widths of different isolating rings;
s5.3, if some test modules show short circuit and some test modules show open circuit, the offset of the blind hole (120) is smaller than the minimum value of the width of the isolating ring in the test module showing open circuit and larger than the maximum value of the width of the isolating ring in the test module showing short circuit.
CN202211482057.0A 2022-11-24 2022-11-24 HDI circuit board and method for detecting blind hole offset of HDI circuit board Pending CN115715052A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202211482057.0A CN115715052A (en) 2022-11-24 2022-11-24 HDI circuit board and method for detecting blind hole offset of HDI circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202211482057.0A CN115715052A (en) 2022-11-24 2022-11-24 HDI circuit board and method for detecting blind hole offset of HDI circuit board

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Publication Number Publication Date
CN115715052A true CN115715052A (en) 2023-02-24

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Application Number Title Priority Date Filing Date
CN202211482057.0A Pending CN115715052A (en) 2022-11-24 2022-11-24 HDI circuit board and method for detecting blind hole offset of HDI circuit board

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