CN114364122A - Printed circuit board, manufacturing method thereof and back drilling hole depth detection method - Google Patents
Printed circuit board, manufacturing method thereof and back drilling hole depth detection method Download PDFInfo
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- CN114364122A CN114364122A CN202210260833.6A CN202210260833A CN114364122A CN 114364122 A CN114364122 A CN 114364122A CN 202210260833 A CN202210260833 A CN 202210260833A CN 114364122 A CN114364122 A CN 114364122A
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Abstract
The application provides a printed circuit board and a preparation method thereof, and a back drilling hole depth detection method, wherein the printed circuit board is provided with a circuit diagram which is more than or equal to 4 layers, namely an L1 layer and an L2 layer from top to bottom, and the rest is done in sequence until an Ln layer, n is more than or equal to 4, and each layer is provided with the circuit diagram; the circuit board is provided with a back drilling hole and test holes, the back drilling hole is formed in a metalized conducting hole on the circuit board, and the number of the test holes is n-1; the test holes are metallized holes and are respectively and correspondingly communicated with one layer of circuit diagrams in L1-L (n-1) layers of the circuit board; and correspondingly forming a via hole and a test hole of the back drilling hole on the Ln layer, wherein the holes are mutually disconnected. A method for preparing a printed circuit board is used for preparing the printed circuit board. The back drilling hole depth detection method can visually detect the depth of the back drilling hole, avoid damaging the circuit board and prevent the circuit board from being scrapped due to the detection of the back drilling hole depth.
Description
Technical Field
The invention belongs to the technical field of printed circuit board production and back drilling hole depth detection, and particularly relates to a printed circuit board, a preparation method thereof and a back drilling hole depth detection method.
Background
With the development of printed circuit boards, various multilayer printed circuit boards often need to design back-drilled holes, which are to partially drill copper into the hole walls of the via holes to prevent signals of inner-layer lines from being shielded.
The back drilling process is to remove part of the hole wall by a drill larger than the via hole after the via hole is finished, and the back drilling requirement is to remove the hole wall copper layer above the specified circuit layer and cannot damage the specified layer circuit. In addition, in order to remove the shielding effect as much as possible, the hole wall remained above the specified layer is better as less as possible, so the depth tolerance requirement of back drilling is higher. The conventional back drilling detection method is to slice to confirm the depth, i.e. a part of the material of the circuit board is removed along the vertical direction or the horizontal direction of the circuit board by using a cutting tool, so that the internal structure is exposed for detection. However, the printed circuit board is damaged by slicing, and the printed circuit board is even scrapped.
Disclosure of Invention
Based on the structure of the circuit board, the depth of the back drilling hole can be visually detected by using the detection method, the circuit board is prevented from being damaged, and the circuit board is prevented from being scrapped due to the detection of the depth of the back drilling hole.
In order to realize the purpose of the invention, the following scheme is adopted:
a printed circuit board is provided with more than or equal to 4 layers of circuit diagrams, which are sequentially represented as an L1 layer, an L2 layer and the like from top to bottom until an Ln layer, wherein n is more than or equal to 4, and each layer is provided with the circuit diagram;
the circuit board is provided with a back drilling hole and test holes, the back drilling hole is formed in a metalized conducting hole on the circuit board, and the number of the test holes is n-1; the test holes are metallized holes and are respectively and correspondingly communicated with one layer of circuit diagrams in L1-L (n-1) layers of the circuit board; and correspondingly forming a via hole and a test hole of the back drilling hole on the Ln layer, wherein the holes are mutually disconnected.
Furthermore, metal rings are arranged on the Ln layer on the periphery sides of the end parts of the via hole and the test hole which correspondingly form the back drilling hole, and the metal rings of the via hole and the metal rings of the test hole are mutually separated; the test hole is communicated with one layer of circuit diagram in the circuit board, and the other layers of circuit diagrams are provided with isolation areas corresponding to the peripheral sides of the test hole.
Further, the back drilling holes are multiple, the depth of each back drilling hole is different, and the depth of each back drilling hole is smaller than or equal to the thickness from L1 layer to L (n-1) layer.
A method for detecting the back drilling depth of a printed circuit board is used for detecting the back drilling depth of the printed circuit board, wherein the back drilling depth refers to the depth of a bottom opening of a back drilling hole in the circuit board from top to bottom, and comprises the following steps:
enabling a first probe of the detection device to be in contact with the back drilling hole on the bottom surface of the circuit board, and enabling a second probe of the detection device to be in contact with the corresponding test hole on the bottom surface of the circuit board so as to detect that the back drilling hole is communicated with or disconnected from each test hole;
when the back drilling hole is detected to be disconnected with all the test holes, the depth of the back drilling hole is in a position exceeding the L (n-1) layer;
and when the back drilling hole is detected to be only communicated with k test holes, k is more than or equal to 1 and less than or equal to n-2, and the depth of the back drilling hole is positioned between the L (n-1-k) layer and the L (n-k) layer.
Furthermore, each test hole on the bottom surface of the circuit board is connected with an independent second probe, and the detection device is provided with an independent display for each second probe.
A method for preparing a printed circuit board is used for preparing the printed circuit board and comprises the following steps:
s1: processing an inner layer circuit diagram, independently processing each layer circuit diagram of the circuit board, and forming an isolation area at a preset position when processing the circuit diagram;
s2: laminating, namely sequentially overlapping an L1 layer, an L2 layer to an Ln layer from top to bottom, and paving a whole copper sheet on the top surface and the bottom surface of the circuit board;
s3: drilling and metalizing, processing a through hole corresponding to the positions of the back drilling hole and the test hole, performing copper deposition processing on the through hole, and electroplating the circuit board to metalize the inner wall of the through hole;
s4: processing an outer layer circuit diagram to enable the whole copper sheet on the top layer to form an L1 layer circuit diagram, enabling the whole copper sheet on the bottom surface to form a metal ring, wherein the layer where the metal ring is located is an Ln layer circuit diagram of the circuit board;
s5: and processing a back drilling hole, drilling the back drilling hole downwards from the top layer of the circuit board, wherein the inner diameter of the back drilling hole is more than or equal to that of the corresponding through hole so as to completely eliminate the metallization layer of the hole wall of the corresponding through hole of the back drilling hole.
Further, in step S3, when the through hole corresponding to the test hole is processed, the through hole passes through the center position of the isolation region.
Furthermore, a whole board is simultaneously provided with a plurality of circuit boards in an array mode, spacing areas are arranged between adjacent circuit boards and on the edges of the circuit boards, and back drilling holes and test holes are formed in the spacing areas.
The invention has the beneficial effects that: through testing each testing hole that switches on with the different layer circuit diagram of circuit board and the electric current conductivity between the different back drilling hole, can directly perceivedly and quick detect out the degree of depth position that back drilling hole was located, avoid haring the circuit board, prevent that the circuit board from scrapping because of detecting the back drilling hole degree of depth.
Drawings
The drawings described herein are for illustrative purposes only of selected embodiments and not all possible implementations, and are not intended to limit the scope of the present disclosure.
Fig. 1 shows a schematic diagram of a preferred structure for manufacturing a plurality of circuit boards by using a whole board.
Fig. 2 shows a schematic cross-sectional view of a back-drilled hole and test holes for a circuit board having a 6-layer layout.
Fig. 3 shows a schematic diagram of the structure of back drilled holes and test holes on the L1 layer in a preferred embodiment of the circuit board.
Fig. 4 shows a schematic structure of back drilled holes and test holes on the L2 layer in a preferred embodiment of the circuit board.
Fig. 5 shows a schematic diagram of the back drilled hole and test holes on the L3 layer in a preferred embodiment of the circuit board.
Fig. 6 shows a schematic diagram of the back drilled hole and test holes on the L4 layer in a preferred embodiment of the circuit board.
Fig. 7 shows a schematic diagram of the back drilled hole and test holes on the L5 layer in a preferred embodiment of the circuit board.
Figure 8 shows a schematic cross-sectional view of the back drilling depth at a position above the L2 layer layout.
Figure 9 shows a schematic cross-sectional view of the back drilling depth at a position above the L4 layer layout.
The labels in the figure are: back drilling-1, testing hole-2, metal ring-3, isolation zone-4, whole plate-5 and spacing zone-51.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the following detailed description of the embodiments of the present invention is provided with reference to the accompanying drawings, but the described embodiments of the present invention are a part of the embodiments of the present invention, not all of the embodiments of the present invention.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures.
It should be noted that the terms "first," "second," and the like in the description of the present invention are used for distinguishing between the description and not necessarily for indicating or implying relative importance.
In the description of the present invention, it should be further noted that, unless explicitly stated or limited otherwise, the terms "conducting," "connecting," and "communicating" are to be understood broadly, and may be, for example, a fixed connection, a detachable connection or an integral connection, or a connection or a conduction of a circuit; either directly or indirectly through intervening media, or through both elements. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.
Example 1
A printed circuit board is provided with more than or equal to 4 layers of circuit diagrams, which are sequentially represented as L1 layers, L2 layers from top to bottom, and the like until Ln layers, wherein n is more than or equal to 4, and each layer is provided with the circuit diagram.
The circuit board is provided with a back drilling hole 1 and test holes 2 in a penetrating mode, the back drilling hole 1 is formed in a metalized conducting hole in the circuit board, and the number of the test holes 2 is n-1.
The test holes 2 are metallized holes, and the test holes 2 are respectively communicated with one layer of circuit diagrams in L1-L (n-1) layers of the circuit board correspondingly, namely, the same test hole 2 is communicated with one layer of circuit diagram in the circuit board, and only one test hole 2 in the same layer of circuit diagram is communicated. And correspondingly forming a via hole and a test hole 2 of the back drilling hole 1 on the Ln layer, wherein the holes are mutually disconnected.
As shown in fig. 2, when the circuit board has 6 layers of circuit diagrams, n is equal to 6, i.e., the layers are sequentially L1, L2, L3, L4, L5, and L6 from top to bottom, at this time, the number of the test holes 2 is 6-1, i.e., 5 test holes 2, and the 5 test holes 2 are respectively defined as a first test hole 21, a second test hole 22, a third test hole 23, a fourth test hole 24, and a fifth test hole 25.
As shown in fig. 2, as a preferred embodiment, the first test hole 21 is only in conduction with the circuit diagram of the L1 layer, and the circuit diagrams of the first test hole 21 and all of the L2 layer, the L3 layer, the L4 layer, the L5 layer, and the L6 layer are in an open state, and cannot conduct electrical signals; the second test hole 22 is only connected with the circuit diagram of the L2 layer, and the second test hole 21 is disconnected with the circuit diagrams of the L1 layer, the L3 layer, the L4 layer, the L5 layer and the L6 layer, so that electric signals cannot be conducted; the third test hole 23 is only connected with the circuit diagram of the L3 layer, and the third test hole 23 is disconnected with the circuit diagrams of the L1 layer, the L2 layer, the L4 layer, the L5 layer and the L6 layer, so that the third test hole cannot conduct electric signals; the fourth test hole 24 is only communicated with the circuit diagram of the L4 layer, and the fourth test hole 24 is disconnected from the circuit diagrams of the L1 layer, the L2 layer, the L3 layer, the L5 layer and the L6 layer, so that electric signals cannot be conducted; the fifth test hole 25 is only connected with the circuit diagram of the L5 layer, and the fifth test hole 25 is disconnected from the circuit diagrams of the L1 layer, the L2 layer, the L3 layer, the L4 layer and the L6 layer, so that the fifth test hole cannot conduct electric signals.
More specifically, as shown in fig. 2, the metal rings 3 are disposed on the Ln layer corresponding to the via hole formed in the back-drilled hole 1 and the end periphery of the testing hole 2, so as to increase the testing surface during testing, facilitate the connection of the probe, and separate the metal rings 3 of the via hole and the metal rings 3 of the testing hole 2 to avoid mutual influence.
More specifically, as shown in fig. 2 to 7, the test hole 2 is connected to one layer of the circuit diagram in the circuit board, and the other layers of the circuit diagram have isolation regions 4 corresponding to the peripheral sides of the test hole 2, so as to disconnect the test hole 2 from the circuit layers except the connected circuit layer, where the isolation regions 4 are metal-free regions, so that the test hole with metal side walls is disconnected from the circuit diagram.
Preferably, the back drill hole 1 is provided in plurality, the depth of each back drill hole 1 is different, and the depth of the back drill hole 1 is equal to or less than the thickness from L1 layer to L (n-1) layer. When the circuit board has a 6-layer circuit diagram, the depth of the back drilling hole 1 is less than the total thickness of the L1 layer to the L5 layer, namely the deepest drilling position of the back drilling hole 1 is above the L6 layer and can not drill to the L6 layer.
Example 2
A method for detecting the depth of a back drilling hole 1 of a printed circuit board is used for detecting the depth of the back drilling hole 1 of the printed circuit board, wherein the depth of the back drilling hole 1 refers to the depth of a bottom opening of the back drilling hole 1 in the circuit board from top to bottom, and the detection method comprises the following steps:
and a first probe of the detection device is contacted with the back drilling holes 1 on the bottom surface of the circuit board, and a second probe of the detection device is contacted with the corresponding test holes 2 on the bottom surface of the circuit board, so that the connection or disconnection of the back drilling holes 1 and the test holes 2 is detected.
When the back drilling hole 1 is detected to be disconnected with all the test holes 2, the depth of the back drilling hole 1 is in a position exceeding the L (n-1) layer;
when the back drilling hole 1 is detected to be only communicated with the k test holes 2, k is larger than or equal to 1 and smaller than or equal to n-2, and the depth of the back drilling hole 1 is located between the L (n-1-k) layer and the L (n-k) layer.
Specifically, it can be understood that, when the test hole 2 communicated with the Ln layer of the circuit board and the line layer above the Ln layer are both disconnected from the back-drilled hole 1, and the back-drilled hole 1 is communicated with the other test holes 2, that is, the back-drilled hole 1 is communicated with the line layer below the Ln layer, the depth of the back-drilled hole 1 is located between the Ln layer and the Ln +1 layer, that is, the back-drilled hole 1 drills through the line pattern of the Ln layer, and the line pattern of the Ln +1 layer is not processed.
During detection, the first probe can be kept connected to the metal ring 3 at the bottom of the back drilling hole 1, and then the second probe is sequentially contacted with the metal ring 3 at the bottoms of the first testing hole 21, the second testing hole 22, the third testing hole 23, the fourth testing hole 24 and the fifth testing hole 25 to detect which testing hole the back drilling hole 1 is disconnected with, so that the depth position of the back drilling hole 1 can be judged.
In this embodiment, taking a circuit board inspection method with 6 layers of circuit diagrams as an example, when it is detected that the back-drilled hole 1 is disconnected from the first test hole 21, and the back-drilled hole 1 is connected to the second test hole 22, the third test hole 23, the fourth test hole 24 and the fifth test hole 25, it is proved that the depth of the back-drilled hole 1 is as shown in fig. 8, the back-drilled hole 1 drills downward through the L1 layer circuit diagram and is located at a position above the L2 layer circuit diagram, and at this time, the L2 layer circuit diagram is a "designated circuit layer" in the background art. Because the metal on the side wall of the via hole of the L1 layer is removed when the back drill hole 1 is processed, the connection between the back drill hole 1 and the first test hole 21 is broken, and the connection between the back drill hole 1 and the rest circuit layers still exists, so that the connection state is presented.
When it is detected that the back-drilled hole 1 is disconnected from the first testing hole 21, the second testing hole 22 and the third testing hole 23, and the back-drilled hole 1 is connected to the fourth testing hole 24 and the fifth testing hole 25, it is proved that the depth of the back-drilled hole 1 is as shown in fig. 9, the back-drilled hole 1 drills through the L1 layer, the L2 layer and the L3 layer circuit diagram downward and is located at a position above the L4 layer circuit diagram, and the L4 layer circuit diagram is the "designated circuit layer" in the background art. Because the metal on the side walls of the via holes from the L1 layer to the L3 layer is removed when the back drill hole 1 is processed, the connection between the back drill hole 1 and the first test hole 21, the second test hole 22 and the third test hole 23 is broken, and the connection between the back drill hole 1 and the other circuit layers still exists, so that the connection state is presented.
Preferably, detection device all is connected with independent second probe to each test hole 2 on the circuit board bottom surface, and detection device all is equipped with independent display to every second probe, and the display can adopt the instrument form or the pilot lamp form to convenient quick observation goes out test hole 2 with back drilling 1 intercommunication, thereby judges the depth of back drilling 1 and is in the position of several layers of circuit board.
Example 3
A method for preparing a printed circuit board is used for preparing the printed circuit board and comprises the following steps:
s1: processing the inner layer wiring diagram, independently processing the wiring diagrams of the layers of the circuit board, as shown in fig. 3 to 7, forming the isolation region 4 at a predetermined position when processing the wiring diagrams, wherein the isolation region 4 is formed by the processes of exposure, development and etching.
S2: laminating, sequentially overlapping the L1 layer, the L2 layer to the Ln layer from top to bottom, and paving the whole copper sheet on the top surface and the bottom surface of the circuit board. And in the pressing process, the positioning precision among all layers of the inner layer circuit diagram is improved by using a hot melting and rivet fixing mode.
S3: drilling and metalizing, processing through holes at the positions of the back drilling hole 1 and the test hole 2 correspondingly, carrying out copper deposition processing on the through holes, electroplating the circuit board, metalizing the inner wall of the through holes, and forming a via hole, wherein the via hole formed at the preset position corresponding to the test hole 2 is the test hole 2, and the back drilling hole 1 needs to be further processed.
S4: processing the outer layer circuit diagram, and forming an L1 layer circuit diagram on the whole copper sheet at the top layer through the processes of exposure, development, etching and the like; as shown in fig. 2 and 3, isolation regions 4 are formed on the peripheral sides of second test hole 22, third test hole 23, fourth test hole 24, and fifth test hole 25. And forming a metal ring 3 on the whole copper sheet on the bottom surface by routing holes or processes such as exposure, development, etching and the like, wherein the layer where the metal ring 3 is located is the Ln layer circuit diagram of the circuit board.
S5: and processing a back drilling hole 1, drilling the back drilling hole 1 downwards from the top layer of the circuit board, wherein the inner diameter of the back drilling hole 1 is more than or equal to that of the corresponding through hole so as to completely eliminate the metallization layer of the hole wall of the through hole corresponding to the back drilling hole 1.
Preferably, in step S3 of the method for manufacturing a printed circuit board, when the through hole corresponding to the test hole 2 is processed, the through hole passes through the center position of the isolation region 4, as shown in fig. 3 to 7, the test holes 2 all pass through the center position of the isolation region 4, so as to ensure that the test holes 2 and the circuit layers except the circuit layer of the via hole are all in a disconnected state.
Preferably, as shown in fig. 1, a whole board 5 is provided with a plurality of circuit boards simultaneously in an array, in this application, 6 circuit boards can be simultaneously prepared from the same whole board 5, spacing regions 51 are respectively arranged between adjacent circuit boards and at the edge of the circuit board, and the back drilling hole 1 and the testing hole 2 are respectively arranged in the spacing regions 51, so as to avoid the back drilling hole 1 and the testing hole 2 in the finished product of the circuit board, thereby ensuring the integrity of the finished product circuit board.
The foregoing is only a preferred embodiment of the present invention and is not intended to be exhaustive or to limit the invention. It will be understood by those skilled in the art that various changes may be made and equivalents may be substituted without departing from the scope of the invention.
Claims (8)
1. A printed circuit board is characterized in that the circuit board is provided with more than or equal to 4 layers of circuit diagrams which are sequentially represented as L1 layers and L2 layers from top to bottom, and so on until Ln layers, wherein n is more than or equal to 4, and each layer is provided with the circuit diagrams;
the circuit board is provided with back drilling holes (1) and testing holes (2), the back drilling holes (1) are formed in metallized via holes in the circuit board, and the number of the testing holes (2) is n-1; the test holes (2) are metallized holes, and the test holes (2) are respectively and correspondingly communicated with a circuit diagram of one of L1-L (n-1) layers of the circuit board; and (3) correspondingly forming a via hole and a test hole (2) of the back drilling hole (1) on the Ln layer, wherein the holes are mutually disconnected.
2. The printed circuit board of claim 1, wherein the Ln layer is provided with a metal ring (3) on the periphery of the end of the via hole and the test hole (2) corresponding to the back drilling hole (1), and the metal ring (3) of the via hole and the metal ring (3) of the test hole (2) are separated from each other; the test hole (2) is communicated with one layer of circuit diagram in the circuit board, and the other layers of circuit diagrams are provided with isolation regions (4) corresponding to the peripheral sides of the test hole (2).
3. The printed circuit board according to claim 1, wherein the back-drilled hole (1) is plural, the depth of each back-drilled hole (1) is different, and the depth of the back-drilled hole (1) is equal to or less than the thickness from L1 layers to L (n-1) layers.
4. A method for detecting the depth of a back drilling hole (1) of a printed circuit board according to claim 1, wherein the depth of the back drilling hole (1) is the depth of the bottom opening of the back drilling hole (1) in the circuit board along the direction from top to bottom, and the method comprises the following steps:
enabling a first probe of the detection device to be in contact with the back drilling holes (1) on the bottom surface of the circuit board, and enabling a second probe of the detection device to be in contact with corresponding test holes (2) on the bottom surface of the circuit board so as to detect the connection or disconnection of the back drilling holes (1) and the test holes (2);
when the back drilling hole (1) is detected to be disconnected with all the test holes (2), the depth of the back drilling hole (1) is in a position exceeding the L (n-1) layer;
when the fact that the back drilling hole (1) is only communicated with the k test holes (2) is detected, k is larger than or equal to 1 and smaller than or equal to n-2, and the depth of the back drilling hole (1) is located between the L (n-1-k) layer and the L (n-k) layer.
5. The printed circuit board back drilling depth detection method according to claim 4, characterized in that each test hole (2) on the bottom surface of the circuit board is connected with an independent second probe, and the detection device is provided with an independent display for each second probe.
6. A method for manufacturing a printed circuit board, which is used for manufacturing the printed circuit board of claim 2, comprising the steps of:
s1: processing an inner layer circuit diagram, independently processing each layer circuit diagram of the circuit board, and forming an isolation area (4) at a preset position when the circuit diagrams are processed;
s2: laminating, namely sequentially overlapping an L1 layer, an L2 layer to an Ln layer from top to bottom, and paving a whole copper sheet on the top surface and the bottom surface of the circuit board;
s3: drilling and metalizing, correspondingly setting positions of the back drilling hole (1) and the test hole (2) to process a through hole, carrying out copper deposition processing on the through hole, and electroplating the circuit board to metalize the inner wall of the through hole;
s4: processing an outer layer circuit diagram, so that the whole copper sheet on the top layer forms an L1 layer circuit diagram, the whole copper sheet on the bottom surface forms a metal ring (3), and the layer where the metal ring (3) is located is an Ln layer circuit diagram of the circuit board;
s5: and processing a back drilling hole (1), and drilling the back drilling hole (1) downwards from the top layer of the circuit board, wherein the inner diameter of the back drilling hole (1) is more than or equal to that of the corresponding through hole so as to completely eliminate the metallization layer of the wall of the through hole corresponding to the back drilling hole (1).
7. The method for manufacturing a printed circuit board according to claim 6, wherein in step S3, when the through hole corresponding to the test hole (2) is processed, the through hole passes through the center of the isolation region (4).
8. The method for preparing the printed circuit board according to claim 6, wherein a plurality of circuit boards are simultaneously arrayed on one whole board (5), spacing regions (51) are respectively arranged between adjacent circuit boards and at the edges of the circuit boards, and the back drilling holes (1) and the test holes (2) are respectively arranged in the spacing regions (51).
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| Application Number | Priority Date | Filing Date | Title |
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| CN202210260833.6A CN114364122A (en) | 2022-03-17 | 2022-03-17 | Printed circuit board, manufacturing method thereof and back drilling hole depth detection method |
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| CN202210260833.6A CN114364122A (en) | 2022-03-17 | 2022-03-17 | Printed circuit board, manufacturing method thereof and back drilling hole depth detection method |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN117560855A (en) * | 2024-01-11 | 2024-02-13 | 惠州市金百泽电路科技有限公司 | PCB back drilling detection structure and manufacturing method and application thereof |
| CN117606324A (en) * | 2024-01-22 | 2024-02-27 | 四川英创力电子科技股份有限公司 | High-efficiency detection device and method for double-sided hole sites of circuit board |
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| CN101876687A (en) * | 2010-06-04 | 2010-11-03 | 深南电路有限公司 | Test method for back drilling depth of PCB plate |
| CN104582288A (en) * | 2015-01-14 | 2015-04-29 | 景旺电子科技(龙川)有限公司 | PCB back drilling plate back drilling depth detecting method |
| CN111356290A (en) * | 2018-12-24 | 2020-06-30 | 胜宏科技（惠州）股份有限公司 | PCB capable of detecting back drilling depth and detection method |
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| CN101876687A (en) * | 2010-06-04 | 2010-11-03 | 深南电路有限公司 | Test method for back drilling depth of PCB plate |
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| CN111356290A (en) * | 2018-12-24 | 2020-06-30 | 胜宏科技（惠州）股份有限公司 | PCB capable of detecting back drilling depth and detection method |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN117560855A (en) * | 2024-01-11 | 2024-02-13 | 惠州市金百泽电路科技有限公司 | PCB back drilling detection structure and manufacturing method and application thereof |
| CN117560855B (en) * | 2024-01-11 | 2024-03-15 | 惠州市金百泽电路科技有限公司 | PCB back drilling detection structure and manufacturing method and application thereof |
| CN117606324A (en) * | 2024-01-22 | 2024-02-27 | 四川英创力电子科技股份有限公司 | High-efficiency detection device and method for double-sided hole sites of circuit board |
| CN117606324B (en) * | 2024-01-22 | 2024-03-26 | 四川英创力电子科技股份有限公司 | High-efficiency detection device and method for double-sided hole sites of circuit board |
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