CN115669261A - 三维存储器及三维存储器的制备方法 - Google Patents
三维存储器及三维存储器的制备方法 Download PDFInfo
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- CN115669261A CN115669261A CN202080101285.1A CN202080101285A CN115669261A CN 115669261 A CN115669261 A CN 115669261A CN 202080101285 A CN202080101285 A CN 202080101285A CN 115669261 A CN115669261 A CN 115669261A
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
- H10B53/30—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region
Abstract
本申请提供了一种三维存储器和三维存储器的制备方法。三维存储器包括层叠结构、通道结构、存储结构。层叠结构包括交替堆叠的导体层和介质层。通道结构贯穿层叠结构。所述导体层中包括导电材料。所述存储结构在所述导体层中,形成于所述通道结构的表面,且处于所述通道结构和所述导电材料之间。三维存储器的存储结构位于导体层中,并且形成于通道结构的表面,从而制造三维存储器时,能够避免去除牺牲材料时由于工艺偏差对三维存储器的性能产生的影响。
Description
PCT国内申请,说明书已公开。
Claims (17)
- PCT国内申请,权利要求书已公开。
Applications Claiming Priority (1)
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PCT/CN2020/098475 WO2022000119A1 (zh) | 2020-06-28 | 2020-06-28 | 三维存储器及三维存储器的制备方法 |
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CN115669261A true CN115669261A (zh) | 2023-01-31 |
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CN202080101285.1A Pending CN115669261A (zh) | 2020-06-28 | 2020-06-28 | 三维存储器及三维存储器的制备方法 |
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WO (1) | WO2022000119A1 (zh) |
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JP5514004B2 (ja) * | 2010-06-15 | 2014-06-04 | 株式会社東芝 | 半導体記憶装置及びその製造方法 |
KR101175148B1 (ko) * | 2010-10-14 | 2012-08-20 | 주식회사 유진테크 | 3차원 구조의 메모리 소자를 제조하는 방법 및 장치 |
KR102408657B1 (ko) * | 2015-07-23 | 2022-06-15 | 삼성전자주식회사 | 반도체 장치 및 그 제조 방법 |
US10164009B1 (en) * | 2017-08-11 | 2018-12-25 | Micron Technology, Inc. | Memory device including voids between control gates |
CN107507831B (zh) * | 2017-08-31 | 2019-01-25 | 长江存储科技有限责任公司 | 一种3d nand存储器的存储单元结构及其形成方法 |
WO2021056520A1 (en) * | 2019-09-29 | 2021-04-01 | Yangtze Memory Technologies Co., Ltd. | Three-dimensional memory device having epitaxially-grown semiconductor channel and method for forming the same |
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- 2020-06-28 CN CN202080101285.1A patent/CN115669261A/zh active Pending
- 2020-06-28 WO PCT/CN2020/098475 patent/WO2022000119A1/zh active Application Filing
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