CN115662893A - Method for forming semiconductor device - Google Patents
Method for forming semiconductor device Download PDFInfo
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- CN115662893A CN115662893A CN202211701245.8A CN202211701245A CN115662893A CN 115662893 A CN115662893 A CN 115662893A CN 202211701245 A CN202211701245 A CN 202211701245A CN 115662893 A CN115662893 A CN 115662893A
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- oxide layer
- silicon oxide
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- semiconductor device
- etching
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- 238000000034 method Methods 0.000 title claims abstract description 80
- 239000004065 semiconductor Substances 0.000 title claims abstract description 53
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 98
- 229910052814 silicon oxide Inorganic materials 0.000 claims abstract description 80
- 230000008569 process Effects 0.000 claims abstract description 50
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 47
- 238000005530 etching Methods 0.000 claims abstract description 31
- 238000001039 wet etching Methods 0.000 claims abstract description 24
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 15
- 229920005591 polysilicon Polymers 0.000 claims abstract description 13
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 9
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 9
- 239000001301 oxygen Substances 0.000 claims abstract description 9
- 150000002500 ions Chemical class 0.000 claims abstract description 8
- 239000000758 substrate Substances 0.000 claims description 22
- 238000005468 ion implantation Methods 0.000 claims description 17
- 229910052710 silicon Inorganic materials 0.000 claims description 12
- 239000010703 silicon Substances 0.000 claims description 11
- 230000008859 change Effects 0.000 claims description 7
- 229910052732 germanium Inorganic materials 0.000 claims description 5
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 4
- 238000000137 annealing Methods 0.000 claims description 3
- 239000011248 coating agent Substances 0.000 claims description 3
- 238000000576 coating method Methods 0.000 claims description 3
- 238000004140 cleaning Methods 0.000 claims description 2
- 239000000243 solution Substances 0.000 abstract description 28
- 230000015572 biosynthetic process Effects 0.000 abstract description 4
- 230000000694 effects Effects 0.000 abstract description 4
- 238000004519 manufacturing process Methods 0.000 abstract description 4
- 239000000463 material Substances 0.000 abstract description 3
- 238000009991 scouring Methods 0.000 abstract description 3
- 238000002347 injection Methods 0.000 abstract description 2
- 239000007924 injection Substances 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 11
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 9
- 235000012239 silicon dioxide Nutrition 0.000 description 9
- 239000000377 silicon dioxide Substances 0.000 description 9
- 230000009286 beneficial effect Effects 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- -1 silicon ions Chemical class 0.000 description 2
- DDFHBQSCUXNBSA-UHFFFAOYSA-N 5-(5-carboxythiophen-2-yl)thiophene-2-carboxylic acid Chemical compound S1C(C(=O)O)=CC=C1C1=CC=C(C(O)=O)S1 DDFHBQSCUXNBSA-UHFFFAOYSA-N 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 230000002209 hydrophobic effect Effects 0.000 description 1
- 239000007943 implant Substances 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 239000011259 mixed solution Substances 0.000 description 1
- 230000035515 penetration Effects 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 230000008439 repair process Effects 0.000 description 1
- 238000005406 washing Methods 0.000 description 1
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Abstract
The invention provides a method for forming a semiconductor device, which relates to the field of semiconductor manufacturing, and is characterized in that before a graphical photoresist layer is formed, non-electric elements are injected into a silicon oxide layer through an ion injection process, the oxygen enrichment condition of the surface of the silicon oxide layer is changed, the effect of modifying the material of the silicon oxide layer is achieved, the adhesion between the photoresist layer and the silicon oxide layer is increased, the etching rate of a BOE solution to the silicon oxide layer in a wet etching process is reduced, the formation of undercutting in the wet etching process and extra scouring caused by permeation of the BOE solution below the photoresist are improved, the etching ratio of the BOE solution to the transverse etching and the longitudinal etching of the silicon oxide layer is improved, the process window of the semiconductor device is increased, the risk that a polysilicon gate in a groove of an SGT device is contacted with a polysilicon source positioned above the groove is avoided, and the SGT device cannot fail.
Description
Technical Field
The present invention relates to the field of semiconductor manufacturing, and more particularly, to a method for forming a semiconductor device.
Background
In the manufacturing process of an integrated circuit, particularly in the manufacturing process of a trench structure of a power device (such as an SGT device, i.e., a shielded gate trench device), a wet etching process is used, and silicon dioxide with a thickness of about 1um in a trench is removed by the wet etching process. The process comprises the following steps: coating a layer of photoresist on the surface of a silicon wafer, and forming patterned photoresist through photoetching and developing processes to expose partial surface of the silicon wafer; then, a BOE solution (a mixed solution of ammonium fluoride and hydrofluoric acid) is used for removing the silicon dioxide to be removed in the groove through a wet etching process.
The process has a great defect, wherein the adhesion between the photoresist and the silicon wafer surface is not tight due to the hydrophilic property of the silicon dioxide film on the silicon wafer surface and the hydrophobic property of the corresponding photoresist, so that during wet etching, due to the continuous circulation of BOE solution inside the wet etching groove (tank), the temperature and concentration uniformity of the BOE solution is ensured, and thus the silicon wafer is washed by the BOE solution during wet etching, and a phenomenon of "floating" is generated, as shown in fig. 1a-1b, when this phenomenon occurs, the BOE solution penetrates into the gap between the photoresist and the silicon dioxide, and an undercut a is formed in the silicon dioxide below the photoresist, so that isotropic etching of the wet etching process itself is changed from the state of longitudinal and lateral etching ratios 1, and the lateral etching ratio itself is additionally maintained by the undercut a, so that the longitudinal and lateral etching ratios reach 1 or even 1, and in the SGT device is in contact with the polysilicon gate, and the SGT device is in serious failure.
Disclosure of Invention
The invention aims to provide a method for forming a semiconductor device, which can improve the phenomenon of 'floating glue' generated between silicon dioxide and photoresist in a wet etching process so as to improve the undercutting phenomenon.
In order to solve the above problems, the present invention provides a method of forming a semiconductor device, comprising the steps of:
step S1: providing a semiconductor substrate, wherein a silicon oxide layer is formed on the semiconductor substrate;
step S2: implanting a non-electric element into the silicon oxide layer by an ion implantation process, so that the oxygen enrichment condition of the surface of the silicon oxide layer is changed;
and step S3: forming a patterned photoresist layer on the silicon oxide layer;
and step S4: and etching the silicon oxide layer by a wet method by taking the patterned photoresist layer as a mask so as to form the semiconductor device.
Optionally, a trench for forming an SGT device is formed in the semiconductor substrate, and a polysilicon source is formed in the trench.
Further, the silicon oxide layer covers the polysilicon source electrode.
Optionally, the silicon oxide layer is an HDP oxide layer.
Optionally, step S2 includes:
implanting a non-electrical element into the silicon oxide layer by an ion implantation process; and
and carrying out an annealing process.
Further, the non-electrical element includes silicon and germanium.
Furthermore, the energy of the ion implantation process is 20 KeV-40 KeV, and the dosage is 1E15 ions/cm 2 ~5E15 ions/cm 2 。
Optionally, step S3 includes:
firstly, coating a photoresist layer on the surface of the silicon oxide layer, and then carrying out graphical processing on the photoresist layer through a developing process.
Optionally, step S4 includes:
taking the patterned photoresist layer as a mask, and carrying out wet etching on the silicon oxide layer by adopting a BOE solution;
and removing the photoresist layer, and cleaning the semiconductor substrate to form a semiconductor device.
Further, the semiconductor device is an SGT device.
Compared with the prior art, the invention has the following beneficial effects:
the invention provides a method for forming a semiconductor device, which comprises the following steps: step S1: providing a semiconductor substrate, wherein a silicon oxide layer is formed on the semiconductor substrate; step S2: implanting a non-electrical element into the silicon oxide layer by an ion implantation process, so as to change the oxygen enrichment condition of the surface of the silicon oxide layer; and step S3: forming a patterned photoresist layer on the silicon oxide layer; and step S4: and etching the silicon oxide layer by a wet method by taking the patterned photoresist layer as a mask so as to form the semiconductor device. According to the invention, before the patterned photoresist layer is formed, the fact that non-electric elements are injected into the silicon oxide layer through an ion injection process is added, the oxygen enrichment condition of the surface of the silicon oxide layer is changed, the effect of modifying the material of the silicon oxide layer is achieved, the adhesion between the photoresist layer and the silicon oxide layer is increased, meanwhile, the etching rate of a BOE solution to the silicon oxide layer in a wet etching process is reduced, the formation of undercutting in the wet etching process and extra scouring caused by permeation of the BOE solution below the photoresist are improved, the etching ratio of the BOE solution to transverse etching and longitudinal etching of the silicon oxide layer is improved, and the process window of a semiconductor device is increased, so that the risk that a polycrystalline silicon gate in a groove of an SGT device is contacted with a polycrystalline silicon source positioned above the groove is avoided, and the SGT device cannot fail.
Drawings
FIGS. 1a-1b are schematic diagrams of an undercut phenomenon formed in silicon dioxide under a photoresist during a wet etch process for a semiconductor device;
fig. 2 is a schematic flow chart illustrating a method for forming a semiconductor device according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a semiconductor substrate according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of an ion implantation process according to an embodiment of the present invention;
FIG. 5 is a schematic structural diagram illustrating a photoresist layer formed according to an embodiment of the present invention;
FIG. 6 is a schematic structural diagram illustrating a patterned photoresist layer formed according to an embodiment of the present invention;
fig. 7 is a schematic structural diagram after a wet etching process according to an embodiment of the present invention;
FIG. 8 is a graph showing the etching rate of the wet etching solution of the present invention to the silicon oxide layer and the etching rate of the wet etching solution of the prior art to the silicon oxide layer.
Description of reference numerals:
a-underetching; 100-a semiconductor substrate; 110-a silicon oxide layer; m-silicon atom; n-oxygen atom; k-a non-electrical element; 200-photoresist layer.
Detailed Description
A method of forming a semiconductor device of the present invention will be described in further detail below. The present invention will now be described in more detail with reference to the appended drawings, in which preferred embodiments of the invention are shown, it being understood that one skilled in the art can modify the invention herein described while still achieving the advantageous effects of the invention. Accordingly, the following description should be construed as broadly as possible to those skilled in the art and not as limiting the invention.
In the interest of clarity, not all features of an actual implementation are described. In the following description, well-known functions or constructions are not described in detail since they would obscure the invention in unnecessary detail. It will of course be appreciated that in the development of any such actual embodiment, numerous implementation-specific details must be set forth in order to achieve the developer's specific goals, such as compliance with system-related and business-related constraints, which will vary from one implementation to another. Moreover, it will be appreciated that such a development effort might be complex and time-consuming, but would nevertheless be a routine undertaking for those of ordinary skill in the art.
In order to make the objects and features of the present invention more comprehensible, embodiments of the present invention are described in detail below with reference to the accompanying drawings. It is to be noted that the drawings are in a very simplified form and are each provided with a non-precise ratio for the purpose of facilitating and clearly facilitating the description of the embodiments of the present invention.
Fig. 2 is a schematic flow chart of a method for forming a semiconductor device according to this embodiment. As shown in fig. 2, the present embodiment provides a method for forming a semiconductor device, including the steps of:
step S1: providing a semiconductor substrate, wherein a silicon oxide layer is formed on the semiconductor substrate;
step S2: implanting a non-electrical element into the silicon oxide layer by an ion implantation process, so as to change the oxygen enrichment condition of the surface of the silicon oxide layer;
and step S3: forming a patterned photoresist layer on the silicon oxide layer;
and step S4: and etching the silicon oxide layer by a wet method by taking the patterned photoresist layer as a mask, thereby forming the semiconductor device.
A method for forming a semiconductor device provided in this embodiment is described in detail below with reference to fig. 3 to 7.
Fig. 3 is a schematic structural diagram of the semiconductor substrate provided in this embodiment. As shown in fig. 3, step S1 is first executed: a semiconductor substrate 100 is provided having a silicon oxide layer 110 formed thereon.
In this step, the semiconductor substrate 100 may provide a platform for subsequent processes, which may be any substrate known to those skilled in the art for carrying semiconductor integrated circuit components, such as a die, or a wafer processed by an epitaxial growth process. In the present embodiment, the semiconductor substrate 100 is, for example, a silicon substrate, and a trench for forming an SGT device may be formed in the semiconductor substrate 100, and a polysilicon source (not shown in the figure) is formed in the trench.
The silicon oxide layer 110 is, for example, a silicon dioxide layer, and the silicon oxide layer 110 is, for example, an HDP (high density plasma) oxide layer. Due to poor adhesion between the silicon dioxide layer and the photoresist, the wet etching process is prone to generate a floating phenomenon. In this embodiment, the silicon oxide layer 110 covers the polysilicon source.
Fig. 4 is a schematic structural diagram of the ion implantation process provided in this embodiment. As shown in fig. 4, next, step S2 is performed to implant a non-electrical element k into the silicon oxide layer 110 by an ion implantation process, so as to change the oxygen enrichment condition of the surface of the silicon oxide layer 110.
The method specifically comprises the following steps:
first, a non-electrical element is implanted into the silicon oxide layer 110 through an ion implantation process, wherein the non-electrical element includes, but is not limited to, silicon and germanium. In the step, the energy of the ion implantation process is 20 KeV-40 KeV, and the dosage is 1E15 ions/cm 2 ~5E15 ions/cm 2 。
Then, an annealing process is performed to repair the damage of the ion implantation process to the surface of the silicon oxide layer 110, and simultaneously, the distribution of the non-electrical element k in the silicon oxide layer 110 is activated to form the silicon oxide layer 110 with a surface rich in the non-electrical element, so as to change the oxygen enrichment condition of the surface of the silicon oxide layer 110.
Fig. 5 is a schematic structural diagram of the photoresist layer formed in this embodiment. Fig. 6 is a schematic structural diagram of the patterned photoresist layer formed in this embodiment. As shown in fig. 5-6, next, step S3 is performed to form a patterned photoresist layer 200 on the silicon oxide layer 110.
Specifically, the method comprises the following steps:
firstly, a photoresist layer 200 is coated on the surface of the silicon oxide layer 110, and then the photoresist layer 200 is patterned by a developing process.
Fig. 7 is a schematic structural diagram after the wet etching process provided in this embodiment. As shown in fig. 7, next, step S4 is performed, and the silicon oxide layer 110 is wet-etched using the patterned photoresist layer 200 as a mask, so as to form a semiconductor device.
The method specifically comprises the following steps:
firstly, the patterned photoresist layer 200 is used as a mask, and a BOE solution is used to perform wet etching on the silicon oxide layer 110. At this time, since the surface of the silicon oxide layer 110 is rich in non-electrical elements (i.e., rich in silicon or germanium), it is beneficial to improve the hydrophilic property of the silicon oxide layer 110, thereby increasing the adhesion between the photoresist layer 200 and the silicon oxide layer 110; meanwhile, as the silicon oxide layer 110 is fully distributed with non-electrical elements (i.e., silicon ions or germanium ions), the etching rate of the BOE solution to the silicon oxide layer 110 is greatly reduced (for example, by about 11%), which is beneficial to improving the formation of undercutting formed by a wet etching process and the additional scouring of the silicon oxide layer 110 below a photoresist layer due to the permeation of the BOE solution, improving the etching ratio of the BOE solution to the lateral etching and the longitudinal etching of the silicon oxide layer 110, and increasing the process window of a semiconductor device, thereby avoiding the risk of the contact between a polysilicon gate in a subsequently formed groove of an SGT device and a polysilicon source positioned above the groove, and enabling the SGT device not to fail.
FIG. 8 is a graph illustrating the etching rate of a silicon oxide layer by a wet etching solution of the present invention and the etching rate of a silicon oxide layer by a wet etching solution of the prior art. As shown in fig. 8, in samples 1 and 2, on the premise that the ion implantation process is performed on the silicon oxide layer 110 in this embodiment, the etching rates of the BOE solution on the silicon oxide layer 110 are respectively: the etch rate for sample 1 was 847.11 and the etch rate for sample 2 was 838.44; sample 3 and sample 4 are based on the premise that the ion implantation process is not performed on the silicon oxide layer 110 in the prior art, the etching rates of the BOE solution on the silicon oxide layer are respectively as follows: the etch rate for sample 3 was 938.59 and the etch rate for sample 4 was 951.87. It can be seen that the etching rate of the BOE solution to the silicon oxide layer 110 is greatly reduced by the process of this embodiment.
Next, the photoresist layer 200 is removed, and the semiconductor substrate 100 is cleaned to form a semiconductor device. In this embodiment, the semiconductor device is an SGT device.
In summary, the present invention provides a method for forming a semiconductor device, in which, before forming a photoresist layer, a non-electrical element is injected into a silicon oxide layer by an ion implantation process, so as to change an oxygen-rich condition on the surface of the silicon oxide layer, achieve an effect of modifying a material of the silicon oxide layer, increase adhesion between the photoresist layer and the silicon oxide layer, and simultaneously reduce an etching rate of a BOE solution on the silicon oxide layer during a wet etching process, thereby achieving an improvement in formation of undercutting and additional washing below the photoresist due to penetration of the BOE solution, improving an etching ratio of the BOE solution on lateral etching and longitudinal etching of the silicon oxide layer, and increasing a process window of the semiconductor device, thereby avoiding a risk of contact between a polysilicon gate in a trench of an SGT device and a polysilicon source located above the trench, and preventing the SGT device from failing.
In addition, unless otherwise specified or indicated, the description of the terms "first", "second", and the like in the specification is only used for distinguishing various components, elements, steps, and the like in the specification, and is not used for representing a logical relationship, a sequential relationship, and the like between various components, elements, steps.
It is to be understood that while the present invention has been described in conjunction with the preferred embodiments thereof, the foregoing description is not intended to limit the invention. It will be apparent to those skilled in the art that many changes and modifications can be made, or equivalents employed, to the presently disclosed embodiments without departing from the intended scope of the invention. Therefore, any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present invention are still within the scope of the protection of the technical solution of the present invention, unless the contents of the technical solution of the present invention are departed.
Claims (10)
1. A method for forming a semiconductor device, comprising the steps of:
step S1: providing a semiconductor substrate, wherein a silicon oxide layer is formed on the semiconductor substrate;
step S2: implanting a non-electrical element into the silicon oxide layer by an ion implantation process, so as to change the oxygen enrichment condition of the surface of the silicon oxide layer;
and step S3: forming a patterned photoresist layer on the silicon oxide layer;
and step S4: and etching the silicon oxide layer by a wet method by taking the patterned photoresist layer as a mask so as to form the semiconductor device.
2. The method of forming of claim 1, wherein a trench is formed in the semiconductor substrate for forming an SGT device, wherein a polysilicon source is formed in the trench.
3. The method of claim 2, wherein the silicon oxide layer covers the polysilicon source.
4. The method of claim 1, wherein the silicon oxide layer is an HDP oxide layer.
5. The forming method of claim 1, wherein step S2 includes:
implanting a non-electrical element into the silicon oxide layer by an ion implantation process; and
and carrying out an annealing process.
6. The method of forming of claim 5, wherein the non-electrical element comprises silicon and germanium.
7. The method of claim 5, wherein the ion implantation process has an energy of 20 KeV to 40KeV and a dose of 1E15 ions/cm 2 ~5E15 ions/cm 2 。
8. The forming method of claim 1, wherein step S3 includes:
firstly, coating a photoresist layer on the surface of the silicon oxide layer, and then carrying out graphical processing on the photoresist layer through a developing process.
9. The forming method of claim 1, wherein step S4 includes:
taking the patterned photoresist layer as a mask, and carrying out wet etching on the silicon oxide layer by adopting a BOE solution;
and removing the photoresist layer, and cleaning the semiconductor substrate to form the semiconductor device.
10. The method of forming of claim 9, wherein the semiconductor device is an SGT device.
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| CN202211701245.8A CN115662893A (en) | 2022-12-29 | 2022-12-29 | Method for forming semiconductor device |
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| CN202211701245.8A CN115662893A (en) | 2022-12-29 | 2022-12-29 | Method for forming semiconductor device |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117059482A (en) * | 2023-10-11 | 2023-11-14 | 粤芯半导体技术股份有限公司 | Silicon dioxide wet etching method |
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| KR20020045449A (en) * | 2000-12-11 | 2002-06-19 | 박종섭 | A method for fabricating semiconductor device |
| CN112133637A (en) * | 2020-11-30 | 2020-12-25 | 中芯集成电路制造(绍兴)有限公司 | Method for manufacturing semiconductor device with shielded gate trench |
| CN112652518A (en) * | 2019-10-11 | 2021-04-13 | 中芯国际集成电路制造（天津）有限公司 | Method for forming semiconductor device |
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2022
- 2022-12-29 CN CN202211701245.8A patent/CN115662893A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH10242028A (en) * | 1997-02-27 | 1998-09-11 | Sony Corp | Adhesion improvement method of interlayer insulating film and resist material layer |
| KR20020045449A (en) * | 2000-12-11 | 2002-06-19 | 박종섭 | A method for fabricating semiconductor device |
| CN112652518A (en) * | 2019-10-11 | 2021-04-13 | 中芯国际集成电路制造（天津）有限公司 | Method for forming semiconductor device |
| CN112133637A (en) * | 2020-11-30 | 2020-12-25 | 中芯集成电路制造(绍兴)有限公司 | Method for manufacturing semiconductor device with shielded gate trench |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117059482A (en) * | 2023-10-11 | 2023-11-14 | 粤芯半导体技术股份有限公司 | Silicon dioxide wet etching method |
| CN117059482B (en) * | 2023-10-11 | 2024-01-26 | 粤芯半导体技术股份有限公司 | Silicon dioxide wet etching method |
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