CN115636583A - Supporting glass substrate and laminate using same - Google Patents
Supporting glass substrate and laminate using same Download PDFInfo
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- CN115636583A CN115636583A CN202211243838.4A CN202211243838A CN115636583A CN 115636583 A CN115636583 A CN 115636583A CN 202211243838 A CN202211243838 A CN 202211243838A CN 115636583 A CN115636583 A CN 115636583A
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- 239000000758 substrate Substances 0.000 title claims abstract description 242
- 239000011521 glass Substances 0.000 title claims abstract description 195
- 238000012545 processing Methods 0.000 claims description 98
- 239000004065 semiconductor Substances 0.000 claims description 64
- 238000004519 manufacturing process Methods 0.000 claims description 46
- 238000000034 method Methods 0.000 claims description 36
- 239000000203 mixture Substances 0.000 claims description 25
- 229910018072 Al 2 O 3 Inorganic materials 0.000 claims description 23
- 238000002834 transmittance Methods 0.000 claims description 16
- 239000003566 sealing material Substances 0.000 claims description 8
- 229910000679 solder Inorganic materials 0.000 claims description 8
- 239000012790 adhesive layer Substances 0.000 description 23
- 239000010410 layer Substances 0.000 description 22
- 238000005498 polishing Methods 0.000 description 21
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 16
- 238000004031 devitrification Methods 0.000 description 14
- 239000011347 resin Substances 0.000 description 13
- 229920005989 resin Polymers 0.000 description 13
- 230000000694 effects Effects 0.000 description 12
- 238000002844 melting Methods 0.000 description 10
- 230000008018 melting Effects 0.000 description 10
- 239000002994 raw material Substances 0.000 description 10
- 238000005342 ion exchange Methods 0.000 description 8
- 229910052697 platinum Inorganic materials 0.000 description 8
- 238000007500 overflow downdraw method Methods 0.000 description 7
- 239000000843 powder Substances 0.000 description 7
- UQSXHKLRYXJYBZ-UHFFFAOYSA-N Iron oxide Chemical compound [Fe]=O UQSXHKLRYXJYBZ-UHFFFAOYSA-N 0.000 description 6
- 239000013078 crystal Substances 0.000 description 6
- XEEYBQQBJWHFJM-UHFFFAOYSA-N iron Substances [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 5
- 239000006060 molten glass Substances 0.000 description 5
- 238000003280 down draw process Methods 0.000 description 4
- 239000007791 liquid phase Substances 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- 239000000126 substance Substances 0.000 description 4
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 3
- 229910004298 SiO 2 Inorganic materials 0.000 description 3
- 229910006404 SnO 2 Inorganic materials 0.000 description 3
- 239000002390 adhesive tape Substances 0.000 description 3
- 238000005191 phase separation Methods 0.000 description 3
- 238000011160 research Methods 0.000 description 3
- 238000000926 separation method Methods 0.000 description 3
- 238000010583 slow cooling Methods 0.000 description 3
- 230000003595 spectral effect Effects 0.000 description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- 238000002679 ablation Methods 0.000 description 2
- 239000002253 acid Substances 0.000 description 2
- 229910000287 alkaline earth metal oxide Inorganic materials 0.000 description 2
- 229910052799 carbon Inorganic materials 0.000 description 2
- 239000006229 carbon black Substances 0.000 description 2
- 239000008395 clarifying agent Substances 0.000 description 2
- 239000000975 dye Substances 0.000 description 2
- 239000006066 glass batch Substances 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 239000002245 particle Substances 0.000 description 2
- 239000000049 pigment Substances 0.000 description 2
- 238000007517 polishing process Methods 0.000 description 2
- 229920002635 polyurethane Polymers 0.000 description 2
- 239000004814 polyurethane Substances 0.000 description 2
- 238000009774 resonance method Methods 0.000 description 2
- 239000002002 slurry Substances 0.000 description 2
- 238000004528 spin coating Methods 0.000 description 2
- 230000003746 surface roughness Effects 0.000 description 2
- 238000007088 Archimedes method Methods 0.000 description 1
- 229910021193 La 2 O 3 Inorganic materials 0.000 description 1
- 238000006124 Pilkington process Methods 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 229910010413 TiO 2 Inorganic materials 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 238000005352 clarification Methods 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000000748 compression moulding Methods 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 238000002425 crystallisation Methods 0.000 description 1
- 230000008025 crystallization Effects 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 239000006025 fining agent Substances 0.000 description 1
- 238000005816 glass manufacturing process Methods 0.000 description 1
- 238000000265 homogenisation Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 230000002401 inhibitory effect Effects 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 238000012858 packaging process Methods 0.000 description 1
- 239000012071 phase Substances 0.000 description 1
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 1
- 238000001556 precipitation Methods 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 230000002035 prolonged effect Effects 0.000 description 1
- 238000007670 refining Methods 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- 238000003980 solgel method Methods 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 238000003756 stirring Methods 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/15—Ceramic or glass substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02422—Non-crystalline insulating materials, e.g. glass, polymers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67098—Apparatus for thermal treatment
- H01L21/67103—Apparatus for thermal treatment mainly by conduction
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
- H01L21/68757—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a coating or a hardness or a material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/06—Containers; Seals characterised by the material of the container or its electrical properties
- H01L23/08—Containers; Seals characterised by the material of the container or its electrical properties the material being an electrical insulator, e.g. glass
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/568—Temporary substrate used as encapsulation process aid
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/12105—Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/96—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
- H01L2924/3511—Warping
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Ceramic Engineering (AREA)
- Glass Compositions (AREA)
Abstract
A supporting glass substrate having an average linear thermal expansion coefficient of 66 x 10 in a temperature range of 20 to 200 DEG C ‑7 over/DEG C and 81X 10 ‑7 Below/° c.
Description
The application is application number: 201580014823.2, pct application no: PCT/JP2015/057092, filing date: 2015.3.11, title of the invention: the divisional application of the application "supporting glass substrate and laminate using the same".
Technical Field
The present invention relates to a support glass substrate and a laminate using the same, and more particularly, to a support glass substrate for supporting a processing substrate in a process of manufacturing a semiconductor package (semiconductor device) and a laminate using the same.
Background
Portable electronic devices such as mobile phones, notebook Personal computers, and PDAs (Personal Data Assistance) are required to be reduced in size and weight. Along with this, the mounting space of the semiconductor chips used in these electronic devices is also strictly limited, and high-density mounting of the semiconductor chips is a problem. Therefore, in recent years, high-density mounting of semiconductor packages has been demanded by a three-dimensional mounting technique, in which semiconductor chips are stacked on each other and wiring connection is performed between the semiconductor chips.
In addition, a conventional Wafer Level Package (WLP) is manufactured as follows: after the bumps are formed in the wafer state, the wafer is diced to obtain individual pieces. However, the conventional WLP has the following problems: not only is the number of leads difficult to increase, but also chipping and the like of the semiconductor chip are likely to occur because the semiconductor chip is mounted in a state where the back surface of the semiconductor chip is exposed.
Therefore, as a new WLP, a fan-out type WLP has been proposed (for example, see patent documents 1 and 2). The fan-out WLP can increase the number of pins, and protect the end of the semiconductor chip to prevent chipping and the like of the semiconductor chip.
Documents of the prior art
Patent document
Patent document 1: WO2013/057867
Patent document 2: japanese laid-open patent publication No. 2004-186688
Disclosure of Invention
Problems to be solved by the invention
In the fan-out WLP, a plurality of semiconductor chips are molded with a resin sealing material to form a processing substrate, and then, a wiring step and a solder bump forming step are provided on one surface of the processing substrate.
In these steps, since heat treatment at about 200 ℃ is performed, the sealing material may be deformed, and the processed substrate may be changed in dimension. If the processed substrate is changed in size, it is difficult to perform high-density wiring on one surface of the processed substrate, and it is also difficult to accurately form solder bumps.
In order to suppress the dimensional change of the processing substrate, it is effective to use a support substrate for supporting the processing substrate. However, even when the support substrate is used, the size of the processed substrate may be changed.
The present invention has been made in view of the above circumstances, and a technical object thereof is to provide a support substrate in which dimensional change of a processing substrate is less likely to occur, and a laminate using the same, thereby contributing to high-density mounting of a semiconductor package.
Means for solving the problems
The present inventors have repeated various experiments and found that the above technical problems can be solved by selecting a glass substrate as a support substrate and strictly regulating the thermal expansion coefficient of the glass substrate, and thus have proposed the present invention. That is, the supporting glass substrate of the present invention is characterized in that the average linear thermal expansion coefficient in the temperature range of 20 to 200 ℃ is 66X 10 -7 over/DEG C and 81X 10 -7 Below/° c. Here, the "average coefficient of thermal expansion in the temperature range of 20 to 200 ℃" can be measured by an expander.
The glass substrate is easy to smooth the surface and also has rigidity. Therefore, when the glass substrate is used as the support substrate, the processed substrate can be firmly and accurately supported. In addition, the glass substrate easily transmits light such as ultraviolet light and infrared light. Therefore, when a glass substrate is used as the support substrate, an adhesive layer or the like can be provided using an ultraviolet-curable adhesive or the like, and the processing substrate and the support glass substrate can be easily fixed to each other. Further, by providing a release layer or the like which absorbs infrared rays, the processing substrate and the support glass substrate can be easily separated from each other. Alternatively, an adhesive layer or the like may be provided using an ultraviolet curing tape or the like, so that the processing substrate and the supporting glass substrate can be easily separated from each other.
Further, with the supporting glass substrate of the present inventionIn other words, the average linear thermal expansion coefficient in the temperature range of 20 to 200 ℃ is defined as 66X 10 -7 over/DEG C and 81X 10 -7 Below/° c. Therefore, when the ratio of the semiconductor chips in the processing substrate is small and the ratio of the sealing material is large, the thermal expansion coefficients of the processing substrate and the support glass substrate are easily matched. Further, when the thermal expansion coefficients of the two are matched, dimensional change (particularly warp deformation) of the processed substrate is easily suppressed during processing. As a result, high-density wiring can be performed on one surface of the processed substrate, and solder bumps can be formed accurately.
Secondly, the supporting glass substrate of the present invention is characterized in that the average linear thermal expansion coefficient in the temperature range of 30 to 380 ℃ is 70X 10 -7 over/DEG C and 85X 10 -7 Below/° c. Here, the "average coefficient of thermal expansion in the temperature range of 30 to 380 ℃" can be measured by an expander.
Third, the support glass substrate of the present invention is preferably used for supporting a processing substrate in a process of manufacturing a semiconductor package.
Fourth, the support glass substrate of the present invention preferably has an ultraviolet transmittance of 40% or more in the thickness direction at a wavelength of 300 nm. The "ultraviolet transmittance in the thickness direction at a wavelength of 300 nm" can be evaluated by measuring the spectral transmittance at a wavelength of 300nm using a two-beam spectrophotometer, for example.
Fifth, the young's modulus of the supporting glass substrate of the present invention is preferably 65GPa or more. Here, "young's modulus" refers to a value measured by a bending resonance method. Note that 1GPa corresponds to about 101.9kgf/mm 2 。
Sixth, the supporting glass substrate of the present invention preferably contains SiO in mass% 2 40～80％、Al 2 O 3 1～20％、B 2 O 3 0～20％、MgO 0～12％、CaO 0～10％、SrO 0～20％、BaO 0～20％、ZnO 0～10％、Na 2 O 4～20％、K 2 0 to 15 percent of O is taken as the glass composition.
Seventh, the supporting glass substrate of the present invention is preferably made of a mass% of SiO 2 60～75％、Al 2 O 3 5～15％、B 2 O 3 5～20％、MgO 0～5％、CaO 0～10％、SrO 0～5％、BaO 0～5％、ZnO 0～5％、Na 2 O 7～16％、K 2 0 to 8 percent of O is taken as the glass composition.
Eighth, the supporting glass substrate of the present invention preferably contains SiO in mass% 2 50～80％、Al 2 O 3 1～20％、B 2 O 3 0～20％、MgO 0～5％、CaO 0～10％、SrO 0～5％、BaO 0～5％、ZnO 0～5％、Na 2 O 5～20％、K 2 0 to 10 percent of O is used as the glass composition.
Ninthly, the supporting glass substrate of the present invention preferably contains SiO in mass% 2 60～75％、Al 2 O 3 10～20％、B 2 O 3 0～10％、MgO 0～5％、CaO 0～5％、SrO 0～5％、BaO 0～5％、ZnO 0～5％、Na 2 O 6～18％、K 2 0 to 8 percent of O is taken as the glass composition.
Tenth, the supporting glass substrate of the present invention preferably contains SiO in mass% 2 40～60％、Al 2 O 3 5～20％、B 2 O 3 0～20％、MgO 0～5％、CaO 0～10％、SrO 0～20％、BaO 0～20％、Na 2 O 4～20％、K 2 0 to 10 percent of O is used as the glass composition.
Eleventh, the supporting glass substrate of the present invention preferably contains SiO in mass% 2 44～54％、Al 2 O 3 10～15％、B 2 O 3 0～15％、MgO 0～3.6％、CaO 3～8％、SrO 4～15％、BaO 0～14％、Na 2 O 4～15％、K 2 0 to 10 percent of O is used as the glass composition.
Twelfth, the support glass substrate of the present invention is preferably: the thickness is less than 2.0mm, the diameter is 100-500 mm, the deviation of the whole thickness is less than 30 μm, and the warping amount is less than 60 μm. The "warpage amount" is a sum of an absolute value of a maximum distance between a highest point and a least-squares focal plane and an absolute value of a lowest point and a least-squares focal plane in the entire supporting glass substrate, and can be measured, for example, by a Bow/Warp measuring apparatus SBW-331ML/d manufactured by KOBELCO research institute.
Thirteenth, the laminate of the present invention is preferably: the laminated body comprises a processing substrate and a supporting glass substrate for supporting the processing substrate, wherein the supporting glass substrate is the supporting glass substrate.
Fourteenth, the laminate of the present invention is preferably: the processing substrate includes a semiconductor chip molded with a sealing material.
Fifteenth, the method for manufacturing a semiconductor package according to the present invention preferably includes the steps of: the method includes a step of preparing a laminate including a processing substrate and a support glass substrate for supporting the processing substrate, and a step of processing the processing substrate, wherein the support glass substrate is the support glass substrate.
Sixthly, the method for manufacturing a semiconductor package of the present invention preferably includes: the processing treatment includes a step of wiring on one surface of the processing substrate.
Seventeenth, the method for manufacturing a semiconductor package according to the present invention is preferably: the processing treatment includes a step of forming a solder bump on one surface of the processing substrate.
Eighteenth, the semiconductor package of the present invention is manufactured by the method for manufacturing a semiconductor device.
Nineteenth, an electronic device according to the present invention is an electronic device including a semiconductor package, wherein the semiconductor package is the above semiconductor package.
Drawings
Fig. 1 is a schematic perspective view showing an example of the laminate of the present invention.
Fig. 2A is a schematic cross-sectional view showing a manufacturing process of a fan-out type WLP.
Fig. 2B is a schematic cross-sectional view showing a manufacturing process of a fan-out type WLP.
Fig. 2C is a schematic cross-sectional view showing a manufacturing process of a fan-out type WLP.
Fig. 2D is a schematic cross-sectional view showing a manufacturing process of a fan-out type WLP.
Fig. 2E is a schematic cross-sectional view showing a manufacturing process of a fan-out type WLP.
Fig. 2F is a schematic cross-sectional view showing a manufacturing process of a fan-out type WLP.
Fig. 2G is a schematic cross-sectional view showing a manufacturing process of a fan-out type WLP.
Detailed Description
The support glass substrate of the present invention has an average thermal expansion coefficient of 66X 10 in a temperature range of 20 to 200 DEG C -7 over/DEG C and 81X 10 -7 Below/° c, preferably above 66 × 10 -7 /° C and 77X 10 -7 Below/° c or 68 × 10 -7 Over/° C and 76 × 10 -7 Below/° c, particularly preferably 70 × 10 -7 over/DEG C and 75X 10 -7 Below/° c. When the average thermal expansion coefficient in the temperature range of 20 to 200 ℃ is outside the above range, it is difficult to match the thermal expansion coefficients of the processing substrate and the supporting glass substrate. Further, if the thermal expansion coefficients of the two are not matched, dimensional change (particularly warp deformation) of the processed substrate is likely to occur during processing.
An average thermal expansion coefficient of 70 x 10 in a temperature range of 30 to 380 DEG C -7 over/DEG C and 85X 10 -7 Below/° c, preferably above 70 x 10 -7 /° C and 83X 10 -7 Below/° c or 72 × 10 -7 /° C or more and 81 × 10 -7 Lower than/° C, and particularly preferably 74X 10 -7 80X 10 ℃ or higher -7 Lower than/° C. When the average thermal expansion coefficient in the temperature range of 30 to 380 ℃ is outside the above range, it is difficult to match the thermal expansion coefficients of the processing substrate and the supporting glass substrate. Further, when the thermal expansion coefficients of the two are not matched, dimensional change (particularly warp deformation) of the processed substrate is likely to occur during processing.
The support glass substrate of the present invention has an ultraviolet transmittance in the thickness direction at a wavelength of 300nm of preferably 40% or more, 45% or more, 50% or more, 55% or more, 60% or more, 65% or more, or 70% or more, and particularly preferably 80% or more. When the ultraviolet transmittance is too low, it is difficult to bond the processing substrate and the support substrate by the adhesive layer, and when the ultraviolet transmittance is too low, it is difficult to bond the processing substrate and the support substrate by irradiation of ultraviolet light through the adhesive layer. Further, when an adhesive layer or the like is provided by an ultraviolet curable adhesive tape or the like, it is difficult to easily separate the processing substrate and the support glass substrate. The "ultraviolet transmittance in the thickness direction at a wavelength of 300 nm" can be evaluated by measuring the spectral transmittance at a wavelength of 300nm using a two-beam spectrophotometer, for example.
The supporting glass substrate of the present invention preferably contains SiO in mass% 2 40～80％、Al 2 O 3 1～20％、B 2 O 3 0～20％、MgO 0～12％、CaO 0～10％、SrO 0～20％、BaO 0～20％、ZnO 0～10％、Na 2 O 4～20％、K 2 0 to 15 percent of O is taken as the glass composition. The reason why the content of each component is limited as described above is as follows. In the description of the content of each component,% represents mass% unless otherwise specified.
SiO 2 Is a main component forming the skeleton of the glass. SiO 2 2 When the content of (b) is too small, the Young's modulus and acid resistance are liable to be lowered. On the other hand, siO 2 When the content (b) is too large, the viscosity at high temperature becomes high, the meltability tends to be low, devitrified crystals such as cristobalite tend to precipitate, and the liquid phase temperature tends to increase. Thus, siO 2 The lower limit of the content of (B) is preferably 40% or 44%, particularly preferably 50%. Furthermore, siO 2 The lower limit of the content of (b) is preferably 58%, 60% or 62%, particularly preferably 64%, when the enhancement of the Young's modulus is considered to be preferable. On the other hand, siO 2 The upper limit of the content of (B) is preferably 80%, 75% or 72%, particularly preferably 70%. Furthermore, siO 2 The upper limit of the content of (b) is preferably 65% or 60%, particularly preferably 54%, in view of the meltability.
Al 2 O 3 Is a component for improving Young's modulus and inhibiting phase separation and devitrification. Al (Al) 2 O 3 When the content of (B) is too small, the Young's modulus tends to decrease, and the phase separation and devitrification of the glass tend to occur. On the other hand, al 2 O 3 When the content (c) is too large, the high-temperature viscosity becomes high and the meltability tends to be low. Due to the fact thatHerein, al 2 O 3 The lower limit of the content of (b) is preferably 1%, 3% or 5%, particularly preferably 6%. Further, al 2 O 3 The lower limit of the content of (b) is preferably 8%, particularly preferably 10%, when the Young's modulus is preferably increased. On the other hand, al 2 O 3 The upper limit of the content of (b) is preferably 20%, particularly preferably 15%. Further, al 2 O 3 The upper limit of the content of (b) is preferably 10%, particularly preferably 9%, in view of the meltability.
B 2 O 3 The component is a component for improving meltability and resistance to devitrification, and is a component for improving scratch resistance and strength. B is 2 O 3 When the content of (b) is too small, the meltability and devitrification resistance are liable to be lowered, and the resistance to a hydrofluoric acid-based chemical solution is liable to be lowered. On the other hand, B 2 O 3 When the content of (b) is too large, the Young's modulus and acid resistance tend to be lowered. Thus, B 2 O 3 The lower limit of the content of (b) is preferably 0%, 3%, 5% or 6%, particularly preferably 7%. On the other hand, B 2 O 3 The upper limit of the content of (b) is preferably 20%, 18%, 15% or 12%, particularly preferably 10% or less. In addition, B 2 O 3 The upper limit of the content of (b) is preferably 5% or 3%, particularly preferably 1% or less, when the Young's modulus is preferably increased.
B 2 O 3 -Al 2 O 3 From the viewpoint of improving resistance to devitrification, 0% or more or 0.5% or more is preferable, and 1% or more is particularly preferable. On the other hand, B 2 O 3 -Al 2 O 3 From the viewpoint of improving the Young's modulus, it is preferably 10% or less, 5% or less, 0% or less, -3% or less, or-5% or less, and particularly preferably-7% or less. In addition, "B" is 2 O 3 -Al 2 O 3 "means from B 2 O 3 Content of minus Al 2 O 3 The content of (b).
MgO is a component that reduces high-temperature viscosity and improves meltability, and is a component that significantly improves young's modulus in alkaline earth metal oxides, but when the content of MgO is increased, devitrification resistance is easily reduced. Accordingly, the content of MgO is preferably 0 to 12%, 0 to 8%, 0 to 5%, 0 to 4%, 0 to 3.8%, 0 to 3%, or 0 to 2%, and particularly preferably less than 0 to 1%.
CaO is a component that reduces the high-temperature viscosity and significantly improves the meltability. Further, in the alkaline earth metal oxide, since the raw material is relatively inexpensive, it is a component that reduces the raw material cost. The content of CaO is preferably 0 to 10%, 1 to 8%, 3 to 8%, or 2 to 6%, particularly preferably 2 to 5%. When the content of CaO is too large, the glass is easily devitrified. When the content of CaO is too small, the above-described effects are hardly exhibited.
SrO is a component that suppresses phase separation and also a component that improves resistance to devitrification. When the content of SrO is too large, the glass is easily devitrified. Accordingly, the content of SrO is preferably 0 to 20%, 0 to 15%, 0 to 9%, 0 to 5%, 0 to 4%, 0 to 3%, or 0 to 2%, particularly preferably 0 to 1% less. When the improvement of devitrification resistance is prioritized, the lower limit of the SrO content is preferably 0.1%, 1%, 2%, or 4%, and particularly preferably 7%.
BaO is a component for improving resistance to devitrification. The content of BaO is preferably 0 to 20%, 0 to 14%, 0 to 9%, 0 to 5%, 0 to 4%, 0 to 3% or 0 to 2%, particularly preferably 0 to 1% or less. When the content of BaO is too large, the glass is easily devitrified. When devitrification resistance is prioritized, the lower limit of the BaO content is preferably 0.1% or more or 1% or more, and particularly preferably 3% or more.
The mass ratio CaO/(MgO + CaO + SrO + BaO) is preferably 0.5 or more, 0.6 or more, 0.7 or more, or 0.8 or more, and particularly preferably 0.9 or more. When the mass ratio CaO/(MgO + CaO + SrO + BaO) is too small, the raw material cost tends to increase. The term "CaO/(MgO + CaO + SrO + BaO)" refers to a value obtained by dividing the content of CaO by the total amount of MgO, caO, srO and BaO.
ZnO is a component that reduces the high-temperature viscosity and significantly improves the meltability. The ZnO content is preferably 0 to 10%, 0 to 5%, or 0.1 to 4%, particularly preferably 0.5 to 3%. When the content of ZnO is too small, the above effects are hardly obtained. When the content of ZnO is too large, the glass is easily devitrified.
Na 2 O is an important component for adjusting the thermal expansion coefficient to the above range, and further, for lowering the high temperatureViscosity, significantly improves meltability, and contributes to initial melting of the glass raw material. Na (Na) 2 When the content of O is too small, the meltability tends to be low, and the thermal expansion coefficient may be undesirably reduced. On the other hand, na 2 When the content of O is too large, the thermal expansion coefficient may not be increased. Thus, na 2 The lower limit of the content of O is preferably 4%, 5%, 6%, or 7%, particularly preferably 9% or more. Further, na 2 The upper limit of the O content is preferably 20%, 18% or 16%, particularly preferably 15%.
B 2 O 3 -Na 2 O is preferably from-7 to 4%, -6 to 3%, or-5 to 2%, particularly preferably from-4 to 1%. This makes it easy to adjust the thermal expansion coefficient to the above range. In addition, "B" means 2 O 3 -Na 2 O "means from B 2 O 3 To the content of (A) minus Na 2 The content of O.
K 2 O is a component for adjusting the coefficient of thermal expansion, and is a component that reduces the high-temperature viscosity, improves the meltability, and contributes to the initial melting of the glass raw material. K is 2 The content of O is preferably 0 to 15%, 0 to 10%, or 0.1 to 8%, particularly preferably 1 to 5%. K is 2 When the content of O is too large, the thermal expansion coefficient may not be increased. On the other hand, K 2 When the content of O is too small, the meltability tends to decrease.
In addition to the above components, other components may be introduced as arbitrary components. From the viewpoint of reliably enjoying the effects of the present invention, the content of the other components than the above components is preferably 10% or less in total, and particularly preferably 5% or less in total.
Fe 2 O 3 Is a component that can be introduced as an impurity component or a clarifying agent component. However, fe 2 O 3 If the content of (b) is too large, the ultraviolet transmittance may decrease. I.e. Fe 2 O 3 If the content of (b) is too large, it is difficult to appropriately bond and separate the processing substrate and the support glass substrate via the resin layer and the release layer. Thus, fe 2 O 3 The content of (A) is preferably 0.05% or less, 0.03% or less, or 0.001 to 0.02%, particularly preferably0.005 to 0.01 percent is selected. In the present invention, "Fe" means "Fe 2 O 3 "comprises 2-valent iron oxide and 3-valent iron oxide, and the 2-valent iron oxide is converted into Fe 2 O 3 To be processed. Other oxides are treated in the same manner based on the oxides mentioned.
As a clarifying agent, as 2 O 3 These components are preferably reduced as much as possible from the viewpoint of environment. As 2 O 3 The content of (b) is preferably 1% or less or 0.5% or less, particularly preferably 0.1% or less, and most preferably substantially none. Wherein "substantially free of As 2 O 3 "refers to As in the glass composition 2 O 3 The content of (B) is less than 0.05%.
Sb 2 O 3 Is a component having a good clarifying effect in a low temperature region. Sb 2 O 3 The content of (B) is preferably 0 to 1%, 0.001 to 1%, or 0.01 to 0.9%, particularly preferably 0.05 to 0.7%. Sb 2 O 3 When the content of (b) is too large, the glass tends to be colored.
SnO 2 Is a component having a good clarifying effect in a high temperature region, and is a component for reducing high temperature viscosity. SnO 2 The content of (B) is preferably 0 to 1%, 0.001 to 1%, or 0.01 to 0.9%, particularly preferably 0.05 to 0.7%. SnO 2 When the content of (A) is too large, snO is easily precipitated 2 Devitrification crystallization of (1). In addition, snO 2 When the content of (b) is too small, the above effects are hardly obtained.
SO 3 Is a component with clarification effect. SO 3 The content of (b) is preferably 0 to 1%, 0.001 to 1%, or 0.01 to 0.5%, particularly preferably 0.05 to 0.3%. SO (SO) 3 When the content of (A) is too large, SO is liable to occur 2 And (5) reboiling.
Further, metal powders of F, C, al, si, etc. may be introduced as a fining agent to the extent of 1% each, within limits not impairing the glass characteristics. CeO may be introduced in an amount of about 1% 2 However, it is necessary to pay attention to the decrease in the ultraviolet transmittance.
Cl is a component that promotes melting of the glass. When Cl is introduced into the glass composition, the melting temperature can be lowered and the refining action can be promoted, so that the melting cost can be reduced and the life of the glass manufacturing furnace can be prolonged. However, when the Cl content is too large, metal parts around the glass-making furnace may be corroded. Therefore, the Cl content is preferably 3% or less, 1% or less, or 0.5% or less, and particularly preferably 0.1% or less.
P 2 O 5 Is a component which can suppress the precipitation of devitrified crystals. However, more P is introduced 2 O 5 When the phase is separated, the glass is easily split. Thus, P 2 O 5 The content of (B) is preferably 0 to 2.5%, 0 to 1.5% or 0 to 0.5%, particularly preferably 0 to 0.3%.
TiO 2 Is a component for reducing high-temperature viscosity and improving meltability, and is a component for suppressing solarization (solarization). However, tiO was introduced in a large amount 2 In this case, the glass is easily colored and the transmittance is easily lowered. Thus, tiO 2 The content of (b) is preferably 0 to 5%, 0 to 3% or 0 to 1%, particularly preferably 0 to 0.02%.
ZrO 2 Is a component for improving chemical resistance and Young's modulus. However, zrO was introduced more 2 In this case, the glass is easily devitrified, and since the introduced raw material is insoluble, undissolved crystalline foreign matter may be mixed into the product substrate. Thus, zrO 2 The content of (b) is preferably 0 to 10%, 0 to 7%, 0 to 5%, 0.001 to 3%, or 0.01 to 1%, particularly preferably 0.1 to 0.5%.
Y 2 O 3 、Nb 2 O 5 、La 2 O 3 Has the effect of improving the strain point, young's modulus, etc. However, if the content of each of these components is more than 1%, particularly 5%, the raw material cost and the product cost may increase.
The support glass substrate of the present invention can be suitably selected from the appropriate content ranges of the respective components to constitute an appropriate glass composition range, and the average linear thermal expansion coefficient in the temperature range of 20 to 200 ℃ is limited to 66X 10 -7 /° C or more and 81 × 10 -7 In addition to/° C, when the Young's modulus and resistance to devitrification are to be improved, the following glass composition range is particularly preferredAnd (5) enclosing.
(1) Contains SiO in mass% 2 60～75％、Al 2 O 3 5～15％、B 2 O 3 5～20％、MgO 0～5％、CaO 0～10％、SrO 0～5％、BaO 0～5％、ZnO 0～5％、Na 2 O 7～16％、K 2 0 to 8 percent of O is taken as the glass composition.
(2) Contains SiO in mass% 2 50～80％、Al 2 O 3 1～20％、B 2 O 3 0～20％、MgO 0～5％、CaO 0～10％、SrO 0～5％、BaO 0～5％、ZnO 0～5％、Na 2 O 5～20％、K 2 0 to 10 percent of O is used as the glass composition.
(3) Contains SiO in mass% 2 60～75％、Al 2 O 3 10～20％、B 2 O 3 0～10％、MgO 0～5％、CaO 0～5％、SrO 0～5％、BaO 0～5％、ZnO 0～5％、Na 2 O 6～18％、K 2 0 to 8 percent of O is taken as the glass composition.
(4) Contains SiO in mass% 2 40～60％、Al 2 O 3 5～20％、B 2 O 3 0～20％、MgO 0～5％、CaO 0～10％、SrO 0～20％、BaO 0～20％、Na 2 O 4～20％、K 2 0 to 10 percent of O is used as the glass composition.
(5) Contains SiO in mass% 2 44～54％、Al 2 O 3 10～15％、B 2 O 3 0～15％、MgO 0～3.6％、CaO 3～8％、SrO 4～15％、BaO 0～14％、Na 2 O 4～15％、K 2 0 to 10 percent of O is used as the glass composition.
The supporting glass substrate of the present invention is preferably not subjected to ion exchange treatment, and preferably has no compressive stress layer on the surface. The ion exchange treatment increases the production cost of the support glass substrate, and the ion exchange treatment can reduce the production cost of the support glass substrate without the ion exchange treatment. Further, it is difficult to reduce the variation in the thickness of the entire supporting glass substrate when the ion exchange treatment is performed, and such a disadvantage can be easily solved if the ion exchange treatment is not performed. The supporting glass substrate of the present invention does not exclude a method of forming a compressive stress layer on the surface by performing ion exchange treatment. From the viewpoint of improving the mechanical strength, it is preferable to form a compressive stress layer on the surface by performing ion exchange treatment.
The supporting glass substrate of the present invention preferably has the following characteristics.
The Young's modulus of the supporting glass substrate of the present invention is preferably 65GPa or more, 68GPa or more, 70GPa or more, 72GPa or more, or 73GPa or more, and particularly preferably 74GPa or more. When the young's modulus is too low, it is difficult to maintain the rigidity of the laminate, and deformation, warpage, and damage of the processing substrate are likely to occur.
The liquid phase temperature is preferably less than 1150 ℃, 1100 ℃ or less, 1050 ℃ or less, 1000 ℃ or less, 950 ℃ or less, 900 ℃ or less, or 870 ℃ or less, and particularly preferably 850 ℃ or less. Therefore, the glass substrate can be easily formed by the down-draw method, particularly the overflow down-draw method. Therefore, it is easy to manufacture a glass substrate having a small thickness, and the overall thickness variation can be reduced to less than 2.0 μm, particularly less than 1.0 μm by a small amount of polishing, and as a result, the manufacturing cost of the glass substrate can be reduced. Furthermore, in the process of manufacturing the glass substrate, devitrification crystals are easily prevented from occurring, and the productivity of the glass substrate is easily prevented from being lowered. The "liquid phase temperature" can be calculated as follows: the temperature of the precipitated crystals was measured and calculated by placing a glass powder which passed through a standard 30 mesh (500 μm) sieve and remained on a 50 mesh (300 μm) sieve in a platinum boat, and then holding the boat in a temperature gradient furnace for 24 hours.
The viscosity at the liquidus temperature is preferably 10000 dPas or more, 30000 dPas or more, 60000 dPas or more, 100000 dPas or more, 200000 dPas or more, 300000 dPas or more, 500000 dPas or more, or 800000 dPas or more, and particularly preferably 1000000 dPas or more. Thus, the glass substrate can be easily formed by the down-draw method, particularly the overflow down-draw method. Therefore, it is easy to manufacture a glass substrate having a small thickness, and the deviation of the entire thickness can be reduced to less than 2.0 μm, particularly less than 1.0 μm by a small amount of polishing, and as a result, the manufacturing cost of the glass substrate can be reduced. Furthermore, in the process of manufacturing the glass substrate, devitrification crystals are easily prevented from occurring, and the productivity of the glass substrate is easily prevented from being lowered. Wherein, the viscosity at the liquid phase temperature can be measured by a platinum ball pulling method. The viscosity at the liquidus temperature is an index of moldability, and the higher the viscosity at the liquidus temperature, the higher the moldability.
10 2.5 The temperature at dPa · s is preferably 1580 ℃ or lower, 1520 ℃ or lower, 1480 ℃ or lower, 1450 ℃ or lower, or 1420 ℃ or lower, particularly preferably 1400 ℃ or lower. 10 2.5 The higher the temperature at dpas, the lower the meltability, and the higher the production cost of the glass substrate. Wherein "10 2.5 The "temperature at dPa · s" can be measured by the platinum ball pulling method. Note that, 10 2.5 The temperature at dPa · s corresponds to the melting temperature, and the lower the temperature, the higher the melting property.
The support glass substrate of the present invention is preferably formed by a down-draw method, particularly an overflow down-draw method. The overflow downdraw method is a method of producing a glass substrate by overflowing molten glass from both sides of a heat-resistant groove-like structure, joining the overflowing molten glass at the lower tip of the groove-like structure, and simultaneously performing downward draw forming. In the overflow down-draw method, the surface to be the surface of the glass substrate is formed in a free surface state without contacting the groove-like refractory. Therefore, it is easy to manufacture a glass substrate having a small thickness, and the deviation of the entire thickness can be reduced to less than 2.0 μm, particularly less than 1.0 μm by a small amount of polishing, and as a result, the manufacturing cost of the glass substrate can be reduced.
As the method of forming the glass substrate, for example, a slot down-draw method, a redraw method, a float method, or the like may be employed in addition to the overflow down-draw method.
The supporting glass substrate of the present invention is preferably disc-shaped (for example, wafer-shaped or substantially disc-shaped), and the diameter thereof is preferably 100mm or more and 500mm or less, and particularly preferably 150mm or more and 450mm or less. This facilitates the application to the manufacturing process of the semiconductor package. If necessary, the material may be processed into other shapes, for example, a rectangular shape.
The roundness of the support glass substrate of the present invention is preferably 1mm or less, 0.1mm or less, or 0.05mm or less, and particularly preferably 0.03mm or less. The smaller the roundness, the easier the application to the manufacturing process of the semiconductor package. The roundness is defined as a value obtained by subtracting a minimum value from a maximum value of the wafer outer shape.
In the support glass substrate of the present invention, the thickness is preferably less than 2.0mm, 1.5mm or less, 1.2mm or less, 1.1mm or less, or 1.0mm or less, and particularly preferably 0.9mm or less. The thinner the thickness, the lighter the weight of the laminate, and therefore the better the handleability. On the other hand, if the thickness is too small, the strength of the supporting glass substrate itself is reduced, and it is difficult to exhibit the function of the supporting substrate. Therefore, the plate thickness is preferably 0.1mm or more, 0.2mm or more, 0.3mm or more, 0.4mm or more, 0.5mm or more, or 0.6mm or more, and particularly more than 0.7mm.
The variation in the overall thickness of the supporting glass substrate of the present invention is preferably 30 μm or less, 20 μm or less, 10 μm or less, 5 μm or less, 4 μm or less, 3 μm or less, 2 μm or less, or 1 μm or less, and particularly preferably less than 0.1 to 1 μm. The arithmetic average roughness Ra is preferably 100nm or less, 50nm or less, 20nm or less, 10nm or less, 5nm or less, 2nm or less, or 1nm or less, and particularly preferably 0.5nm or less. The higher the surface accuracy, the more easily the accuracy of the processing is improved. In particular, since the wiring accuracy can be improved, high-density wiring can be performed. In addition, the strength of the supporting glass substrate is increased, and the supporting glass substrate and the laminate are less likely to be damaged. Further, the number of times of reuse of the support glass substrate can be increased. Note that "arithmetic average roughness Ra" can be measured using a stylus type surface roughness meter or an Atomic Force Microscope (AFM).
The support glass substrate of the present invention is preferably polished after being formed by the overflow downdraw method. This makes it easy to limit the overall thickness variation to less than 2.0 μm. Among them, the overall thickness variation is preferably 1.5 μm or less or 1.0 μm or less, and particularly preferably less than 0.1 to 1.0. Mu.m.
In the supporting glass substrate of the present invention, the warpage amount is preferably 60 μm or less, 55 μm or less, 50 μm or less, or 1 to 45 μm, and particularly preferably 5 to 40 μm. The smaller the amount of warpage, the more easily the accuracy of processing is improved. In particular, since the wiring accuracy can be improved, high-density wiring can be performed.
The laminate of the present invention is a laminate including at least a processing substrate and a support glass substrate for supporting the processing substrate, wherein the support glass substrate is the support glass substrate. The technical features (preferable embodiments and effects) of the laminate of the present invention overlap with those of the supporting glass substrate of the present invention. Therefore, the detailed description of the overlapping portions will be omitted in the present specification.
The laminate of the present invention preferably has an adhesive layer between the processing substrate and the supporting glass substrate. The adhesive layer is preferably a resin, and is preferably, for example, a thermosetting resin, a photocurable resin (particularly, an ultraviolet-curable resin), or the like. In addition, it is preferable to have heat resistance that can withstand heat treatment in the manufacturing process of the semiconductor package. Therefore, in the manufacturing process of the semiconductor package, the adhesive layer is not easily melted, and the precision of the processing treatment can be improved. In order to easily fix the processing substrate and the support glass substrate, an ultraviolet curing tape may be used as the adhesive layer.
The laminate of the present invention preferably further comprises a release layer between the processing substrate and the supporting glass substrate, more specifically, between the processing substrate and the adhesive layer; alternatively, a release layer is provided between the support glass substrate and the adhesive layer. Thus, the processing substrate can be easily peeled from the support glass substrate after a predetermined processing treatment is performed on the processing substrate. The separation of the processing substrate is preferably performed by irradiating light such as laser light from the viewpoint of productivity. As the laser light source, an infrared light laser light source such as YAG laser light (wavelength 1064 nm) or semiconductor laser light (wavelength 780 to 1300 nm) can be used. In addition, a resin that is decomposed by irradiation with an infrared laser beam may be used for the release layer. In addition, a substance that efficiently absorbs infrared rays and converts the infrared rays into heat energy may be added to the resin. For example, carbon black, graphite powder, fine particulate metal powder, dye, pigment, or the like may be added to the resin.
The release layer is made of a material that causes "intra-layer peeling" or "interfacial peeling" by irradiation with light such as laser light. Namely, it is composed of: when light of a certain intensity is irradiated, the bonding force between atoms or molecules is lost or reduced, ablation (ablation) or the like occurs, and peeling occurs. The following cases are included: by irradiation with irradiation light, a component contained in the peeling layer is changed into a gas and released, thereby achieving separation; and the peeling layer absorbs light to change into gas, and vapor thereof is released, thereby achieving separation.
In the laminate of the present invention, the support glass substrate is preferably larger than the processing substrate. Therefore, when the processing substrate and the support glass substrate are supported, even if the center positions of the processing substrate and the support glass substrate are slightly shifted, the edge portion of the processing substrate is less likely to protrude from the support glass substrate.
The method for manufacturing a semiconductor package according to the present invention includes: the method includes a step of preparing a laminate including at least a processing substrate and a support glass substrate for supporting the processing substrate, and a step of processing the processing substrate, wherein the support glass substrate is the support glass substrate. The technical features (preferable mode, and effects) of the method for manufacturing a semiconductor package according to the present invention overlap with those of the supporting glass substrate and the laminate according to the present invention. Therefore, the detailed description of the overlapping portions will be omitted in the present specification.
The method for manufacturing a semiconductor package according to the present invention preferably further includes a step of conveying the stacked body. Thus, the processing efficiency of the processing treatment can be improved. The "step of conveying the laminated body" and the "step of processing the processing substrate" may be performed separately or simultaneously. That is, the processing substrate may be processed after the stacked body is conveyed to the processing position and stopped, or the processing substrate may be processed while the stacked body is conveyed.
In the method for manufacturing a semiconductor package according to the present invention, the processing treatment is preferably a treatment of wiring on one surface of the processing substrate or a treatment of forming a solder bump on one surface of the processing substrate. In the method for manufacturing a semiconductor package according to the present invention, the processing substrate is less likely to undergo dimensional change during these processes, and therefore these processes can be performed accurately.
The processing treatment may be any of a treatment of mechanically polishing one surface of the processing substrate (usually, the surface on the side opposite to the supporting glass substrate), a treatment of dry-etching one surface of the processing substrate (usually, the surface on the side opposite to the supporting glass substrate), and a treatment of wet-etching one surface of the processing substrate (usually, the surface on the side opposite to the supporting glass substrate), in addition to the above. In the method for manufacturing a semiconductor package according to the present invention, the processed substrate is less likely to warp and the rigidity of the laminate can be maintained. As a result, the processing can be accurately performed.
The semiconductor package of the present invention is produced by the method for producing a semiconductor package. The technical features (preferable mode and effect) of the semiconductor package of the present invention overlap with those of the supporting glass substrate, the laminate, and the method for manufacturing a semiconductor package of the present invention. Therefore, in the present specification, the detailed description of the overlapping portions is omitted.
An electronic device according to the present invention is an electronic device including a semiconductor package, and the semiconductor package is the above semiconductor package. The technical features (preferable mode and effect) of the electronic device of the present invention overlap with the technical features of the supporting glass substrate, the laminate, the method for manufacturing the semiconductor package, and the semiconductor package of the present invention. Therefore, in the present specification, the detailed description of the overlapping portions is omitted.
The invention will be further described with reference to the drawings.
Fig. 1 is a schematic perspective view showing an example of a laminate 1 of the present invention. In fig. 1, a laminate 1 includes a support glass substrate 10 and a processing substrate 11. In order to prevent the dimensional change of the processing substrate 11, the support glass substrate 10 is bonded to the processing substrate 11. The release layer 12 and the adhesive layer 13 are disposed between the support glass substrate 10 and the processing substrate 11. The release layer 12 is in contact with the support glass substrate 10, and the adhesive layer 13 is in contact with the processing substrate 11.
As shown in fig. 1, the laminate 1 is formed by laminating a support glass substrate 10, a release layer 12, an adhesive layer 13, and a processing substrate 11 in this order. The shape of the support glass substrate 10 depends on the processing substrate 11, and in fig. 1, the support glass substrate 10 and the processing substrate 11 are both circular plate-shaped. For the release layer 12, a resin that decomposes by irradiation with laser light, for example, can be used. In addition, a substance that efficiently absorbs laser light and converts it into heat energy may be added to the resin. Such as carbon black, graphite powder, particulate metal powder, dyes, pigments, and the like. The peeling layer 12 is formed by plasma CVD, spin coating by a sol-gel method, or the like. The adhesive layer 13 is made of a resin, and is formed by applying, for example, various printing methods, ink jet methods, spin coating methods, roll coating methods, and the like. Further, an ultraviolet curing type adhesive tape may also be used. After the support glass substrate 10 is peeled from the processing substrate 11 by the peeling layer 12, the adhesive layer 13 is dissolved and removed by a solvent or the like. The ultraviolet-curable adhesive tape can be removed by a release tape after irradiation with ultraviolet rays.
Fig. 2A to 2G are schematic cross-sectional views of steps of manufacturing a fan-out WLP. Fig. 2A shows a state in which an adhesive layer 21 is formed on one surface of the support member 20. A release layer may be formed between the support member 20 and the adhesive layer 21 as necessary. Next, as shown in fig. 2B, a plurality of semiconductor chips 22 are attached to the adhesive layer 21. At this time, the surface of the effective side of the semiconductor chip 22 is brought into contact with the adhesive layer 21. Next, as shown in fig. 2C, the semiconductor chip 22 is molded with a resin sealing material 23. The sealing material 23 is a material which undergoes little dimensional change after compression molding and dimensional change during wiring molding. Next, as shown in fig. 2D and 2E, the work substrate 24 on which the semiconductor chip 22 is molded is separated from the support member 20, and then bonded and fixed to the support glass substrate 26 via the adhesive layer 25. At this time, of the surfaces of the processing substrate 24, the surface opposite to the surface on the side where the semiconductor chip 22 is embedded is disposed on the side of the supporting glass substrate 26. Thus, the laminate 27 can be obtained. A release layer may be formed between the adhesive layer 25 and the support glass substrate 26 as necessary. After the resulting laminate 27 is laminated, as shown in fig. 2F, a wiring 28 is formed on the surface of the processing substrate 24 on the side where the semiconductor chip 22 is embedded, and then a plurality of solder bumps 29 are formed. Finally, after the processing substrate 24 is separated from the supporting glass substrate 26, as shown in fig. 2G, the processing substrate 24 is cut into individual semiconductor chips 22 and subjected to a subsequent packaging process.
Example 1
The present invention will be described below based on examples. The following examples are merely illustrative. The present invention is not limited in any way by the following examples.
Table 1 shows examples of the present invention (sample Nos. 1 to 22).
[ Table 1]
First, a glass batch material prepared with glass raw materials was placed in a platinum crucible so as to have a glass composition shown in the table, and melted at 1600 ℃ for 4 hours. Homogenization was performed by stirring with a platinum stirrer while melting the glass batch. Then, the molten glass was poured onto a carbon plate, formed into a plate shape, and then gradually cooled to room temperature at 3 ℃/min from a temperature higher than the slow cooling point by about 20 ℃. The average thermal expansion coefficient α of each of the obtained samples was evaluated in a temperature range of 20 to 200 ℃ 20～200 An average coefficient of thermal expansion alpha in a temperature range of 30 to 380 DEG C 30～380 Density rho, strain point Ps, slow cooling point Ta, softening point Ts, high temperature viscosity 10 4.0 Temperature and high temperature viscosity at dPa · s 10 3.0 Temperature at dPa · s, high temperature viscosity 10 2.5 Temperature at dPa · s, high temperature viscosity 10 2.0 Temperature at dpas, liquidus temperature TL, viscosity η at liquidus temperature TL, young's modulus E, and ultraviolet transmittance T at wavelength 300 nm.
Average coefficient of thermal expansion alpha in the temperature range of 20-200 DEG C 20～200 An average thermal expansion coefficient alpha in a temperature range of 30 to 380 DEG C 30～380 Is a value measured by a dilatometer.
The density ρ is a value measured by a known archimedes method.
The strain point Ps, the slow cooling point Ta, and the softening point Ts are values measured by the method of ASTM C336.
The liquidus temperature TL is a value obtained by measuring the temperature at which crystals are precipitated by placing a glass powder which passes through a standard sieve of 30 mesh (500 μm) and remains on a sieve of 50 mesh (300 μm) in a platinum boat, holding the glass powder in a temperature gradient furnace for 24 hours, and observing the glass powder with a microscope. The viscosity η at the liquidus temperature TL is a value obtained by measuring the viscosity of the glass at the liquidus temperature TL by a platinum ball pulling method.
The young's modulus E is a value measured by a resonance method.
The ultraviolet transmittance T at a wavelength of 300nm is a value obtained by measuring the spectral transmittance in the thickness direction at a wavelength of 300nm using a two-beam spectrophotometer. As a measurement sample, a sample having a plate thickness of 0.7mm and polished on both sides to an optically polished surface (mirror surface) was used. The arithmetic surface roughness Ra of the evaluation sample was measured by AFM, and as a result, the thickness of the measurement region was 10 μm.times.10 μm, and the thickness was 0.5 to 1.0nm.
As is clear from Table 1, the average thermal expansion coefficient α of samples Nos. 1 to 22 in the temperature range of 20 to 200 ℃ is 30～200 Is 66X 10 -7 /℃～81×10 -7 V. DEG C, an average coefficient of thermal expansion alpha in a temperature range of 30 to 380 DEG C 30～380 Is 70X 10 -7 /℃～84×10 -7 V. C. The Young's modulus E of samples Nos. 1 to 22 was 68GPa or more, and the Young's modulus E of samples Nos. 1 to 7 and 15 to 22 was 73GPa or more in particular. Further, samples Nos. 1 to 22 had ultraviolet transmittances T of 55% or more at a wavelength of 300 nm. Therefore, it is considered that samples nos. 1 to 22 are suitable as supports for a processing substrate, particularly as support glass substrates for bonding, in the manufacturing process of a semiconductor manufacturing apparatus.
Example 2
First, glass raw materials were mixed so as to have glass compositions of samples Nos. 1 to 14 and 18 to 22 shown in Table 1, and then supplied to a glass melting furnace to be melted at 1500 to 1600 ℃ and the resultant melt was subjected to meltingThe molten glass was supplied to an overflow downdraw forming apparatus and formed to have a thickness of 0.7mm. The obtained glass substrate (having a thickness variation of about 6.0 μm as a whole) was processed into
After the thickness of the film is 0.7mm, both surfaces of the film are polished by a polishing apparatus. Specifically, both surfaces of the glass substrate are sandwiched by a pair of polishing pads having different outer diameters, and both surfaces of the glass substrate are polished while the glass substrate and the pair of polishing pads are rotated together. During the polishing process, the control was performed so that a part of the glass substrate occasionally protruded from the polishing pad. The polishing pad was made of polyurethane, and the polishing slurry used in the polishing treatment had an average particle diameter of 2.5 μm and a polishing rate of 15 m/min. The respective polished glass substrates thus obtained were measured for the total thickness deviation and warpage using a Bow/Warp measuring apparatus SBW-331ML/d manufactured by KOBELCO research institute. As a result, the total thickness deviation was 0.55 μm or less, and the warpage amount was 35 μm or less.
Example 3
First, glass raw materials were prepared so as to have glass compositions of samples 15 to 17 shown in table 1, and then supplied to a glass melting furnace to be melted at 1500 to 1600 ℃, and then the molten glass was supplied to a float forming apparatus to be formed in accordance with a method of forming a sheet with a thickness of 0.8 mm. The obtained glass substrate was subjected to mechanical polishing on both surfaces to reduce the overall thickness variation to less than 1 μm. Processing the obtained glass substrate to a thickness of
Then, both surfaces thereof are polished by a polishing apparatus. Specifically, both surfaces of the glass substrate are sandwiched by a pair of polishing pads having different outer diameters, and both surfaces of the glass substrate are polished while rotating the glass substrate together with the pair of polishing pads. During the polishing process, the control was performed so that a part of the glass substrate occasionally protruded from the polishing pad. The polishing pad was made of polyurethane, and was polishedThe average particle size of the polishing slurry used for the polishing treatment was 2.5 μm, and the polishing rate was 15 m/min. The obtained polished glass substrates were measured for the total thickness deviation and warpage using a Bow/Warp measuring apparatus SBW-331ML/d manufactured by KOBELCO research institute. As a result, the thickness variation was 0.85 μm or less, and the warpage amount was 35 μm or less.
Description of the symbols
1. 27 laminated body
10. 26 supporting glass substrate
11. 24 processing substrate
12. Peeling layer
13. 21, 25 adhesive layer
20. Support member
22. Semiconductor chip
23. Sealing material
28. Wiring
29. Solder bump
Claims (19)
1. A supporting glass substrate characterized by having an average linear thermal expansion coefficient of 66 x 10 in a temperature range of 20 ℃ to 200 ℃ -7 over/DEG C and 81X 10 -7 Lower than/° C.
2. A supporting glass substrate characterized by having an average linear thermal expansion coefficient of 70 x 10 in a temperature range of 30 ℃ to 380 ℃ -7 over/DEG C and 85X 10 -7 Below/° c.
3. A supporting glass substrate according to claim 1 or 2, for supporting a processing substrate in a manufacturing process of a semiconductor package.
4. The supporting glass substrate according to any one of claims 1 to 3, wherein the ultraviolet transmittance in the thickness direction at a wavelength of 300nm is 40% or more.
5. The supporting glass substrate according to any one of claims 1 to 4, wherein the Young's modulus is 65GPa or more.
6. The supporting glass substrate according to any one of claims 1 to 5, comprising SiO in mass% 2 40％～80％、Al 2 O 3 1％～20％、B 2 O 3 0％～20％、MgO 0％～12％、CaO 0％～10％、SrO 0％～20％、BaO 0％～20％、ZnO 0％～10％、Na 2 O4% -20%, and K 2 0 to 15 percent of O is used as the glass composition.
7. The supporting glass substrate according to claim 6, comprising SiO in mass% 2 60％～75％、Al 2 O 3 5％～15％、B 2 O 3 5％～20％、MgO 0％～5％、CaO 0％～10％、SrO 0％～5％、BaO 0％～5％、ZnO 0％～5％、Na 2 O7% -16%, and K 2 0 to 8 percent of O is used as the glass composition.
8. The support glass substrate according to claim 6, comprising SiO in mass% 2 50％～80％、Al 2 O 3 1％～20％、B 2 O 3 0％～20％、MgO 0％～5％、CaO 0％～10％、SrO 0％～5％、BaO 0％～5％、ZnO 0％～5％、Na 2 O5% -20%, and K 2 0 to 10 percent of O is used as the glass composition.
9. The support glass substrate according to claim 6, comprising SiO in mass% 2 60％～75％、Al 2 O 3 10％～20％、B 2 O 3 0％～10％、MgO 0％～5％、CaO 0％～5％、SrO 0％～5％、BaO 0％～5％、ZnO 0％～5％、Na 2 O6% -18%, and K 2 0 to 8 percent of O is used as the glass composition.
10. According to the rightThe supporting glass substrate according to claim 6, which comprises SiO in mass% 2 40％～60％、Al 2 O 3 5％～20％、B 2 O 3 0％～20％、MgO 0％～5％、CaO 0％～10％、SrO 0％～20％、BaO 0％～20％、Na 2 O4% to 20%, and K 2 0 to 10 percent of O is used as the glass composition.
11. The supporting glass substrate according to claim 6, comprising SiO in mass% 2 44％～54％、Al 2 O 3 10％～15％、B 2 O 3 0％～15％、MgO 0％～3.6％、CaO 3％～8％、SrO 4％～15％、BaO 0％～14％、Na 2 O4% -15%, and K 2 0 to 10 percent of O is used as the glass composition.
12. The support glass substrate according to any one of claims 1 to 11, wherein the support glass substrate has a disk shape having a thickness of less than 2.0mm and a diameter of 100mm to 500mm, and has a variation in plate thickness of 30 μm or less and a warpage amount of 60 μm or less.
13. A laminate comprising a processing substrate and a supporting glass substrate for supporting the processing substrate, wherein the supporting glass substrate is the supporting glass substrate according to any one of claims 1 to 12.
14. The laminate according to claim 13, wherein the processing substrate comprises a semiconductor chip molded with a sealing material.
15. A method for manufacturing a semiconductor package, comprising the steps of:
a step of preparing a laminate including a processing substrate and a support glass substrate for supporting the processing substrate, and
a step of processing the processing substrate, wherein,
the supporting glass substrate according to any one of claims 1 to 12.
16. The method of manufacturing a semiconductor package according to claim 15, wherein the processing includes a step of performing wiring on one surface of the processing substrate.
17. The method of manufacturing a semiconductor package according to claim 15 or 16, wherein the processing includes a step of forming a solder bump on one surface of the processing substrate.
18. A semiconductor package manufactured by the method for manufacturing a semiconductor package according to any one of claims 15 to 17.
19. An electronic device comprising a semiconductor package, wherein,
a semiconductor package is the semiconductor package of claim 18.
Applications Claiming Priority (8)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2014-078294 | 2014-04-07 | ||
| JP2014078294 | 2014-04-07 | ||
| JP2014-189577 | 2014-09-18 | ||
| JP2014189577 | 2014-09-18 | ||
| JP2014255798 | 2014-12-18 | ||
| JP2014-255798 | 2014-12-18 | ||
| CN201580014823.2A CN106103369A (en) | 2014-04-07 | 2015-03-11 | Support glass substrate and use its duplexer |
| PCT/JP2015/057092 WO2015156075A1 (en) | 2014-04-07 | 2015-03-11 | Supporting glass substrate and laminate using same |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201580014823.2A Division CN106103369A (en) | 2014-04-07 | 2015-03-11 | Support glass substrate and use its duplexer |
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| CN202211243838.4A Pending CN115636583A (en) | 2014-04-07 | 2015-03-11 | Supporting glass substrate and laminate using same |
| CN201580014823.2A Pending CN106103369A (en) | 2014-04-07 | 2015-03-11 | Support glass substrate and use its duplexer |
| CN202211243837.XA Pending CN115636582A (en) | 2014-04-07 | 2015-03-11 | Supporting glass substrate and laminate using same |
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| CN202211243837.XA Pending CN115636582A (en) | 2014-04-07 | 2015-03-11 | Supporting glass substrate and laminate using same |
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| KR (1) | KR102436789B1 (en) |
| CN (3) | CN115636583A (en) |
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| CN115108719A (en) * | 2014-09-03 | 2022-09-27 | 日本电气硝子株式会社 | Supporting glass substrate and laminate using same |
| JP6631935B2 (en) * | 2015-01-05 | 2020-01-15 | 日本電気硝子株式会社 | Manufacturing method of glass plate |
| JP6742593B2 (en) * | 2015-01-05 | 2020-08-19 | 日本電気硝子株式会社 | Method for manufacturing supporting glass substrate and method for manufacturing laminated body |
| JP6866850B2 (en) * | 2015-12-16 | 2021-04-28 | 日本電気硝子株式会社 | Support crystallized glass substrate and laminate using this |
| WO2017104513A1 (en) * | 2015-12-17 | 2017-06-22 | 日本電気硝子株式会社 | Method of manufacturing a glass support plate |
| WO2018110163A1 (en) * | 2016-12-14 | 2018-06-21 | 日本電気硝子株式会社 | Glass support substrate and laminate using same |
| JP2018095514A (en) * | 2016-12-14 | 2018-06-21 | 日本電気硝子株式会社 | Glass support substrate and laminate using same |
| JP6922276B2 (en) * | 2017-03-13 | 2021-08-18 | 日本電気硝子株式会社 | Support crystallized glass substrate and laminate using this |
| US20200130325A1 (en) * | 2017-04-27 | 2020-04-30 | Nippon Electric Glass Co., Ltd. | Carrier glass and method for producing same |
| CN116462405A (en) * | 2017-07-26 | 2023-07-21 | 日本电气硝子株式会社 | Support glass substrate and laminated substrate using same |
| CN110944953A (en) * | 2017-07-26 | 2020-03-31 | Ａｇｃ株式会社 | Supporting glass for semiconductor package |
| JP7276644B2 (en) * | 2017-08-31 | 2023-05-18 | 日本電気硝子株式会社 | SUPPORTING GLASS SUBSTRATE AND LAMINATED SUBSTRATE USING THE SAME |
| CN114988704A (en) * | 2019-02-08 | 2022-09-02 | Ａｇｃ株式会社 | Glass ceramics, chemically strengthened glass, and semiconductor support substrate |
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- 2015-03-11 KR KR1020167025079A patent/KR102436789B1/en active IP Right Grant
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Also Published As
| Publication number | Publication date |
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| CN106103369A (en) | 2016-11-09 |
| TW201542484A (en) | 2015-11-16 |
| CN115636582A (en) | 2023-01-24 |
| TWI641573B (en) | 2018-11-21 |
| KR102436789B1 (en) | 2022-08-26 |
| KR20160140615A (en) | 2016-12-07 |
| WO2015156075A1 (en) | 2015-10-15 |
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