CN115606006A - 半导体结构及其制作方法 - Google Patents
半导体结构及其制作方法 Download PDFInfo
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- CN115606006A CN115606006A CN202080097541.4A CN202080097541A CN115606006A CN 115606006 A CN115606006 A CN 115606006A CN 202080097541 A CN202080097541 A CN 202080097541A CN 115606006 A CN115606006 A CN 115606006A
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Abstract
本申请提供了一种半导体结构及其制作方法,半导体结构包括:自下而上分布的衬底、异质结、P型离子掺杂层以及栅极绝缘层,其中,异质结包括源极区域、漏极区域以及栅极区域,栅极区域上的P型离子掺杂层包括激活区与非激活区,激活区中的P型掺杂离子被激活,非激活区中的P型掺杂离子被钝化,非激活区至少包括两个区域且在垂直于源极区域与漏极区域的连线方向上间隔分布;栅极绝缘层位于非激活区上,用于暴露激活区。利用栅极绝缘层作为激活P型掺杂离子时的掩膜层,避免对P型离子掺杂层进行刻蚀,从而避免刻蚀造成异质结的损失。此外,非激活区间隔分布可隔断激活区,增加耗尽区的宽度,能改变栅漏之间的电场分布,提高半导体结构的击穿电压。
Description
PCT国内申请,说明书已公开。
Claims (20)
- PCT国内申请,权利要求书已公开。
Applications Claiming Priority (1)
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PCT/CN2020/094174 WO2021243603A1 (zh) | 2020-06-03 | 2020-06-03 | 半导体结构及其制作方法 |
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US (1) | US20230015133A1 (zh) |
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JP5186096B2 (ja) * | 2006-10-12 | 2013-04-17 | パナソニック株式会社 | 窒化物半導体トランジスタ及びその製造方法 |
JP2013074068A (ja) * | 2011-09-27 | 2013-04-22 | Fujitsu Ltd | 半導体装置及び半導体装置の製造方法 |
JP5784440B2 (ja) * | 2011-09-28 | 2015-09-24 | トランスフォーム・ジャパン株式会社 | 半導体装置の製造方法及び半導体装置 |
CN110518067B (zh) * | 2018-05-21 | 2023-03-07 | 中国科学院苏州纳米技术与纳米仿生研究所 | 基于沟道阵列的异质结场效应晶体管及其制作方法和应用 |
CN110970499B (zh) * | 2018-09-30 | 2023-09-15 | 中国科学院苏州纳米技术与纳米仿生研究所 | GaN基横向超结器件及其制作方法 |
CN110690284A (zh) * | 2019-11-19 | 2020-01-14 | 南方科技大学 | 一种氮化镓基场效应晶体管及其制备方法 |
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