CN115509034A - Chalcogenide phase change super-surface regulation and control device and processing method thereof - Google Patents
Chalcogenide phase change super-surface regulation and control device and processing method thereof Download PDFInfo
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- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/24—Coupling light guides
- G02B6/26—Optical coupling means
- G02B6/34—Optical coupling means utilising prism or grating
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- G02F1/03—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on ceramics or electro-optical crystals, e.g. exhibiting Pockels effect or Kerr effect
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- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/03—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on ceramics or electro-optical crystals, e.g. exhibiting Pockels effect or Kerr effect
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- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/03—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on ceramics or electro-optical crystals, e.g. exhibiting Pockels effect or Kerr effect
- G02F1/035—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on ceramics or electro-optical crystals, e.g. exhibiting Pockels effect or Kerr effect in an optical waveguide structure
Abstract
The embodiment of the application provides a chalcogenide phase change super-surface regulating device and a regulating device processing method, wherein the device comprises: the device comprises an on-chip switch, an addressing waveguide array, a waveguide port coupling grating and a cross region coupling grating; the waveguide port coupling grating is connected with the cross region coupling grating through a waveguide port; the on-chip switch is positioned on the cross area coupling grating; the addressing waveguide array is connected to the on-chip switch. By implementing the embodiment of the application, the high-resolution and rapid regulation and control of the amplitude or the phase of any position of the space light can be realized.
Description
Technical Field
The application relates to the technical field of space light information regulation and control, in particular to a chalcogenide phase change super-surface regulation and control device and a processing method of the regulation and control device.
Background
The modulation of chalcogenide phase change materials in the prior art has many problems, for example, the on-chip waveguide evanescent coupling method is used for modulation, and only pixel-level control of chalcogenide phase change materials at a fixed point position or at any one-dimensional position can be realized, and the method requires that the waveguide is close to the chalcogenide phase change materials. However, since the two are too close, the waveguide may generate near-field coupling with the optical phase-change super-surface, which may adversely interfere with the modulation effect of its spatial optical information such as amplitude and phase. Therefore, the method has the advantages of high design difficulty, low efficiency and long phase change modulation time.
In addition, the metal hot plate or electrode used in the prior art generally has very different optical characteristics compared to the optical super surface, which has a serious influence on its spatial optical information modulation performance. Meanwhile, the size of the phase change super-surface is too large relative to the short-wavelength optical phase change super-surface, and a highly integrated addressing microelectrode array is not easy to manufacture, so that the resolution of pixel-level phase change dynamic control is influenced. In addition, the phase change material has the characteristic of high heat conduction when crystal lines are formed in the phase change process. For the electrothermal phase change based on heat conduction, the spatial distribution of the crystallization degree of the phase change material in a single pixel of the super surface is not uniform due to the difference of the heat conduction performance of a crystal line and other amorphous areas, thereby seriously damaging the working effect of a super surface device.
Disclosure of Invention
An object of the embodiments of the present application is to provide a chalcogenide phase change super-surface control device and a control device processing method, which can achieve high-resolution and fast control of the amplitude or phase at any position of spatial light, improve control efficiency, achieve fast and uniform phase change control, do not affect the optical characteristics of chalcogenide phase change super-surface, and shorten control time.
In a first aspect, an embodiment of the present application provides a chalcogenide phase change super-surface conditioning device, where the device includes:
the device comprises an on-chip switch, an addressing waveguide array, a waveguide port coupling grating and a cross region coupling grating;
the waveguide port coupling grating is connected with the cross region coupling grating through a waveguide port;
the on-chip switch is positioned on the cross area coupling grating;
the addressing waveguide array is connected to the on-chip switch.
In the implementation process, the on-chip switch and the cross area coupling grating are added, so that the high-resolution and quick regulation and control of the amplitude or the phase of any position of the space light can be realized, the regulation and control efficiency is improved, the quick and uniform phase change regulation and control can be realized, the optical characteristics of the chalcogenide phase change super-surface cannot be influenced, and the regulation and control time is shortened.
Further, the addressing waveguide array is formed by mutually and vertically staggering a plurality of waveguide arrays with two dimensions to form a plurality of crossed areas.
In the implementation process, the coupling grating in the cross area can re-couple the light pulse inside the addressing waveguide array to the free space and irradiate the phase-change super-surface pixel.
Further, the sulfur-series phase-change super surface is micron-sized Sb 2 S 3 Array of squares, said Sb 2 S 3 The square array super surface is a pixel array, the pixel array comprises a plurality of pixel units, and the pixel units are located right above the cross area.
In the implementation process, the pixel units are arranged right above the cross area, so that the pixel units can be independently regulated and controlled conveniently.
Further, the on-chip switches are, from top to bottom: positive electrode of ITO, si 3 N 4 A waveguide array and an ITO negative electrode.
In the above implementation process, the ITO positive electrode, si 3 N 4 The waveguide array and the ITO negative electrode are sequentially combined to form an on-chip switch, so that the intensity of transmitted light can be conveniently modulated, and destructive interference of two paths of guided modes can be conveniently realized.
Further, si in the on-chip switch 3 N 4 The guide mode in the waveguide array is divided into two paths, half-wave phase delay is generated by adjusting the phase of one path, then the two paths are combined, and two paths are utilizedDestructive interference of the road coherent guide mode realizes strong and weak modulation of the transmission light intensity of the on-chip switch.
Further, by applying a voltage across the ITO positive electrode and the ITO negative electrode, the ITO positive electrode and the Si are made to be in contact with each other 3 N 4 The carrier concentration near the waveguide array changes at the ITO negative electrode side, thereby affecting the ITO negative electrode dielectric constant and changing Si 3 N 4 The effective refractive index of the waveguide array.
In a second aspect, an embodiment of the present application provides a method for processing a chalcogenide phase change super-surface conditioning device, for processing the chalcogenide phase change super-surface conditioning device as in the first aspect, the method including:
preparing a silicon oxide buffer layer on a substrate;
etching and preparing patterns of an ITO negative electrode on the surface of the silicon oxide buffer layer;
etching the surface of the silicon oxide buffer layer to form patterns of an addressing waveguide array, a waveguide port coupling grating and a cross region coupling grating, preparing a film according to the patterns of the addressing waveguide array, the waveguide port coupling grating and the cross region coupling grating, and removing photoresist from the film to form the addressing waveguide array, the waveguide port coupling grating and the cross region coupling grating;
etching and preparing patterns of the ITO positive electrode on the silicon oxide buffer layer;
preparing a silicon oxide space layer, preparing a chalcogenide phase change super surface on the silicon oxide space layer, and etching and exposing the ITO negative electrode and the ITO positive electrode.
In the implementation process, the addressing waveguide array, the waveguide port coupling grating and the cross region coupling grating are formed by etching the surface of the silicon oxide buffer layer, so that the high-resolution and rapid regulation and control of the amplitude or the phase of any position of space light can be realized, the regulation and control efficiency is improved, the influence of heat transfer on the phase change uniformity is reduced, the optical characteristics of the chalcogenide phase change super-surface cannot be influenced, and the regulation and control time is shortened.
Further, the step of performing pattern etching and preparation of the ITO negative electrode on the surface of the silicon oxide buffer layer includes:
etching the surface of the silicon oxide buffer layer to form an ITO negative electrode pattern;
preparing a first ITO film according to the ITO negative electrode pattern;
and carrying out photoresist removing operation on the first ITO film to form an ITO negative electrode.
In the implementation process, the silicon oxide buffer layer is etched to form an ITO negative electrode pattern, and then photoresist is removed to obtain an ITO negative electrode which can conduct electricity, and the first ITO film can collect light pulses.
Further, the step of performing pattern etching and preparation of the ITO positive electrode on the silicon oxide buffer layer includes:
etching the silicon oxide buffer layer to form an ITO positive electrode pattern;
preparing a second ITO film according to the ITO positive electrode pattern;
and carrying out photoresist removing operation on the second ITO film to form an ITO positive electrode.
In the implementation process, the ITO positive electrode is formed, voltage is applied to two ends of the electrode, the carrier concentration of the ITO positive electrode can be obviously changed on the ITO side, the ITO dielectric constant is further influenced, and therefore the effective refractive index of the addressing waveguide array is changed.
Further, the step of preparing a chalcogenide phase change super surface on the silicon oxide space layer and etching and exposing the ITO negative electrode and the ITO positive electrode comprises the following steps:
preparing a chalcogenide phase change material according to the silicon oxide space layer;
removing the glue from the chalcogenide phase change material to form a chalcogenide phase change super surface;
depositing the chalcogenide phase change super surface to form an aluminum oxide coating layer;
and etching the aluminum oxide cladding layer to expose the ITO negative electrode and the ITO positive electrode.
In the implementation process, the chalcogenide phase change material is subjected to photoresist removal to form a chalcogenide phase change super surface, an aluminum oxide coating layer is formed through deposition, and the electrode is exposed through etching, so that independent dynamic phase change regulation and control can be performed on pixel units at any position in the chalcogenide phase change super surface.
Additional features and advantages of the disclosure will be set forth in the description which follows, or in part may be learned by the practice of the above-described techniques of the disclosure.
The present invention can be implemented in accordance with the content of the specification, and the following detailed description of the preferred embodiments of the present application is made with reference to the accompanying drawings.
Drawings
To more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments of the present application will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and that those skilled in the art can also obtain other related drawings based on the drawings without inventive efforts.
FIG. 1 is a schematic structural diagram of an addressed waveguide array provided in an embodiment of the present application;
FIG. 2 is a schematic structural diagram of a pixel-level control device of a chalcogenide phase change super-surface based on an on-chip addressing waveguide according to an embodiment of the present disclosure;
fig. 3 is a schematic flow chart of a processing method of a chalcogenide phase change super-surface conditioning device according to an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures. Meanwhile, in the description of the present application, the terms "first", "second", and the like are used only for distinguishing the description, and are not to be construed as indicating or implying relative importance.
The following detailed description of embodiments of the present application will be described in conjunction with the accompanying drawings and examples. The following examples are intended to illustrate the present application but are not intended to limit the scope of the present application.
Example one
The embodiment of the application provides a sulfur phase transition super surface regulation and control device, the device includes:
the device comprises an on-chip switch, an addressing waveguide array, a waveguide port coupling grating and a cross region coupling grating;
the waveguide port coupling grating is connected with the cross region coupling grating through a waveguide port;
the on-chip switch is positioned on the cross area coupling grating;
the addressing waveguide array is connected to the on-chip switch.
In the implementation process, the on-chip switch and the cross area coupling grating are added, so that the high-resolution and rapid regulation and control of the amplitude or the phase of any position of the space light can be realized, the regulation and control efficiency is improved, the rapid and uniform phase change regulation and control can be realized, the optical characteristics of the chalcogenide phase change super-surface cannot be influenced, and the regulation and control time is shortened.
Further, the addressing waveguide array is formed by mutually and vertically staggering a plurality of waveguide arrays with two dimensions to form a plurality of crossed areas.
In the implementation process, the coupling grating in the cross area can re-couple the light pulse inside the addressing waveguide array to the free space and irradiate the phase-change super-surface pixel.
Furthermore, the sulfur-series phase-change super surface is micron-sized Sb 2 S 3 Array of squares, sb 2 S 3 The square array super surface is a pixel array, the pixel array comprises a plurality of pixel units, and the pixel units are located right above the cross area.
In the implementation process, the pixel units are arranged right above the cross area, so that the pixel units can be independently regulated and controlled conveniently.
Further, the on-chip switches are sequentially from top to bottom: ITO positive electrode, si 3 N 4 A waveguide array and an ITO negative electrode.
In the above implementation process, the ITO positive electrode and Si 3 N 4 The waveguide array and the ITO negative electrode are sequentially combined to form an on-chip switch, so that the intensity of transmitted light can be conveniently modulated, and destructive interference of two paths of guided modes can be conveniently realized.
Further, si in on-chip switches 3 N 4 The guide mode in the waveguide array is equally divided into two paths, half-wave phase delay is generated by adjusting the phase of one path, then beam combination is carried out, and the intensity of the transmitted light of the on-chip switch is modulated by utilizing destructive interference of two paths of coherent guide modes.
Further, by applying a voltage across the ITO positive electrode and the ITO negative electrode, the ITO positive electrode and Si are made to be in contact with each other 3 N 4 The carrier concentration near the waveguide array changes at the ITO negative electrode side, thereby affecting the ITO negative electrode dielectric constant and changing Si 3 N 4 The effective refractive index of the waveguide array.
The embodiment of the application utilizes the linear superposition of two-way or four-way transmission incoherent light pulse intensity, and realizes the high-resolution pixelization regulation and control of the chalcogenide phase change material at any position on a two-dimensional plane through a two-dimensional waveguide array.
The optical pulses are generated by chopping a continuous laser guided mode. Alternatively, the on-chip switch may be a mach-zehnder interference type optical switch in which the guided mode in the waveguide is first divided equally into two. The half-wave phase delay is generated by adjusting the phase of one path, and then the beams are combined. The destructive interference of two paths of coherent guided modes is utilized to realize the strong and weak modulation of the transmitted light intensity of the optical switch. The switch is sequentially from top to bottom: ITO positive electrode, si 3 N 4 A thin film and an ITO negative electrode. Wherein the ITO positive electrode and Si are formed by applying a voltage across the electrodes 3 N 4 The carrier concentration near the thin film heterojunction can change significantly on the ITO side, which in turn affects the ITO dielectric constant, which changes Si 3 N 4 Effective refractive index of the thin film waveguide. Assuming that the effective refractive index is changed to Δ n, and making the ITO electrode edge waveThe length in the guide direction is λ/(2 Δ n). Destructive interference of two paths of guide molds after beam combination can be realized.
As shown in fig. 1, the pixel level control device is a3 × 3 addressing waveguide array, where the specific parameters of the addressing waveguide array are:
width w =0.28 micron; height h =0.22 μm.
And (3) period: 0.38 microns; duty ratio: 0.4; the number of the grooves is as follows: 20; depth of the groove: 0.05 micron.
Specific parameters of the cross-region coupling grating:
region size L × L:3 micron by 3 micron; region period P × P:8 micrometers × 8 micrometers, transition tilt angle θ:25 deg.
And (3) period: 0.38 micron; duty ratio: 0.4 of the total weight of the mixture; number of pits: 7x7; depth of concave point: 0.05 micron.
The thickness of the ITO positive and negative electrodes used in the Mach-Zehnder interference type optical switch is hundreds of nanometers.
Exemplarily, the chalcogenide phase-change super surface in the embodiment of the present application is set to be Sb in the micrometer scale 2 S 3 And the square array has a simple pixel-level spatial light amplitude regulation function. As shown in fig. 2, si is addressed at 3 x 3 3 N 4 Waveguide arrays are an example. The one-dimensional waveguide arrays { A1B1, A2B2, A3B3} and the one-dimensional waveguide arrays { C1D1, C2D2, C3D3} are mutually vertically staggered to form nine crossed areas. Sb 2 S 3 The square array super-surface also corresponds to a3 × 3 pixel array, and each pixel unit is located right above the cross region.
Suppose Sb is realized 2 S 3 The threshold optical power of single pixel unit crystallization is I g . Taking the regulation of the phase change pixel unit corresponding to the cross-shaped area 11 at the upper left corner as an example, the light intensity is I 00 The visible light pulse signal enters the waveguide array from the A1 port, and after passing through the intersection region 11, the light intensity is changed into I 01 Definition of a (0)<a<1) For the transmittance of light in the waveguide through the crossover region, one can obtain: i is 01 ＝aI 00 . At the same time, in the crossing region, the light pulse in the waveguide is coupled to the spatial light intensity generated in free space via the two-dimensional gratingIs shown as I 02 ＝b(1-a)I 00 Wherein b (0)<b<1) Defined as the grating coupling efficiency. At the same time, the light intensity of the other beam is I 00 The same wavelength incoherent visible light pulse signal enters the waveguide array from the C1 port. When the mode field of two optical pulse signals are overlapped in 11 regions, the total light intensity I coupled to the free space through the two-dimensional grating t ＝2I 02 ＝2b(1-a)I 00 . When I is t ＝I g Then, the corresponding phase change pixel unit can realize crystallization. Since mode field overlap occurs only in the top left-hand cross region on waveguides A1, B1 and C1, D1, and the guided mode light intensity decays in equal proportion as the number of times the light pulse passes through the cross region increases. In regions 12 and 21, the total light intensity It = b (1-a) aI00 coupled into free space via the two-dimensional grating<Ig. In regions 13 and 31, the total light intensity I coupled into free space t ＝b(1-a)aI 00 <I g . At this time, it can be ensured that only the pixel unit at the upper left corner in the 3 × 3 phase-change pixel array meets the optical power requirement for crystallization, and the crystallization operation can be performed. Thus, the independent regulation and control of the phase change pixels are realized. Regions 21, 23 and 32 are similarly modulated for phase change pixels according to the symmetry principle.
Taking the phase change pixel unit corresponding to the control region 12 as an example, the two paths of light intensities are respectively I 00 And I 00 The optical pulse signals of/a enter the waveguide array from the A2 port and the C1 port respectively. At this point, if the spatial light intensity I is coupled into free space in region 12 t ＝2b(1-a)I 00 Crystallization can be achieved for the corresponding phase-change pixel. Then in region 11, a should be guaranteed>50% of the total intensity of light I coupling this region into free space t ＝b(1-a)I 00 /a<I g . At this time, in addition to the crystallization of the region 12, the total light intensity coupled to free space in the other crossing regions (11, 13, 22 and 32) where guided mode transmission exists has I t <I g . Therefore, the independent regulation and control of the phase change pixels are realized. Regions 13, 31 and 33 are similarly modulated with respect to the phase change pixels according to the symmetry principle.
Taking the phase change pixel unit corresponding to the control center crossing region 22 as an example, the two paths of light intensity are I 00 The optical pulse signal of/a enters the waveguide array from the A2 port and the C2 port respectively. At this point, the light intensity I coupled from the region 22 into free space t ＝2b(1-a)I 00 ＝I g Crystallization can be achieved for the phase change pixel cell. While in other cross-over regions (12, 32, 21 and 23) where guided mode transmission is present, the total light intensity coupled into free space is I t <I g . Therefore, the independent regulation and control of the phase change pixels are realized.
Optionally, in the phase change pixel independent crystallization regulation. Mutually incoherent optical pulse signals can also be simultaneously input from four ports of A2, B2, C2 and D2. Taking the phase-change pixel of the control region 22 as an example, let the intensity of the light pulse input from the port be I 00 And/2 a. At this time, spatial light intensity I generated by coupling to free space via two-dimensional grating t ＝2b(1-a)I 00 When I is t ＝I g And a is>At 25%, the corresponding phase change pixel unit can realize independent crystallization control. For large phase change pixel arrays this approach is advantageous to significantly reduce the energy requirements of the input light pulses.
In summary, the crystallization control of the pixels at any position in the phase change super surface of 3 × 3 can be realized by selecting the corresponding waveguide input port and linearly superposing the mode fields in the required intersection region by using the two or four incoherent guided modes with mutually perpendicular propagation directions. In practical application, only one of two phase change control mechanisms of crystallization or crystal removal is selected as pixel level independent dynamic regulation. By taking the invention as an example, during the crystal removal operation, the optical pulses can be simultaneously input from all the ports of the waveguide array, so that the integral crystal removal operation of the phase-change super surface is realized. Thereby realizing the phase change reconstruction cycle regulation and control of crystallization- > crystal removal- > recrystallization.
According to the principle, the independent dynamic control of crystallization is popularized to (2N-1) × (2N-1) pixel arrays. Take the phase change pixel unit corresponding to the two-way light pulse regulation center intersection region NN as an example. When a is N-1 >When 50%, the input light pulse intensity of the two-way port is I 00 /a N-1 The intensity of light I coupled into free space in the region NN t ＝2b(1-a)I 00 ＝I g And independent crystallization control can be realized corresponding to the phase change pixel unit. Similarly, the pixel units corresponding to other cross areas can also realize independent crystallization control.
Example two
The embodiment of the application provides a processing method of a chalcogenide phase change super-surface regulating and controlling device, which is used for processing the chalcogenide phase change super-surface regulating and controlling device of the first embodiment, and the method comprises the following steps:
preparing a silicon oxide buffer layer on a substrate;
etching and preparing patterns of an ITO negative electrode on the surface of the silicon oxide buffer layer;
etching the surface of the silicon oxide buffer layer to form patterns of an addressing waveguide array, a waveguide port coupling grating and a cross region coupling grating, preparing a film according to the patterns of the addressing waveguide array, the waveguide port coupling grating and the cross region coupling grating, and removing photoresist from the film to form the addressing waveguide array, the waveguide port coupling grating and the cross region coupling grating;
etching and preparing patterns of an ITO positive electrode on the silicon oxide buffer layer;
preparing a silicon oxide space layer, preparing a chalcogenide phase change super surface on the silicon oxide space layer, and etching and exposing an ITO negative electrode and an ITO positive electrode.
In the implementation process, the addressing waveguide array, the waveguide port coupling grating and the cross region coupling grating are formed by etching the surface of the silicon oxide buffer layer, so that the high-resolution and rapid regulation and control of the amplitude or the phase of any position of space light can be realized, the regulation and control efficiency is improved, the influence of heat transfer on the phase change uniformity is reduced, the optical characteristics of the chalcogenide phase change super-surface cannot be influenced, and the regulation and control time is shortened.
Further, the step of performing pattern etching and preparation of the ITO negative electrode on the surface of the silicon oxide buffer layer comprises the following steps:
etching the surface of the silicon oxide buffer layer to form an ITO negative electrode pattern;
preparing a first ITO film according to the ITO negative electrode pattern;
and carrying out photoresist removing operation on the first ITO film to form an ITO negative electrode.
In the implementation process, the silicon oxide buffer layer is etched to form an ITO negative electrode pattern, and then photoresist is removed to obtain an ITO negative electrode which can conduct electricity, and the first ITO film can collect light pulses.
Further, the step of performing pattern etching and preparation of the ITO positive electrode on the silicon oxide buffer layer comprises the following steps:
etching the silicon oxide buffer layer to form an ITO positive electrode pattern;
preparing a second ITO film according to the ITO positive electrode pattern;
and carrying out photoresist removing operation on the second ITO film to form an ITO positive electrode.
In the implementation process, the ITO positive electrode is formed, voltage is applied to two ends of the electrode, the carrier concentration of the ITO positive electrode can be obviously changed on the ITO side, the ITO dielectric constant is further influenced, and therefore the effective refractive index of the addressing waveguide array is changed.
Further, the method comprises the steps of preparing a chalcogenide phase change super surface on the silicon oxide space layer, and etching and exposing the ITO negative electrode and the ITO positive electrode, wherein the steps comprise:
preparing a chalcogenide phase change material according to the silicon oxide space layer;
removing glue from the chalcogenide phase change material to form a chalcogenide phase change super surface;
depositing the chalcogenide phase change super surface to form an alumina coating layer;
and etching the aluminum oxide cladding layer to expose the ITO negative electrode and the ITO positive electrode.
In the implementation process, the chalcogenide phase change material is subjected to photoresist removal to form a chalcogenide phase change super surface, an aluminum oxide coating layer is formed through deposition, and the electrode is exposed through etching, so that independent dynamic phase change regulation and control can be performed on pixel units at any position in the chalcogenide phase change super surface.
Further, the silicon oxide buffer layer is flush with the top end of the ITO negative electrode.
In the implementation process, the optical characteristics of the chalcogenide phase change super-surface are not influenced, and the regulation and control time can be shortened.
Further, the silicon oxide buffer layer is flush with the top of the addressing waveguide array.
In the implementation process, the addressing waveguide array is adopted, the addressing method is adopted, the photo-thermal phase change principle is utilized, the influence of heat transfer on the phase change uniformity is reduced, and the rapid and uniform phase change regulation and control can be realized.
The modulated light pulse transmitted in the addressing waveguide array is etched on the grating coupling on the surface of the addressing waveguide array to form a space light pulse with the transmission direction vertical to the plane of the addressing waveguide array, and then the space light pulse is irradiated on the chalcogenide phase-change material to cause the chalcogenide phase-change material to generate phase change in different degrees. In the embodiment of the application, the chalcogenide phase change material does not generate a modulation effect on the propagation characteristics of the optical pulse in the waveguide array, such as amplitude, phase and the like.
Furthermore, the preparation method for preparing the chalcogenide phase change material according to the silicon oxide space layer is magnetron sputtering or thermal evaporation.
In the implementation process, rapid and uniform phase change regulation and control can be realized by adopting a magnetron sputtering or thermal evaporation mode.
Further, the deposition mode of the chalcogenide phase change super surface is atomic layer deposition.
In the implementation process, the chalcogenide phase change super-surface can be effectively protected.
Further, preparing a silicon oxide buffer layer, a silicon oxide space layer and a film by utilizing an ICP-CVD (inductively coupled plasma chemical vapor deposition) process.
In the implementation process, the ICP-CVD process is utilized to prepare the silicon oxide buffer layer, the silicon oxide space layer and the film, so that the method is more convenient and rapid and has high stability.
Alternatively, the thin film prepared according to the patterns of the addressed waveguide array, the waveguide port coupling grating and the cross-region coupling grating may be Si grown by an ICP-CVD process 3 N 4 A film.
The above description is only an example of the present application and is not intended to limit the scope of the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application. It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures.
The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising a … …" does not exclude the presence of another identical element in a process, method, article, or apparatus that comprises the element.
Claims (10)
1. A chalcogenide phase change super-surface conditioning device, comprising:
the device comprises an on-chip switch, an addressing waveguide array, a waveguide port coupling grating and a cross region coupling grating;
the waveguide port coupling grating is connected with the cross region coupling grating through a waveguide port;
the on-chip switch is positioned on the cross area coupling grating;
the addressing waveguide array is connected to the on-chip switch.
2. The chalcogenide phase change super-surface conditioning device according to claim 1, wherein the addressing waveguide array is formed by vertically and alternately forming a plurality of waveguide arrays with two dimensions to form a plurality of cross regions.
3. The chalcogenide phase change super-surface conditioning device according to claim 1, wherein the chalcogenide phase change super-surface is micron-sized Sb 2 S 3 Array of squares, said Sb 2 S 3 The square array super surface is a pixel array, the pixel array comprises a plurality of pixel units, and the pixel units are located right above the cross area.
4. The chalcogenide phase change super-surface conditioning device according to claim 1, wherein the on-chip switches are sequentially from top to bottom: ITO positive electrode, si 3 N 4 A waveguide array and an ITO negative electrode.
5. The chalcogenide phase change super surface conditioning device according to claim 4, wherein Si in the on-chip switch 3 N 4 The guide modes in the waveguide array are equally divided into two paths, half-wave phase delay is generated by adjusting the phase of one path, then beam combination is carried out, and the intensity modulation of the transmitted light intensity of the on-chip switch is realized by utilizing destructive interference of the two paths of coherent guide modes.
6. The chalcogenide phase change super-surface conditioning device according to claim 5, wherein the ITO positive electrode and the Si are enabled by applying a voltage across the ITO positive electrode and the ITO negative electrode 3 N 4 The carrier concentration near the waveguide array changes at the ITO negative electrode side, thereby affecting the ITO negative electrode dielectric constant and changing Si 3 N 4 The effective refractive index of the waveguide array.
7. A method for processing a chalcogenide phase change super surface conditioning device, wherein the method is used for processing the chalcogenide phase change super surface conditioning device of claims 1-6, and the method comprises the following steps:
preparing a silicon oxide buffer layer on a substrate;
etching and preparing patterns of an ITO negative electrode on the surface of the silicon oxide buffer layer;
etching the surface of the silicon oxide buffer layer to form patterns of an addressing waveguide array, a waveguide port coupling grating and a cross region coupling grating, preparing a film according to the patterns of the addressing waveguide array, the waveguide port coupling grating and the cross region coupling grating, and removing photoresist from the film to form the addressing waveguide array, the waveguide port coupling grating and the cross region coupling grating;
etching and preparing patterns of an ITO positive electrode on the silicon oxide buffer layer;
preparing a silicon oxide space layer, preparing a chalcogenide phase change super surface on the silicon oxide space layer, and etching the ITO negative electrode and the ITO positive electrode to expose the ITO negative electrode and the ITO positive electrode.
8. The processing method of the chalcogenide phase change super-surface conditioning device according to claim 7, wherein the step of performing pattern etching and preparation of an ITO negative electrode on the surface of the silicon oxide buffer layer comprises the following steps:
etching the surface of the silicon oxide buffer layer to form an ITO negative electrode pattern;
preparing a first ITO film according to the ITO negative electrode pattern;
and carrying out photoresist removing operation on the first ITO film to form an ITO negative electrode.
9. The processing method of the chalcogenide phase change super-surface conditioning device according to claim 1, wherein the step of performing pattern etching and preparation of the ITO positive electrode on the silicon oxide buffer layer comprises the steps of:
etching the silicon oxide buffer layer to form an ITO positive electrode pattern;
preparing a second ITO film according to the ITO positive electrode pattern;
and carrying out photoresist removing operation on the second ITO film to form an ITO positive electrode.
10. The processing method of the chalcogenide phase change super surface conditioning device according to claim 7, wherein the step of preparing the chalcogenide phase change super surface on the silicon oxide space layer and etching the ITO negative electrode and the ITO positive electrode to expose the ITO negative electrode comprises the steps of:
preparing a chalcogenide phase change material according to the silicon oxide space layer;
removing the glue from the chalcogenide phase change material to form a chalcogenide phase change super surface;
depositing the chalcogenide phase change super surface to form an aluminum oxide coating layer;
and etching the aluminum oxide cladding layer to expose the ITO negative electrode and the ITO positive electrode.
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| EP2957935A1 (en) * | 2014-06-18 | 2015-12-23 | Karlsruher Institut für Technologie | Nanophotonic spatial light modulator |
| CN111999914A (en) * | 2020-08-18 | 2020-11-27 | 华中科技大学 | Method and device for integrating full-dimensional high-speed light field regulation and control |
| CN113376870A (en) * | 2021-05-19 | 2021-09-10 | 杭州电子科技大学 | Space light type electro-optical modulation device based on phase change material and manufacturing method thereof |
| CN113568246A (en) * | 2021-07-12 | 2021-10-29 | 华中科技大学 | Straight waveguide type phase change all-optical Boolean logic device and full-binary logic implementation method thereof |
| CN114942424A (en) * | 2022-07-25 | 2022-08-26 | 苏州旭创科技有限公司 | Laser radar chip and laser radar |
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Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP2957935A1 (en) * | 2014-06-18 | 2015-12-23 | Karlsruher Institut für Technologie | Nanophotonic spatial light modulator |
| CN111999914A (en) * | 2020-08-18 | 2020-11-27 | 华中科技大学 | Method and device for integrating full-dimensional high-speed light field regulation and control |
| CN113376870A (en) * | 2021-05-19 | 2021-09-10 | 杭州电子科技大学 | Space light type electro-optical modulation device based on phase change material and manufacturing method thereof |
| CN113568246A (en) * | 2021-07-12 | 2021-10-29 | 华中科技大学 | Straight waveguide type phase change all-optical Boolean logic device and full-binary logic implementation method thereof |
| CN114942424A (en) * | 2022-07-25 | 2022-08-26 | 苏州旭创科技有限公司 | Laser radar chip and laser radar |
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