CN1154158C - Method for manufacturing semiconductor device in which etching end point is monitored and multi-layer wiring structure formed by the same - Google Patents

Method for manufacturing semiconductor device in which etching end point is monitored and multi-layer wiring structure formed by the same Download PDF

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CN1154158C
CN1154158C CNB981010040A CN98101004A CN1154158C CN 1154158 C CN1154158 C CN 1154158C CN B981010040 A CNB981010040 A CN B981010040A CN 98101004 A CN98101004 A CN 98101004A CN 1154158 C CN1154158 C CN 1154158C
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film
organic insulating
insulating film
metal
photoresist
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CN1193811A (en
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小野寺贵弘
林喜宏
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NEC Corp
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NEC Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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Abstract

To provide a method for detecting an etching termination point, without forming a film for detecting an etching termination point when etching an organic insulating film. When etching a material 1 with a resist formed on the material 1 having an opening pattern 3 being used as a mask, the material 1 and a resist 2 are etched at the same time. At that time, the etching is conducted with an emitted spectrum intensity of a reaction product 7 generated by the reaction between the material 1 and an etching gas being monitored. When the resist 2 is completely removed, the intensity of the reaction product 7 increases sharply. From the sharp increase in the intensity of the reaction product 7, an etching termination point can be known.

Description

The preparation method of semiconductor device
Technical field
The present invention relates to prepare the method for semiconductor device and the Miltilayer wiring structure that forms with this method.The method for preparing semiconductor device of monitoring etch end point and with the Miltilayer wiring structure of the semiconductor device of this method formation when more specifically, the present invention relates to corrode.
Background technology
In the conventional method that forms wire structures, form the through hole that passes organic insulating film between ground floor usually.Through hole is filled with tungsten film.On organic insulating film between ground floor, form continuously with the barrier metal film that constitutes as titanium nitride (TiN)/titanium materials such as (Ti), by the metal line film that constitutes as metal materials such as aluminium, by the anti-reflective film that constitutes as titanium nitride materials such as (TiN) subsequently.Then with the exposure and the formation photoresist figure that develops.
Figure is made mask with photoresist, makes plasma gas with the chlorine serial gas, forms the wiring layer figure with dry etching.Use the CVD method at organic insulating film between the deposit second layer on the substrate then.With organic insulating film between cmp method (CMP method) the complanation second layer.
According to above-mentioned conventional method, there is following problem, the metal line film that must dry etching forms by pure material not, the interlayer organic insulating film is formed on the metal line film pattern of thin space.As a result, in conventional method, because the fine structure of wiring figure increases technical difficulty.
Also have, in the Miltilayer wiring structure that such forming fine wiring figure is arranged, broken string often appears in the vertical coupling part of lower-layer wiring film, tungsten system plug and upper strata wiring membrane.When making the wiring membrane material with aluminium, wiring metal has low relatively electromigration ability to bear, and promptly metallic atom moves in electron stream easily.Therefore because at aluminium wiring metal layer with there is the fillet between the metal closures that the tungsten of high electromigration holding capacity constitutes to produce the space, so broken string often occurs.
In addition, in the hand work of such wiring layer figure, because lower-layer wiring film, tungsten plug and the dislocation of upper strata wiring membrane in the coupling part have increased the probability of broken string.
Also have,, increased the delay of the signal transmission in the wiring layer thus because thin space has increased the electric capacity between the wiring layer figure.Therefore the performance that connects up has become a key factor of decision LSI performance.Press for the dielectric constant that reduces the interlayer organic insulating film thus.
In order to overcome among the LSI these problems that form wiring layer, a kind of like this method has been proposed, under without the situation of dry etching metal line film with wiring metal complete filling wiring layer groove and from the bottom of wiring layer groove to the through hole of lower-layer wiring film.
Figure 1A is the profile of the semiconductor device of the first conventional example to 1H, showed by C.W.Kaanta in " dual-inlaid: a kind of ULSI wiring technique " (VMIC meeting in 1991, June 11-12, the 144-151 page or leaf) disclosed wiring method in wherein forms the burial wiring figure in the interlayer organic insulating film.
Shown in Figure 1A, in the disclosure method, at first be formed directly on the lower-layer wiring film 61 as the silicon oxide film 62 of interlayer organic insulating film 62.Form first photoresist film 63 on interlayer organic insulating film 62, exposure imaging is to form vertical contact hole graph 64 then.
Then shown in Figure 1B, form second photoresist film on first photoresist film 63, exposure imaging is used for wiring layer groove and vertical contact hole to be formed with the second photoresist figure 65 of opening figure 66.
Shown in Fig. 1 C, as etchant gas, as mask, pass the vertical contact hole 67 of interlayer organic insulating film 62 as through hole then with dry etching formation with the first and second photoresist figures 63 and 65 with fluorine gas.At this moment, the control etching time is so that stop corrosion when the middle part of the bottom of vertical contact hole 67 arrival interlayer organic insulating film 62.
The back is shown in Fig. 1 D again, and after etchant gas changed oxygen into, the wiring layer groove figure 66 that is formed in second photoresist film 65 was delivered to first photoresist film 63.When finishing, corrosion removes second photoresist film 65.
Shown in Fig. 1 E, etchant gas 2 changes fluorine gas into then, as mask, forms the vertical contact hole 67 that passes interlayer organic insulating film 62 with first photoresist film 63.Thus, wiring layer groove 66 is delivered on the interlayer organic insulating film 62.At this moment, the control etching time makes the bottom that before has been formed on the vertical contact hole 67 (through hole) in the interlayer organic insulating film 62 arrive lower-layer wiring film 61.
Shown in Fig. 1 F, use O then 2Plasma gas is removed first photoresist film 63 on the interlayer organic insulating film 62.
Shown in Fig. 1 G, form by the metal film 69 that constitutes as metal materials such as aluminium then with the CVD method.At this moment, fill vertical contact hole 67 and the wiring layer groove 68 that passes interlayer organic insulating film 62 with metal material.
At last shown in Fig. 1 H, selectively remove metal film on the interlayer organic insulating film 62 with cmp method, thereby finish Miltilayer wiring structure, wherein be filled with metal material in wiring layer groove and the vertical contact hole.
In the method, advantage is not need the step of meticulous formation metal line film and in the step of organic insulating film between cambium layer on the metal line film of meticulous formation.In addition, being also advantageous in that of this method is owing to fill identical materials, so wiring layer groove and vertically do not have linkage interface between the contact hole in wiring layer groove and vertical contact hole.
In this case, can be by changing the degree of depth of deep etch time control wiring layer groove and vertical contact hole.Because the interlayer organic insulating film is made of inorganic material, and etching mask (photoresist) is made of organic material, so must be used alternatingly at least two kinds of etchant gases such as fluorine serial gas and oxygen.
Japan special permission open (the flat 2-235359 of JP-A-) has proposed to use organic membrane to form second conventional method of Miltilayer wiring structure for the electric capacity that reduces between the wiring figure.In the method, as mentioned above, the silicon oxide film that forms with plasma CVD is used as the interlayer organic insulating film.The relative dielectric constant of silicon oxide film (ε) is about 3.9 to 4.5.Relative dielectric constant ε can be reduced to 3.1 by fluoridize in silicon oxide film (F).But, use organic material such as polyimides etc. as the interlayer organic insulating film owing to be difficult to relative dielectric constant is reduced to below 3.0.
Fig. 2 A uses polyimide film and silicon oxide film to the profile of 2F for the Miltilayer wiring structure in second conventional method that forms Miltilayer wiring structure in the described structure.
At first shown in Fig. 2 A, be formed on the Al wiring layer 72 as the silicon oxide film of organic insulating film between inorganic layer 73.On interlayer organic insulating film 73, form polyimide film 74 with spin-coating method then.
Then shown in Fig. 2 B, on polyimide film 74, form first photoresist film 75, and on first photoresist film 75, form vertical contact hole 76.
Shown in Fig. 2 C, use O then 2Gas forms vertical contact hole 77 as reacting gas with dry etching in polyimide film 74.At this moment, control O 2The etching time of plasma makes 75 ashing simultaneously of first photoresist film and removal on the polyimide film 74.In this case, when between the inorganic layer below manifesting polyimide film 74 during organic insulating film 73, owing to use O 2Plasma is so corrosion stops.
Then, shown in Fig. 2 D, etchant gas changes CF into 4Gas forms the vertical contact hole 77 (through hole) that passes organic insulating film 73 between inorganic layer.
Shown in Fig. 2 E, deposit Al film is to fill vertical contact hole 77 then.Deposit second photoresist film 79 on the Al film is used Cl then 2As etchant gas, by the dry etching composition to form the figure of second photoresist film 78.As mask, in corrosion process, form the Al wiring figure with second photoresist film 78.
At last, use O 2The caustic solution of plasma gas is removed second photoresist film 78.
In above-mentioned two conventional examples, do not describe the details of dry etching in detail.Because corrosion depth is controlled by etching time, from technology stability, also has a lot of problems.
Usually, the Strength Changes of the spectrum launched of the gas that produces according to dry etching is judged etch end point.Japan special permission open (the flat 3-12927 of JP-A-) discloses plants known typical method, herein as the 3rd conventional method.
In this conventional method, when reacting with the TiN that will corrode, produce reacting gas as etchant gases such as chlorine serial gas.Produce the spectral intensity of the light that gas launches at 410nm monitoring reaction in the 420nm scope, luminous quantity reduces when corrosion finishes, and detects the variation of spectral intensity.
In open (the flat 3-12927 of JP-A-) the disclosed conventional example of Japan special permission, direct detection etchant gas and want the reacting gas that reaction produced luminous between the gas of corrosive film.On the other hand, known another method will be added in the etchant gas another gas that corrosion is not directly contributed.Generate between the gas with reaction and interact by adding gas, monitoring interpolation gas luminous spectral intensity, survey etch end point with this.Japan special permission open (the flat 4-287919 of JP-A-) discloses such method, herein as the 4th conventional example.
In document (the flat 4-287919 of JP-A-), organic membrane such as composition such as photoresist film.In such known method, with the O that contains nitrogen 2Plasma is as etchant gas.O 2The generated reactive gas that gas and organic membrane reaction produce is a carbon monoxide.Do not survey carbon monoxide luminous spectral intensity, but when having carbon monoxide to exist nitrogen luminous intensity reduce, survey etch end point according to this phenomenon.Like this, known have other gas is added the method that etchant gas is surveyed etch end point.
Japan special permission open (the flat 6-232090 of JP-A-) discloses 5 constant virtues rule example, and is wherein, very little as the corroded area that passes oxidation film formation contact hole.At this moment, the amount of the generated reactive gas that the reaction between etchant gas and the corrosion part produces is less, thus be difficult to detect generated reactive gas the reduction of luminous spectral intensity.
Fig. 3 A and 3B are another conventional examples, wherein, and with comprising that the multilevel resist film of two kinds of photoresist films forms the contact hole that passes silicon oxide film.
At first, as shown in Figure 3A, on silicon substrate 81, form silicon oxide film 82, on silicon oxide film 82, form the multilevel resist film.The multilevel resist film comprises orlop photoresist film (first photoresist film) 83, sog film (second photoresist film) 84, the superiors' photoresist film (the 3rd photoresist film) 85.Measure the ratio of the corrosion rate of the corrosion rate of silicon oxide film and the superiors' photoresist film 85 in advance.Then, when forming the multilevel resist film, adjust the film thickness of the superiors' photoresist film 85, so that corrosion and removal the superiors photoresist film 85 manifest sog film 84 when the corrosion of silicon oxide film stops.The opening 86 of this multilevel resist film is passed in formation.
Shown in Fig. 3 B, use then as CF 4Plasma begin dry etching.At this moment, corrode the superiors' photoresist film 85 in the multilevel resist film simultaneously, and corrode that part of silicon oxide film 82 that comes out from the opening 86 of multilevel resist film.In this case, the O that comprises of the generated reactive gas that reaction produced of the superiors' photoresist film 85 of constituting of organic material 2Seldom, thus oxygen the spectral intensity of luminous (437nm) very weak.When corroding the superiors' film 85 fully, corrode the silicon oxide film 82 under the opening 86 fully.
Begin to corrode sog film 84 subsequently as second photoresist film.When beginning to corrode mainly the sog film 84 that constitutes by oxygen and silicon, in the plasma gas oxygen luminous spectral intensity grow.The moment that luminous intensity increases is etch end point.
Promptly in this routine example, there are two kinds of photoresist films of different luminescent spectrum intensity to be formed on the silicon oxide film 82 as the material that will corrode.When the corrosion photoresist film, utilize the difference of spectral intensity to survey etch end point, to form figure 87.
For the surface of complanation organic insulating film, this method of surveying etch end point with film can be used for the deep etch method.
Japan special permission open (the flat 2-310921 of JP-A-) discloses the 6th conventional example, wherein, to shown in the 4C, when being used for the expendable film of complanation during with deep etch film surface, surveys the deep etch terminal point as Fig. 4 A.
At first shown in Fig. 4 A, be formed on the field oxide film 91 as the silicon nitride film 92 of surveying etch end point.In this embodiment, the material of field oxide film 91 for corroding.The air spots of field oxide film 91.
Shown in Fig. 4 B, on etch end point detection membrane 92, form SOG layer 93 (silicon oxide film), then to form smooth surface.This substrate is put into the RIE system, use CHF 3Carry out deep etch as etchant gas.
In the starting stage of corrosion, shown in Fig. 4 C, because CHF 3Etchant gas and sog film 93 reaction as expendable film produce CO and CO 2As the corrosion reaction product.Carrying out along with reaction shows the silicon nitride film as the etch end point detection membrane.At this moment, CHF 3The amount of reacting the CO that is produced with sog film 93 reduces.
By being located at the spectrometer on the RIE equipment, monitoring corresponding to CO the variation of spectral intensity of luminous wavelength, thereby survey the exposure of etch end point detection membrane 92, and survey the deep etch terminal point.
In the method, to form the etch end point detection membrane on the field oxide film of complanation.
In addition, Japan special permission open (the flat 3-122295 of JP-A-) discloses the 7th conventional example, wherein, in the dry etching device, survey the luminous variation of spectral intensity from the plateau to the attenuation state determine etch end point, will be than the intensity of the low predetermined extent of plateau intensity as being offset intensity.But in this routine example, how explanation does not carry out dry etching.
Above-mentioned conventional example has following problem.
In the first conventional example, in wiring layer groove and vertical contact hole, form metal film simultaneously.Its advantage do not need to be to form the required dry etching step of the figure of fine metal wiring layer and in the step of organic insulating film between cambium layer on the forming fine wiring layer pattern.
Also have, in the first conventional example, the vertical contact hole graph of first photoresist film and the wiring layer groove figure of second photoresist film are delivered on the interlayer organic insulating film with dry etching.For this reason, owing to use silicon oxide film as the interlayer organic insulating film, so the number of transitions of etchant gas is more.And because according to etching time control etching extent, so do not survey the function of etch end point.
More specifically, in the first conventional example, at first be delivered on the interlayer organic insulating film with the vertical contact hole graph of chlorine serial gas with first photoresist film.Then use O 2Plasma gas is delivered to the figure of the wiring layer groove of second photoresist film on first photoresist film.And, replace O with the Cl serial gas 2Plasma gas is delivered to the figure of wiring layer groove on the interlayer organic insulating film.At this moment, with being delivered to the figure of the wiring layer groove on first photoresist film as mask.Use O at last again 2Plasma gas is removed first photoresist film.Need like this by following order conversion etchant gas: Cl serial gas → O 2Serial gas → Cl serial gas → O 2Serial gas.
Also have, in conventional method, there is following problem, formed thereon and formed before second photoresist film on first photoresist film of vertical contact hole graph, unless at high temperature first photoresist film is toasted for a long time, otherwise owing to is partly dissolved vertical contact hole graph distortion.
And, in conventional method, need in second photoresist film on the vertical contact hole graph of first photoresist film, form wiring layer groove figure.Thus, the width of wiring layer groove figure is bigger than the diameter of vertical contact hole.Therefore, there is following problem, promptly must be at such design configuration of design phase, the width that makes the wiring layer groove is at least greater than the diameter of vertical contact hole.In addition, must design spacing wideer in the design phase at least.
Usually, lower-layer wiring film and upper strata wiring membrane on it are vertical becomes lattice-like or lattice-shaped.In other words, if the lower-layer wiring film pattern has predetermined space in vertical direction, then wiring membrane figure in upper strata has predetermined space in the horizontal direction.At organic insulating film between insert layer between lower-layer wiring film and the upper strata wiring membrane, make it to separate with lower-layer wiring figure three-dimensional.Upper strata wiring membrane figure intersects with the lower-layer wiring film pattern.
Under normal conditions, on the interlayer organic insulating film, form the metal line film that constitutes by metals such as aluminium, in exposure and development step, required photoresist film is formed on the metal line film.Because photoresist film is formed on the metal line film with exposure, so allow to ignore the reflection of lower-layer wiring film.In routine wiring step, on the metal line film, form by the antireflection film that constitutes as anti-reflection materials such as titanium nitrides usually after, the exposed metal wiring membrane.
On the other hand, in the first conventional example, on the interlayer organic insulating film, form in the step of exposure of photoresist figure, owing to form the metal line film afterwards with vertical contact hole (through hole) at formation wiring layer groove, so need to consider the reflection of lower-layer wiring film.But, in the first conventional example, in exposure process, can not consider the reflection of lower-layer wiring film.
Also have, when the top layer wiring membrane being used this burial wiring film, need provide the welding disking area that is connected with the external unit of semiconductor chip.In the encapsulation of semiconductor chip, provide solder bump to pad or on pad with aluminium or gold wire bonding.If select copper as the metal of burying in the wiring layer groove, then connection pads is made of copper.At this moment, owing to form the oxidation film of copper on the surface of copper pad, such method is unreliable.
In order to prevent these problems, need form on the surface of pad is not the metal film as metals such as aluminium formation of copper.
In the second conventional example, the organic membrane that constitutes with the polyimides that comprises low-k and the stacked organic insulating film of silicon oxide film are as the interlayer organic insulating film.At this moment, the vertical contact hole graph that only will be formed in first photoresist film is delivered on the stacked organic insulating film.Corrode photoresist film and polyimide film simultaneously, and control etching time simultaneously.But the not explanation of surveying about etch end point.Therefore, after first photoresist corroded fully, polyimide film may excessive erosion.And corrosion rate may change.In this case, there is reliability problems in the figure that forms by the control etching time.
In the first and second conventional examples, according to etching time control corrosion depth.In the 3rd conventional example, when with the Cl serial gas as etchant gas, and with photoresist figure as mask, when corroding the TiN film fully, the light emitted spectral intensity of generated reactive gas of monitoring TiN corrosive film and the reaction generation of etchant gas.As a result, when finishing the corrosion of corrosive film, luminous spectral intensity reduce.The variation of monitoring spectral intensity is to survey etch end point.
As the interlayer organic insulating film, form the wiring layer groove with the organic insulating film of low-k therein, in this case, the reaction generation material (as CO) that monitoring oxygen gas plasma and organic insulation film reaction are produced luminous spectral intensity.But, owing to organic insulating film between organic layer is arranged in the bottom of wiring layer groove, survey less than the variation of luminous spectral intensity.Therefore, as mask, in organic insulating film, form under the situation of wiring layer groove at film with photoresist, do not wish to use reaction generation material that monitoring corrosive film and etchant gas reaction produced the method for reduction of luminous spectral intensity.That is, under the wiring layer groove is formed at situation in the organic membrane of low-k, do not use the detecting light spectrum intensity that etches of corrosive film to reduce the method that changes.
As mentioned above, even in the 4th conventional example, that utilizes interpolation gas and generated reactive gas reacts to each other organic insulating film between the still residual organic layer in the bottom of wiring layer groove.Therefore do not observe any variation of luminous spectral intensity.
In the rule example of 5 constant virtues, on corrosive film, be formed with the multilevel resist film of different luminescent spectrum strength characteristicies, can easily survey etch end point.In the method, the reaction of monitoring by etchant gas and multilevel resist film, from the multilevel resist film the variation of luminous spectral intensity.Therefore, though since organic layer between organic insulating film remain in the bottom of wiring layer groove, and make the institute luminous spectral intensity do not have the variation situation under, also can survey etch end point.But in this routine example, still have following problem, that is,, make cost increase owing to must on organic insulating film between organic layer, form the multilevel resist film.
The same with 5 constant virtues rule example, in the 6th conventional example, problem is to have increased number of steps, and this is because will form the film of surveying etch end point on field oxide film.
Summary of the invention
Therefore in order to address the above problem, finished the present invention.Monitor the method for preparing semiconductor device of etch end point and the Miltilayer wiring structure that forms with this method when therefore, the purpose of this invention is to provide corrosion.
Another object of the present invention provides a kind of method of semiconductor device and Miltilayer wiring structure that forms with this method of preparing, in this method, the organic insulating film of low-k can be used as the interlayer organic insulating film, and the wiring layer groove can be formed on the organic insulating film with vertical contact hole (through hole).
An also purpose of the present invention provides a kind of method of semiconductor device and Miltilayer wiring structure that forms with this method of preparing, and can survey etch end point under the situation that does not form stacked photoresist film in this method.
An also purpose of the present invention provides a kind of method of semiconductor device and Miltilayer wiring structure that forms with this method of preparing, in this method, when copper film is buried in the wiring layer groove the inside that forms, selectively form the anti-oxidation metal film on the chip bonding pad surface in the outermost tunic of LSI.
An also purpose of the present invention provides a kind of method for preparing semiconductor device, wherein, when exposure, utilize the local reflex of through hole plug, in self aligned mode, the wider width of the wiring layer groove that forms provides the connection nargin between through hole and the wiring layer groove thus, increases the reliability that vertical contact layout connects.
In order to realize purpose of the present invention, the invention provides a kind of method for preparing semiconductor device, comprise following step: on second organic insulating film, form first organic insulating film; Form first photoresist film on said first organic insulating film, making in said first photoresist film has first opening portion, by said first organic insulating film of the said first opening portion expose portion; Use the etchant gas that can corrode said first photoresist film and said first organic insulating film, while said first photoresist film of dry etching and said first organic insulating film, described etchant gas is the mist of fluoride gas and oxygen, and the ratio of component of oxygen is 10% to 60%.
In order to realize purpose of the present invention, the present invention also provides a kind of method that forms bonding welding pad, comprises the following steps: to form in the organic insulating film of upper strata the bonding welding pad groove; On the organic insulating film of described upper strata, form the first metal layer; On described the first metal layer, form the second anti-oxidation metal level; Described first and second metal levels are removed on surface from the organic insulating film of described upper strata, make bonding welding pad stay in the described bonding welding pad groove, and wherein in bonding welding pad, described second metal level is formed on the described the first metal layer.
In order to realize purpose of the present invention, the present invention also provides a kind of semiconductor device with Miltilayer wiring structure, and wherein, a bonding welding pad is embedded in the described Miltilayer wiring structure, and described bonding welding pad comprises: the first metal layer; The second anti-oxidation metal level that on described the first metal layer, forms.
In order to realize purpose of the present invention, the present invention also provides a kind of method that forms wiring route, comprises the following steps: to form on the antireflection film of low wiring route first organic insulating film; Form metal closures by metal being embedded in the hole that is formed on described first organic insulating film; Form second organic insulating film; Form lithography layer; Utilize the reflection on described metal closures surface to come the width of the resist pattern of local expansion wiring wire casing, make it be wider than expose portion; Use described wiring wire casing resist pattern as mask, in described second organic insulating film, form described wiring wire casing; Deposition one metal level is filled described wiring wire casing on described second organic insulating film; And, make described metal level stay in the described wiring wire casing from the described metal level of described second organic insulating film removal.
In order to realize purpose of the present invention, the present invention also provides a kind of semiconductor device with wire structures, comprising: be formed on first organic insulating film on the antireflection film of lower wiring line; Second organic insulating film on described first organic insulating film; The metal closures that in described first organic insulating film, forms; And the metal level that in the wiring wire casing of described second organic insulating film, forms; Wherein, described metal level have with a zone of on described first metal closures, passing through at described metal level the identical width of diameter of first described metal closures, this width than the described diameter wide 20% of described first metal closures or still less and described metal level have width or length, and this width than on described second metal closures, long or wide 20% or still less corresponding to the described diameter of second described metal closures in the zone of the end of described metal level.
Description of drawings
Figure 1A is the profile of the wire structures among the preparation technology of the first conventional example to 1H;
Fig. 2 A is the profile of the wire structures among the preparation technology of the second conventional example to 2F;
Fig. 3 A and 3B are the profiles of the wire structures among the preparation technology of the 3rd conventional example;
Fig. 4 A is the profile of the Miltilayer wiring structure among the preparation technology of the 4th conventional example to 4C;
Fig. 5 A is the profile of the semiconductor device during corrosion among the preparation method of first embodiment of the invention to 5D;
Fig. 6 A and 6B are the profiles according to the semiconductor device in when corrosion among the preparation method of the distortion of first embodiment of the invention;
Fig. 7 A is the profile of the Miltilayer wiring structure in first embodiment of the invention preparation method's the instantiation to 7M;
Fig. 8 A is the profile of the Miltilayer wiring structure in second embodiment of the invention preparation method's the instantiation to 8C;
Fig. 9 A is the profile of the Miltilayer wiring structure in third embodiment of the invention preparation method's the instantiation to 9F;
Figure 10 is the plane graph of the semiconductor device among the fourth embodiment of the invention preparation method;
Figure 11 A and 11B are that Miltilayer wiring structure in fourth embodiment of the invention preparation method's the instantiation is respectively along the profile of A-A line and B-B line;
Figure 12 A and 12B are that Miltilayer wiring structure in fourth embodiment of the invention preparation method's the instantiation is respectively along the profile of A-A line and B-B line;
Figure 13 A and 13B are the profiles of the Miltilayer wiring structure in fourth embodiment of the invention preparation method's the instantiation;
Figure 14 is corrosion rate and O 2The curve chart of the relation between the ratio of component in etchant gas;
Figure 15 is the schematic diagram that is used for corroding chamber of the present invention;
Figure 16 be Si the schematic diagram of measurement result of relation of the spectral intensity of luminous (442nm) and etching time.
Embodiment
Describe semiconductor device of the present invention below with reference to accompanying drawings in detail.
The semiconductor device that Miltilayer wiring structure is arranged according to first embodiment of the invention at first is described.
In the first embodiment of the present invention, deep etch photoresist film and corrosive film are delivered to the photoresist figure on the film that will corrode simultaneously.At this moment, in monitoring corrosive film and the etchant gas generated reactive gas that reaction produced of at least a component luminous spectral intensity.All remove the photoresist films on the corrosive films so that moment of increasing suddenly of luminous spectral intensity judge the terminal point of deep etch.Adjust or control photoresist film and the ratio of the corrosion rate of corrosive film and the thickness of photoresist film the feasible opening figure that may in corrosive film, be formed with desired depth.That is, photoresist film is inversely proportional to the ratio of photoresist film with the corrosion rate of corrosive film with the ratio of the film thickness of corrosive film.Thus, when finishing the corrosion of photoresist film, can form the hole of passing corrosive film.
For said method being used for preparing the method for the semiconductor device that organic insulating film is arranged, in advance inorganic substances are added in the organic insulating film that will corrode.On organic insulating film, form the photoresist figure by exposure.Corrode photoresist figure and organic insulating film simultaneously, to remove photoresist film.As a result, show the whole surface of organic insulating film, make it the figure identical with the photoresist figure.
Therefore, monitoring etchant gas and the generated reactive gas material that reaction produced that adds the inorganic substances in the organic insulating film luminous spectral intensity, determine etch end point according to the variation of spectral intensity.
In this mode,, need on organic insulating film, not form the film of surveying etch end point according to the preparation method of first embodiment.Therefore the processing time can be shortened.
In addition, if adjust the thickness of photoresist film, can be formed with the wiring layer groove of desired depth with better repeatability, the bottom of the wiring layer groove of formation is in organic insulating film.
Also have, corrode organic insulating film and photoresist film simultaneously, on organic insulating film, to form the figure identical with photoresist film.Therefore, wish with a kind of gas that can corrode organic insulating film and photoresist film simultaneously.So do not need the conversion etchant gas, significantly reduced semiconductor device preparation method's step.
And after forming through hole, this via bottoms forms the wiring layer groove that passes through hole at the middle part of interlayer organic insulating film with corrosion.Then, when the wiring layer groove is formed in the interlayer organic insulating film, digs deep via and make its bottom arrive the lower-layer wiring film.For this reason, do not need on the interlayer organic insulating film to form any comprise first photoresist film that will form via hole image, with the stacked photoresist film that will form second photoresist film of wiring layer groove figure.
Describe the Miltilayer wiring structure of the first embodiment of the present invention in detail to 5D below with reference to Fig. 5 A.An example will be described here, and wherein, the corrosion rate of photoresist film 2 is identical with the corrosion rate of the film 1 that will corrode.
At first shown in Fig. 5 A, photoresist film 2 is added on the corrosive film 2.In this case, adjust add the film thickness 4 of photoresist film 2, make the thickness 4 of photoresist film 2 equal the desired depth of the opening that will in corrosive film 1, form.Subsequently, in exposure and development step, on photoresist film 2, form opening figure 3.
Then shown in Fig. 5 B, carry out dry etching in plasma chamber, employing can be corroded the etchant gas of corrosive film 1 and photoresist film 2 simultaneously.
Figure 15 is the block diagram of plasma etching of the present invention chamber 5.Semiconductor device 106 places on the table top 104.Produce plasma by power supply 102 usefulness electrodes 105 and table top 104.To discharge in the etchant gas introducing plasma etching chambers 5 108 and from outlet 109.Monitor 107 monitoring reactions produce material luminous spectral intensity.Controller 101 receives the monitoring result of monitor 107 and controls power supply 102, stops corrosion when luminous spectral intensity changes when detecting.
In plasma gas, contain a large amount of photoresist film 2 and react the first generated reactive gas material that produces, because corrosive film 1 is almost covered by photoresist film 2 with etchant gas.
Then shown in Fig. 5 C, when corrosion is proceeded, contain a large amount of corrosive film 1 in the plasma gas and react the second generated reactive gas material that produces with etchant gas.At this moment, remove photoresist film 2 fully, make and want the surface of corrosive film 1 all to manifest.Monitor the second generated reactive gas material 7 luminous spectral intensity.
At last, shown in Fig. 5 D, pass through the unexpected variation of luminous spectral intensity judge etch end point.In corrosive film 1, be formed with thus desired depth as openings such as groove or hole 8.And, when corrosion finishes, also removed photoresist film 2 simultaneously fully.Therefore after etching, just no longer need to remove any photoresist film.
Below with reference to the method that prepare semiconductor device of Fig. 6 A and 6B explanation according to the remodeling of first embodiment of the invention.
In the remodeling of the first embodiment of the present invention, the step that repeats Fig. 5 A to 5D twice forms first opening portion and second opening portion.In this example, wanting on lower membrane 9 forms first opening portion and second opening portion in the corrosive film 10.
At first as shown in Figure 6A, photoresist film 2 is added on the film 10 that is formed with first opening portion 11 on it.With exposing and being developed in the figure that forms the second opening portion 12a and 12b in the photoresist film 2.When used etchant gas makes photoresist film with film 10 identical corrosion rate be arranged, make the thickness of photoresist film 2 equal the distance of the bottom of first opening portion 11 to lower membrane 9.
Then, carry out dry etching method with corroding the etchant gas of photoresist film 2 simultaneously with film 10.At this moment, be formed on the surface of film 10, form the second opening portion 13a from the surface of film 10 with being formed at the second opening portion 12a in the photoresist film 2.On the other hand, be formed on first opening portion 11 of film 10, forming the second opening portion 12b of photoresist film 2.At this moment, the surface from film 10 forms the second opening portion 13b, the bottom of corroding first opening portion 11 simultaneously.Shown in Fig. 6 B, proceed corrosion, when the bottom of first opening portion 11 arrives lower membrane 9 surperficial, photoresist film 2 is removed fully from film 10.In order to survey etch end point, promptly moment of increasing suddenly of luminous spectral intensity, monitoring etchant gas and film 10 react the generated reactive gas material that produced luminous spectral intensity.At etch end point constantly, finish dry etching.
Consider the consistency of dry etching direction, the generated reactive gas material after luminous spectral intensity increases suddenly, continue the corrosion scheduled time (excessive erosion) usually.Like this, in above-mentioned steps, formed the second opening portion 13a from the surface of film 10 and arrived the second opening portion 13b of lower membrane 9 from first opening portion 11.
Below with reference to the instantiation of Fig. 7 A to the Miltilayer wiring structure of 7M explanation first embodiment of the invention.In first embodiment, on containing, form wiring layer groove and through hole as organic insulating films such as silicon as the inorganic substances of wanting corrosion material.With metal film while filling wiring layer groove and through hole, form wiring and connect.
At first, shown in Fig. 7 A, on silicon semiconductor substrate 14, form MOSFET, separate MOSFET with slot type element isolation zone 15.On the polysilicon gate 17 that titanium silicide film 16 is formed on the diffusion layer 18 of MOSFET and centers on by the sidewall organic insulating film.On MOSFET, form the thick hot CVD silicon oxide film (not shown) of about 50nm, in addition, form boro-phosphorus glass film (bpsg film) 19 as the gettering film with the plasma CVD method.Bpsg layer 19 after about 10 seconds, is used chemico-mechanical polishing (CMP) method graduation bpsg film with lamp annealing at 800 ℃.Also have, on bpsg layer 19, form the thick silicon oxide film (not shown) of about 50nm with the plasma CVD method.
Then shown in Fig. 7 B, in bpsg layer 19, form contact hole 20.At this moment, as etchant gas, carry out dry etching method, stop dry etching by the silicon nitride film that places bpsg layer 19 bottoms with the serial etchant gas of the fluorine of additional CO.Removal is deposited on the organic membrane of conduct corrosion stopper film on the silicon nitride, and removes the hot CVD silicon oxide film on the titanium silicide film 16, and this titanium silicide film 16 places on diffusion region 18 and the polysilicon gate 17.
Then shown in Fig. 7 C, form the barrier metal film (not shown) that constitutes by the Ti/TiN stacked film with collimated sputtering method (collimate sputtering method) after, with CVD method formation tungsten film.Select to remove the tungsten film on the bpsg film 19 subsequently, to form the tungsten plug.
Then shown in Fig. 7 D, form DVS-BCB film 22 as siliceous organic insulating film with spin-coating method, the DVS-BCB film can be buied from Dow Chemical company, and its product is called " cyclotene ".DVS-BCB film 22 is made of phenyl ring, 4 yuan of carbocyclic rings and silicon, is the organic insulating film that low-k is arranged.On DVS-BCB film 22, form photoresist film 23.
Figure 14 represents when with ecr plasma corrosion device shown in Figure 15, O 2With the ratio of component of etchant gas to the corrosion rate of photoresist film 23 and influence to the corrosion rate of DVS-BCB film 22.In this embodiment, the pressure of control etchant gas is that 2.5mTorr, RF power are 200W, uses CHF 3And O 2As etchant gas.O 2Ratio of component is 10 to 50% o'clock, and the corrosion rate of DVS-BCB film 22 is identical with the corrosion rate of photoresist film 23.
In the present invention, should be noted that and work as O 2Ratio of component is 10 to 60% o'clock, and DVS-BCB film 22 can have identical corrosion rate with photoresist film 23.If but O 2Ratio of component surpasses at 20% o'clock, and the shape of photoresist figure can form taper.Therefore wish control O 2Ratio of component be equal to or less than 20%.
In order to corrode silicon contained in the organic insulating film, etchant gas must oxygenous and fluorine serial gas.Experiment showed, and use CHF 3-O 2-Ar, CF 4-O 2, CF 4-O 2-Ar, SF 6-O 2, C4F 8-O 2-Ar or SF 6-O 2-Ar is during as etchant gas, and DVS-BCB film 22 is identical usually with the corrosion rate of photoresist film 23.The film thickness that therefore photoresist film 23 is set equals the thickness of DVS-BCB film 22.For example, the thickness of design DVS-BCB film 22 is 500 to 800nm, and the thickness of photoresist film 23 also is designed to 500 to 800nm.On photoresist film 23, form wiring layer groove figure as first opening figure.
Then shown in Fig. 7 E, in the ecr plasma chamber with identical speed deep etch DVS-BCB film 22 and photoresist film 23.Etching condition is as follows: the pressure of etchant gas is controlled to be 2.5mTorr, 80% CF3 and 20% O 2Mist as etchant gas, RF power is controlled to be 200W.The thickness of attenuate photoresist film 23 corrodes the DVS-BCB film 22 under wiring layer groove 24 figures simultaneously.In DVS-BCB film 22, form the first wiring layer groove 25 thus as first opening.
At this moment, monitoring Si-F plasma gas luminous spectral intensity.Si-F is silicon in the DVS-BCB film 22 and the CHF in the etchant gas 3The reaction that reaction is produced produces material.It is not that reaction by etchant gas and photoresist film 23 is produced that reaction produces material.Be Si-F luminous spectral intensity very weak, this is because in corrosion starting stage, the cause that nearly all surface portion of DVS-BCB film 22 is covered by photoresist film 23.
Proceed when removing photoresist film 23 fully when corrosion, the surface of DVS-BCB film 22 manifests fully.Thus, corresponding Si-F luminous (436nm), Si the spectral intensity of luminous (442nm) increase suddenly.When determining the unexpected increase of spectral intensity that Si-F is luminous is etch end point, and stops corrosion.That is, the thickness that photoresist film 23 is set equals the thickness of DVS-BCB film 22, with identical speed while deep etch photoresist film 23 and DVS-BCB film 22.Wiring layer groove 25 penetrates DVS-BCB film 22 thus, and arrives tungsten plug 21 when complete erosion removal photoresist film 23.
Figure 16 represent Si the spectral intensity of luminous (442nm) and the relation of etching time.When removing photoresist from the DVS-BCB film and beginning general corrosion DVS-BCB film, the spectral intensity increase of Si institute luminous (442nm).This point is shown among Figure 16, as change point A.By surveying change point A, can determine etch end point.In fact, behind the change point A a period of time as 10 seconds after 30 seconds, just be defined as etch end point this moment.
At this moment, owing to come composition DVS-BCB film 22 with oxygen containing plasma, oxide-film is formed on the surface of lower floor's tungsten plug 21.For this reason, after the corrosion of finishing DVS-BCB film 22, wish with only containing CHF 3Or the etchant gas of Ar removes surface film oxide.Perhaps, removed the lip-deep oxide-film of lower membrane in about 30 seconds with organic rinsing liquid (" remover 710 " of stripper as buying from TOKYO OHKA KOGYO Co Ltd.) rinsing, this lower membrane is by constituting as materials such as Al, W, Cu, TiN.By the rinsing of organic rinsing liquid, also rinsing the surface of DVS-BCB film 22.Even the part photoresist film remains on the DVS-BCB film 22, also can remove this part photoresist with this surface rinsing.
For instantiation, use O 2(10%)-CHF 3(90%) plasma gas is with identical corrosion rate deep etch photoresist film 23 and DVS-BCB film 22 (pressure: 1 arrives 10mTorr, RF power: 100 arrive 250W, underlayer temperature: 40 to 60 ℃), to form wiring layer groove figure.Subsequently, use CHF 3Plasma gas is with the oxide-film corrosion 30 seconds (pressure: 1 arrives 10mTorr, RF power: 100 arrive 250W, underlayer temperature: 40 to 60 ℃) on lower floor conducting film surface.Use organic stripper " remover 710 " rinsing 30 seconds then, use MEK (methyl ethyl ketone) liquid rinse 30 seconds, with IPA (isopropyl alcohol) rinsing 60 seconds, organic rinsing was carried out in the water flushing in 10 minutes.Wish to use and do not dissolve the organic liquid of organic insulating film as organic rinsing liquid.Remove the DVS-BCB membrane material with, organic insulating film such as polyimides between outer organic layer, polyester and as materials such as fluoride resin such as " Teflon " can be used as organic insulating film, be used for composition, these materials can be buied from Dupon.
Then shown in Fig. 7 F, the TiN film that Ti film that 10nm is thick and 50nm are thick forms the barrier film 26 of the MOSFET of lower floor.Form copper film 27 with the hot CVD method then, to fill the first wiring layer groove.This moment, the underlayer temperature during control growing was 70 ℃ to 250 ℃, and the thickness of the copper film that control is grown is 800nm.Annealed 10 minutes for 250 ℃ to 300 ℃ in a vacuum, to strengthen the coupling between copper film 27 and the barrier film 26.
Shown in Fig. 7 G, after the annealing, carry out finishing method (CMP) with chemistry and remove copper film 27 and barrier film 26, the silica granule in the wherein used polishing liquid diffuses in the pure water that is added with oxidation materials such as hydrogen peroxide.The result forms first wiring layer 27, and wherein copper film is filled the first wiring layer groove.
At this moment, the CMP condition of copper is: controlled pressure is 0.1kg/cm 2Below.The first step is polished about 500nm as the stacked dish of the IC1000/SUB400 that buys from Rodel-Nita with copper film with hard polishing disk.Second step, the copper film polishing of about 30nm that the MH35S that buys with soft polishing disk such as Rodel-Nita will be left.
After the polishing, scrub the removal polishing liquid with electrolytic ionic water.Subsequently, on forming, in the exposure process of wiring layer, form the antireflection film 28 of the reflection that prevents first wiring layer.Form the thick silicon nitride film of 50nm with plasma CVD.
Then shown in Fig. 7 H, form the thick DVS-BCB film 22 of 1000nm, form photoresist film 23 then, wherein the figure of through hole 29 is as second opening figure.In this embodiment, selecting the thickness of photoresist film 23 is 500nm.
Then shown in Fig. 7 I, in the ecr plasma chamber, with identical corrosion rate deep etch DVS-BCB film 22 and photoresist film 23, in this chamber, control as etchant gas by 80% CHF 3With 20% O 2The pressure of the mist that constitutes is 2.5mTorr, and the power of control RF is 200W.In the deep etch process, the light emission of monitoring Si-F, Si-F is that etchant gas produces material with the reaction that pasc reaction produced that is contained in the organic insulating film.
The through hole 30 that forms the degree of depth and be 500nm in DVS-BCB film 22 is as second opening.At this moment, according to Si-F the increase of luminous spectral intensity survey the moment of removing photoresist film fully.The bottom of through hole 30 is in DVS-BCB film 22.
Then shown in Fig. 7 J, form photoresist film 23, made wiring layer groove figure be used as the 3rd opening 31a and 31b.Wiring layer groove 31b passes through on through hole, and wiring layer groove 31a is formed on the zone that does not form wiring layer groove 31b in the photoresist film 23.In this embodiment, to be formed with 500nm thick for photoresist film 23.Wide by 20% when the wiring layer groove 31b on the through hole designs than design, wiring layer groove 31b is accurately passed through on through hole.This is because if the wiring layer groove is not formed on throughhole portions, then in this subregion, photoresist film 23 remains in the through hole 30, makes actual the diminishing of size of through hole.
Then shown in Fig. 7 K, in the ecr plasma chamber with identical corrosion rate deep etch DVS-BCB film 22 and photoresist film 23.In this chamber, control as etchant gas by 80% CHF 3With 20% O 2The pressure of the mist that constitutes is 2.5mTorr, and the power of control RF is 200W.In the deep etch process, the luminescent spectrum intensity of monitoring Si-F, Si-F is that etchant gas produces material with the reaction that pasc reaction produced that is contained in the organic insulating film.
DVS-BCB film 22 below the wiring layer groove 31a of corrosion photoresist film 23 is to form the second wiring layer groove 32a.Simultaneously, corrosion makes it to arrive antireflection (antireflection) film 28 as the bottom of the through hole 31b of the second wiring layer groove 32b.And, at this moment, survey Si-F moment of increasing of luminous spectral intensity, as the moment of removing photoresist film 23 fully, i.e. etch end point.
When with 80% CHF 3With 20% O 2Mist during as etchant gas, continuous corrosion antireflection film 28 about 50nm make the bottom of through hole arrive the surface of first wiring layer 27.When this antireflection film 28 of corrosion, etchant gas can change other gas into from above-mentioned mist, as Ar-CF 4Gas.Thus, in DVS-BCB film 22, form through hole 30 wherein arrives first wiring layer 27 from the bottom of the second wiring layer groove 32b structure as organic insulating film.
Shown in Fig. 7 M, form Ti-TiN lamination contact membranes (not shown) at last.Then, form copper film, fill the second wiring layer groove 32a and 32b and through hole 30 simultaneously with the hot CVD method.Annealed about 10 minutes under 250 ℃ to 300 ℃ in a vacuum subsequently.
After the annealing, remove copper film and contact membranes with chemico-mechanical polishing (CMP) method.As a result, in the DVS-BCB film as the organic insulating film that the lower dielectric constant of ratio silicon oxide is arranged, form the Miltilayer wiring structure of second wiring layer, wherein copper film has been filled the second wiring layer groove 32a and 32b and through hole 30.
In such example, the DVS-BCB film is used for siliceous organic insulating film, as the interlayer organic insulating film.But, also can replace the DVS-BCB film with siliceous polyimide film.Also have, also can use oleic series (acryl-series) or teflon series (Teflon-series) resin to replace the DVS-BCB film.
In the present embodiment, importantly, the element that at least a photoresist film did not contain is contained in the corrosive film.This element can be germanium, aluminium or magnesium.Also have, clearly, this corrosive film can be made of silicon oxide film, polysilicon film or silicon substrate, and its constituent material is different with the element of photoresist.
Describe the Miltilayer wiring structure of second embodiment of the invention in detail to 8C below with reference to Fig. 8 A.
In the second embodiment of the present invention, the bonding welding pad that is made of first metal such as copper etc. is buried in the interlayer organic insulating film of upper strata.Form by the metal film that constitutes as second metals such as Al on the bonding welding pad surface, to form the passivating oxide film.As a result, the thin spun gold in the lead welding method or the adaptability of the solder bump in the Flipchip method can strengthen, and can improve the reliability of encapsulation thus.
In order to form this bonding welding pad, on the organic insulating film of upper strata, form the bonding welding pad groove.First metal film that constitutes as copper is formed on the bonding welding pad groove.The thickness of first metal film is littler than the degree of depth of bonding welding pad groove.On first metal film, form second metal film that constitutes as Al, on first metal film, to form passivating film.Removal is formed on first and second metal films on the organic insulating film film of upper strata.Thus, form the upper surface film that constitutes by first metal, the anti-oxidation metal film is formed on the bond pad surface with self-aligned manner.For this reason, need not be any in order to form the steps such as exposure, development and corrosion of anti-oxidation metal film in bond pad surface, also can be formed with the bonding welding pad of high reliability.
The zone of the disconnected element on wiring layer on the integrated-semiconductor device chip and the wiring figure of power line, provide from bonding welding pad to the output input signal of semiconductor chip outside.Usually, bonding welding pad is the square of 50 to 100 μ m.But when the upper strata wiring layer was made of copper, the bonding welding pad part also was made of copper, for this reason, has following problem, and copper film is surperficial oxidized when packaged semiconductor, and pad can not be connected by bonding wire and semiconductor chip are outside.
In order to address this problem, in an embodiment, shown in Fig. 8 A, in interlayer organic insulating film 34, form the through hole 30 that arrives lower-layer wiring film and forming fine wiring layer groove 32b.And at the surface of interlayer organic insulating film 34 formation bonding welding pad groove 35.Form first metal film 36 with filling vias 30 and forming fine wiring layer groove 32b, its thickness is less than the degree of depth of bonding welding pad groove 35.When the diameter of the width of forming fine wiring layer groove 32b and through hole 30 with W represent, the degree of depth of bonding welding pad groove 35 with D represent, when the film thickness of first metal film 36 is represented with T, first metal film 36 of formation should satisfy following condition:
(W/2)＜T＜D
Then shown in Fig. 8 B, be formed with second metal film 37 of anti-oxidation characteristics.At this moment, set the degree of depth of the gross thickness of first metal film 36 and second metal film 37 greater than bonding welding pad groove 35.
At last shown in Fig. 8 C, partly selectively remove first metal film and second metal film on the interlayer organic insulating film 34 with the CMP method, first metal film is buried in the interlayer organic insulating film 34, with filling vias 30.And bonding welding pad groove 35 usefulness, first metal film of surface portion and the filling of second metal film.
In fact, on interlayer organic insulating film 34, form silicon nitride (Si 3N 4) film and silicon oxynitride (SiON) film, finish burying of bonding welding pad 38.In addition, on interlayer organic insulating film 34, form the passivating film (not shown) that polyimides constitutes.
The material that is formed on first metal film on the interlayer organic insulating film 34 can be copper or silver, and the material of second metal film can be an aluminium or as anti-oxidant rare metals such as gold or platinum.The most generally, the degree of depth of bonding welding pad groove is about 0.8 μ m, and the thickness of first metal film that is made of copper is about 0.6 μ m, and the thickness of second metal film that is made of aluminium is about 0.2 μ m.
The depth D of bonding welding pad groove does not need and the depth D of forming fine wiring layer groove ' identical.The depth D of bonding welding pad groove greater than the depth D of forming fine wiring layer groove '.The width of bonding welding pad groove is greater than the width of forming fine wiring layer groove and the width of through hole.Therefore, near the part of the corrosion rate of the interlayer organic insulating film 34 bonding welding pad groove is bigger, so under the situation without any special processes, the bonding welding pad groove forms deeplyer relatively usually.At this moment, if the degree of depth of bonding welding pad groove is D ', it is greater than depth D, the film thickness T of first metal film can range of choice can be wideer.
Use instantiation below, describe the Miltilayer wiring structure of third embodiment of the invention with reference to Fig. 9 A to 9F in detail.
In the first embodiment of the present invention, in organic insulating film, form the through hole of wiring layer groove and arrival lower membrane, with metal film filling wiring layer groove and through hole.In this method, its difficult point is, when through hole and wiring layer groove being considered when as a whole, must form metal film, metal film is filled with the opening of big depth-width ratio simultaneously.Also a difficult point is, the wiring layer groove must pass through on through hole exactly.For this reason, when design, must the local width that amplifies the wiring layer groove above the through hole.Provide an offset nargin like this.Therefore the preparation of the figure of wiring layer groove is complicated, and because need offset nargin, so the spacing between the wiring layer groove must be wideer.
In the 3rd embodiment, at first shown in Fig. 9 A, form tungsten film 21 in the bpsg film 19 of the MOSFET on being formed at Semiconductor substrate 14.On the plasma oxidation film 46 on the Semiconductor substrate 14 that is formed with bpsg film 19, form aluminium film as lower-layer wiring film 47.In addition, on lower-layer wiring film 47 and plasma oxidation film 46, form antireflection (antireflection) film 28 that the thick silicon nitride film of 50nm constitutes.
Subsequently, form plasma CVD silicon oxide film 4 as organic insulating film between 500 to 1000nm thick ground floors after, afterwards, form the positive photoetching rubber film 23 of the figure of through hole 29.
Then shown in Fig. 9 B, use CHF 3Gas is as etchant gas, and positive photoetching rubber film 23 makes it to arrive lower-layer wiring film 47 as mask, with dry etching method formation through hole 30.
Then shown in Fig. 9 B, form with the collimated sputtering method after the TiN film of thick Ti film of 10nm and 50nm, form thick tungsten (W) film of 400nm with the W-CVD method.In addition, selectively remove the tungsten on the organic insulating film 40 between ground floor, to form tungsten plug (metal closures) 41 with the tungsten CMP method of silica slurry.
Then, shown in Fig. 9 D, form silicon oxide film 42 as organic insulating film between the thick second layer of 600nm.Coating and silicon oxide film 42 have the positive photoetching rubber film 23 of same thickness subsequently.The wiring layer of exposure imaging positive photoetching rubber film 23, and formation then groove figure.At this moment, because the reflection of tungsten plug 41, the graphics sub of wiring layer groove forms wideer.For example, when the wiring layer groove was formed in the photoresist film in the zone that does not have tungsten plug 41 reflection, the width of wiring layer groove was 0.3 μ m.On the other hand, when the wiring layer groove was formed on the tungsten plug 41 of 0.3 μ m diameter, the width that forms the wiring layer groove was about 0.35 μ m.
Then shown in Fig. 9 E, the CHF with 90% 3With 10% O 2Mist, in the ecr plasma chamber with identical corrosion rate deep etch as the second layer between the silicon oxide film 42 and the photoresist film 23 of organic insulating film.In this chamber, the pressure of control etchant gas is 2.5mTorr, and the power of control RF is 200W.In this case, in the deep etch process, monitoring plasma gas Si-F luminous spectral intensity.Si-F is the CHF in silicon oxide film 42 and the etchant gas 3The reaction that produced of reaction produces material, rather than etchant gas and photoresist react and produced.
Promptly in the starting stage of deep etch because almost all surface of silicon oxide film 42 was covered by photoresist film entirely in the starting stage, so Si-F luminous spectral intensity very weak.Along with the carrying out of corrosion, remove photoresist fully, expose fully on the surface of silicon oxide film, and luminous spectral intensity increases suddenly.The moment of determining the unexpected increase of luminous spectral intensity is an etch end point, stops corrosion this moment.Thus, between the second layer, form wiring layer groove 45 in the organic insulating film 42, make it to reach organic insulating film 40 or tungsten plug 41 between ground floor.The width of the wiring layer groove that forms on the tungsten plug 41 form broad.
Shown in Fig. 9 F, in wiring layer groove 44, form the thick Ti layer of 10nm at last, form the thick aluminium film of 1 μ m with the collimated sputtering method then with the collimated sputtering method.Be controlled to be at underlayer temperature under 380 ℃ to 480 ℃ the condition, be filled in the wiring layer groove 44 that 0.6 μ m is dark, 0.3 μ m is wide with the aluminium film.
Selectively polish as the aluminium film on the silicon oxide film of organic insulating film between the second layer 42 with the hydrogenperoxide steam generator that is added with silica slurry then.Between being formed at, form upper strata wiring membrane 45 thus in the wiring layer groove in the silicon oxide film of organic insulating film as the second layer.
In such a way since the part broad of upper strata wiring membrane 45 on tungsten plug 41 some, so, can form such structure, promptly its at the middle and upper levels wiring membrane 45 be connected to tungsten plug 41 whole lip-deep tungsten beyond the Great Wall.
In above-mentioned example, silicon oxide film is as the interlayer organic insulating film.But obviously, also can be with siliceous organic insulating film.In addition, also can be with the organic insulating film that contains the element that a kind of photoresist film do not contain.In addition, metal closures is made of tungsten in above-mentioned example, but also can be made of electric conducting materials such as aluminium, copper, silver or gold.
The following describes Miltilayer wiring structure according to fourth embodiment of the invention.
In the fourth embodiment of the present invention, with the metal closures mask between ground floor in the organic insulating film after, between the second layer, form the metal line film be buried in the metal level groove in the organic insulating film.At this moment, the width of the wiring membrane figure of each wiring layer groove is wideer by about 20% than the diameter of the metal closures of the wiring layer groove graphics field of passing on metal closures.In addition, the width of wiring figure and length are wideer and be about 20% than the diameter of the metal closures of wiring figure end.Design greatlyyer with the nargin that is connected between the burial wiring film pattern metal closures, so that design Miltilayer wiring structure to such an extent that have a higher reliability.
After between ground floor, burying metal closures in the organic insulating film,, form the wiring membrane figure by filling second metal in the wiring layer groove in the organic insulating film between the second layer.Even in this case, utilize the reflection on metal closures surface, with the self aligned mode of metal closures, also can make the width of the wiring membrane figure on the metal closures and length big.For this reason, needn't consider to form the width of wiring layer groove wideer.Also needn't consider to design the spacing between the wiring membrane figure more greatly.
In the third embodiment of the present invention, behind first metal film filling vias formation metal closures, form the wiring layer groove, use the second metal film filling wiring layer groove then.In when exposure, utilize the local reflex of metal closures, with the self aligned mode of metal closures, make the width of the wiring layer groove on the metal closures be prepared into wideer.To 13B, describe the Miltilayer wiring structure of the 4th embodiment with reference to Figure 10 below in detail.
Figure 10 represents the plane graph of exposure imaging positive photoetching rubber film 23 back photoresist films 23.Figure 11 A, 12A and 13A and 11B, 12B and 13B are respectively the profiles along the Miltilayer wiring structure of the A-A line of Figure 10 and B-B line.
At first, on lower-layer wiring film 39, form antireflection film 28,, between ground floor, form metal closures 41a and 41b in the organic insulating film 40 by filling first metal film between ground floor in first opening in the organic insulating film 40 being formed at.In addition, forming organic insulating film 42 between the second layer on the organic insulating film between ground floor 40.On organic insulating film between the second layer 42, apply positive photoetching rubber film 23 then.
Shown in Figure 11 A and 11B, according to being plugged with the figure of the wiring layer groove of same widths with metal, exposure positive photoetching rubber film 23 is because the reverberation 43 of metal closures 41a and 41b has exposed around the periphery of the positive photoetching rubber film of metal closures.Therefore, the part has enlarged the width of each periphery of the positive photoetching rubber film that centers on metal closures.
Then, shown in Figure 12 A and 12B, by organic insulating film 42 between the identical corrosion rate deep etch positive photoetching rubber film 23 and the second layer, to form the wiring layer groove 44 that arrives metal closures 41a and 41b.
Then, shown in Figure 13 A and 13B, with second metal film, 45 filling wiring layer groove 44.Obtain such structure thus, wherein, press and the self aligned mode of metal closures, make the width of the wiring membrane on the metal closures be prepared into wideer.
In addition, the wiring layer groove on the metal closures 41a not only extends along wiring direction, and extends longitudinally by self-aligned manner.Thus, form such Miltilayer wiring structure, wherein wiring membrane is connected with metal closures reliably, does not need the local width that enlarges the wiring layer groove, also need not strengthen the spacing dimension between the wiring layer groove.
As mentioned above, obtain following advantage of the present invention.
Find that first advantage of the present invention is, the generated reactive gas material that monitoring corrosive film reaction is produced luminous spectral intensity, deep etch photoresist film and corrosive film simultaneously.When determining to remove fully the photoresist film on the corrosion material, reaction produce this material of gas moment of unexpected increase of luminous spectral intensity, this is the deep etch terminal point constantly.So stop corrosion.As a result, the wiring layer groove figure on the photoresist film can be delivered on the corrosive film.The ratio of the thickness by adjusting used photoresist film and the corrosion rate of photoresist film and the corrosion rate of corrosive film is formed with the wiring layer groove of desired depth in corrosive film.
Second advantage of the present invention is, with identical corrosion rate while deep etch photoresist film and organic insulating film, thereby figure is delivered on the corrosive film, the reaction that reaction produced generation material by monitoring etchant gas and a kind of element the variation of luminous spectral intensity, survey the deep etch terminal point, do not contain said this element in the photoresist film, but contain this element in the organic insulating film.For this reason, do not need on organic insulating film, to form any film that is used for surveying etch end point.Therefore shortened preparation time.
Also have,, make its bottom in organic insulating film, the predetermined degree of depth is promptly arranged if the thickness of control photoresist film can form the wiring layer groove with high accuracy.For example, can form opening figure like this, make wiring layer groove and through hole form as a whole and arrive the lower-layer wiring film from the surface of insulating barrier.By with metal film filling wiring layer groove and through hole, can easily form the Miltilayer wiring structure that uses organic insulating film.
The 3rd advantage of the present invention is, can form second metal (as aluminium) film on the surface of the bonding welding pad that is made of first metal (as copper) film, to form passivating film.Therefore, the thin spun gold in the wire bond method or the adaptability of the solder bump in the Flipchip method can be improved, and have strengthened the reliability of encapsulation thus.
The 4th advantage of the present invention is, buries metal closures between ground floor in the organic insulating film, fills the wiring layer groove in the organic insulating film between the second layer with metal film then, can use with the self aligned mode of metal closures and form the wiring layer groove.At this moment, by utilizing the reflection of metal closures, make the width of wiring layer groove and length be prepared into wideer and longer.For this reason, in the designing wiring mask graph, need not increase the width of wiring layer groove on the metal closures.When the designing wiring mask graph, need not increase the spacing between the wiring layer groove yet.Therefore, strengthened the reliability of Miltilayer wiring structure greatly.

Claims (14)

1. method for preparing semiconductor device comprises following step:
On second organic insulating film, form first organic insulating film;
Form first photoresist film on said first organic insulating film, making in said first photoresist film has first opening portion, by said first organic insulating film of the said first opening portion expose portion;
Use the etchant gas that can corrode said first photoresist film and said first organic insulating film, simultaneously said first photoresist film of dry etching and said first organic insulating film;
Described etchant gas is the mist of fluoride gas and oxygen, and the ratio of component of oxygen is 10% to 60%.
2. method as claimed in claim 1 is characterized in that: the relative dielectric constant ratio silicon oxide of said first organic insulating film little.
3. method as claimed in claim 2 is characterized in that: said organic insulating film is selected from the group of DVS-BCB film, polyimide film, polyether resin film and fluoride resin film formation.
4. method as claimed in claim 1 is characterized in that: said first organic insulating film is siliceous DVS-BCB film.
5. as each method of claim 1 to 4, also comprise following step:
In said dry etching process, monitoring luminous spectral intensity;
Variation according to said spectral intensity stops said dry etching.
6. method as claimed in claim 5 is characterized in that: said monitoring step comprise monitoring said first organic insulating film and said etchant gas the reactant that reaction produced luminous spectral intensity.
7. method as claimed in claim 6 is characterized in that: said first organic insulating film contains the element that a kind of said first photoresist film is not contained at least, and said product produces by the reaction of said at least a element and said etchant gas.
8. method as claimed in claim 7 is characterized in that: said first organic insulating film comprises siliceous DVS-BCB film, and said product is Si-F.
9. as each method of claim 1 to 4, it is characterized in that: the ratio of said first photoresist film and the thickness of said first organic insulating film is said first organic insulating film and the ratio of the corrosion rate of said first photoresist film.
10. method as claimed in claim 9, it is characterized in that: the said corrosion rate of said first organic insulating film is identical with the said corrosion rate of said first photoresist film, and the said thickness of said first photoresist film is identical with the said thickness of said first organic insulating film.
11. the method as claim 10 is characterized in that: said second organic insulating film is the interlayer organic insulating film, wherein is formed with metal closures, and said first opening portion of said first photoresist film is formed on the said metal closures,
Wherein, carry out said dry etching, remove said first photoresist film thus, and said first opening portion is delivered on said first organic insulating film, to arrive the said metal closures of said second organic insulating film.
12. as each method of claim 1 to 4, it is characterized in that: said second organic insulating film is an organic insulating film between ground floor, wherein be formed with metal closures, and do not have antireflection film,
Wherein, the said step that forms said first photoresist film comprises:
Form said first photoresist film;
With said first photoresist film of mask exposure that forms said first opening portion, wherein, with said first photoresist film of the reflex exposure of said metal closures, to increase the preparation width of said opening portion;
Said first photoresist film develops.
13. each the method as claim 1 to 4 is characterized in that: after said dry etching finished, having formed in said first organic insulating film had the wiring layer of certain depth groove,
Wherein, said method also comprises following step:
Form first metal film on said first organic insulating film, the thickness that makes said first metal film is less than this degree of depth;
Form second metal film on said first metal film, the gross thickness that makes said first metal film and said second metal film is less than this degree of depth;
Carry out cmp method, selectively to remove said first and second metal films from said first organic insulating film.
14. the method as claim 13 is characterized in that: said first metal film is made of copper or silver, and said second metal film is made of aluminium or anti-oxidation rare metal.
CNB981010040A 1997-03-19 1998-03-10 Method for manufacturing semiconductor device in which etching end point is monitored and multi-layer wiring structure formed by the same Expired - Fee Related CN1154158C (en)

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JP066346/97 1997-03-19
JP6634697A JPH10261624A (en) 1997-03-19 1997-03-19 Etching and multilayered interconnection structure
JP066346/1997 1997-03-19

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GB2364170B (en) * 1999-12-16 2002-06-12 Lucent Technologies Inc Dual damascene bond pad structure for lowering stress and allowing circuitry under pads and a process to form the same
JP4095763B2 (en) * 2000-09-06 2008-06-04 株式会社ルネサステクノロジ Semiconductor device and manufacturing method thereof
JP4541080B2 (en) * 2004-09-16 2010-09-08 東京応化工業株式会社 Antireflection film forming composition and wiring forming method using the same
JP4497302B2 (en) * 2004-09-22 2010-07-07 リコー光学株式会社 Etch back method and inorganic polarizer manufacturing method using the same
WO2006060015A1 (en) * 2004-11-30 2006-06-08 Freescale Semiconductor, Inc. Method for forming a photoresist pattern
JP2007103462A (en) * 2005-09-30 2007-04-19 Oki Electric Ind Co Ltd Bonding structure of terminal pad and solder, semiconductor device having the same, and its manufacturing method
JPWO2007142172A1 (en) * 2006-06-09 2009-10-22 日本電気株式会社 Multilayer wiring manufacturing method, multilayer wiring structure and multilayer wiring manufacturing apparatus
CN101494159A (en) * 2008-01-22 2009-07-29 北京北方微电子基地设备工艺研究中心有限责任公司 System and method for monitoring semiconductor processing technique
JP6541618B2 (en) * 2016-05-25 2019-07-10 東京エレクトロン株式会社 Method of processing an object
JP2020136473A (en) 2019-02-19 2020-08-31 株式会社東芝 Method for manufacturing semiconductor device
CN111489962B (en) * 2020-04-17 2023-09-26 重庆伟特森电子科技有限公司 Preparation method of thick bottom groove

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