CN115413145A - Electronic circuit and manufacturing method thereof - Google Patents
Electronic circuit and manufacturing method thereof Download PDFInfo
- Publication number
- CN115413145A CN115413145A CN202110577776.XA CN202110577776A CN115413145A CN 115413145 A CN115413145 A CN 115413145A CN 202110577776 A CN202110577776 A CN 202110577776A CN 115413145 A CN115413145 A CN 115413145A
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- temporary
- conductive pattern
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
- H05K1/0298—Multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
The invention discloses an electronic circuit and a manufacturing method thereof, and relates to the technical field of electronic circuits. A method of making an electronic circuit, comprising: providing a base material; forming a removable first conductive layer on the substrate with a conductive ink; the first conductive layer includes a target conductive pattern and a temporary conductive pattern; forming a temporary cover film covering the temporary conductive pattern; forming a non-removable second conductive layer overlying the target conductive pattern; and removing the temporary covering film and the temporary conductive pattern to obtain the target electronic circuit. According to the embodiment of the invention, the temporary pattern is covered, so that the problem that the temporary pattern is not easy to remove because the temporary pattern is processed in subsequent treatment is avoided, and the removal process of the covering film and the temporary pattern is simple and easy to implement, does not influence a target pattern, and ensures the product quality.
Description
Technical Field
The invention belongs to the technical field of electronic circuits, and particularly relates to an electronic circuit and a manufacturing method thereof.
Background
The electroplating lead is a process auxiliary line and is used for leading out a wiring of a target circuit to complete electroplating of the target circuit, the electroplating lead is not reserved in a final product and needs to be removed after the product is electroplated, the traditional method for removing the electroplating lead is to remove the electroplating lead in a machining cutting mode, but along with continuous increase of precision and complexity of the current circuit product, such as a coil product, the electroplating lead needs to be connected with an internal circuit, and if the machining mode is adopted, a base material of the target circuit product can be damaged, so that structural stability of the base material is reduced, and meanwhile, the machining precision can hardly meet cutting requirements of the internal high-precision circuit.
Disclosure of Invention
Accordingly, an object of the present invention is to provide an electronic circuit and a method for manufacturing the same, so as to solve the problem that the conventional process in the prior art cannot satisfy the requirement of removing the plated leads in the complex circuit.
In some illustrative embodiments, a method of making the electronic circuit comprises: providing a base material; forming a removable first conductive layer on the substrate with a conductive ink; the first conductive layer includes a target conductive pattern and a temporary conductive pattern; forming a temporary cover film covering the temporary conductive pattern; forming a non-removable second conductive layer overlying the target conductive pattern; and removing the temporary covering film and the temporary conductive pattern to obtain the target electronic circuit.
In some optional embodiments, before forming the removable first conductive layer on the substrate with the conductive ink, further comprising: and roughening the surface of the base material.
In some optional embodiments, the forming of the temporary cover film covering the temporary conductive pattern specifically includes: the temporary cover film is formed on the temporary conductive pattern using an insulating ink.
In some optional embodiments, the forming of the second conductive layer covering the target conductive pattern specifically includes: and forming the second conductive layer on the target conductive pattern by printing, spraying, electroplating, chemical plating, evaporation or magnetron sputtering.
In some optional embodiments, the second conductive layer is a multilayer structure.
In some optional embodiments, the removing the temporary cover film and the temporary conductive pattern specifically includes: removing the temporary cover film and/or temporary conductive pattern by one or more of etching, laser, grinding, or cutting.
In some optional embodiments, there is line overlap between the temporary conductive pattern and the target conductive pattern; the temporary conductive pattern is divided by the target conductive pattern into an inner line located inside the target conductive pattern and an outer line located outside the target conductive pattern; the temporary covering film covers the inner lines of the temporary conductive patterns.
In some optional embodiments, the inner lines and the outer lines of the temporary conductive pattern are removed by different means.
In some optional embodiments, the substrate is a profiled structure, and the first conductive layer is formed on a profiled surface of the substrate.
Another object of the present invention is to provide an electronic circuit to solve the technical problems in the prior art.
In some illustrative embodiments, the electronic circuit is obtained by the method for manufacturing an electronic circuit according to any one of the above items.
Compared with the prior art, the invention has the following advantages:
according to the embodiment of the invention, the temporary pattern is covered, so that the problem that the temporary pattern is not easy to remove because the temporary pattern is processed in subsequent treatment is avoided, and the removal process of the covering film and the temporary pattern is simple and easy to implement, does not influence a target pattern, and ensures the product quality.
Drawings
FIG. 1 is a flow chart of a method of fabricating an electronic circuit in an embodiment of the invention;
FIG. 2 is a schematic diagram of a method of fabricating an electronic circuit in an embodiment of the invention;
FIG. 3 is a schematic diagram of an electronic circuit in an embodiment of the invention;
FIG. 4 is a schematic diagram of an electronic circuit in an embodiment of the invention;
FIG. 5 is a flow chart of a method of fabricating an electronic circuit in an embodiment of the invention;
fig. 6 is a flow chart of a method of manufacturing an electronic circuit in an embodiment of the invention.
Detailed Description
The following description and the drawings sufficiently illustrate specific embodiments of the invention to enable those skilled in the art to practice them. Other embodiments may incorporate structural, logical, electrical, process, and other changes. The examples merely typify possible variations. Individual components and functions are optional unless explicitly required, and the sequence of operations may vary. Portions and features of some embodiments may be included in or substituted for those of others. The scope of embodiments of the invention encompasses the full ambit of the claims, as well as all available equivalents of the claims. Embodiments of the invention may be referred to herein, individually or collectively, by the term "invention" merely for convenience and without intending to voluntarily limit the scope of this application to any single invention or inventive concept if more than one is in fact disclosed.
"removable" and "non-removable" in embodiments of the present invention are relative terms, i.e., the same process, under the same conditions, can complete the cleaning of a "removable" part, but does not damage or affect the "non-removable" part; alternatively, the "removable" part may be cleaned by the same process under the same conditions, with minor impact on the "non-removable" part, but without affecting its primary performance; the unaffected performance can be conduction, conductivity, surface smoothness, surface gloss and the like of the circuit.
It should be noted that the technical features in the embodiments of the present invention may be combined with each other without conflict.
In the embodiment of the present invention, a method for manufacturing an electronic circuit is disclosed, and specifically, as shown in fig. 1-2, fig. 1 is a flowchart of a method for manufacturing an electronic circuit in the embodiment of the present invention; FIG. 2 is a schematic diagram of a method of fabricating an electronic circuit according to an embodiment of the invention; the manufacturing method of the electronic circuit comprises the following steps:
step S11, providing a substrate 10;
step S12, forming a removable first conductive layer 20 on the substrate 10 by using conductive ink; wherein the first conductive layer 20 includes a target conductive pattern 21 and a temporary conductive pattern 22;
step S13, forming a temporary cover film 30 covering the temporary conductive pattern 22;
step S14 of forming a non-removable second conductive layer 40 covering the target conductive pattern 21;
step S15, removing the temporary cover film 40 and the temporary conductive pattern 22 to obtain the target electronic circuit.
According to the embodiment of the invention, the temporary pattern is covered, so that the problem that the temporary pattern is not easy to remove because the temporary pattern is processed in subsequent treatment is avoided, and the removal process of the covering film and the temporary pattern is simple and easy to implement, does not influence a target pattern, and ensures the product quality.
In some embodiments, the substrate in the embodiments of the present invention may be any one of PET (polyester), PTFE (polytetrafluoroethylene), PI (Polyimide), PC (Polycarbonate), ABS (Acrylonitrile Butadiene Styrene plastic), LCP (Liquid Crystal Polymer), FR4, and glass (such as glass resin, silicon dioxide, and high borosilicate). Preferably, the base material can be selected from PET, PI, PTFE, LCP or glass, and the base material has excellent temperature resistance, corrosion resistance and adhesive force performance.
In some embodiments, the conductive ink in the embodiments of the present invention may be easily removable conductive ink, which is not limited to metal particle-based conductive ink, carbon-based conductive ink, inorganic conductive ink, liquid metal, etc.; preferably, the conductive ink in the embodiment of the invention is a conductive ink with metal particles, such as conductive silver paste, conductive aluminum paste, conductive copper paste, etc., or conductive silver paste, conductive aluminum paste, conductive copper paste, etc., doped with liquid metal. The printed circuit doped with the conductive silver paste of the liquid metal has good bending resistance and optimal conductivity.
In the embodiment of the present invention, the specific manner of forming the removable first conductive layer on the substrate by using the conductive ink in step S12 is not limited to a forming manner such as printing or printing, specifically, the printing manner is not limited to a direct writing printing manner, an extrusion printing manner, spraying, 3D printing manner, and the like, and the printing manner is not limited to screen printing, pad printing, relief printing, gravure printing, coating, and the like. Preferably, in the embodiment of the present invention, the first conductive layer may be formed by a screen printing method, and is suitable for a substrate with a flat surface. In other embodiments, for the substrate with the special-shaped structure, the substrate with the special-shaped structure may be formed on the special-shaped surface of the substrate with the special-shaped structure by using a transfer printing method, a 3D printing method, or the like.
In some embodiments, before forming the removable first conductive layer on the substrate with the conductive ink in step S12, the method may further include: and carrying out surface roughening treatment on the surface of the substrate so as to form a roughened layer on the surface of the substrate, wherein the roughened layer is beneficial to improving the adhesion of the conductive ink on the surface of the substrate. The surface roughening treatment is not limited to the surface roughening treatment such as sandblasting or plasma treatment. Preferably, the surface roughening treatment may be performed only on the region to be printed (i.e., the region where the first conductive layer is located), so as to ensure surface flatness and glossiness of the non-printed region. Wherein the printed area may coincide with the pattern of the first conductive layer or cover the pattern area of the first conductive layer.
Step S13 in the embodiment of the present invention forms a temporary cover film covering the temporary conductive pattern; the temporary cover film is not limited to a film material or an insulating ink. Wherein, under the condition that the membrane material was selected for use to the temporary cover membrane, can make this membrane material unanimous with the pattern of interim conducting pattern, cover on interim conducting pattern through attached mode to the realization is to the sheltering from of interim conducting pattern. Under the condition that the temporary covering film is formed by selecting the insulating ink, the temporary covering film can be covered on the temporary conductive pattern in a printing mode, so that the temporary conductive pattern is shielded.
Step S14 in the embodiment of the present invention forms a non-removable second conductive layer covering the target conductive pattern, and the second conductive layer may be formed on the target conductive pattern by printing, spraying, electroplating, chemical plating, evaporation, or magnetron sputtering, for example.
For example: selecting conductive ink which is not easy to remove to print on the target conductive pattern to form a second conductive layer; the conductive ink has stronger stability after being formed compared with the conductive ink forming the first conductive layer.
For example: a metal plating layer is formed on the target conductive pattern by means of electroplating, and the plating layer is not limited to any one of tin, copper, nickel, silver, and gold, or any alloy thereof. The metal plating layer may be a multilayer structure, such as copper, nickel, gold formed on the target conductive pattern in sequence; or silver, gold, etc.
For example: and forming a metal plating layer on the target conductive pattern by a chemical plating mode, wherein the plating layer is not limited to any one of tin, copper, nickel, silver and gold or any alloy thereof. The metal plating layer may be a multilayer structure, such as copper, nickel, gold formed on the target conductive pattern in sequence; or silver, gold, etc.
In some embodiments, the temporary conductive pattern in the embodiments of the present invention may be a plating lead (also referred to as a plating auxiliary line) designed by a user for plating a metal layer on the target conductive pattern, so that the process of forming the second conductive layer on the target conductive pattern in step S14 is plating. In other embodiments, the temporary conductive pattern in the embodiments of the present invention may also be other process auxiliary lines or other functional lines designed by a user.
The manner of removing the temporary cover film and/or the temporary conductive pattern in step S15 in the embodiment of the present invention is not limited to removing by one or more combinations of chemical etching, laser etching, grinding and cutting. Preferably, in the embodiment of the present invention, the temporary cover film and the temporary conductive pattern may be removed by chemical etching. The method is directed to a first conductive layer (i.e., a temporary conductive pattern) formed by using a conductive ink containing a resin and a temporary cover film formed by using an insulating ink, and the temporary cover film and the temporary conductive pattern are both polymer components and can be removed by using a corresponding polymer solvent, and the removal method is not limited to dipping and/or wiping, so that the temporary cover film and the temporary conductive pattern can be sequentially removed or removed together. In other cases, the temporary conductive pattern may be removed by a combination of a solvent and a laser, for example, the temporary cover film is removed by the solvent, and the temporary conductive pattern is removed by the laser.
In the embodiment of the invention, the temporary covering film is formed on the temporary conductive pattern, so that the formation of the second conductive layer on the temporary conductive pattern is avoided, the material of the second conductive layer is saved, and the cost is reduced.
As shown in fig. 3, in some embodiments, there is a line intersection, i.e., a portion where lines overlap, between the temporary conductive pattern 22 of the first conductive layer 20 and the target conductive pattern 21, thus dividing the temporary conductive pattern 22 into two parts by the target conductive pattern 21, one part being the inner line 221 inside the range of the target conductive pattern 21 and the other part being the outer line 222 outside the range of the target conductive pattern 21. The inner lines 221 and the outer lines 222 of the temporary conductive patterns 22 in this embodiment can be removed in different ways, thereby further reducing the difficulty of removal and improving the removal efficiency.
Specifically, in this embodiment, a part of the temporary conductive pattern 22 is located outside the target conductive pattern 21, and can be removed by matching with a cutting method, for example, after the temporary cover film 30 is removed by a solvent, the temporary conductive pattern (i.e., the inner circuit 221) located within the range of the target conductive pattern 21 is removed by laser, and finally the temporary conductive pattern (i.e., the outer circuit 222) located outside the range of the target conductive pattern 21 is removed by cutting.
In some embodiments, since the precision of the target conductive pattern is high, the line width of the target conductive pattern may be less than 100 micrometers, several tens of micrometers, or even several tens of micrometers, which results in a high resistance value and a low conductivity of the target conductive pattern, and a small current value flows during the electroplating process, which makes the target conductive pattern difficult to be plated and affects the electroplating effect. Particularly, the resistance value of the conductive circuit formed by the conductive ink is larger than that of a common copper foil or aluminum foil, so that the temporary conductive pattern can be designed to be larger than the target conductive pattern in conductivity, thereby improving the overall conductivity of the first conductive layer and further improving the plating effect of the target conductive pattern.
Specifically, the manner in which the temporary conductive pattern can be designed to have a conductivity greater than that of the target conductive pattern is not limited to, increasing the line width/thickness of the entire or part of the temporary conductive pattern, or other equivalent manners.
As shown in fig. 3-4, further, during the electroplating process, a plating layer gradually grows on the temporary conductive layer 22 and the target conductive layer 21, and during the plating layer generation and gradual growth process, the conductivity of the temporary conductive layer 22 and the target conductive layer 21 is further increased, so as to improve the electroplating effect of the target conductive pattern 21, and the portion covered by the temporary cover film 30 does not form a plating layer on the surface thereof in the process, which may adversely affect the electroplating of the target conductive pattern 21, for which case, the temporary cover film 30 in the embodiment of the present invention may only cover the inner line 221 of the temporary conductive pattern 22, so as to ensure the electroplating effect of the target conductive pattern 21, and reduce the difficulty of subsequently removing the inner line 221 of the temporary conductive pattern 22.
In some embodiments, after removing the temporary cover film and the temporary conductive pattern in step S15, the method may further include: and forming a protective layer for covering the second conductive layer, wherein the protective layer can play the effect of any one or any combination of performances of resistance welding, oxygen isolation, water resistance, corrosion resistance, temperature resistance, bending resistance and the like. Preferably, the protective layer is provided with a window for exposing a portion of the second conductive layer.
As shown in fig. 5, the method for manufacturing an electronic circuit in the embodiment of the present invention can meet the requirement of manufacturing a double-sided circuit, and specifically, the embodiment of the present invention discloses a method for manufacturing an electronic circuit, including:
step S21, providing a substrate;
step S22, forming a removable third conductive layer on the first surface of the substrate by using conductive ink; wherein the third conductive layer includes: a first target conductive pattern and a first temporary conductive pattern;
step S23, forming a removable fourth conductive layer on the second surface of the substrate by using conductive ink; wherein the fourth conductive layer includes: a second target conductive pattern and a second temporary conductive pattern;
step S24 of forming a first temporary cover film covering the first temporary conductive pattern and a second temporary cover film covering the second temporary conductive pattern, respectively;
step S25, forming a non-removable fifth conductive layer covering the first target conductive pattern, and forming a non-removable sixth conductive layer covering the second target conductive pattern;
and S26, removing the first temporary covering film, the second temporary covering film, the first temporary conductive pattern and the second temporary conductive pattern to obtain the target electronic circuit with the double-sided circuit.
In some embodiments, before step S22, the method may further include: forming a metallized via hole for realizing interconnection of the first target conductive pattern and the second target conductive pattern on the substrate; the formation of the metalized via is not limited to any via metallization known in the art. Preferably, the metalized via in the embodiment of the present invention may be integrally formed by forming the third conductive layer and/or the fourth conductive layer at the same time.
Specifically, the method for forming the metalized via hole comprises the following steps: forming a via hole penetrating through the first surface and the second surface of the substrate on the substrate; wherein the position of the via hole is determined by the requirement of a user for designing the electronic circuit; then, in the process of printing the conductive ink, the conductive ink enters the inside of the through hole, so as to be attached to the inner wall of the through hole or fill the whole through hole. In the embodiment, under the condition that the depth of the via hole is not more than 1000 mu m, the metallization of the via hole can be met in the single-side printing process, and under the condition that the depth of the via hole exceeds 1000 mu m to 3000 mu m, the metallization of the via hole can be completed through two-side printing. The number of metallized vias in this embodiment is not limited to one or more and may be designed according to the requirements of a particular electronic circuit.
Preferably, as shown in fig. 6, an embodiment of the present invention provides a method for manufacturing an electronic circuit, which can meet the requirement of manufacturing a double-sided interconnect circuit, and includes:
step S31, providing a substrate;
step S32, forming a via hole penetrating through the first surface and the second surface of the base material on the base material;
step S33, forming a removable third conductive layer on the first surface of the substrate by using conductive ink; wherein the third conductive layer includes: a first target conductive pattern and a first temporary conductive pattern;
step S34, forming a removable fourth conductive layer on the second surface of the substrate by using conductive ink; wherein the fourth conductive layer includes: a second target conductive pattern and a second temporary conductive pattern;
in step S32, the via hole is metallized in the process of step S33 and/or step S34, so as to obtain a metallized via hole interconnecting the first target conductive pattern and the second target conductive pattern;
step S35, respectively forming a first temporary covering film for covering the first temporary conductive pattern and a second temporary covering film for covering the second temporary conductive pattern;
step S36, forming a non-removable fifth conductive layer covering the first target conductive pattern, and forming a non-removable sixth conductive layer covering the second target conductive pattern;
and S37, removing the first temporary covering film, the second temporary covering film, the first temporary conductive pattern and the second temporary conductive pattern to obtain the target electronic circuit with the double-sided circuit.
In some embodiments, since the first target conductive pattern and the second target conductive pattern are connected by the metalized via, the first temporary conductive pattern in step S33 or the second temporary conductive pattern in step S34 may be omitted, i.e., step S36 is implemented using the first temporary conductive pattern or the second temporary conductive pattern.
The steps or processes in the method for manufacturing the electronic circuit in the embodiment of the present invention may be combined without conflict, for example, the steps or processes in the single-sided electronic circuit may be applied to the embodiments of the double-sided electronic circuit and the double-sided interconnected electronic circuit, and the protection scope of the present invention should not be limited thereby.
Another object of the present invention is to provide an electronic circuit, which can be obtained by the above-mentioned method for manufacturing an electronic circuit. Specifically, the electronic circuit may include: a substrate; a target conductive pattern on a surface of the substrate; and a second conductive layer attached on the target conductive pattern.
In some embodiments, the multilayer electronic circuit may be obtained by stacking a plurality of electronic circuits.
Those of skill would further appreciate that the various illustrative logical blocks, modules, circuits, and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present disclosure.
Claims (10)
1. A method of making an electronic circuit, comprising:
providing a base material;
forming a removable first conductive layer on the substrate with a conductive ink; wherein the first conductive layer comprises a target conductive pattern and a temporary conductive pattern;
forming a temporary cover film covering the temporary conductive pattern;
forming a non-removable second conductive layer covering the target conductive pattern;
and removing the temporary covering film and the temporary conductive pattern to obtain the target electronic circuit.
2. The method of claim 1, further comprising, prior to forming a removable first conductive layer on the substrate with a conductive ink:
and roughening the surface of the base material.
3. The method for manufacturing a circuit according to claim 1, wherein the forming of the temporary cover film covering the temporary conductive pattern specifically comprises:
the temporary cover film is formed on the temporary conductive pattern using an insulating ink.
4. The method of claim 1, wherein the forming a second conductive layer covering the target conductive pattern specifically comprises:
and forming the second conductive layer on the target conductive pattern by printing, spraying, electroplating, chemical plating, evaporation or magnetron sputtering.
5. The method of manufacturing a circuit according to claim 4, wherein the second conductive layer has a multilayer structure.
6. The method for manufacturing a circuit according to claim 1, wherein the removing the temporary cover film and the temporary conductive pattern specifically comprises:
removing the temporary cover film and/or temporary conductive pattern by one or more of etching, laser, grinding, or cutting.
7. The method of manufacturing a circuit according to claim 1, wherein there is a line overlap between the temporary conductive pattern and the target conductive pattern;
the temporary conductive pattern is divided by the target conductive pattern into an inner line located inside the target conductive pattern and an outer line located outside the target conductive pattern;
the temporary covering film covers the inner lines of the temporary conductive patterns.
8. The method of claim 7, wherein the inner lines and the outer lines of the temporary conductive patterns are removed in different ways.
9. The method of claim 1, wherein the substrate is a profiled structure and the first conductive layer is formed on a profiled surface of the substrate.
10. An electronic circuit, characterized in that it is obtained by a method of manufacturing a circuit according to any one of claims 1 to 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110577776.XA CN115413145A (en) | 2021-05-26 | 2021-05-26 | Electronic circuit and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110577776.XA CN115413145A (en) | 2021-05-26 | 2021-05-26 | Electronic circuit and manufacturing method thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN115413145A true CN115413145A (en) | 2022-11-29 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110577776.XA Pending CN115413145A (en) | 2021-05-26 | 2021-05-26 | Electronic circuit and manufacturing method thereof |
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| Country | Link |
|---|---|
| CN (1) | CN115413145A (en) |
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- 2021-05-26 CN CN202110577776.XA patent/CN115413145A/en active Pending
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