CN115294915B - Gate driving circuit and display device - Google Patents
Gate driving circuit and display device Download PDFInfo
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- CN115294915B CN115294915B CN202211061736.0A CN202211061736A CN115294915B CN 115294915 B CN115294915 B CN 115294915B CN 202211061736 A CN202211061736 A CN 202211061736A CN 115294915 B CN115294915 B CN 115294915B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0267—Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/04—Maintaining the quality of display appearance
- G09G2320/043—Preventing or counteracting the effects of ageing
- G09G2320/046—Dealing with screen burn-in prevention or compensation of the effects thereof
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
Abstract
The application provides a gate driving circuit and a display device. Wherein the gate driving circuit includes: the device comprises an output module, a coupling capacitor, a pre-charging module and a boosting module; the output module is used for outputting a grid driving signal; the first end of the coupling capacitor is connected with the output module; the pre-charging module is connected with the first end of the coupling capacitor, and is used for providing a first voltage for the first end of the coupling capacitor, and the output module responds to the first voltage to output a grid driving signal; the boost module is connected with the second end of the coupling capacitor and is used for providing a second voltage for the second end of the coupling capacitor so as to increase the first voltage in a coupling way. According to the technical scheme, the influence of ageing of the TFT device can be reduced, the capacitor can be smoothly coupled, and the display effect is ensured.
Description
Technical Field
The present disclosure relates to the field of display driving technologies, and in particular, to a gate driving circuit and a display device.
Background
In the display panel, the gate driving circuit realizes signal output of the gate driving circuit by coupling action of a TFT (Thin Film Transistor ) device and a capacitor. Wherein the capacitor receives an electrical signal from the output of the TFT device, and increases the rise of the self voltage by capacitive coupling of the capacitor in accordance with the electrical signal of the TFT device. However, as time goes by, the TFT device has problems such as aging and unstable characteristics. The signal output by the TFT device is deteriorated, thereby affecting the coupling effect of the capacitor and causing abnormal display of the display panel.
Disclosure of Invention
An object of the present application is to provide a gate driving circuit and a display device, which can reduce the influence of aging of a TFT device, ensure that a capacitor can smoothly perform a coupling effect, and ensure the display effect of a display panel.
According to one aspect of the present application, there is provided a gate driving circuit including:
the output module is used for outputting a grid driving signal;
the first end of the coupling capacitor is connected with the output module;
the pre-charging module is connected with the first end of the coupling capacitor and is used for providing a first voltage for the first end of the coupling capacitor, and the output module responds to the first voltage to output the grid driving signal; and
the boosting module is connected with the second end of the coupling capacitor and is used for providing a second voltage for the second end of the coupling capacitor so as to increase the first voltage in a coupling way.
In one aspect, the output module includes a driving switch, a control end of the driving switch is connected to a first end of the coupling capacitor, and a control end of the driving switch is used for responding to the first voltage;
the pre-charging module comprises a first response switch, wherein the first response switch is used for responding to a first scanning signal so as to apply the first voltage to a first end of the coupling capacitor;
the boost module includes a second response switch for responding to a second scan signal to apply the second voltage to a second terminal of the coupling capacitor.
In one aspect, a control end of the first response switch is connected with a first scanning line, the first scanning line is used for providing the first scanning signal, a first end of the first response switch is connected with a first end of the coupling capacitor, a second end of the first response switch is connected with a first power supply end, and the first power supply end is used for providing the first voltage;
the control end of the second response switch is connected with a second scanning line, the second scanning line is used for providing the second scanning signal, the first end of the second response switch is connected with the second end of the coupling capacitor, the second end of the second response switch is connected with a second power supply end, and the second power supply end is used for providing the second voltage;
the output module further comprises a clock signal end, the clock signal end is used for providing the grid driving signal, the clock signal end is connected with the first end of the driving switch, and the control end of the driving switch responds to the first voltage and transmits the grid driving signal to the second end of the driving switch.
In one aspect, the first power supply terminal and the second power supply terminal are the same power supply terminal, and the first voltage and the second voltage are equal.
In one aspect, the second scan line is connected to the clock signal terminal, and the gate driving signal and the second scan signal are the same signal.
In one aspect, the gate driving circuit further includes a pull-down module, the pull-down module is connected to the first end of the coupling capacitor, the pull-down module is configured to provide a pull-down voltage, the first voltage and the second voltage are high voltages, and the pull-down voltage is low voltages.
In one aspect, the pull-down module includes a third response switch, a first end of the third response switch is connected to the second end of the coupling capacitor, a second end of the third response switch is connected to a third power supply end, a control end of the third response switch is connected to a third scan line, the third scan line provides a third scan signal, and a control end of the third response switch is configured to provide a pull-down voltage of the third power supply end to the second end of the coupling capacitor in response to the third scan signal.
In one aspect, the pre-charging module includes a first signal terminal, where the first signal terminal is connected to the control terminal of the first response switch, and the first signal terminal is configured to provide the first scanning signal;
the boosting module further comprises a fourth response switch, wherein a first end of the fourth response switch is connected with the second power supply end, a second end of the fourth response switch is connected with a control end of the second response switch, and a control end of the fourth response switch is connected with the second power supply end;
the pull-down module further comprises a fifth response switch and a sixth response switch, wherein a first end of the fifth response switch is connected with a control end of the second response switch, a second end of the fifth response switch is connected with the third power supply end, and a control end of the fifth response switch is connected with a fourth power supply end;
the control end of the sixth response switch is connected with the second signal end, the first end of the sixth response switch is connected with the first end of the coupling capacitor, and the second end of the sixth response switch is connected with the third power supply end.
In one aspect, the drive switch is a thin film transistor switch.
In addition, in order to solve the above-mentioned problem, the present application still provides a display device, the display device includes display panel, display panel has display area and non-display area, the non-display area is located the periphery of display area, the display device still includes pixel drive circuit and above gate drive circuit, pixel drive circuit connects gate drive circuit's data line, gate drive circuit locates the non-display area, pixel drive circuit locates the display area.
In the technical scheme of the application, the pre-charging module outputs first voltage to the first end of the coupling capacitor, and the boosting module outputs second voltage to the second end of the coupling capacitor. The second voltage is applied to the second terminal of the coupling capacitor, increasing the voltage at the second terminal of the coupling capacitor. By capacitive coupling, the voltage at the first end of the coupling capacitor increases as the voltage at the second end increases. The output module can be ensured to output the grid driving signal more smoothly. The signal sources of the first end and the second end of the coupling capacitor avoid the output end of the output module, and the TFT switch aging in the output module can not influence the coupling effect of the coupling capacitor. The coupling capacitor can smoothly perform the coupling function, and the display effect of the display panel is ensured.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the application.
Drawings
The above and other objects, features and advantages of the present application will become more apparent by describing in detail exemplary embodiments thereof with reference to the attached drawings.
Fig. 1 is a schematic diagram of a gate driving circuit according to a first embodiment of the present application.
Fig. 2 is a simplified schematic diagram of the gate driving circuit of fig. 1 of the present application.
Fig. 3 is a timing control diagram of the gate driving circuit of fig. 2 of the present application.
Fig. 4 is a timing control diagram of the gate driving circuit of fig. 1 of the present application.
Fig. 5 is a schematic structural view of a display device according to a second embodiment of the present application.
The reference numerals are explained as follows:
10. an output module; 20. a pre-charging module; 30. a boost module; 40. a pull-down module; C. a coupling capacitor; 50. a display panel;
110. a clock signal terminal; 120. an output end; 210. a first scan line; 220. a first power supply terminal; 230. a first signal terminal; 310. a second scanning line; 320. a second power supply terminal; 410. a third scan line; 420. a third power supply terminal; 430. a second signal terminal; 440. a fourth power supply terminal; 450. a fifth power supply terminal;
t0, a driving switch; t1, a first response switch; t2, a second response switch; t3, a third response switch; t4, a fourth response switch; t5, a fifth response switch; t6, sixth response switch; t7, seventh response switch; t8, eighth responsive switch; t9, ninth responsive switch; t10, tenth response switch; c1, a first electrode plate; and C2, a second electrode plate. Vdd, first voltage; vgl, pull-down voltage; g1, a first scanning signal; CK. A clock signal; g2, a second scan signal; gx, a scanning signal of the second signal end; cx, first end voltage of the coupling capacitor; cy, the second terminal voltage of the coupling capacitor; gn, gate drive signal; 510. a display area; 520. a non-display area.
Detailed Description
While this application is susceptible of embodiment in different forms, there is shown in the drawings and will herein be described in detail, specific embodiments thereof with the understanding that the present disclosure is to be considered as an exemplification of the principles of the application and is not intended to limit the application to that as illustrated herein.
Thus, reference to one feature indicated in this specification will be used to describe one of the features of an embodiment of the application, and not to imply that each embodiment of the application must have the described feature. Furthermore, it should be noted that the present specification describes a number of features. Although certain features may be combined together to illustrate a possible system design, such features may be used in other combinations not explicitly described. Thus, unless otherwise indicated, the illustrated combinations are not intended to be limiting.
In the embodiments shown in the drawings, indications of orientation (such as up, down, left, right, front and rear) are used to explain the structure and movement of the various elements of the present application are not absolute but relative. These descriptions are appropriate when these elements are in the positions shown in the drawings. If the description of the position of these elements changes, the indication of these directions changes accordingly.
Example embodiments will now be described more fully with reference to the accompanying drawings. However, the exemplary embodiments may be embodied in many forms and should not be construed as limited to the examples set forth herein; rather, these example embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the example embodiments to those skilled in the art. The drawings are merely schematic illustrations of the present application and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and thus a repetitive description thereof will be omitted.
Preferred embodiments of the present application are further elaborated below in conjunction with the drawings of the present specification.
Example 1
Referring to fig. 1 and 2, the present application provides a gate driving circuit, which includes: an output module 10, a coupling capacitor C, a pre-charge module 20 and a boost module 30. The output module 10 is provided with an output terminal 120, and the output module 10 is configured to output a gate driving signal Gn, where the gate driving signal Gn is transmitted to the pixel driving circuit through the output terminal 120.
The first end of the coupling capacitor C is connected with the output module 10; the coupling capacitor C is provided with two electrode plates, a first electrode plate C1 and a second electrode plate C2, and the first electrode plate C1 and the second electrode plate C2 are oppositely arranged. The first electrode plate C1 is a first end of the coupling capacitor C, and the second electrode plate C2 is a second end of the coupling capacitor C.
The pre-charge module 20 is connected to the first end of the coupling capacitor C, the pre-charge module 20 is configured to provide a first voltage Vdd to the first end of the coupling capacitor C, and the output module 10 is responsive to the first voltage Vdd to output the gate driving signal Gn; the first voltage Vdd is greater than the threshold voltage of the output module 10, and the first voltage Vdd is applied to the first end of the coupling capacitor C, which is equivalent to being applied to the control end of the output module 10, and after the control end of the output module 10 receives the first voltage Vdd, the output end 120 of the output module 10 outputs the gate driving signal Gn.
The first voltage Vdd can already ensure that the output module 10 outputs the gate driving signal Gn, but in order to ensure that the output module 10 functions more sufficiently, the voltage value of the first voltage Vdd needs to be increased. For this purpose, the boost module 30 is connected to the second end of the coupling capacitor C, and the boost module 30 is configured to provide the second voltage to the second end of the coupling capacitor C, and after the second end of the coupling capacitor C is loaded with the second voltage, the voltage at the second end of the coupling capacitor C is increased, and the voltage difference raised at the second end is coupled to the first end through the capacitive coupling action of the coupling capacitor C to increase the first voltage Vdd. I.e. the first end of the coupling capacitance C is likewise raised by the same voltage difference.
In this embodiment, the pre-charge module 20 outputs the first voltage Vdd to the first terminal of the coupling capacitor C, and the boost module 30 outputs the second voltage to the second terminal of the coupling capacitor C. The second voltage is applied to the second terminal of the coupling capacitor C, and the voltage of the second terminal of the coupling capacitor C is raised. By capacitive coupling, the voltage at the first end of the coupling capacitor C increases as the voltage at the second end increases. Ensuring that the output module 10 is able to output the gate driving signal Gn more smoothly. The signal sources of the first end and the second end of the coupling capacitor C avoid the output end 120 of the output module 10, that is, the voltage of the second end does not need to be increased by providing the loading signal to the output end 120 of the output module 10, so that the coupling effect of the coupling capacitor C is not affected by the TFT switch aging in the output module 10. The coupling capacitor C can smoothly perform the coupling function, and the display effect of the display panel 50 is ensured.
Further, the output module 10 includes a driving switch T0, where the driving switch T0 is a thin film transistor switch, i.e. the driving switch T0 is a TFT switch. The TFT switch has the advantages of high response speed and the like. The control end of the driving switch T0 is connected with the first end of the coupling capacitor C, and the control end of the driving switch T0 is used for responding to the first voltage Vdd; the control terminal of the output module 10 is a control terminal of the driving switch T0, the first voltage Vdd is greater than the threshold voltage of the driving switch T0, and after the control terminal of the driving switch T0 receives the first voltage Vdd, the first terminal and the second terminal of the driving switch T0 are turned on. The gate driving signal Gn is output from the first terminal of the driving switch T0 to the second terminal of the driving switch T0.
Also, in order to better control the pre-charge module 20 and the boost module 30 to function, the pre-charge module 20 includes a first response switch T1, the first response switch T1 being configured to respond to the first scan signal G1 to apply the first voltage Vdd to the first end of the coupling capacitor C; when the first terminal and the second terminal of the driving switch T0 are required to be turned on, the first response switch T1 is enabled. After the first response switch T1 receives the first scanning signal G1, the first response switch T1 is in operation, and the first end and the second end of the first response switch T1 are turned on, so that the first voltage Vdd is output to the second end through the first end of the first response switch T1, and loading of the first voltage Vdd is completed.
The boost module 30 includes a second response switch T2, and the second response switch T2 is configured to respond to the second scan signal G2 to apply a second voltage to the second terminal of the coupling capacitor C. After the first and second terminals of the driving switch T0 are turned on, the second responsive switch T2 functions in order to make the driving switch T0 open more sufficiently. After the second response switch T2 receives the second scanning signal G2, the second response switch T2 is operated in an intervening manner, and the first end and the second end of the second response switch T2 are turned on, so that the second voltage is output to the second end through the first end of the second response switch T2, and loading of the second voltage is completed.
The specific connection mode of the first response switch T1 is that the control end of the first response switch T1 is connected to the first scan line 210, the first scan line 210 is used for providing the first scan signal G1, the first end of the first response switch T1 is connected to the first end of the coupling capacitor C, the second end is connected to the first power supply end 220, and the first power supply end 220 is used for providing the first voltage Vdd; one end of the first scan line 210 is connected to the first response switch T1, the other end is connected to the first signal end 230, the first signal end 230 is configured to provide a first scan signal G1, and the first scan signal G1 is transmitted to the control end of the first response switch T1 through the first scan line 210. After the control end of the first response switch T1 receives the first scan signal G1, the first end and the second end of the first response switch T1 are turned on, and the first voltage Vdd provided by the first power supply end 220 is applied to the first end of the coupling capacitor C.
The specific connection mode of the second response switch T2 is that the control end of the second response switch T2 is connected to the second scan line 310, the second scan line 310 is used for providing the second scan signal G2, the first end of the second response switch T2 is connected to the second end of the coupling capacitor C, the second end is connected to the second power supply end 320, and the second power supply end 320 is used for providing the second voltage; after the control end of the second response switch T2 receives the second scan signal G2, the first end and the second end of the second response switch T2 are turned on, and the second voltage provided by the second power supply end 320 is applied to the second end of the coupling capacitor C.
The output module 10 further includes a clock signal CK terminal 110, the clock signal CK terminal 110 is configured to provide a gate driving signal Gn, the clock signal CK terminal 110 is connected to a first terminal of the driving switch T0, and a control terminal of the driving switch T0 is responsive to the first voltage Vdd to transmit the gate driving signal Gn to a second terminal of the driving switch T0. After the control terminal of the driving switch T0 receives the first voltage Vdd, the first terminal and the second terminal of the driving switch T0 are turned on, and the gate driving signal Gn provided by the clock signal CK terminal 110 is transmitted to the second terminal of the driving switch T0, so as to start providing the driving signal to the pixel driving circuit.
To simplify the circuit structure, the arrangement of the circuit is reduced. The first power supply terminal 220 and the second power supply terminal 320 are the same power supply terminal, and the first voltage Vdd and the second voltage are equal. That is, the first terminal of the first responsive switch T1 and the first terminal of the second responsive switch T2 are connected to the same power supply terminal. The same power supply end provides loading voltage for the first end and the second end of the coupling capacitor C, so that the design of the power supply end is saved, wiring positions are saved, and the circuit structure is simplified.
Further, the second scan line 310 is connected to the clock signal CK terminal 110, and the gate driving signal Gn and the second scan signal G2 are the same signal. The control end of the second response switch T2 is connected to the first end of the driving switch T0, and the clock signal CK end 110 provides an on signal for the second response switch T2, so that the arrangement of the signal ends is reduced, and the space is saved.
Of course, the control terminal of the second response switch T2 may be provided with an independent signal terminal according to needs in order to make the driving switch T0 and the second response switch T2 more flexible to complete circuit driving.
In order to make the coupling capacitor C more effective for performing the coupling function, the gate driving circuit further includes a pull-down module 40, wherein the pull-down module 40 is connected to the first end of the coupling capacitor C, the pull-down module 40 is configured to provide a pull-down voltage Vgl, the first voltage Vdd and the second voltage are high voltages, and the pull-down voltage Vgl is low voltage. When the voltage of the first terminal of the coupling capacitor C is increased, a base voltage is provided to the second terminal of the coupling capacitor C in advance by the pull-down module 40, that is, a pull-down voltage Vgl is provided to the second terminal of the coupling capacitor C. Since the pull-down voltage Vgl is a low voltage and the second voltage is a high voltage, a voltage difference is provided between the second voltage and the pull-down voltage Vgl after the second voltage is applied, and the voltage of the second terminal of the coupling capacitor C increases. According to the capacitive coupling action of the coupling capacitor C, the voltage at the first end of the coupling capacitor C also increases by a voltage value equal to the voltage difference between the second voltage and the pull-down voltage Vgl.
By increasing the voltage of the first terminal of the coupling capacitor C, the voltage difference between the second voltage and the pull-down voltage Vgl is increased on the basis of the first voltage Vdd, and as the voltage of the first terminal of the coupling capacitor C increases, the first terminal and the second terminal of the driving switch T0 are turned on more sufficiently, so that the gate driving signal Gn of the output module 10 is sufficiently output to the pixel driving circuit.
Further, the pull-down module 40 is connected to two ends of the coupling capacitor C, that is, the pull-down module 40 can also be connected to a second end of the coupling capacitor C.
Specifically, in order to more effectively control the pull-down module 40 to provide the pull-down voltage Vgl, the pull-down module 40 includes a third response switch T3, a first terminal of the third response switch T3 is connected to the second terminal of the coupling capacitor C, a second terminal of the third response switch T3 is connected to the third power supply terminal 420, a control terminal of the third response switch T3 is connected to the third scan line 410, the third scan line 410 provides a third scan signal, and a control terminal of the third response switch T3 is configured to provide the pull-down voltage Vgl of the third power supply terminal 420 to the second terminal of the coupling capacitor C in response to the third scan signal.
After the control terminal of the third response switch T3 receives the third scan signal, the first terminal and the second terminal of the third response switch T3 are turned on, and the pull-down voltage Vgl is output to the first terminal of the third response switch T3 through the second terminal of the third response switch T3, so that the pull-down voltage Vgl is loaded to the second terminal of the coupling capacitor C.
Referring to fig. 3 and 4, the pre-charging module 20 includes a first signal terminal 230, the first signal terminal 230 is connected to the control terminal of the first response switch T1, and the first signal terminal 230 is configured to provide a first scan signal G1; when the first scan signal G1 is at a high level, the first terminal and the second terminal of the first response switch T1 are turned on.
The boost module 30 further includes a fourth response switch T4, where a first end of the fourth response switch T4 is connected to the second power supply end 320, a second end of the fourth response switch T4 is connected to a control end of the second response switch T2, and a control end of the fourth response switch T4 is connected to the second power supply end 320; after the control end of the fourth response switch T4 receives the electrical signal of the second power supply end 320, when the electrical signal provided by the second power supply end 320 is at a high level, the first end and the second end of the fourth response switch T4 are turned on, and the signal of the second power supply end 320 can also be loaded to the control end of the second response switch T2. Thus, by the above connection, the electric signal supplied from the second power supply terminal 320 can control the opening of the second response switch T2 and the fourth response switch T4, and can also supply the second terminal voltage Cy applied to the coupling capacitor C.
The pull-down module 40 further includes a fifth response switch T5, a first end of the fifth response switch T5 is connected to the control end of the second response switch T2, a second end of the fifth response switch T5 is connected to the third power supply end 420, and a control end of the fifth response switch T5 is connected to the fourth power supply end 440; after the second responsive switch T2 finishes the loading operation of the second voltage, the second power supply terminal 320 outputs a low level, and the fourth responsive switch T4 is turned off. In order to ensure that the second responsive switch T2 is also effectively closed, the voltage at the control terminal of the second responsive switch T2 is initialized.
The voltage of the fourth power supply terminal 440 is at a high level, the control terminal of the fifth response switch T5 receives a high level signal, the first terminal and the second terminal of the fifth response switch T5 are turned on, the pull-down voltage Vgl in the pull-down module 40 is loaded to the control terminal of the second response switch T2, the voltage of the control terminal of the second response switch T2 is pulled down, and the initialization of the control terminal of the second response switch T2 is completed.
The control terminal of the third response switch T3 is connected to the fourth power supply terminal 440, and the fourth power supply terminal 440 provides the third scan signal to the third response switch T3. Meanwhile, the fourth power supply terminal 440 also provides the fifth response switch T5 with the scan signal, that is, the fifth response switch T5 also responds to the third scan signal, and the control of the two switches is completed through the same fourth power supply terminal 440, so as to further simplify the circuit structure.
The pull-down module 40 further includes a sixth response switch T6, the control end of the sixth response switch T6 is connected to the second signal end 430, the second signal end 430 provides the scan signal Gx of the second signal end 430, the first end of the sixth response switch T6 is connected to the first end of the coupling capacitor C, and the second end of the sixth response switch T6 is connected to the third power supply end 420; after loading of the first terminal voltage Cx of the coupling capacitor C is completed, initialization of the first terminal voltage Cx of the coupling capacitor C needs to be completed, so as to avoid the start of the driving switch T0. After the second signal terminal 430 provides the low level signal, the first terminal and the second terminal of the sixth response switch T6 are turned on, and the pull-down voltage Vgl is provided to the first terminal of the coupling capacitor C through the sixth response switch T6, so as to complete the initialization of the first terminal voltage Cx of the coupling capacitor C.
The output module 10 further includes a seventh response switch T7, a first end of the seventh response switch T7 is connected to the second end of the driving switch T0, a second end of the seventh response switch T7 is connected to the third power supply end 420, the pull-down module 40 further includes an eighth response switch T8, a first end of the eighth response switch T8 is connected to the control end of the seventh response switch T7, a second end of the eighth response switch T8 is connected to the third power supply end 420, and a control end of the eighth response switch T8 is connected to the first end of the coupling capacitor C. When the first terminal of the coupling capacitor C is at a high level, the first terminal and the second terminal of the eighth responsive switch T8 are turned on, and the low voltage of the third terminal is supplied to the control terminal of the seventh responsive switch T7, at this time, the first terminal and the second terminal of the seventh responsive switch T7 are turned off. The output module 10 is ensured to smoothly output the gate driving signal Gn.
The pull-down module 40 further includes a ninth response switch T9, a first end of the ninth response switch T9 is connected to the fifth power supply end 450, a second end of the ninth response switch T9 is connected to a first end of the eighth response switch T8, and a control end of the ninth response switch T9 is connected to the fifth power supply end 450; after the output module 10 completes the output of the gate driving signal Gn, the output terminal 120 of the output module 10 is signal initialized. The eighth responsive switch T8 is turned off, the control terminal of the ninth responsive switch T9 is responsive to the voltage of the fifth power supply terminal 450, the voltage of the fifth power supply terminal 450 is at a high level, the voltage of the fifth power supply terminal 450 is provided to the control terminal of the seventh responsive switch T7, the first terminal and the second terminal of the seventh responsive switch T7 are turned on, the pull-down voltage Vgl of the third power supply terminal 420 is provided to the output terminal 120 of the output module 10, and the voltage initialization of the output terminal 120 of the output module 10 is completed. I.e. the initialization of the second terminal of the driving switch T0 is completed.
In order to further improve the stability of the gate driving circuit, the pull-down module 40 further includes a tenth response switch T10, wherein a first end of the tenth response switch T10 is connected to the control end of the driving switch T0, a second end of the tenth response switch T10 is connected to the third power supply end 420, and a control end of the tenth response switch T10 is connected to the control end of the seventh response switch T7. After the initialization of the second terminal of the driving switch T0 is completed, the control terminal of the tenth response switch T10 is turned on in response to the high level of the fifth power supply terminal 450, the first terminal and the second terminal of the tenth response switch T10 are turned on, and the pull-down voltage Vgl is supplied to the control terminal of the driving switch T0, so that the voltage initialization of the control terminal of the driving switch T0 is completed.
Example two
Referring to fig. 5, the present application further provides a display device, where the display device includes a display panel 50, the display panel 50 has a display area 510 and a non-display area 520, the non-display area 520 is disposed at the periphery of the display area 510, the display device further includes a pixel driving circuit and a gate driving circuit as above, the pixel driving circuit is connected to a data line of the gate driving circuit, the gate driving circuit is disposed at the non-display area 520, and the pixel driving circuit is disposed at the display area 510.
The gate driving circuit includes: an output module 10, a coupling capacitor C, a pre-charge module 20 and a boost module 30. The output module 10 is provided with an output terminal 120, and the output module 10 is configured to output a gate driving signal Gn, where the gate driving signal Gn is transmitted to the pixel driving circuit through the output terminal 120.
The first end of the coupling capacitor C is connected with the output module 10; the coupling capacitor C is provided with two electrode plates, a first electrode plate C1 and a second electrode plate C2, and the first electrode plate C1 and the second electrode plate C2 are oppositely arranged. The first electrode plate C1 is a first end of the coupling capacitor C, and the second electrode plate C2 is a second end of the coupling capacitor C.
The pre-charge module 20 is connected to the first end of the coupling capacitor C, the pre-charge module 20 is configured to provide a first voltage Vdd to the first end of the coupling capacitor C, and the output module 10 is responsive to the first voltage Vdd to output the gate driving signal Gn; the first voltage Vdd is greater than the threshold voltage of the output module 10, and the first voltage Vdd is applied to the first end of the coupling capacitor C, which is equivalent to being applied to the control end of the output module 10, and after the control end of the output module 10 receives the first voltage Vdd, the output end 120 of the output module 10 outputs the gate driving signal Gn.
The first voltage Vdd can already ensure that the output module 10 outputs the gate driving signal Gn, but in order to ensure that the output module 10 functions more sufficiently, the voltage value of the first voltage Vdd needs to be increased. For this purpose, the boost module 30 is connected to the second end of the coupling capacitor C, and the boost module 30 is configured to provide the second voltage to the second end of the coupling capacitor C, and after the second end of the coupling capacitor C is loaded with the second voltage, the voltage at the second end of the coupling capacitor C is increased, and the voltage difference raised at the second end is coupled to the first end through the capacitive coupling action of the coupling capacitor C to increase the first voltage Vdd. I.e. the first end of the coupling capacitance C is likewise raised by the same voltage difference.
While the present application has been described with reference to several exemplary embodiments, it is understood that the terminology used is intended to be in the nature of words of description and illustration rather than of limitation. As the present application may be embodied in several forms without departing from the spirit or essential attributes thereof, it should be understood that the above-described embodiments are not limited by any of the details of the foregoing description, but rather should be construed broadly within its spirit and scope as defined in the appended claims, and therefore all changes and modifications that fall within the metes and bounds of the claims, or equivalences of such metes and bounds are therefore intended to be embraced by the appended claims.
Claims (6)
1. A gate drive circuit, the gate drive circuit comprising:
the output module is used for outputting a grid driving signal;
the first end of the coupling capacitor is connected with the output module;
the pre-charging module is connected with the first end of the coupling capacitor and is used for providing a first voltage for the first end of the coupling capacitor, and the output module responds to the first voltage to output the grid driving signal; and
the boosting module is connected with the second end of the coupling capacitor and is used for providing a second voltage for the second end of the coupling capacitor so as to increase the first voltage in a coupling way;
the output module comprises a driving switch, a control end of the driving switch is connected with a first end of the coupling capacitor, and the control end of the driving switch is used for responding to the first voltage;
the pre-charging module comprises a first response switch, wherein the first response switch is used for responding to a first scanning signal so as to apply the first voltage to a first end of the coupling capacitor;
the boost module comprises a second response switch for responding to a second scanning signal to apply the second voltage to a second end of the coupling capacitor;
the control end of the first response switch is connected with a first scanning line, the first scanning line is used for providing the first scanning signal, the first end of the first response switch is connected with the first end of the coupling capacitor, the second end of the first response switch is connected with a first power supply end, and the first power supply end is used for providing the first voltage;
the control end of the second response switch is connected with a second scanning line, the second scanning line is used for providing the second scanning signal, the first end of the second response switch is connected with the second end of the coupling capacitor, the second end of the second response switch is connected with a second power supply end, and the second power supply end is used for providing the second voltage;
the output module further comprises a clock signal end, wherein the clock signal end is used for providing the grid driving signal, the clock signal end is connected with the first end of the driving switch, and the control end of the driving switch responds to the first voltage and transmits the grid driving signal to the second end of the driving switch;
the grid driving circuit further comprises a pull-down module, wherein the pull-down module is connected to the first end of the coupling capacitor and is used for providing pull-down voltage, the first voltage and the second voltage are high voltages, and the pull-down voltage is low voltage;
the pull-down module comprises a third response switch, a first end of the third response switch is connected with a second end of the coupling capacitor, a second end of the third response switch is connected with a third power supply end, a control end of the third response switch is connected with a third scanning line, the third scanning line provides a third scanning signal, and a control end of the third response switch is used for responding to the third scanning signal and providing pull-down voltage of the third power supply end to the second end of the coupling capacitor.
2. The gate drive circuit of claim 1, wherein the first supply terminal and the second supply terminal are the same supply terminal, and the first voltage and the second voltage are equal.
3. The gate driving circuit of claim 1, wherein the second scan line is connected to the clock signal terminal, and the gate driving signal and the second scan signal are the same signal.
4. The gate drive circuit of claim 1, wherein the pre-charge module comprises a first signal terminal connected to a control terminal of the first responsive switch, the first signal terminal for providing the first scan signal;
the boosting module further comprises a fourth response switch, wherein a first end of the fourth response switch is connected with the second power supply end, a second end of the fourth response switch is connected with a control end of the second response switch, and a control end of the fourth response switch is connected with the second power supply end;
the pull-down module further comprises a fifth response switch and a sixth response switch, wherein a first end of the fifth response switch is connected with a control end of the second response switch, a second end of the fifth response switch is connected with the third power supply end, and a control end of the fifth response switch is connected with a fourth power supply end;
the control end of the sixth response switch is connected with the second signal end, the first end of the sixth response switch is connected with the first end of the coupling capacitor, and the second end of the sixth response switch is connected with the third power supply end.
5. The gate driving circuit according to any one of claims 1 to 4, wherein the driving switch is a thin film transistor switch.
6. A display device comprising a display panel having a display region and a non-display region, the non-display region being disposed at a periphery of the display region, characterized in that the display device further comprises a pixel driving circuit and a gate driving circuit according to any one of claims 1 to 5, the pixel driving circuit being connected to a data line of the gate driving circuit, the gate driving circuit being disposed at the non-display region, the pixel driving circuit being disposed at the display region.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211061736.0A CN115294915B (en) | 2022-08-29 | 2022-08-29 | Gate driving circuit and display device |
| PCT/CN2022/143459 WO2024045452A1 (en) | 2022-08-29 | 2022-12-29 | Gate drive circuit and display apparatus |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211061736.0A CN115294915B (en) | 2022-08-29 | 2022-08-29 | Gate driving circuit and display device |
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| CN115294915A CN115294915A (en) | 2022-11-04 |
| CN115294915B true CN115294915B (en) | 2023-07-18 |
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| CN202211061736.0A Active CN115294915B (en) | 2022-08-29 | 2022-08-29 | Gate driving circuit and display device |
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| WO (1) | WO2024045452A1 (en) |
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| CN115294915B (en) * | 2022-08-29 | 2023-07-18 | 惠科股份有限公司 | Gate driving circuit and display device |
| CN115691393B (en) * | 2022-11-14 | 2024-01-23 | 惠科股份有限公司 | Gate driving circuit and display device |
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| WO2024045452A1 (en) | 2024-03-07 |
| CN115294915A (en) | 2022-11-04 |
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