CN115267517A - Universal test circuit and method based on 1149 protocol test and board card - Google Patents
Universal test circuit and method based on 1149 protocol test and board card Download PDFInfo
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- CN115267517A CN115267517A CN202210957230.1A CN202210957230A CN115267517A CN 115267517 A CN115267517 A CN 115267517A CN 202210957230 A CN202210957230 A CN 202210957230A CN 115267517 A CN115267517 A CN 115267517A
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- 238000012360 testing method Methods 0.000 title claims abstract description 122
- 238000000034 method Methods 0.000 title claims abstract description 11
- 238000012812 general test Methods 0.000 claims description 22
- 238000010998 test method Methods 0.000 claims description 6
- 238000013461 design Methods 0.000 abstract description 5
- 238000011161 development Methods 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
- G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
Abstract
The invention discloses a universal test circuit, a method and a board card based on an 1149 protocol test, wherein the test circuit comprises a programming unit and a switching unit which are connected with each other, the programming unit is provided with an 1149 interface and is used for connecting an upper computer and receiving a test instruction of an 1149 bus, the switching unit is provided with a test port and is used for connecting an interface of a device to be tested, the programming unit is connected with the switching unit through an I/O port, the programming unit tests a designated signal on the device to be tested according to the test instruction, the switching unit configures the interface characteristic of the switching unit according to the performance of the interface of the device to be tested, the test circuit card is generalized, the test design is simplified, and the test reliability is increased.
Description
Technical Field
The invention relates to the technical field of testing, in particular to a universal test circuit, a universal test method and a board card based on 1149 protocol testing.
Background
The modern circuit board has high manufacturing element density and small area, the circuit board sometimes has difficulty in having the position of a test pin, and the on-off function on the circuit board is usually checked through different interfaces of the circuit board by means of the 1149 bus protocol of a chip.
At present, the digital chip clock is higher and higher, and it is becoming a more and more common trend to adopt high speed sequence of up to GHz clock to transmit data, and today, ultra large scale IC design often has the characteristics of partial or whole SOC design: the method has the advantages that a specific test board card is required to be inserted into an external interface of the machine to be tested to form a closed circuit system with the machine to be tested, so that the test condition of the 1149 protocol is met, the built test system has a defect, different test cards need to be developed for different interfaces, the development workload is large, the reliability is poor, the universal test board card can be adapted to various interfaces, the test of all the interfaces is completed by using one test board card, and the test development efficiency is greatly improved.
Therefore, it is an urgent problem to develop a test board card that can be used in various test devices.
Disclosure of Invention
The invention aims to provide a universal test circuit, a method and a board card based on 1149 protocol test, which apply a tested signal to an interface of a device to be tested through a switching unit by programming of a programming unit, configure the performance of the switching unit and the performance of the interface of the programming unit based on the performance of the tested signal, realize the universality of the test circuit and improve the test development efficiency.
In a first aspect, the above object of the present invention is achieved by the following technical solutions:
a general test circuit based on 1149 protocol test comprises a programming unit and a switching unit which are connected with each other, wherein the programming unit is provided with an 1149 interface and is used for connecting an upper computer and receiving a test instruction of an 1149 bus, the switching unit is provided with a test port and is used for connecting an interface of equipment to be tested, the programming unit tests an appointed signal on the equipment to be tested according to the test instruction, and the switching unit configures the interface characteristic of the switching unit according to the performance of the interface of the equipment to be tested.
The invention is further configured to: the switching unit comprises three interfaces, namely a port to be tested for connecting the interface of the equipment to be tested, a first programmable port and a second programmable port for connecting the programming unit.
The invention is further configured to: the switching unit comprises a resistor combination, two ends of the series resistor combination are respectively used as an interface of the switching unit and used for connecting a first programmable port and a second programmable port of the programming unit, and the series connection point of the first programmable port and the second programmable port is used as a port to be tested for connecting an interface of equipment to be tested.
The invention is further configured to: the test device comprises a switching unit array, a programming unit comprises a field programmable logic gate array, and programmable I/O ports of the field programmable logic gate array are respectively connected with the programmable ports of one switching unit to transmit test signals.
In a second aspect, the above object of the present invention is achieved by the following technical solutions:
a universal test method based on 1149 protocol test is characterized in that an input port of a programming unit is used for receiving a test instruction of an 1149 bus of an upper computer, the programming unit applies a tested signal to a port to be tested of a device to be tested through a switching unit according to the programming instruction, and the interface performance of the switching unit is configured according to the performance of the tested signal.
The invention is further configured to: when a signal to be tested on a port to be tested of the equipment to be tested is output, a programming unit sets one programmable port as input and the other programmable port as output, and the output level of a programmable output port is determined by the characteristics of an interface of the equipment to be tested; when the tested signal on the testing port of the device to be tested is input, the two programmable ports are configured to output, and the response of the signal to be tested is tested according to the characteristics of the tested signal.
The invention is further configured to: when a tested signal on a port to be tested of the equipment to be tested is output, the first programmable port is configured to be input, the second programmable port is configured to be output, and when the tested output signal has a pull-up characteristic, the output level of the second programmable port is set to be a low level; when the output signal to be tested has a pull-down characteristic, the output level of the second programmable port is set to be high level.
The invention is further configured to: when a signal to be tested on a port to be tested of the equipment to be tested is input, the first programmable port and the second programmable port are both configured to output, when the first programmable port and the second programmable port output high levels completely, the response of the port to be tested of the equipment to be tested to the high levels is tested, and when the first programmable port and the second programmable port output low levels completely, the response of the port to be tested of the equipment to be tested to the low levels is tested.
In a third aspect, the above object of the present invention is achieved by the following technical solutions:
a general test board card based on 1149 protocol test comprises a general test circuit and a device to be tested to form a closed loop.
In a fourth aspect, the above object of the present invention is achieved by the following technical solutions:
the utility model provides a general test system based on test of 1149 protocol, includes general test integrated circuit board, host computer that are connected, and the host computer communicates through the 1149 bus with general test integrated circuit board, transmits test instruction, and general test integrated circuit board is used for being connected with the equipment that awaits measuring, and based on the 1149 bus protocol of host computer, general test integrated circuit board applys test signal to the equipment interface that awaits measuring, tests the equipment that awaits measuring.
Compared with the prior art, the beneficial technical effects of this application do:
1. the method and the device have the advantages that the test circuit is arranged, the interface characteristics of the equipment to be tested are programmed, the interface supports 1149 protocols, and therefore the test of the equipment to be tested is achieved;
2. furthermore, the test circuit and the equipment to be tested form a closed circuit system to meet the test condition of 1149 protocol, and then the boundary scan test of the equipment to be tested is realized by utilizing 1149 bus characteristics in the programmable logic array;
3. furthermore, the application uses the programmable I/O port characteristics of the programmable logic array and combines the switching unit array to realize the generalization of the test board card, simplify the test design and increase the test reliability.
Drawings
FIG. 1 is a schematic diagram of a generic test circuit configuration of one embodiment of the present application;
fig. 2 is a schematic structural diagram of a conversion unit according to an embodiment of the present application.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings.
The utility model provides a general test circuit based on 1149 protocol test, as shown in fig. 1, including programming unit, the switching unit that is connected, the input interface of programming unit passes through 1149 bus and is connected with the host computer for receive the program of host computer, set up output interface, output interface is connected with the switching unit, the switching unit is connected with the equipment that awaits measuring, the programming unit passes through output interface, apply test signal to the equipment that awaits measuring, the programming unit detects the response of output interface to test signal, realize the test to the equipment that awaits measuring.
The switching unit is used for adapting to logic conversion of different test signals and comprises three interfaces, wherein two interfaces are used for being connected with the programming unit interface and are respectively a first programmable port and a second programmable port, the third interface is used for being connected with the equipment interface to be tested and is a port to be tested, and output is applied or detected on the first programmable port or/and the second programmable port according to the characteristics of the port to be tested.
The switching unit is a resistor combination, as shown in fig. 2, the switching unit includes a resistor R1/R2, after the resistor R1/R2 is connected in series, two terminals thereof are respectively used as a first programmable port and a second programmable port, and a series connection point of the resistor combination is used as a port to be tested.
The programming unit adopts a Field Programmable Gate Array (FPGA), and a switching unit Array is correspondingly arranged. The programmable port of each switching unit is respectively connected with one port of the field programmable logic gate array, and the port to be tested of each switching unit is respectively connected with one interface of the equipment to be tested.
The field programmable gate array supports Joint Test Action Group (JTAG), in the application, JTAG ports of the field programmable gate array are adopted for connection, boundary scan characteristics of integrated circuits are obtained based on Boundary Scan Description Language (BSDL) files of all field programmable gate array integrated circuits, and under the support of BSDL, a field programmable gate array integrated circuit device can generate test logic defined by IEEE1149 standard.
According to the general test method based on the 1149 protocol test, the interface characteristics of the field programmable gate array are changed by adopting a burning method so as to adapt to different interfaces of the equipment to be tested, and the test circuit based on the 1149 protocol test is universal to all the equipment to be tested.
The upper computer transmits a test instruction to the universal test circuit through the 1149 protocol bus, the programming unit applies a tested signal to the device to be tested through the switching unit according to the programming instruction, and the interface performance of the switching unit is configured according to the performance of the tested signal; and setting the I/O port of the programming unit according to the interface characteristics of the equipment to be tested.
When the tested signal of the device interface to be tested is an output signal, the programming unit configures one programmable port as an input and the other programmable port as an output, and determines the output level of the programmable output port according to the characteristics of the device interface to be tested.
When the tested signal of the device interface to be tested is an input signal, the programming unit configures the two programmable ports to output, and tests the response of the device interface to be tested to the input signal.
Specifically, when a signal to be tested of the device interface to be tested is an output signal, the first programmable port is configured to be input, and the second programmable port is configured to be output.
When the output signal to be tested has a pull-up characteristic, setting the output level of the second programmable I/O port as a low level; when the output signal to be tested has the pull-down characteristic, the output level of the second programmable I/O port is set to be high level, and thus, misdetection can be avoided under the suspension condition.
And when the tested signal of the device interface to be tested is an input signal, the first programmable port and the second programmable port are configured to output.
And when the first programmable port and the second programmable port output low levels completely, testing the response of the to-be-tested port of the to-be-tested equipment to the low levels.
The test method is adopted to test the equipment to be tested, and for different equipment to be tested, the firmware in the programming unit is changed through the burning method, so that the universal test circuit can be universally used for all the equipment to be tested.
The utility model provides a general test system based on test of 1149 protocol, including general test integrated circuit board, the host computer that is connected, the host computer carries out the communication through the 1149 bus with general test integrated circuit board, transmits test command, and general test integrated circuit board is used for being connected with the equipment under test, and based on the 1149 bus protocol of host computer, general test integrated circuit board applys test signal to the equipment under test interface, tests the equipment under test.
By adopting the universal test board card, the test circuit is shared, the test design is simplified, and the test reliability is improved.
The embodiments of the present invention are preferred embodiments of the present invention, and the scope of the present invention is not limited by these embodiments, so: all equivalent changes made according to the structure, shape and principle of the invention are covered by the protection scope of the invention.
Claims (10)
1. A general test circuit based on an 1149 protocol test is characterized by comprising a programming unit and a switching unit which are connected with each other, wherein the programming unit is provided with an 1149 interface and used for connecting an upper computer and receiving 1149 bus test instructions, the switching unit is provided with a test port and used for connecting an interface of a device to be tested, the programming unit tests a designated signal on the device to be tested according to the test instructions, and the switching unit configures the interface characteristics of the switching unit according to the performance of the interface of the device to be tested.
2. The universal test circuit according to claim 1, wherein the adapter unit comprises three interfaces, which are a test port for connecting to a device under test interface, a first programmable port for connecting to the programming unit, and a second programmable port for connecting to the programming unit.
3. The universal test circuit according to claim 2, wherein the switch unit comprises a resistor combination, two ends of the series resistor combination are respectively used as an interface of the switch unit for connecting the first programmable port and the second programmable port of the programming unit, and a series connection point of the series resistor combination is used as a test port for connecting the interface of the device under test.
4. The universal test circuit for testing based on the 1149 protocol of claim 1, comprising an array of switch cells, wherein the programming unit comprises a field programmable gate array, and the programmable I/O ports of the field programmable gate array are respectively connected to the programmable ports of one switch cell for transmitting the test signal.
5. A general test method based on 1149 protocol test is characterized in that an input port of a programming unit is used for receiving a test instruction of an 1149 bus of an upper computer, the programming unit applies a tested signal to a to-be-tested port of a device to be tested through a switching unit according to the programming instruction, and the interface performance of the switching unit is configured according to the performance of the tested signal.
6. The universal test method according to claim 5, wherein when the signal under test on the test port of the device under test is output, the programming unit sets one of the programmable ports as input and the other programmable port as output, and the characteristics of the interface of the device under test determine the output level of the programmable output port; when the tested signal on the testing port of the device to be tested is input, the two programmable ports are configured to output, and the response of the signal to be tested is tested according to the characteristics of the tested signal.
7. The universal test method according to claim 6, wherein when the tested signal on the port of the device under test is output, the first programmable port is configured as input, the second programmable port is configured as output, and when the tested output signal has pull-up characteristic, the output level of the second programmable port is set to low level; and when the output signal to be tested has a pull-down characteristic, the output level of the second programmable port is set to be high level.
8. The universal test method according to claim 6, wherein when the signal under test on the test port of the device under test is input, both the first programmable port and the second programmable port are configured to output, when the first programmable port and the second programmable port all output high levels, the response of the test port of the device under test to high levels is tested, and when the first programmable port and the second programmable port all output low levels, the response of the test port of the device under test to low levels is tested.
9. A universal test board card based on 1149 protocol test, comprising a universal test circuit, forming a closed loop with a device under test, and performing a test on the device under test by using the method of any one of claims 5 to 8.
10. The utility model provides a general test system based on 1149 protocol test which characterized in that, includes general test integrated circuit board, the host computer that is connected, the host computer communicates through 1149 bus with general test integrated circuit board, transmits test instruction, general test integrated circuit board is used for being connected with the equipment that awaits measuring, based on the 1149 bus protocol of host computer, general test integrated circuit board applys test signal to the equipment interface that awaits measuring, awaits measuring equipment and tests.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202210957230.1A CN115267517A (en) | 2022-08-10 | 2022-08-10 | Universal test circuit and method based on 1149 protocol test and board card |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202210957230.1A CN115267517A (en) | 2022-08-10 | 2022-08-10 | Universal test circuit and method based on 1149 protocol test and board card |
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Application publication date: 20221101 |