CN115172479B - Solar cell, preparation method thereof and photovoltaic module - Google Patents
Solar cell, preparation method thereof and photovoltaic module Download PDFInfo
- Publication number
- CN115172479B CN115172479B CN202210923575.5A CN202210923575A CN115172479B CN 115172479 B CN115172479 B CN 115172479B CN 202210923575 A CN202210923575 A CN 202210923575A CN 115172479 B CN115172479 B CN 115172479B
- Authority
- CN
- China
- Prior art keywords
- layer
- semiconductor substrate
- film layer
- region
- doping
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000002360 preparation method Methods 0.000 title claims abstract description 17
- 239000000758 substrate Substances 0.000 claims abstract description 109
- 239000004065 semiconductor Substances 0.000 claims abstract description 102
- 238000010438 heat treatment Methods 0.000 claims abstract description 53
- 230000005641 tunneling Effects 0.000 claims abstract description 20
- 239000010410 layer Substances 0.000 claims description 218
- 238000000034 method Methods 0.000 claims description 51
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 14
- 229910052796 boron Inorganic materials 0.000 claims description 14
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 6
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 6
- 229910052733 gallium Inorganic materials 0.000 claims description 6
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 6
- 238000004519 manufacturing process Methods 0.000 claims description 5
- 239000002356 single layer Substances 0.000 claims description 4
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 claims description 3
- 229910000449 hafnium oxide Inorganic materials 0.000 claims description 3
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 claims description 3
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 claims description 3
- 230000003667 anti-reflective effect Effects 0.000 abstract description 4
- 238000009792 diffusion process Methods 0.000 description 17
- 230000008569 process Effects 0.000 description 17
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 16
- 229910052710 silicon Inorganic materials 0.000 description 16
- 239000010703 silicon Substances 0.000 description 16
- 238000002161 passivation Methods 0.000 description 15
- 238000006243 chemical reaction Methods 0.000 description 12
- 238000002203 pretreatment Methods 0.000 description 12
- 230000000694 effects Effects 0.000 description 11
- 238000005530 etching Methods 0.000 description 10
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 10
- 229920005591 polysilicon Polymers 0.000 description 9
- 230000000052 comparative effect Effects 0.000 description 8
- 238000005215 recombination Methods 0.000 description 8
- 230000006798 recombination Effects 0.000 description 8
- 238000000151 deposition Methods 0.000 description 7
- 229910052751 metal Inorganic materials 0.000 description 7
- 239000002184 metal Substances 0.000 description 7
- 238000005245 sintering Methods 0.000 description 7
- 238000003475 lamination Methods 0.000 description 6
- 239000002002 slurry Substances 0.000 description 6
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 5
- 239000012790 adhesive layer Substances 0.000 description 5
- 238000010586 diagram Methods 0.000 description 5
- 238000005538 encapsulation Methods 0.000 description 5
- 229910052698 phosphorus Inorganic materials 0.000 description 5
- 239000011574 phosphorus Substances 0.000 description 5
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 4
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 4
- 239000002390 adhesive tape Substances 0.000 description 4
- 239000002905 metal composite material Substances 0.000 description 4
- 238000004806 packaging method and process Methods 0.000 description 4
- 229910052709 silver Inorganic materials 0.000 description 4
- 239000004332 silver Substances 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 239000002313 adhesive film Substances 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 239000002131 composite material Substances 0.000 description 3
- 230000008021 deposition Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 238000011065 in-situ storage Methods 0.000 description 3
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 3
- 230000003647 oxidation Effects 0.000 description 3
- 238000007254 oxidation reaction Methods 0.000 description 3
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 3
- 238000007789 sealing Methods 0.000 description 3
- 229910010271 silicon carbide Inorganic materials 0.000 description 3
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 3
- 229910052814 silicon oxide Inorganic materials 0.000 description 3
- 239000000243 solution Substances 0.000 description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- 239000003929 acidic solution Substances 0.000 description 2
- 239000012670 alkaline solution Substances 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 238000001505 atmospheric-pressure chemical vapour deposition Methods 0.000 description 2
- ILAHWRKJUDSMFH-UHFFFAOYSA-N boron tribromide Chemical compound BrB(Br)Br ILAHWRKJUDSMFH-UHFFFAOYSA-N 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000001035 drying Methods 0.000 description 2
- 239000005038 ethylene vinyl acetate Substances 0.000 description 2
- 239000003292 glue Substances 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000001465 metallisation Methods 0.000 description 2
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 2
- 238000005240 physical vapour deposition Methods 0.000 description 2
- 229920001200 poly(ethylene-vinyl acetate) Polymers 0.000 description 2
- -1 polyethylene octene Polymers 0.000 description 2
- 229920000139 polyethylene terephthalate Polymers 0.000 description 2
- 239000005020 polyethylene terephthalate Substances 0.000 description 2
- 238000007639 printing Methods 0.000 description 2
- 238000007650 screen-printing Methods 0.000 description 2
- 238000005204 segregation Methods 0.000 description 2
- 239000007790 solid phase Substances 0.000 description 2
- 229910015845 BBr3 Inorganic materials 0.000 description 1
- 229910052582 BN Inorganic materials 0.000 description 1
- PZNSFCLAULLKQX-UHFFFAOYSA-N Boron nitride Chemical compound N#B PZNSFCLAULLKQX-UHFFFAOYSA-N 0.000 description 1
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 1
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 description 1
- KWYUFKZDYYNOTN-UHFFFAOYSA-M Potassium hydroxide Chemical compound [OH-].[K+] KWYUFKZDYYNOTN-UHFFFAOYSA-M 0.000 description 1
- 230000002378 acidificating effect Effects 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 239000002800 charge carrier Substances 0.000 description 1
- 238000003486 chemical etching Methods 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 229920001971 elastomer Polymers 0.000 description 1
- 239000000806 elastomer Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000009776 industrial production Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000010329 laser etching Methods 0.000 description 1
- 230000031700 light absorption Effects 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910017604 nitric acid Inorganic materials 0.000 description 1
- 229910052755 nonmetal Inorganic materials 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 239000004033 plastic Substances 0.000 description 1
- 229920003023 plastic Polymers 0.000 description 1
- 238000010248 power generation Methods 0.000 description 1
- 230000007723 transport mechanism Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F77/00—Constructional details of devices covered by this subclass
- H10F77/70—Surface textures, e.g. pyramid structures
- H10F77/703—Surface textures, e.g. pyramid structures of the semiconductor bodies, e.g. textured active layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F10/00—Individual photovoltaic cells, e.g. solar cells
- H10F10/10—Individual photovoltaic cells, e.g. solar cells having potential barriers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F19/00—Integrated devices, or assemblies of multiple devices, comprising at least one photovoltaic cell covered by group H10F10/00, e.g. photovoltaic modules
- H10F19/90—Structures for connecting between photovoltaic cells, e.g. interconnections or insulating spacers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F71/00—Manufacture or treatment of devices covered by this subclass
- H10F71/121—The active layers comprising only Group IV materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F71/00—Manufacture or treatment of devices covered by this subclass
- H10F71/128—Annealing
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F77/00—Constructional details of devices covered by this subclass
- H10F77/20—Electrodes
- H10F77/206—Electrodes for devices having potential barriers
- H10F77/211—Electrodes for devices having potential barriers for photovoltaic cells
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F77/00—Constructional details of devices covered by this subclass
- H10F77/30—Coatings
- H10F77/306—Coatings for devices having potential barriers
- H10F77/311—Coatings for devices having potential barriers for photovoltaic cells
- H10F77/315—Coatings for devices having potential barriers for photovoltaic cells the coatings being antireflective or having enhancing optical properties
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Photovoltaic Devices (AREA)
Abstract
本申请涉及一种太阳能电池及其制备方法、光伏组件，制备方法包括：提供半导体衬底；对所述半导体衬底进行制绒处理；在所述制绒后的半导体衬底的正面形成预处理膜层，所述预处理膜层中含有掺杂元素；在所述预处理膜层表面进行第一热处理使得对应于金属化区域的半导体衬底内形成重掺杂区以及在所述预处理膜层表面进行第二热处理使得对应于非金属化区域的半导体衬底内形成轻掺杂区，所述第一热处理温度高于第二热处理温度；在半导体衬底的背面形成隧穿层以及掺杂导电层；在半导体衬底的正面以及背面分别形成正面减反射层和背面减反射层，其中，所述正面减反射层位于预处理膜层之上；以及在半导体衬底的正面以及背面分别形成正面电极和背面电极。
The present application relates to a solar cell, a preparation method thereof, and a photovoltaic module. The preparation method includes: providing a semiconductor substrate; performing texturing treatment on the semiconductor substrate; and forming pretreatment on the front side of the texturized semiconductor substrate. film layer, the pretreatment film layer contains doping elements; a first heat treatment is performed on the surface of the pretreatment film layer to form a heavily doped region in the semiconductor substrate corresponding to the metallized region and in the pretreatment film Performing a second heat treatment on the surface of the layer to form a lightly doped region in the semiconductor substrate corresponding to the non-metallized region, the first heat treatment temperature being higher than the second heat treatment temperature; forming a tunneling layer and doping on the back side of the semiconductor substrate Conductive layer; forming a front anti-reflective layer and a back anti-reflective layer on the front and back of the semiconductor substrate respectively, wherein the front anti-reflective layer is located on the pretreatment film layer; and forming on the front and back of the semiconductor substrate respectively Front electrode and back electrode.
Description
[ field of technology ]
The invention relates to the technical field of solar cell processing, in particular to a solar cell, a preparation method thereof and a photovoltaic module.
[ background Art ]
In recent years, as a mainstream technology of solar energy resources, a photovoltaic power generation technology has been commercialized and commercialized, and in order to further advance the utilization and popularization of photovoltaic cell products, it is required to gradually increase the battery efficiency, so how to increase the cost and the battery conversion efficiency in the preparation process of the solar cell is also an urgent problem to be solved by the photovoltaic industry.
In crystalline silicon solar cells, the uniformly doped layer in contact with the electrode cannot meet the requirements in two ways simultaneously: on one hand, light doping is needed to reduce metal recombination; on the other hand, high surface concentration is required to be formed by heavy doping, so that ohmic contact is formed between the silicon chip and the metal electrode. Selective doping is often achieved using localized doping techniques to improve cell efficiency. The local doping technique acts on the emitter, which can realize a selective emitter (SE, selective emitter), however, the existing selective emitter has higher metal recombination current, resulting in limited efficiency improvement of the solar cell.
[ invention ]
In order to overcome the defects, the application provides a solar cell, a preparation method thereof and a photovoltaic module, and the pretreatment film layer provided by the application can not only provide a doping source of a selective emitter, but also be directly used as a passivation layer, so that the process is simplified and the conversion efficiency of the cell is improved.
In a first aspect, the present application provides a method for manufacturing a solar cell, including the steps of:
providing a semiconductor substrate;
performing texturing treatment on the semiconductor substrate;
forming a pretreatment film layer on the front surface of the semiconductor substrate after texturing, wherein the pretreatment film layer contains doping elements;
performing a first heat treatment on the surface of the pretreatment film layer to form a heavily doped region in the semiconductor substrate corresponding to the metalized region, and performing a second heat treatment on the surface of the pretreatment film layer to form a lightly doped region in the semiconductor substrate corresponding to the non-metalized region, wherein the first heat treatment temperature is higher than the second heat treatment temperature;
forming a tunneling layer and a doped conductive layer on the back surface of the semiconductor substrate;
forming a front anti-reflection layer and a back anti-reflection layer on the front surface and the back surface of the semiconductor substrate respectively, wherein the front anti-reflection layer is positioned on the pretreatment film layer; and
and forming a front electrode and a back electrode on the front surface and the back surface of the semiconductor substrate respectively.
In an alternative embodiment, the refractive index of the pretreatment film layer is greater than 1.6.
In an alternative embodiment, the pretreatment film layer is a single-layer or multi-layer structure; and/or the thickness of the pretreatment film layer is greater than 2nm.
In an alternative embodiment, the pretreatment film layer includes at least one of silicon nitride, titanium oxide, and hafnium oxide.
In an alternative embodiment, the doping element includes a positive trivalent element; and/or the doping element comprises at least one of boron and gallium.
In an alternative embodiment, the pre-treatment film has a doping concentration of 1E18 cm -3 ～1E21 cm -3 The method comprises the steps of carrying out a first treatment on the surface of the And/or the doping concentration of the pretreatment film layer positioned in the metalized region is greater than the doping concentration of the pretreatment film layer positioned in the non-metalized region.
In an alternative embodiment, the heavily doped region after the first heat treatment has a doping concentration of 1E16cm -3 ～1E20 cm -3 The method comprises the steps of carrying out a first treatment on the surface of the And/or the doping concentration of the heavily doped region close to the pretreatment film layer is greater than the doping concentration of the heavily doped region far away from the pretreatment film layer.
In an alternative embodiment, the difference in sheet resistance between the heavily doped region and the lightly doped region is in the range of 30 to 500 ohms/sq.
In an alternative embodiment, the doping concentration of the pre-treated film layer after the second heat treatment is 1E17 cm -3 ～1E21 cm -3 。
In an alternative embodiment, the heavily doped region after the front electrode is formed has a doping concentration of 1E17 cm -3 ～1E21 cm -3 And/or the doping concentration of the heavily doped region close to the pretreatment film layer is greater than the doping concentration of the heavily doped region far away from the pretreatment film layer.
In an alternative embodiment, the lightly doped region after the front electrode is formed has a doping concentration of 1E16cm -3 ～1E20 cm -3 The method comprises the steps of carrying out a first treatment on the surface of the And/or the doping concentration of the lightly doped region near the pretreatment film layer is greater than the doping concentration of the lightly doped region far from the pretreatment film layer.
In an alternative embodiment, the front side anti-reflection layer after the front side electrode is formed also contains a doping element, and the doping concentration of the front side anti-reflection layer near the pretreatment film layer is greater than the doping concentration of the front side anti-reflection layer far from the pretreatment film layer.
In a second aspect, the present application provides a solar cell comprising:
a semiconductor substrate having opposite front and back sides;
the semiconductor device comprises a semiconductor substrate, a heavy doping region and a light doping region, wherein the heavy doping region and the light doping region are positioned on the front surface of the semiconductor substrate, the heavy doping region corresponds to a metalized region of the semiconductor substrate, and the light doping region corresponds to a non-metalized region of the semiconductor substrate;
a pretreatment film layer covering the heavily doped region and the lightly doped region;
a front side anti-reflection layer covering the pretreatment film layer;
the tunneling layer, the doped conductive layer and the back antireflection layer are positioned on the back of the semiconductor substrate;
a front electrode in contact with the heavily doped region and a back electrode in contact with the doped conductive layer.
In a third aspect, the present application provides a photovoltaic module comprising a plurality of solar cell strings, each formed by electrically connecting solar cells of the second aspect.
Compared with the prior art, the application has the following progress:
according to the solar cell, the pretreatment film layer containing the doping element is subjected to first heat treatment and second heat treatment, the first heat treatment temperature is higher than the second heat treatment temperature, so that a heavy doping region corresponding to a metalized region and a light doping region corresponding to a non-metalized region are formed, a passivation layer is formed while a selective emitter structure is obtained, the selective emitter prepared by the method can reduce the current of a metal composite region, and the voltage-on circuit is improved, so that the conversion efficiency of the solar cell is effectively improved. Compared with the existing selective emitter structure, the preparation method does not need etching after the selective emitter is formed, and does not need to prepare a passivation layer after the selective emitter is formed, so that the process can be effectively simplified, and the cost is reduced.
Additional features and advantages of embodiments of the application will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of embodiments of the application. The objectives and other advantages of the embodiments of the application will be realized and attained by the structure particularly pointed out in the written description and drawings.
[ description of the drawings ]
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the embodiments will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a flow chart of the preparation of a solar cell of the present application;
FIG. 2 is a schematic view of a pre-treatment film formed on the front side of a semiconductor substrate after being textured;
FIG. 3 is a schematic diagram of a heavily doped region formed in the present application;
FIG. 4 is a schematic diagram of a lightly doped region formed in the present application;
fig. 5 is a schematic structural diagram of forming a tunneling layer and a doped conductive layer on the back surface of a semiconductor substrate according to the present application;
FIG. 6 is a schematic diagram of the structure of the front side antireflection layer and the back side antireflection layer formed on the front side and the back side of a semiconductor substrate, respectively;
FIG. 7 is a structural view of a solar cell prepared according to the present application;
fig. 8 is a schematic structural diagram of the photovoltaic module of the present application.
Fig. 2 to 8:
1-a semiconductor substrate;
2-pre-treating the film layer;
3-selective emitter;
31-heavily doped region;
32-lightly doped regions;
a 4-tunneling layer;
5-doping the conductive layer;
6-a front side anti-reflection layer;
7-a backside anti-reflection layer;
8-front electrode;
9-a back electrode;
1000-photovoltaic module;
100-solar cell;
200-a first cover plate;
300-a first packaging adhesive layer;
400-a second packaging adhesive layer;
500-second cover plate.
[ detailed description ] of the invention
For a better understanding of the technical solution of the present invention, the following detailed description of the embodiments of the present invention refers to the accompanying drawings.
It should be understood that the described embodiments are merely some, but not all, embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The terminology used in the embodiments of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in this application and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
It should be understood that the term "and/or" as used herein is merely one relationship describing the association of the associated objects, meaning that there may be three relationships, e.g., a and/or B, may represent: a exists alone, A and B exist together, and B exists alone. In addition, the character "/" herein generally indicates that the front and rear associated objects are an "or" relationship.
It should be noted that, the terms "upper", "lower", "left", "right", and the like in the embodiments of the present invention are described in terms of the angles shown in the drawings, and should not be construed as limiting the embodiments of the present application. In the context of this document, it will also be understood that when an element is referred to as being "on" or "under" another element, it can be directly on the other element or be indirectly on the other element through intervening elements.
It should be noted that the steps illustrated in the flowcharts of the figures may be performed in a computer system such as a set of computer executable instructions, and that although a logical order is illustrated in the flowcharts, the order of the steps of the embodiments is not limited to being performed in order according to the order in which they are arranged in the present specification, and in some cases, the steps may be performed in an order different from that shown or described herein, as appropriate.
The selective emitter structure (selective emitter, abbreviated as se) is formed by heavily doping an electrode contact region, lightly doping electrodes, and optimizing an emitter region, so that contact resistance between a metal electrode and a silicon wafer can be reduced, carrier recombination of a diffusion layer region can be reduced, output voltage and current of a battery can be enhanced, and battery efficiency can be remarkably improved.
The Selective Emitter (SE) structure of phosphorus has been used in industrial production at present, but the boron SE structure has not been used effectively. At present, some preparation methods aiming at a boron se structure exist in the industry, and the preparation methods are mainly divided into the following two main types: (1) The method for preparing the boron SE structure by combining a mask method with a secondary boron diffusion method mainly comprises the steps of growing a mask layer on a silicon substrate in advance, then etching a local area to form a window, then performing primary boron diffusion to form heavy doping, removing the mask, and performing secondary boron diffusion to form light doping; (2) The laser SE method mainly realizes heavy doping through deposition or coating of a boron source and then laser propulsion of a local area, and other areas which are not laser-doped realize light doping, so that a SE structure is realized, however, the doping concentration of a heavy doping area of the existing SE structure is limited to be improved, the process steps are complicated, the composite current of a metal area is high, and further the conversion efficiency of a solar cell is difficult to be further improved.
Therefore, the preparation method of the solar cell is provided, and the pretreatment film layer is formed on the front surface of the semiconductor substrate, so that the pretreatment film layer can be used as a passivation layer directly without subsequent etching while a doping source forms a selective emitter, the current of a metal composite region can be reduced, a voltage-on circuit is improved, and the conversion efficiency of the solar cell is effectively improved.
The preparation method of the solar cell, as shown in fig. 1, comprises the following steps:
providing a semiconductor substrate 1;
performing texturing treatment on the semiconductor substrate 1;
forming a pretreatment film layer 2 on the front surface of the semiconductor substrate 1 after flocking, wherein the pretreatment film layer 2 contains doping elements;
performing a first heat treatment on the surface of the pretreatment film layer 2 to form a heavily doped region 31 in the semiconductor substrate 1 corresponding to the metallized region and performing a second heat treatment on the surface of the pretreatment film layer 2 to form a lightly doped region 32 in the semiconductor substrate 1 corresponding to the non-metallized region, wherein the first heat treatment temperature is higher than the second heat treatment temperature;
forming a tunneling layer 4 and a doped conductive layer 5 on the back surface of the semiconductor substrate 1;
forming a front side antireflection layer 6 and a back side antireflection layer 7 on the front side and the back side of the semiconductor substrate 1 respectively, wherein the front side antireflection layer 6 is positioned above the pretreatment film layer 2; and
a front electrode 8 and a back electrode 9 are formed on the front and back surfaces of the semiconductor substrate 1, respectively.
In the above scheme, the pretreatment film layer 2 containing the doping element is subjected to the first heat treatment and the second heat treatment, and the first heat treatment temperature is higher than the second heat treatment temperature, so that the heavy doping region 31 corresponding to the metalized region and the light doping region 32 corresponding to the non-metalized region are formed, the passivation layer is formed while the selective emitter 3 structure is obtained, the selective emitter 3 prepared by the method can reduce the current of the metal composite region, and the open-voltage circuit is improved, so that the conversion efficiency of the solar cell is effectively improved. Compared with the existing selective emitter 3 structure, the preparation method does not need etching after the selective emitter 3 is formed, and does not need to prepare a passivation layer after the selective emitter 3 is formed, so that the process can be effectively simplified, and the cost is reduced. Hereinafter, a process for manufacturing a solar cell according to the present application will be clearly and completely described with reference to the drawings in the embodiments of the present invention, and the described embodiments are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Step 100, providing a semiconductor substrate 1.
In some embodiments, the front surface of the semiconductor substrate 1 is a surface facing the sun (i.e., a light receiving surface), and the back surface of the semiconductor substrate 1 is a surface facing away from the sun (i.e., a back surface).
In some embodiments, the semiconductor substrate 1 is a silicon substrate, which may be a polycrystalline silicon substrate, a monocrystalline silicon substrate, or a monocrystalline-like silicon substrate.
In some embodiments, the semiconductor substrate 1 may be an N-type substrate, and the solar cell of the present application is an N-type cell, and in particular may be an N-PERT cell (PERT (Passivated Emitter Rear Totally-diffused, passivation emitter junction full back field diffusion) solar cell), an N-PERL cell (PERL (passivation emitter back local diffusion)), an N-TOPCon cell, and an N-IBC cell.
In some embodiments, the thickness of the semiconductor substrate 1 is 60 μm to 240 μm, specifically 60 μm, 80 μm, 90 μm, 100 μm, 120 μm, 150 μm, 200 μm, 240 μm, or the like, and is not limited herein.
Step 200, performing texturing treatment on the semiconductor substrate 1.
In some embodiments, the texturing process may be performed by etching, which may be chemical etching, laser etching, mechanical, plasma etching, and the like, and is not limited herein. Illustratively, when the semiconductor substrate 1 is a monocrystalline silicon substrate, texturing may be performed using an alkaline solution such as a potassium hydroxide solution; when the semiconductor substrate 1 is a polysilicon substrate, texturing may be performed using an acidic solution such as a hydrofluoric acid solution. In addition, small amounts of texturing additives may be added to the acidic or alkaline solutions.
In the embodiment of the application, the surface of the silicon substrate is provided with the pre-polarized light structure through texturing, so that the light trapping effect is generated, the light absorption quantity of the solar cell is increased, and the conversion efficiency of the solar cell is improved.
In step 300, as shown in fig. 2, a pretreatment film layer 2 is formed on the front surface of the semiconductor substrate 1 after the texturing, and the pretreatment film layer 2 contains doping elements.
In some embodiments, the present examples are not limited to a specific manner of operation of forming the pretreatment film layer 2. Illustratively, the pretreatment film layer 2 may be deposited on the surface of the semiconductor substrate 1 by any one of a low pressure chemical vapor deposition method, a plasma enhanced chemical vapor deposition method, and an atmospheric pressure chemical vapor deposition method.
In some embodiments, the pre-treatment film 2 may be formed by an in-situ doping process while depositing the pre-treatment film 2.
In some embodiments, the pretreatment film layer 2 has a single-layer or multi-layer structure, and it can be understood that the pretreatment film layer 2 may be formed by performing one deposition on the surface of the semiconductor substrate 1, or may be formed by performing multiple deposition on the surface of the semiconductor substrate 1 to form a stacked multi-layer structure, which only needs to satisfy that the pretreatment film layer 2 contains the doping element.
In some embodiments, the refractive index of the pretreatment film layer 2 is greater than 1.6, and may specifically be 1.65, 1.7, 1.8, 1.9, 2.0, and the like. On the one hand, the pretreatment film layer 2 with the refractive index higher than 1.6 is adopted as a doping source for forming the selective emitter 3, the solid phase segregation coefficient of the doping element is higher at the interface of the pretreatment film layer 2 and the semiconductor substrate 1, the doping element is easy to diffuse into the semiconductor substrate 1 when being subjected to the energy effects of irradiation, heating and the like, the formation of the high-quality selective emitter 3 is facilitated, if the refractive index of the pretreatment film layer 2 is lower than 1.6, the solid phase segregation coefficient of the doping element is lower at the interface of the pretreatment film layer 2 and the semiconductor substrate 1, the doping element tends to diffuse into the pretreatment film layer 2 when being subjected to the energy effects of irradiation, heating and the like, and the doping element is unfavorable for doping the doping element into the semiconductor substrate 1 to form the emitter. On the other hand, the pretreatment film layer 2 with refraction higher than 1.6 is adopted, the anti-reflection effect on the surface of the semiconductor substrate 1 is good, and the injection of energy such as laser is facilitated, so that the reflection effect is reduced.
In some embodiments, the thickness of the pretreatment film 2 is greater than 2nm, specifically may be 2.5nm, 3nm, 4nm, 5nm, 6nm, 7nm, 8nm, and the like, and the thickness of the pretreatment film 2 is controlled within the above range, so that the pretreatment film 2 can play a good passivation effect while ensuring the existence of sufficient doping elements.
In some embodiments, the pretreatment film layer 2 includes at least one of silicon nitride, titanium oxide, and hafnium oxide. It can be understood that the refractive index of the pretreatment film layer 2 made of the above materials can be more than 1.6.
In some embodiments, the doping element includes a positive trivalent element.
In some embodiments, the doping element comprises at least one of boron and gallium, and the application is to form a boron selective emitter 3, or a gallium selective emitter 3, or a boron and gallium selective emitter 3 by doping the pre-treatment film layer 2 of the boron element and/or the gallium element and performing subsequent treatment.
In some embodiments, the pre-treatment film layer 2 has a doping concentration of 1E18 cm -3 ～1E21 cm -3 The method comprises the steps of carrying out a first treatment on the surface of the In particular canTo be 1E18 cm -3 、5E18 cm -3 、1E19 cm -3 、1E20 cm -3 And 1E21 cm -3 And so on, the doping concentration of the pretreatment film layer 2 is controlled within the above range, and it can be ensured that a sufficient doping element is diffused into the semiconductor substrate 1 by heat treatment.
In some embodiments, when doping elements into the pretreatment film layer 2, a one-step doping manner may be adopted to make the doping concentration of each region of the pretreatment film layer 2 the same, which may effectively simplify the preparation process and save the cost, or a two-time local doping manner may be adopted to make the doping concentration of the metalized region of the single-layer pretreatment film layer 2 higher than that of the non-metalized region, so as to facilitate the subsequent formation of the higher-quality selective emitter 3.
In some embodiments, when the pretreatment film layer 2 is a multilayer structure, the concentration of the doping element in the multilayer structure may be the same, or the pretreatment film layer 2 may be formed with a certain concentration gradient. Furthermore, in order to obtain a higher quality of the selective emitter 3, the concentration of doping elements in the pretreatment film 2 is higher the closer the pretreatment film 2 is to the semiconductor substrate 1. Of course, different doping elements can be doped into different pretreatment film layers 2 as different doping sources.
In step 400, a first heat treatment is performed on the surface of the pre-treated film layer 2 to form a heavily doped region 31 in the semiconductor substrate 1 corresponding to the metallized region, and a second heat treatment is performed on the surface of the pre-treated film layer 2 to form a lightly doped region 32 in the semiconductor substrate 1 corresponding to the non-metallized region, the structure of the heavily doped region 31 is shown in fig. 3, the structure of the lightly doped region 32 is shown in fig. 4, and the first heat treatment temperature is higher than the second heat treatment temperature.
In some embodiments, the treated region of the first heat treatment is a metalized region of the pre-treated film layer 2, the first heat treatment comprising at least one of laser irradiation and plasma bombardment. The pretreatment film layer 2 is treated by adopting the laser irradiation and plasma bombardment modes, so that the physical damage is small, and the quality of the emitter is not greatly influenced. The energy intensity of laser light irradiated by laser light or plasma bombarded by plasma can be adjusted according to the requirement of a user so as to adjust the doping concentration of the heavily doped region 31.
In some embodiments, the heavily doped region 31 after the first heat treatment has a doping concentration of 1E16cm -3 ～1E20 cm -3 Specifically, it may be 1E16cm -3 、1E17 cm -3 、1E18 cm -3 、1E19 cm -3 And 1E20 cm -3 And so on, in the above range, it is shown that the doping concentration of the heavily doped region 31 after the first heat treatment is high, ensuring a good doping effect.
In some embodiments, since the pretreatment film 2 is located on the surface of the semiconductor substrate 1, the pretreatment film 2 is subjected to the first heat treatment, and the doping element molecules diffuse from the high concentration region to the low concentration region, and the diffusion rate of the doping element molecules is limited, so that the doping concentration of the region of the semiconductor substrate 1 closer to the pretreatment film 2 is higher, that is, the doping concentration of the heavily doped region 31 closer to the pretreatment film 2 is greater than the doping concentration of the heavily doped region 31 farther from the pretreatment film 2.
In some embodiments, the treated region of the second heat treatment is a non-metallized region of the pre-treated film layer 2, and the apparatus of the second heat treatment comprises at least one of a chain diffusion furnace, a tube diffusion furnace, and an RTP furnace.
In some embodiments, the temperature of the second heat treatment is 800 ℃ to 1100 ℃, and specifically may be 800 ℃, 850 ℃, 900 ℃, 950 ℃, 1000 ℃, 1050 ℃, 1100 ℃, and the like. In the above temperature range, the doping element of the pretreatment film 2 diffuses into the non-metallized region of the semiconductor substrate 1 to form a lightly doped region 32. And in the second heat treatment process, the doping elements in the heavily doped region 31 and the lightly doped region 32 are activated, forming a high-quality diffusion doped layer. The doping concentration and the junction type of the lightly doped region 32 can be adjusted according to the temperature of the second heat treatment, which has less influence on the already formed heavily doped region 31, so that the adjustability of the manufacturing process can be improved.
In some embodiments, the present application pretreats the film layer 2 with laser irradiation, plasma bombardment, at a temperature greater than that of the second heat treatment to ensure formation of heavily doped regions 31 corresponding to the metallized regions and lightly doped regions 32 corresponding to the non-metallized regions.
In some embodiments, after the second heat treatment is performed on the pre-treatment film 2, all the doping elements cannot be diffused into the semiconductor substrate 1, so that some doping elements remain in the pre-treatment film 2, and the doping concentration of the pre-treatment film 2 after the second heat treatment is 1e17 cm -3 ～1E21 cm -3 Specifically, it may be 1E17 cm -3 、1E18 cm -3 、1E19 cm -3 、1E20 cm -3 And 1E21 cm -3 Etc.
In some embodiments, the difference in sheet resistance (i.e., sheet resistance) between the heavily doped region 31 and the lightly doped region 32 is 30ohm/sq to 500ohm/sq, specifically, the difference in sheet resistance between the heavily doped region 31 and the lightly doped region 32 may be 30ohm/sq, 50ohm/sq, 100ohm/sq, 200ohm/sq, 300ohm/sq, 400ohm/sq, 500ohm/sq, etc., and the heavily doped region 31 and the lightly doped region 32 are formed by different processes (first heat treatment and second heat treatment) respectively, so that the control range of the heavily doped region 31 and the lightly doped region 32 is large and can be controlled individually.
In step 500, as shown in fig. 5, a tunneling layer 4 and a doped conductive layer 5 are formed on the back surface of the semiconductor substrate 1.
In some embodiments, the tunneling layer 4 may be formed on the back surface of the semiconductor substrate 1, and then the doped conductive layer 5 may be formed on the surface of the tunneling layer 4.
In some embodiments, the embodiments of the present application are not limited to a specific manner of operation of forming the tunneling layer 4. Illustratively, the rear surface of the semiconductor substrate 1 may be oxidized by any one of an ozone oxidation method, a high-temperature thermal oxidation method, and a nitric acid oxidation method.
In some embodiments, the tunneling layer 4 is a thin oxide layer, which may be, for example, silicon oxide or a metal oxide, and may contain other additional elements, such as nitrogen. The tunneling layer 4 may not have a perfect tunnel barrier in practical effect, as it for example contains defects such as pinholes, which may lead to other charge carrier transport mechanisms (e.g. drift, diffusion) being dominant with respect to tunneling.
In some embodiments, the specific manner of operation of forming the doped conductive layer 5 is not limited in the examples herein. Illustratively, a doped conductive layer 5 is deposited on the surface of the tunneling layer 4 by using any one of low pressure chemical vapor deposition, plasma enhanced chemical vapor deposition and normal pressure chemical vapor deposition for protecting the tunneling layer 4, and then the conductive layer is doped with silicon to form a high-low junction (n/n + Si), the recombination rate of carriers on the back of the cell can be effectively reduced, and the conversion efficiency of the solar cell can be further improved.
In some embodiments, the doped conductive layer 5 may be formed by performing an in-situ doping process while depositing the conductive layer, where the doped conductive layer 5 includes at least one of silicon carbide and polysilicon, i.e., the doped conductive layer 5 may be a doped polysilicon layer, a silicon carbide layer, or a composite layer of a doped polysilicon layer and a silicon carbide layer.
In some embodiments, the doped polysilicon layer is a phosphorus doped polysilicon layer, and the phosphorus doping process may be, for example: and depositing a polysilicon layer on the surface of the tunneling oxide layer and simultaneously carrying out in-situ doping treatment to form a phosphorus-doped polysilicon layer. The phosphorus diffusion process may also employ any one or more of high temperature diffusion, slurry doping, or ion implantation, and is not limited herein.
In some embodiments, the phosphorus doped polysilicon layer has a doping concentration of 1×10 19 cm -3 ～1×10 21 cm -3 The doping concentration may be specifically 1×10 19 cm -3 、1×10 20 cm -3 Or 1X 10 21 cm -3 And the like, the doping concentration is controlled within the above range, which is beneficial to improving passivation performance.
In step 600, as shown in fig. 6, a front side antireflection layer 6 and a back side antireflection layer 7 are formed on the front side and the back side of the semiconductor substrate 1, respectively.
In some embodiments, the specific manner of operation of forming the doped conductive layer 5 is not limited in the examples herein. Illustratively, the front-side antireflection layer 6 and the back-side antireflection layer 7 may be formed by any one of a low-pressure chemical vapor deposition method, a plasma-enhanced chemical vapor deposition method, and an atmospheric pressure chemical vapor deposition method.
In some embodiments, the front side anti-reflection layer 6 may include, but is not limited to, at least one of silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, etc. or any combination thereof, and the front side anti-reflection layer 6 may also function to reduce reflection of incident light, and in some aspects, may also generate a good passivation effect on the semiconductor substrate 1, which helps to improve the conversion efficiency of the battery.
In some embodiments, the backside anti-reflective layer 7 may include, but is not limited to, at least one of silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, or the like, or any combination thereof.
In step 700, front electrode 8 and back electrode 9 are formed on the front surface and back surface of semiconductor substrate 1, respectively, and the structure of the formed solar cell is shown in fig. 7.
And printing a front main grid and a front auxiliary grid on the front surface of the semiconductor substrate 1 by using slurry, drying to form a corresponding front electrode 8, printing a back main grid and a back auxiliary grid on the back surface of the semiconductor substrate 1 by using slurry, drying to form a corresponding back electrode 9, and finally sintering the dried battery piece to obtain the solar cell.
In some embodiments, the high temperature sintering process for forming the front electrode 8 may perform a secondary promotion, so that the residual doping element in the pre-treatment film layer 2 diffuses into the metallization region of the semiconductor substrate 1, and the doping concentration of the heavily doped region 31 after forming the front electrode 8 is 1e17 cm -3 ～1E21 cm -3 Specifically, the heavily doped region 31 after the front electrode 8 is formed has a doping concentration of 1E17 cm -3 、1E18 cm -3 、1E19 cm -3 、1E20 cm -3 And 1E21 cm -3 And the like, the doping concentration within the above range ensures that a high quality selective emitter 3 can be obtained.
In some embodiments, after the front electrode 8 is formed by the first heat treatment and the second heat treatment and by high-temperature sintering, the doping concentration of the heavily doped region 31 near the pre-treatment film layer 2 is greater than the doping concentration of the heavily doped region 31 far from the pre-treatment film layer 2.
In some embodiments, after forming the selective emitter 3, the front electrode 8 needs to be formed on the front surface of the semiconductor substrate 1 by screen printing and sintering, and secondary promotion is performed in the high-temperature sintering process, so that the residual doping elements in the pretreatment film layer 2 diffuse into the non-metal region of the semiconductor substrate 1, and the doping concentration of the lightly doped region 32 after forming the front electrode 8 is 1e16cm -3 ～1E20 cm -3 Specifically, it may be 1E16cm -3 、1E17 cm -3 、1E18 cm -3 、1E19 cm -3 And 1E20 cm -3 Etc.
In some embodiments, since lightly doped region 32 and heavily doped region 31 have similar fabrication processes, the doping concentration of lightly doped region 32 near pretreatment film 2 is greater than the doping concentration of lightly doped region 32 far from pretreatment film 2.
In some embodiments, since the front-side antireflection layer 6 does not contain any doping element, under the high-temperature treatment condition, the doping element in the pretreatment film layer 2 diffuses from the high-concentration region to the low-concentration region, and the front-side antireflection layer 6 contacts the pretreatment film layer 2, after the front-side electrode 8 is formed at a high temperature, the doping element in the pretreatment film layer 2 diffuses into the front-side antireflection layer 6, so that the front-side antireflection layer 6 also contains the doping element, and the doping concentration of the front-side antireflection layer 6 near the pretreatment film layer 2 is greater than the doping concentration of the front-side antireflection layer 6 far from the pretreatment film layer 2.
In some embodiments, the sintering temperature is 900 ℃ to 950 ℃, and specifically may be 900 ℃, 910 ℃, 920 ℃, 930 ℃, 940 ℃, 950 ℃, and the like.
In some embodiments, the sintering time is 10s to 20s, and may specifically be 10s, 11s, 12s, 13s, 14s, 15s, 16s, 17s, 18s, 19s, 20s, etc.
In some embodiments, the specific materials of the front electrode 8 and the back electrode 9 are not limited in the examples of the present application. For example, the front electrode 8 is a silver electrode or a silver/aluminum electrode, and the back electrode 9 is a silver electrode or a silver/aluminum electrode.
The application provides a solar cell prepared by the preparation method, as shown in fig. 7, which comprises the following steps:
a semiconductor substrate 1, the semiconductor substrate 1 having opposite front and back surfaces;
a heavily doped region 31 and a lightly doped region 32 on the front surface of the semiconductor substrate 1, wherein the heavily doped region 31 corresponds to a metalized region of the semiconductor substrate 1 and the lightly doped region 32 corresponds to a non-metalized region of the semiconductor substrate 1;
a pretreatment film layer 2 covering the heavily doped region 31 and the lightly doped region 32;
a front anti-reflection layer 6 covering the pretreatment film layer 2;
a tunneling layer 4, a doped conductive layer 5 and a back antireflection layer 7 located on the back surface of the semiconductor substrate 1;
a front electrode 8 in contact with the heavily doped region 31 and a back electrode 9 in contact with the doped conductive layer 5.
In the above scheme, the heavily doped region 31 and the lightly doped region 32 on the front surface of the semiconductor substrate 1 form the selective emitter 3 of the solar cell, the pretreatment film layer 2 covering the heavily doped region 31 and the lightly doped region 32 is used as a passivation layer, a good passivation effect is achieved on the semiconductor substrate 1, the current of the metal composite region is reduced, and the voltage-on circuit is improved, so that the conversion efficiency of the solar cell is effectively improved.
In some embodiments, the thickness of the pretreatment film 2 is greater than 2nm, specifically may be 2.5nm, 3nm, 4nm, 5nm, 6nm, 7nm, 8nm, and the like, and the thickness of the pretreatment film 2 is controlled within the above range, so that the pretreatment film 2 can play a good passivation effect while ensuring the existence of sufficient doping elements.
In some embodiments, the difference in sheet resistance between the heavily doped region 31 and the lightly doped region 32 is 30-500 ohm/sq, specifically, the difference in sheet resistance between the heavily doped region 31 and the lightly doped region 32 may be 30ohm/sq, 50ohm/sq, 100ohm/sq, 200ohm/sq, 300ohm/sq, 400ohm/sq, 500ohm/sq, etc.
In some embodiments, the pretreatmentThe doping concentration of the film layer 2 is 1E17 cm -3 ～1E21 cm -3 Specifically, it may be 1E17 cm -3 、1E18 cm -3 、1E19 cm -3 、1E20 cm -3 And 1E21 cm -3 Etc.
In some embodiments, the heavily doped region 31 has a doping concentration of 1E17 cm -3 ～1E21 cm -3 Specifically, the heavily doped region 31 after the front electrode 8 is formed has a doping concentration of 1E17 cm -3 、1E18 cm -3 、1E19 cm -3 、1E20 cm -3 And 1E21 cm -3 Etc.
In some embodiments, lightly doped region 32 has a doping concentration of 1E16cm -3 ～1E20 cm -3 Specifically, it may be 1E16cm -3 、1E17 cm -3 、1E18 cm -3 、1E19 cm -3 And 1E20 cm -3 Etc.
In a third aspect, the present application provides a photovoltaic module 1000 comprising a string of cells formed by electrically connecting solar cells as described above.
Specifically, referring to fig. 8, the photovoltaic module 1000 includes a first cover plate 200, a first encapsulation adhesive layer 300, a solar cell string, a second encapsulation adhesive layer 400, and a second cover plate 500.
In some embodiments, the solar cell string includes a plurality of solar cells 100 as described above connected by conductive tapes, and the solar cells 100 may be connected by partial lamination or splicing.
In some embodiments, the first and second cover plates 200, 500 may be transparent or opaque cover plates, such as glass cover plates, plastic cover plates.
Two sides of the first encapsulation glue layer 300 are respectively contacted and attached with the first cover plate 200 and the battery string, and two sides of the second encapsulation glue layer 400 are respectively contacted and attached with the second cover plate 500 and the battery string. The first and second encapsulation adhesive layers 300 and 400 may be an ethylene-vinyl acetate copolymer (EVA) adhesive film, a polyethylene octene co-elastomer (POE) adhesive film, or a polyethylene terephthalate (PET) adhesive film, respectively.
The photovoltaic module 1000 may also be packaged with a side edge completely surrounded, that is, the side edge of the photovoltaic module 1000 is completely encapsulated with a packaging adhesive tape, so as to prevent the photovoltaic module 1000 from generating a lamination offset phenomenon in the lamination process.
The photovoltaic module 1000 also includes a sealing member fixedly encapsulated to a portion of the edge of the photovoltaic module 1000. The edge sealing member may be fixedly packaged to an edge of the photovoltaic module 1000 near a corner. The edge sealing member may be a high temperature resistant tape. The high-temperature-resistant adhesive tape has excellent high-temperature resistance, can not be decomposed or fall off in the lamination process, and can ensure reliable packaging of the photovoltaic module 1000. Wherein, both ends of the high temperature resistant tape are fixed to the second cover plate 500 and the first cover plate 200, respectively. The two ends of the high temperature resistant adhesive tape can be respectively adhered to the second cover plate 500 and the first cover plate 200, and the middle part of the high temperature resistant adhesive tape can limit the side edges of the photovoltaic module 1000, so that the photovoltaic module 1000 is prevented from generating lamination offset in the lamination process.
Example 1
(1) Depositing a silicon nitride layer on the N-type silicon wafer subjected to texturing by adopting a PVD (physical vapor deposition) mode, and re-introducing BH (boron nitride) -containing silicon wafer during the deposition process 3 。
(2) And (3) processing the metalized area of the pretreatment film layer by adopting a laser irradiation mode to form a heavy doping area corresponding to the metalized area.
(3) And (3) heating the silicon wafer obtained in the step (2) at 850 ℃ by using a chain diffusion furnace to form a lightly doped region corresponding to the non-metallized region.
(4) Forming a tunneling layer and a doped conductive layer on the back surface of the semiconductor substrate;
(5) And forming a front anti-reflection layer and a back anti-reflection layer on the front surface and the back surface of the semiconductor substrate respectively, wherein the front anti-reflection layer is positioned on the pretreatment film layer.
(6) Front and back electrodes are formed on the front and back surfaces of the semiconductor substrate, respectively.
Comparative example 1
(1) And (3) placing the N-type silicon wafer subjected to texturing into a boron diffusion furnace, introducing a BBr3 liquid source and nitrogen, and performing primary diffusion treatment at 750-850 ℃.
(2) And (3) coating etching slurry containing HF on the metalized area of the surface of the silicon wafer obtained in the step (1) by utilizing screen printing, and etching and removing the BSG and the oxide layer on the silicon wafer contacted with the etching slurry.
(3) After the etching slurry is cleaned, secondary diffusion treatment is carried out, the BSG is removed from the metallized region by etching, so that the silicon wafer is exposed to form a heavily doped region, and the non-metallized region forms a lightly doped region due to the existence of the BSG.
(4) Forming a tunneling layer and a doped conductive layer on the back surface of the semiconductor substrate;
(5) And forming a front anti-reflection layer and a back anti-reflection layer on the front surface and the back surface of the semiconductor substrate respectively, wherein the front anti-reflection layer is positioned on the pretreatment film layer.
(6) Front and back electrodes are formed on the front and back surfaces of the semiconductor substrate, respectively.
The selective emitter prepared in example 1 and comparative example 1 was tested for sheet resistance, metal recombination current and emitter recombination current, and the test results are shown in table 1.
TABLE 1 Performance parameters of the emitters of comparative example 1 and example
As can be seen from the data in table 1: compared with the selective emitter prepared in comparative example 1, the metal recombination current of the heavily doped region and the emitter recombination current of the lightly doped region prepared in example 1 of the present application are both lower.
The solar cells prepared in examples and comparative example 1 were tested for open circuit voltage, fill factor, short circuit current density, and conversion efficiency, and the results are shown in table 2.
TABLE 1 Performance parameters of the solar cells prepared in comparative example 1 and example
| Group of | Voc(mV) | Jsc(mA/cm 2 ) | FF(％) | Eta(％) |
| Comparative example 1 | 110 | 41.36 | 83.45 | 24.57 |
| Example 1 | 60 | 41.42 | 83.41 | 24.91 |
As can be seen from the data in table 2: compared with comparative example 1, on the one hand, the prepared pretreatment film layer of the application can form a high-quality selective emitter, so that the composite current of a metallization area is reduced, the open-circuit voltage of a battery is improved, and the conversion efficiency of solar energy is improved; on the other hand, the pretreatment film layer prepared by the method can be directly used as a passivation layer besides providing a doping source for the selective emitter, so that the process can be effectively simplified, and the cost is reduced.
The foregoing description of the preferred embodiments of the invention is not intended to be limiting, but rather is intended to cover all modifications, equivalents, alternatives, and improvements that fall within the spirit and scope of the invention.
Claims (13)
1. A method of manufacturing a solar cell, comprising the steps of:
providing a semiconductor substrate;
performing texturing treatment on the semiconductor substrate;
forming a pretreatment film layer on the front surface of the semiconductor substrate after texturing, wherein the pretreatment film layer contains doping elements, the refractive index of the pretreatment film layer is larger than 1.6, and the doping concentration of the pretreatment film layer is 1E18 cm -3 ～1E21 cm -3 ；
Forming a heavily doped region in the semiconductor substrate corresponding to the metalized region by performing a first heat treatment on the surface of the pretreatment film layer, and forming a lightly doped region in the semiconductor substrate corresponding to the non-metalized region by performing a second heat treatment on the surface of the pretreatment film layer, wherein the first heat treatment temperature is higher than the second heat treatment temperature, and the doping concentration of the heavily doped region after the first heat treatment is 1E16cm -3 ～1E20 cm -3 ；
Forming a tunneling layer and a doped conductive layer on the back surface of the semiconductor substrate;
forming a front anti-reflection layer and a back anti-reflection layer on the front surface and the back surface of the semiconductor substrate respectively, wherein the front anti-reflection layer is positioned on the pretreatment film layer; and
and forming a front electrode and a back electrode on the front surface and the back surface of the semiconductor substrate respectively.
2. The method of claim 1, wherein the pretreatment film layer is a single-layer or multi-layer structure; and/or the thickness of the pretreatment film layer is greater than 2nm.
3. The method of claim 1, wherein the pretreatment film layer comprises at least one of silicon nitride, titanium oxide, and hafnium oxide.
4. The method of claim 1, wherein the doping element comprises a trivalent element; and/or the doping element comprises at least one of boron and gallium.
5. The method of claim 1, wherein the pre-treated film in the metallized region has a doping concentration greater than the doping concentration of the pre-treated film in the non-metallized region.
6. The method of claim 1, wherein the heavily doped region proximate to the pretreatment film has a doping concentration greater than the heavily doped region distal from the pretreatment film.
7. The method of claim 5, wherein the difference in sheet resistance between the heavily doped region and the lightly doped region is from 30ohm/sq to 500ohm/sq.
8. The method according to claim 1, wherein the doping concentration of the pretreated film layer after the second heat treatment is 1E17 cm -3 ～1E21 cm -3 。
9. The method according to claim 1, wherein the heavily doped region after the front electrode is formed has a doping concentration of 1e17 cm -3 ～1E21 cm -3 And/or the doping concentration of the heavily doped region close to the pretreatment film layer is greater than the doping concentration of the heavily doped region far away from the pretreatment film layer.
10. The method according to claim 1, wherein the lightly doped region after the front electrode is formed has a doping concentration of 1E16cm -3 ～1E20 cm -3 The method comprises the steps of carrying out a first treatment on the surface of the And/or the doping concentration of the lightly doped region near the pretreatment film layer is greater than the doping concentration of the lightly doped region far from the pretreatment film layer.
11. The method of claim 1, wherein the front side anti-reflection layer after the front side electrode is formed also contains a doping element, and the doping concentration of the front side anti-reflection layer near the pretreatment film layer is greater than the doping concentration of the front side anti-reflection layer far from the pretreatment film layer.
12. A solar cell, characterized in that the solar cell is prepared according to the preparation method of any one of claims 1 to 11, comprising:
a semiconductor substrate having opposite front and back sides;
the semiconductor device comprises a semiconductor substrate, a heavy doping region and a light doping region, wherein the heavy doping region and the light doping region are positioned on the front surface of the semiconductor substrate, the heavy doping region corresponds to a metalized region of the semiconductor substrate, and the light doping region corresponds to a non-metalized region of the semiconductor substrate;
a pretreatment film layer covering the heavily doped region and the lightly doped region;
a front side anti-reflection layer covering the pretreatment film layer;
the tunneling layer, the doped conductive layer and the back antireflection layer are positioned on the back of the semiconductor substrate;
a front electrode in contact with the heavily doped region and a back electrode in contact with the doped conductive layer.
13. A photovoltaic module comprising a plurality of solar cell strings, each solar cell string formed by electrically connecting the solar cells of claim 12.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210923575.5A CN115172479B (en) | 2022-08-02 | 2022-08-02 | Solar cell, preparation method thereof and photovoltaic module |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210923575.5A CN115172479B (en) | 2022-08-02 | 2022-08-02 | Solar cell, preparation method thereof and photovoltaic module |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN115172479A CN115172479A (en) | 2022-10-11 |
| CN115172479B true CN115172479B (en) | 2023-12-19 |
Family
ID=83477541
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202210923575.5A Active CN115172479B (en) | 2022-08-02 | 2022-08-02 | Solar cell, preparation method thereof and photovoltaic module |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN115172479B (en) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6429037B1 (en) * | 1998-06-29 | 2002-08-06 | Unisearch Limited | Self aligning method for forming a selective emitter and metallization in a solar cell |
| KR20120062224A (en) * | 2010-12-06 | 2012-06-14 | 주식회사 신성솔라에너지 | Method for fabricating solar cell |
| CN112490304A (en) * | 2020-12-04 | 2021-03-12 | 东方日升（常州）新能源有限公司 | Preparation method of high-efficiency solar cell |
| CN214336723U (en) * | 2020-12-04 | 2021-10-01 | 一道新能源科技(衢州)有限公司 | Solar cell |
| CN113707761A (en) * | 2021-08-05 | 2021-11-26 | 西安电子科技大学 | N-type selective emitter solar cell and preparation method thereof |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9312420B2 (en) * | 2012-04-17 | 2016-04-12 | Lg Electronics Inc. | Solar cell and method for manufacturing the same |
| KR101387718B1 (en) * | 2012-05-07 | 2014-04-22 | 엘지전자 주식회사 | Solar cell and method for manufactruing the same |
-
2022
- 2022-08-02 CN CN202210923575.5A patent/CN115172479B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6429037B1 (en) * | 1998-06-29 | 2002-08-06 | Unisearch Limited | Self aligning method for forming a selective emitter and metallization in a solar cell |
| KR20120062224A (en) * | 2010-12-06 | 2012-06-14 | 주식회사 신성솔라에너지 | Method for fabricating solar cell |
| CN112490304A (en) * | 2020-12-04 | 2021-03-12 | 东方日升（常州）新能源有限公司 | Preparation method of high-efficiency solar cell |
| CN214336723U (en) * | 2020-12-04 | 2021-10-01 | 一道新能源科技(衢州)有限公司 | Solar cell |
| CN113707761A (en) * | 2021-08-05 | 2021-11-26 | 西安电子科技大学 | N-type selective emitter solar cell and preparation method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| CN115172479A (en) | 2022-10-11 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN114709294B (en) | Solar cell, preparation method thereof and photovoltaic module | |
| CN115241298B (en) | Solar cells and preparation methods thereof, photovoltaic modules | |
| US12009446B2 (en) | Solar cell, method for producing same and solar cell module | |
| NL2034327B1 (en) | Solar cell and manufacture method thereof, and photovoltaic module | |
| US11949038B2 (en) | Solar cell and photovoltaic module | |
| KR101324292B1 (en) | High efficiency solar cell and manufacturing method thereof, and solar cell manufacturing apparatus for the same | |
| CN113471305B (en) | Selectively passivated contact structure battery and preparation method thereof | |
| CN116110978B (en) | Solar cell, preparation method thereof and photovoltaic module | |
| CN115274869B (en) | Passivation contact structure with same polarity, battery, preparation process, assembly and system | |
| CN114256361B (en) | Solar cell and photovoltaic module | |
| JP7170817B1 (en) | SOLAR CELL AND MANUFACTURING METHOD THEREOF, PHOTOVOLTAIC MODULE | |
| CN114975648A (en) | Solar cell, preparation method thereof and photovoltaic module | |
| CN114639742A (en) | A kind of two-junction solar cell and preparation method thereof | |
| CN115172479B (en) | Solar cell, preparation method thereof and photovoltaic module | |
| CN117293218A (en) | Solar cell, preparation method of solar cell and photovoltaic module | |
| CN115172478B (en) | Solar cell and photovoltaic module | |
| CN116404070A (en) | Passivation contact structure and preparation method thereof, solar cell and preparation method thereof | |
| CN115881835A (en) | Solar cell, preparation method thereof and photovoltaic module | |
| WO2020224051A1 (en) | Double-sided solar cell, and manufacturing method for same | |
| CN115036374B (en) | Solar cell, manufacturing method thereof and photovoltaic module | |
| CN115036388B (en) | Solar cell and manufacturing method thereof | |
| CN116031331B (en) | A TOPCon bottom battery structure optimization design method | |
| CN214753783U (en) | Solar cell lamination passivation structure | |
| CN112259638B (en) | Preparation method of photovoltaic cells | |
| CN118448512A (en) | A method for preparing a local velvet surface on the front side of a TOPCon battery |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |