CN114937597A - Double-layer passivation depletion type MIS-HEMT device and preparation method thereof - Google Patents
Double-layer passivation depletion type MIS-HEMT device and preparation method thereof Download PDFInfo
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- 238000002360 preparation method Methods 0.000 title claims abstract description 15
- 229910002704 AlGaN Inorganic materials 0.000 claims abstract description 63
- 238000000034 method Methods 0.000 claims abstract description 61
- 230000004888 barrier function Effects 0.000 claims abstract description 56
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- 230000003647 oxidation Effects 0.000 claims abstract description 17
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- 238000005530 etching Methods 0.000 claims abstract description 10
- 229910008065 Si-SiO Inorganic materials 0.000 claims abstract description 8
- 229910006405 Si—SiO Inorganic materials 0.000 claims abstract description 8
- 230000008021 deposition Effects 0.000 claims abstract description 7
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- 239000002184 metal Substances 0.000 claims description 15
- 238000000231 atomic layer deposition Methods 0.000 claims description 7
- 238000005240 physical vapour deposition Methods 0.000 claims description 7
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 6
- 238000005229 chemical vapour deposition Methods 0.000 claims description 4
- 238000001259 photo etching Methods 0.000 claims description 4
- 238000000206 photolithography Methods 0.000 claims description 4
- 238000000137 annealing Methods 0.000 claims description 3
- 150000002902 organometallic compounds Chemical class 0.000 claims description 3
- 238000005566 electron beam evaporation Methods 0.000 claims description 2
- 239000004065 semiconductor Substances 0.000 abstract description 12
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- H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
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Abstract
The invention discloses a double-layer passivation depletion MIS-HEMT device and a preparation method thereof, wherein the method comprises the following steps: growing an AlN nucleating layer, an AlGaN buffer layer, a GaN channel layer and an AlGaN barrier layer on a substrate in sequence; forming isolation regions of the device on two sides of the sample obtained in the previous step; growing a Si passivation layer on the upper surface of the AlGaN barrier layer, and forming a layer of SiO on the surface of the Si passivation layer by a thermal oxidation process 2 Oxide layer to form Si-SiO 2 A double-layer passivation structure; etching off SiO on two sides of the gate region 2 An oxide layer and a Si passivation layer; SiO deposition on the whole sample surface 2 A passivation layer; and manufacturing a source drain and a grid of the device. The invention grows a Si passivation layer between the grid oxide and the semiconductor and forms Si-SiO by thermal oxidation 2 Double-layer passivation structure, effectively reduceThe interface state between the grid medium and the barrier layer reduces the negative drift of the threshold voltage of the device, avoids the failure problem of the existing device caused by grid instability, and realizes the depletion MIS-HEMT device with excellent reliability.
Description
Technical Field
The invention belongs to the technical field of semiconductors, and particularly relates to a double-layer passivation depletion type MIS-HEMT device and a preparation method thereof.
Background
The research and application of GaN material is the leading edge and hot spot of the current global semiconductor research, is a novel semiconductor material for developing microelectronic devices and optoelectronic devices, and is praised as the third generation semiconductor material following the first generation Ge, Si semiconductor material, the second generation GaAs, InP compound semiconductor material together with the semiconductor materials such as SiC, diamond, etc. Compared with the first generation and second generation semiconductor materials, the GaN material has the advantages of high forbidden band width, high breakdown voltage, high thermal conductivity, high electron saturation velocity, high electron mobility and the like, so that the GaN device can bear higher voltage and higher working temperature. Has wide application prospect in the fields of high voltage, high power, wireless communication and the like.
As one of representatives of GaN devices, the AlGaN/GaN MIS-HEMT device inhibits grid leakage and improves the grid voltage swing and microwave power performance of the device by introducing a metal-oxide-semiconductor structure into the grid of the traditional HEMT device.
However, since fixed charges exist between the gate and the oxide layer of the conventional gan hemt device, the positively charged fixed charges can reduce the barrier of the gate, which causes the threshold voltage of the device to shift negatively, and thus a higher reverse voltage is required to turn off the device, especially for depletion mode devices, which are normally-on devices, when the gate is not applied with voltage and the device transfer characteristic curve shifts negatively, which increases the power consumption of the device in the off state. Meanwhile, the surface of the barrier layer is partially oxidized due to the generation or introduction of oxygen and water vapor in the growth process of the gate oxide, so that the interface state between the gate oxide and the barrier layer is aggravated, and the threshold voltage of the HEMT device is obviously drifted due to the capture or release of electrons in the interface state in the power-on stress process of the device, which is very unfavorable for the long-term reliability of the device.
In addition, as the GaN material is carried out in a non-thermodynamic equilibrium state in the epitaxial growth process, a large number of defects and dangling bonds can be generated on the surface of the GaN material, and the defects and the dangling bonds can capture or release electrons. Under the background that the gallium nitride growth technology is not mature, the gallium nitride device generates serious phenomena such as device threshold voltage drift, output current reduction and the like, so that the working state of the device is unstable, the reliability is reduced, and the application of the device is limited.
Disclosure of Invention
In order to solve the problems in the prior art, the invention provides a double-layer passivation depletion type MIS-HEMT device and a preparation method thereof. The technical problem to be solved by the invention is realized by the following technical scheme:
a preparation method of a double-layer passivation depletion type MIS-HEMT device comprises the following steps:
step 1: growing an AlN nucleating layer, an AlGaN buffer layer, a GaN channel layer and an AlGaN barrier layer on a substrate in sequence;
step 2: forming isolation regions of the device on two sides of the sample obtained in the step 1;
and 3, step 3: growing a Si passivation layer on the upper surface of the AlGaN barrier layer, and forming a layer of SiO on the surface of the Si passivation layer through a thermal oxidation process 2 Oxide layer to form Si-SiO 2 A double-layer passivation structure;
and 4, step 4: defining a gate region by photolithography, and etching off SiO on both sides of the gate region 2 An oxide layer and a Si passivation layer;
and 5: SiO deposition on the whole sample surface 2 A passivation layer;
step 6: and manufacturing a source drain and a grid of the device to form the double-layer passivated depletion type MIS-HEMT device.
In one embodiment of the present invention, step 1 comprises:
by adopting a metal organic compound chemical vapor deposition process, an AlN nucleating layer with the thickness of 50-500 nm, an AlGaN buffer layer with the thickness of 200-8000 nm, a GaN channel layer with the thickness of 50-500 nm and Al with the thickness of 10-30 nm are sequentially grown on a substrate x Ga 1-x And an N barrier layer, wherein x is 0.1 to 0.5.
In one embodiment of the present invention, step 3 comprises:
31) growing Si with 2-5 atomic layers on the AlGaN barrier layer by adopting an atomic layer deposition process so as to form a Si passivation layer on the surface of the AlGaN barrier layer; wherein the thickness of the Si passivation layer is 2-5 nm;
32) forming a layer of SiO on the surface of the Si passivation layer by a thermal oxidation process 2 An oxide layer; wherein the SiO 2 The thickness of the oxide layer is 1-2 nm.
In one embodiment of the present invention, step 5 comprises:
deposition of SiO on the entire sample surface by plasma-enhanced chemical vapor deposition 2 A material for forming SiO with a thickness of 5 to 100nm 2 And a passivation layer.
In one embodiment of the present invention, the step 6 comprises:
61) defining a source drain region by photoetching, and etching off SiO below the source drain region 2 A passivation layer and an AlGaN barrier layer;
62) depositing metal on the source and drain region to form a source and drain electrode of the device;
63) in the SiO 2 And depositing grid metal in the grid region on the passivation layer to form an MIS structure, thereby completing the preparation of the device.
In one embodiment of the present invention, said step 62) comprises:
and depositing metal on the source and drain regions by adopting a physical vapor deposition method or an electron beam evaporation process, and forming ohmic contact of the source and the drain after high-temperature annealing.
Another embodiment of the inventionThe embodiment provides a double-layer passivation depletion type MIS-HEMT device which comprises a substrate, an AlN nucleating layer, an AlGaN buffer layer, a GaN channel layer, an AlGaN barrier layer, an isolation region, a Si passivation layer, a SiO 2 Oxide layer, SiO 2 A passivation layer, a source electrode, a drain electrode and a grid electrode;
the substrate, the AlN nucleating layer, the AlGaN buffer layer, the GaN channel layer and the AlGaN barrier layer are sequentially arranged from bottom to top;
the isolation region is arranged in the AlGaN barrier layer and the GaN channel layer on two sides of the device;
the source electrode and the drain electrode are respectively arranged on the GaN channel layers on two sides of the device;
the Si passivation layer is arranged on the AlGaN barrier layer between the source electrode and the drain electrode;
the SiO 2 The oxide layer is positioned on the upper surface of the Si passivation layer;
the SiO 2 A passivation layer disposed on the AlGaN barrier layer and covering the Si passivation layer and the SiO 2 An oxide layer;
the gate is located on the SiO 2 The SiO above the oxide layer 2 And on the passivation layer, forming MIS device structure.
In one embodiment of the invention, the SiO 2 And the oxidation layer is formed on the upper surface of the Si passivation layer through a thermal oxidation process.
In one embodiment of the invention, the thickness of the Si passivation layer is 2-5 nm; the SiO 2 The thickness of the oxide layer is 1-2 nm; the SiO 2 The thickness of the passivation layer is 5-100 nm.
The invention has the beneficial effects that:
1. the invention forms Si-SiO by growing a dense Si passivation layer between the gate oxide and the semiconductor of the MIS structure and by a thermal oxidation process 2 The double-layer passivation structure can be used as a grid insulation layer and a surface passivation layer at the same time, so that the direct contact between the original grid dielectric and the AlGaN barrier layer is avoided, the interface state between the grid oxide and the barrier layer is effectively reduced, the threshold voltage negative drift of the device is reduced, and the special off-state leakage of the depletion type MIS device is stabilizedThe current improves the reliability of the device, and reduces the power consumption of the device in a turn-off state;
2. according to the preparation method of the double-layer passivation depletion type MIS-HEMT device, the mature Si passivation process is used, the immature growth process of a GaN material is avoided, a large number of interface states generated in the growth process of the GaN material are avoided, the depletion type MIS-HEMT device with high breakdown voltage, small grid leakage current, stable threshold voltage and excellent reliability is realized, the failure problem of the existing GaNMIS-HEMT device caused by grid instability is effectively reduced, and the GaN device plays greater advantages in the specific high-voltage and high-power application field;
3. the preparation method provided by the invention simplifies the process steps, reduces the consumption of resources and energy in manufacturing and using the device, and reduces the process cost and the complexity of the structure of the device.
The present invention will be described in further detail with reference to the accompanying drawings and examples.
Drawings
Fig. 1 is a schematic flow chart of a method for manufacturing a double-layer passivation depletion type MIS-HEMT device according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a double-layer passivated depletion type MIS-HEMT device according to an embodiment of the present invention;
fig. 3a to 3i are process diagrams of fabricating a double-layer passivated depletion type MIS-HEMT device according to an embodiment of the present invention;
description of reference numerals:
1-a substrate; 2-AlN nucleating layer; a 3-AlGaN buffer layer; 4-a GaN channel layer; a 5-AlGaN barrier layer; 6-an isolation region; a 7-Si passivation layer; 8-SiO 2 An oxide layer; 9-SiO 2 A passivation layer; 10-a source electrode; 11-a drain electrode; 12-gate.
Detailed Description
The present invention will be described in further detail with reference to specific examples, but the embodiments of the present invention are not limited thereto.
Example one
Referring to fig. 1, fig. 1 is a schematic flow chart of a method for manufacturing a double-layer passivated depletion type MIS-HEMT device according to an embodiment of the present invention, which specifically includes the following steps:
step 1: an AlN nucleating layer, an AlGaN buffer layer, a GaN channel layer and an AlGaN barrier layer are sequentially grown on the substrate.
Specifically, in this embodiment, a Metal Organic Chemical Vapor Deposition (MOCVD) technique is adopted to sequentially grow an AlN nucleation layer with a thickness of 50-500 nm, a 200-8000 nmGaN buffer layer, a 50-500 nm GaN channel layer, and 10-30 nm Al on a substrate x Ga 1-x And an N barrier layer, wherein x is 0.1 to 0.5.
Wherein a heterojunction formed between the GaN channel layer and the AlGaN barrier layer generates a two-dimensional electron gas channel having high electron mobility due to a polarization reaction.
Step 2: and forming an isolation region of the device on two sides of the sample obtained in the step 1.
Optionally, in this embodiment, ion implantation is mainly performed on the two side surfaces of the sample obtained in step 1 to form an isolation region of the device; the isolation region extends downwards from the upper surface of the AlGaN barrier layer to the upper surface of the AlGaN buffer layer.
Specifically, in the present embodiment, an ion implantation technique is adopted to implant N ions into the AlGaN barrier layer and the GaN channel layer on the upper surface of the AlGaN barrier layer to form a high resistance region, so as to implement device isolation.
And step 3: growing a Si passivation layer on the upper surface of the AlGaN barrier layer, and forming a layer of SiO on the surface of the Si passivation layer by a thermal oxidation process 2 Oxide layer to form Si-SiO 2 A double layer passivation structure.
Firstly, growing 2-5 atomic layers of Si on an AlGaN barrier layer by adopting an atomic layer deposition process (ALD), and carrying out in-situ Si at low temperature 2 H 6 Passivating to form a high-quality Si passivation layer on the surface of the AlGaN barrier layer; wherein the thickness of the Si passivation layer is 2-5 nm.
Then, a thin SiO layer is formed on the surface of the Si passivation layer by a thermal oxidation process 2 Oxide layer to form Si-SiO 2 A double layer passivation structure.
In this embodiment, the oxygen is naturally heated by high temperatureChemically formed SiO 2 The thickness of the oxide layer is 1-2 nm.
And 4, step 4: defining a gate region by photolithography, and etching away Si passivation layer and SiO on both sides of the gate region 2 And oxidizing the layer.
Specifically, the present embodiment employs a Reactive Ion Etching (RIE) technique to etch away the Si passivation layer and the thin SiO layer outside the gate region 2 And oxidizing the layer.
And 5: SiO deposition on the whole sample surface 2 And a passivation layer.
Specifically, in the embodiment, a Plasma Enhanced Chemical Vapor Deposition (PECVD) method is adopted to deposit SiO on the whole sample surface obtained in the step 4 2 Material, forming SiO with thickness of 5-100 nm 2 And a passivation layer.
Step 6: and manufacturing a source drain and a grid of the device to form the double-layer passivated depletion type MIS-HEMT device.
In this embodiment, step 6 includes:
61) defining a source/drain region by photoetching, and etching off SiO below the source/drain region 2 A passivation layer and an AlGaN barrier layer.
Specifically, in this embodiment, an Inductively Coupled Plasma (ICP) etching technique is used to define the source and drain regions, and then the SiO in the source and drain regions are etched away 2 A passivation layer and an AlGaN barrier layer 5.
62) And depositing metal in the source and drain regions to form source and drain electrodes of the device.
Specifically, metal is deposited in the source and drain regions by Physical Vapor Deposition (PVD) and high temperature annealing is performed to form ohmic contacts to the source and drain.
63) In SiO 2 And depositing grid metal in the grid region on the passivation layer to form an MIS structure, thereby completing the preparation of the device.
It should be noted that the MOCVD technique, the ALD technique, the RIE technique, the PECVD technique, the ICP technique, the PVD technique, and the like used in this embodiment are all existing mature techniques, and specific process parameters and process procedures thereof can be implemented by referring to the existing techniques, which are not described in detail herein.
In addition, as for the selection of the source, drain and gate metals, common metals or combinations of metals may be used, such as Ti/Al, Ti/Al/Ni/Au or Ti/Al/Mo/Au, which is not limited in this embodiment.
This embodiment is achieved by growing a dense Si passivation layer between the gate oxide and the semiconductor of the MIS structure and forming Si-SiO by a thermal oxidation process 2 The double-layer passivation structure can be used as a grid insulation layer and a surface passivation layer at the same time, so that the direct contact between the original grid oxide and the AlGaN barrier layer is avoided, the interface state between a grid medium and the barrier layer is effectively reduced, the threshold voltage negative drift of the device is reduced, the special off-state leakage current of the depletion type MIS device is stabilized, the reliability of the device is improved, and the power consumption of the device in an off-state is reduced.
Furthermore, the invention avoids the immature growth process of the GaN material by using the mature Si passivation process, avoids a large amount of interface states generated in the growth process of the GaN material, realizes a depletion MIS-HEMT device with high breakdown voltage, small grid leakage current, stable threshold voltage and excellent reliability, effectively reduces the failure problem of the existing GaN MIS-HEMT device caused by grid instability, and ensures that the GaN device plays greater advantages in the specific high-voltage and high-power application field. In addition, the preparation method provided by the invention also simplifies the process steps, reduces the consumption of resources and energy sources in the manufacturing and use of the device, and reduces the process cost and the complexity of the structure of the device.
Example two
On the basis of the first embodiment, the present embodiment provides a double-layer passivated depletion type MIS-HEMT device. Referring to fig. 2, fig. 2 is a schematic structural diagram of a double-layer passivation depletion type MIS-HEMT device according to an embodiment of the present invention, including:
the GaN-based light-emitting diode comprises a substrate 1, an AlN nucleating layer 2, an AlGaN buffer layer 3, a GaN channel layer 4 and an AlGaN barrier layer 5, wherein the substrate, the AlN nucleating layer 2, the AlGaN buffer layer 3, the GaN channel layer 4 and the AlGaN barrier layer 5 are sequentially arranged from bottom to top;
the isolation region 7 is arranged in the AlGaN barrier layer 5 and the GaN channel layer 4 at two sides of the device;
the source electrode 10 and the drain electrode 11 are respectively arranged on the GaN channel layer 4 at two sides of the device;
the Si passivation layer 7 is arranged on the AlGaN barrier layer 5 between the source electrode 10 and the drain electrode 11;
SiO 2 the oxide layer 8 is positioned on the upper surface of the Si passivation layer 7;
SiO 2 a passivation layer 9 is disposed on the AlGaN barrier layer 5 and covers the Si passivation layer 7 and the SiO 2 An oxide layer 8;
the grid is positioned on SiO 2 SiO over oxide layer 8 2 And a passivation layer 9 to form the MIS device structure.
In the embodiment, the thickness of the Si passivation layer 7 is 2-5 nm; SiO 2 2 The thickness of the oxide layer 8 is 1-2 nm; SiO 2 2 The thickness of the passivation layer 9 is 5-100 nm.
Further, SiO 2 The oxide layer 8 is formed on the upper surface of the Si passivation layer 7 through a thermal oxidation process.
The double-layer passivated depletion type MIS-HEMT device provided by the embodiment can be prepared and formed by the method provided by the first embodiment. Therefore, the device also has the advantages of high breakdown voltage, small grid leakage current, stable threshold voltage, stable working state and higher reliability, thereby playing greater advantages in the specific application fields of high voltage and high power.
EXAMPLE III
The following describes the preparation process of the double-layer passivated depletion type MIS-HEMT device provided by the invention in detail with reference to FIGS. 3a-3 i. Fig. 3a to 3i are process diagrams of a process for manufacturing a double-layer passivated depletion type MIS-HEMT device according to an embodiment of the present invention, which specifically include:
step a: an AlN nucleating layer 2, an AlGaN buffer layer 3, a GaN channel layer 4 and an AlGaN barrier layer 5 are grown on a substrate 1 in sequence
Specifically, an AlN nucleating layer 2, 20 with the thickness of 50-500 nm is sequentially grown on a substrate 1 by adopting a metal organic compound chemical vapor deposition technology0 to 8000nmGaN buffer layer 3, 50 to 500nm GaN channel layer 4 and 10 to 30nm Al x Ga 1-x And an N barrier layer 5, wherein x is 0.1 to 0.5. The heterojunction formed between the GaN channel layer and the AlGaN barrier layer creates a two-dimensional electron gas channel with high electron mobility due to polarization reactions, as shown in fig. 3 a.
Step b: making device isolation regions 6
Specifically, N ions are implanted into the isolation region 6 on the upper surface of the AlGaN barrier layer 5 by using an N ion implantation technique, so as to achieve device isolation, as shown in fig. 3 b.
Step c: growing Si passivation layer 7 on the upper surface of AlGaN barrier layer 5
In particular, the in-situ Si is carried out at low temperature by adopting an Atomic Layer Deposition (ALD) technology 2 H 6 Passivating to form a high-quality Si passivation layer 7 with the thickness of 2-5 nm, as shown in FIG. 3 c.
Step d: thermal oxidation to form SiO 2 Oxide layer 8
Specifically, the Si passivation layer 7 is subjected to high-temperature natural thermal oxidation to form a thin SiO layer on the surface thereof 2 An oxide layer 8, as shown in FIG. 3d, in which SiO 2 The thickness of the oxide layer 8 is 1 to 2 nm.
Step e: etching away the Si passivation layer and the SiO on two sides of the grid region 2 Oxide layer
Specifically, the gate region is defined by photolithography, and the Si passivation layer 7 and the thin SiO are etched away outside the gate region using a Reactive Ion Etching (RIE) technique 2 And (c) oxidizing layer 8 as shown in fig. 3 e.
Step f: SiO deposition on the whole sample surface 2 Passivation layer 9
Specifically, SiO with the thickness of 5-100 nm is deposited on the whole sample at low temperature by adopting a plasma enhanced chemical vapor deposition method 2 Passivation layer 9 as shown in fig. 3 f.
Step g: photoetching source and drain regions
Specifically, an Inductively Coupled Plasma (ICP) etching technology is adopted to define the source electrode region and the drain electrode region, and then SiO of the source electrode region and the drain electrode region is etched 2 Passivation layer 9 and AlGaN barrier layer 5 to form source and drain regions of the device, e.g.Shown in fig. 3 g.
Step h: preparing source-drain electrode
Specifically, a Physical Vapor Deposition (PVD) of the source and drain metals is employed, followed by a high temperature anneal to form the source 10 and drain 11 regions of the device, as shown in fig. 3 h.
Step i: manufacturing grid electrode
In particular, in SiO 2 And depositing gate metal on the gate region on the passivation layer to form an MIS structure, and obtaining a device gate 12 as shown in FIG. 3 i.
And thus, the preparation of the double-layer passivation depletion type MIS-HEMT device is completed.
In the description of the present invention, it is to be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", and the like, indicate orientations or positional relationships based on those shown in the drawings, merely for convenience of description and simplification of the description, and do not indicate or imply that the device or element referred to must have a particular orientation, be constructed in a particular orientation, and be operated, and thus, are not to be construed as limiting the present invention.
Further, unless expressly stated or limited otherwise, the first feature "on" or "under" the second feature may comprise direct contact of the first and second features, or may comprise direct contact of the first and second features through another feature in between. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature includes the first feature being directly under and obliquely below the second feature, or simply meaning that the first feature is at a lesser elevation than the second feature.
The foregoing is a more detailed description of the invention in connection with specific preferred embodiments and it is not intended that the invention be limited to these specific details. For those skilled in the art to which the invention pertains, several simple deductions or substitutions can be made without departing from the spirit of the invention, and all shall be considered as belonging to the protection scope of the invention.
Claims (9)
1. A preparation method of a double-layer passivation depletion type MIS-HEMT device is characterized by comprising the following steps:
step 1: growing an AlN nucleating layer, an AlGaN buffer layer, a GaN channel layer and an AlGaN barrier layer on a substrate in sequence;
step 2: forming isolation regions of the device on two sides of the sample obtained in the step 1;
and step 3: growing a Si passivation layer on the upper surface of the AlGaN barrier layer, and forming a layer of SiO on the surface of the Si passivation layer through a thermal oxidation process 2 Oxide layer to form Si-SiO 2 A double-layer passivation structure;
and 4, step 4: defining a gate region by photolithography, and etching off SiO on both sides of the gate region 2 An oxide layer and a Si passivation layer;
and 5: SiO deposition on the whole sample surface 2 A passivation layer;
and 6: and manufacturing a source drain and a grid of the device to form the double-layer passivation depletion type MIS-HEMT device.
2. The method of fabricating a double-passivated depletion-mode MIS-HEMT device according to claim 1, wherein step 1 comprises:
by adopting a metal organic compound chemical vapor deposition process, an AlN nucleating layer with the thickness of 50-500 nm, an AlGaN buffer layer with the thickness of 200-8000 nm, a GaN channel layer with the thickness of 50-500 nm and Al with the thickness of 10-30 nm are sequentially grown on a substrate x Ga 1-x And an N barrier layer, wherein x is 0.1-0.5.
3. The method of fabricating a double-passivated depletion-mode MIS-HEMT device according to claim 1, wherein step 3 comprises:
31) growing Si with 2-5 atomic layers on the AlGaN barrier layer by adopting an atomic layer deposition process so as to form a Si passivation layer on the surface of the AlGaN barrier layer; wherein the thickness of the Si passivation layer is 2-5 nm;
32) forming a layer of SiO on the surface of the Si passivation layer by a thermal oxidation process 2 An oxide layer; wherein the SiO 2 The thickness of the oxide layer is 1-2 nm.
4. The method of claim 1, wherein step 5 comprises:
deposition of SiO on the entire sample surface by plasma-enhanced chemical vapor deposition 2 Material to form SiO with a thickness of 5-100 nm 2 And a passivation layer.
5. The method of fabricating a double passivated depletion mode MIS-HEMT device according to claim 1, wherein said step 6 comprises:
61) defining a source drain region by photoetching, and etching off SiO below the source drain region 2 A passivation layer and an AlGaN barrier layer;
62) depositing metal on the source and drain regions to form source and drain electrodes of the device;
63) in the SiO 2 And depositing grid metal in the grid region on the passivation layer to form an MIS structure, thereby completing the preparation of the device.
6. The method of fabricating a double passivated depletion mode MIS-HEMT device according to claim 5, wherein said step 62) comprises:
and depositing metal on the source and drain regions by adopting a physical vapor deposition method or an electron beam evaporation process, and forming ohmic contact of the source and the drain after high-temperature annealing.
7. A double-layer passivation depletion MIS-HEMT device is characterized by comprising a substrate (1), an AlN nucleating layer (2), an AlGaN buffer layer (3), a GaN channel layer (4), an AlGaN barrier layer (5), an isolation region (6), a Si passivation layer (7), and SiO 2 Oxide layer (8)、SiO 2 A passivation layer (9), a source electrode (10), a drain electrode (11) and a grid electrode (12);
the substrate (1), the AlN nucleating layer (2), the AlGaN buffer layer (3), the GaN channel layer (4) and the AlGaN barrier layer (5) are sequentially arranged from bottom to top;
the isolation region (7) is arranged in the AlGaN barrier layer (5) and the GaN channel layer (4) on two sides of the device;
the source electrode (10) and the drain electrode (11) are respectively arranged on the GaN channel layer (4) on two sides of the device;
the Si passivation layer (7) is arranged on the AlGaN barrier layer (5) between the source electrode (10) and the drain electrode (11);
the SiO 2 An oxide layer (8) is positioned on the upper surface of the Si passivation layer (7);
the SiO 2 A passivation layer (9) disposed on the AlGaN barrier layer (5) and covering the Si passivation layer (7) and the SiO 2 An oxide layer (8);
the gate is located on the SiO 2 The SiO above the oxide layer (8) 2 And a passivation layer (9) is arranged on the substrate to form an MIS device structure.
8. The bi-layer passivated depletion mode MIS-HEMT device according to claim 7, wherein said SiO is 2 An oxidation layer (8) is formed on the upper surface of the Si passivation layer (7) through a thermal oxidation process.
9. The double passivated depletion mode MIS-HEMT device according to claim 7, wherein said Si passivation layer (7) has a thickness of 2-5 nm; the SiO 2 The thickness of the oxide layer (8) is 1-2 nm; the SiO 2 The thickness of the passivation layer (9) is 5-100 nm.
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| CN116631960A (en) * | 2023-05-15 | 2023-08-22 | 江苏能华微电子科技发展有限公司 | GaN HEMT device manufacturing method and GaN HEMT device |
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| CN116631960B (en) * | 2023-05-15 | 2024-04-05 | 江苏能华微电子科技发展有限公司 | GaN HEMT device manufacturing method and GaN HEMT device |
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