CN114868242B - 半导体存储装置 - Google Patents

半导体存储装置 Download PDF

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Publication number
CN114868242B
CN114868242B CN202080087274.2A CN202080087274A CN114868242B CN 114868242 B CN114868242 B CN 114868242B CN 202080087274 A CN202080087274 A CN 202080087274A CN 114868242 B CN114868242 B CN 114868242B
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CN
China
Prior art keywords
nanoflake
wiring
memory cell
bit line
fet
Prior art date
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Active
Application number
CN202080087274.2A
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English (en)
Chinese (zh)
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CN114868242A (zh
Inventor
酒井康充
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Socionext Inc
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Socionext Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
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Publication of CN114868242A publication Critical patent/CN114868242A/zh
Application granted granted Critical
Publication of CN114868242B publication Critical patent/CN114868242B/zh
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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/08—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
    • G11C17/10—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
    • G11C17/12—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B20/00—Read-only memory [ROM] devices
    • H10B20/27—ROM only
    • H10B20/30—ROM only having the source region and the drain region on the same level, e.g. lateral transistors
    • H10B20/34—Source electrode or drain electrode programmed
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/6735—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes having gates fully surrounding the channels, e.g. gate-all-around
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6757—Thin-film transistors [TFT] characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/117—Shapes of semiconductor bodies
    • H10D62/118—Nanostructure semiconductor bodies
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
    • H10D30/43—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having one-dimensional [1D] charge carrier gas channels, e.g. quantum wire FETs or transistors having 1D quantum-confined channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/117—Shapes of semiconductor bodies
    • H10D62/118—Nanostructure semiconductor bodies
    • H10D62/119—Nanowire, nanosheet or nanotube semiconductor bodies
    • H10D62/121—Nanowire, nanosheet or nanotube semiconductor bodies oriented parallel to substrates

Landscapes

  • Semiconductor Memories (AREA)
  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Nanotechnology (AREA)
CN202080087274.2A 2019-12-20 2020-12-14 半导体存储装置 Active CN114868242B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2019230713 2019-12-20
JP2019-230713 2019-12-20
PCT/JP2020/046574 WO2021125138A1 (ja) 2019-12-20 2020-12-14 半導体記憶装置

Publications (2)

Publication Number Publication Date
CN114868242A CN114868242A (zh) 2022-08-05
CN114868242B true CN114868242B (zh) 2024-11-12

Family

ID=76477544

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202080087274.2A Active CN114868242B (zh) 2019-12-20 2020-12-14 半导体存储装置

Country Status (4)

Country Link
US (1) US12279419B2 (https=)
JP (1) JP7610131B2 (https=)
CN (1) CN114868242B (https=)
WO (1) WO2021125138A1 (https=)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7640861B2 (ja) * 2019-10-18 2025-03-06 株式会社ソシオネクスト 半導体集積回路装置
US20220359545A1 (en) * 2021-05-07 2022-11-10 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor memory devices with dielectric fin structures
US11778803B2 (en) 2021-09-29 2023-10-03 Advanced Micro Devices, Inc. Cross FET SRAM cell layout
US11881393B2 (en) 2021-09-29 2024-01-23 Advanced Micro Devices, Inc. Cross field effect transistor library cell architecture design
US12598741B2 (en) * 2023-01-30 2026-04-07 Arm Limited Multi-stack bitcell architecture
US12580033B2 (en) * 2023-07-03 2026-03-17 Taiwan Semiconductor Manufacturing Company, Ltd. Read-only memory method, layout, and device
WO2026009666A1 (ja) * 2024-07-04 2026-01-08 株式会社ソシオネクスト 半導体記憶装置

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101373775A (zh) * 2007-08-24 2009-02-25 株式会社瑞萨科技 半导体存储器件及其制造方法
CN101685828A (zh) * 2008-09-26 2010-03-31 夏普株式会社 半导体存储装置

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9400862B2 (en) * 2014-06-23 2016-07-26 Synopsys, Inc. Cells having transistors and interconnects including nanowires or 2D material strips
US9941290B2 (en) * 2016-06-01 2018-04-10 Taiwan Semiconductor Manufacaturing Co., Ltd. Read-only memory (ROM) device structure and method for forming the same
US10381100B2 (en) * 2016-07-01 2019-08-13 Synopsys, Inc. Enhancing memory yield and performance through utilizing nanowire self-heating
CN109390021B (zh) * 2017-08-03 2022-05-03 联华电子股份有限公司 只读存储器
SG11202005030XA (en) * 2017-11-28 2020-06-29 Univ Texas Catalyst influenced pattern transfer technology
US10833078B2 (en) * 2017-12-04 2020-11-10 Tokyo Electron Limited Semiconductor apparatus having stacked gates and method of manufacture thereof
JP7197505B2 (ja) * 2017-12-12 2022-12-27 ソニーセミコンダクタソリューションズ株式会社 半導体装置及びその製造方法
WO2019220983A1 (ja) 2018-05-17 2019-11-21 株式会社ソシオネクスト 半導体集積回路装置
US11355504B2 (en) * 2018-05-31 2022-06-07 Intel Corporation Anti-ferroelectric capacitor memory cell
US11139300B2 (en) * 2019-11-20 2021-10-05 Intel Corporation Three-dimensional memory arrays with layer selector transistors

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101373775A (zh) * 2007-08-24 2009-02-25 株式会社瑞萨科技 半导体存储器件及其制造方法
CN101685828A (zh) * 2008-09-26 2010-03-31 夏普株式会社 半导体存储装置

Also Published As

Publication number Publication date
CN114868242A (zh) 2022-08-05
WO2021125138A1 (ja) 2021-06-24
JPWO2021125138A1 (https=) 2021-06-24
US20220310634A1 (en) 2022-09-29
JP7610131B2 (ja) 2025-01-08
US12279419B2 (en) 2025-04-15

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