CN114824043A - LED structure, manufacturing method thereof and light field display system - Google Patents
LED structure, manufacturing method thereof and light field display system Download PDFInfo
- Publication number
- CN114824043A CN114824043A CN202210433738.1A CN202210433738A CN114824043A CN 114824043 A CN114824043 A CN 114824043A CN 202210433738 A CN202210433738 A CN 202210433738A CN 114824043 A CN114824043 A CN 114824043A
- Authority
- CN
- China
- Prior art keywords
- doped semiconductor
- semiconductor layer
- led
- layer material
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title abstract description 18
- 239000004065 semiconductor Substances 0.000 claims abstract description 276
- 239000000758 substrate Substances 0.000 claims abstract description 137
- 238000002955 isolation Methods 0.000 claims abstract description 120
- 230000000903 blocking effect Effects 0.000 claims abstract description 66
- 239000000463 material Substances 0.000 claims description 142
- 238000005530 etching Methods 0.000 claims description 34
- 238000005468 ion implantation Methods 0.000 claims description 27
- 238000000034 method Methods 0.000 claims description 27
- 238000002360 preparation method Methods 0.000 claims description 9
- 238000012634 optical imaging Methods 0.000 claims description 4
- 239000003292 glue Substances 0.000 claims description 3
- 230000003287 optical effect Effects 0.000 abstract description 16
- 239000010410 layer Substances 0.000 description 293
- 238000010586 diagram Methods 0.000 description 18
- 239000002184 metal Substances 0.000 description 11
- 229910052751 metal Inorganic materials 0.000 description 11
- 238000003384 imaging method Methods 0.000 description 8
- 150000002500 ions Chemical class 0.000 description 8
- 239000000084 colloidal system Substances 0.000 description 7
- 230000000694 effects Effects 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 5
- 238000002513 implantation Methods 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 239000013078 crystal Substances 0.000 description 3
- 230000005496 eutectics Effects 0.000 description 3
- 230000010287 polarization Effects 0.000 description 3
- 238000005498 polishing Methods 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 238000004364 calculation method Methods 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 238000000407 epitaxy Methods 0.000 description 2
- 238000010884 ion-beam technique Methods 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 239000000956 alloy Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000003086 colorant Substances 0.000 description 1
- 229910003460 diamond Inorganic materials 0.000 description 1
- 239000010432 diamond Substances 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 239000002346 layers by function Substances 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 208000001491 myopia Diseases 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 230000008707 rearrangement Effects 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/58—Optical field-shaping elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
- H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
- H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
- H01L2933/0058—Processes relating to semiconductor body packages relating to optical field-shaping elements
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Led Devices (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The invention discloses an LED structure, a manufacturing method thereof and a light field display system. The LED structure includes: a substrate; the LED chip comprises a plurality of LED chips, a plurality of light-emitting diode (LED) chips and a plurality of light-emitting diode (LED) chips, wherein each LED chip comprises a first doped semiconductor layer, an active layer and a second doped semiconductor layer which are sequentially stacked on the substrate; an isolation groove is arranged between the first doped semiconductor layers of any two adjacent LED chips and is used for isolating the first doped semiconductor layers corresponding to the two adjacent LED chips; and a light blocking structure is arranged in each isolation groove and used for blocking a light path between the first doped semiconductor layers corresponding to the two adjacent LED chips. The invention can weaken the optical crosstalk between the LED chips.
Description
Technical Field
The embodiment of the invention relates to an LED technology, in particular to an LED structure, a manufacturing method thereof and a light field display system.
Background
With the development of technologies such as display lighting, LED chips, such as Micro-LEDs or Mini-LEDs, have been widely used due to their high brightness and low power consumption, and accordingly, the requirements for LED chips have been increased.
However, the existing LED chip may have a problem of optical crosstalk, which severely limits further applications of the LED chip.
Disclosure of Invention
The invention provides an LED structure, a preparation method thereof and a light field display system, which aim to solve the problem of optical crosstalk of an LED chip.
In a first aspect, an embodiment of the present invention provides an LED structure, where the LED structure includes: a substrate; the LED chip comprises a plurality of LED chips, a plurality of light-emitting diode (LED) chips and a plurality of light-emitting diode (LED) chips, wherein each LED chip comprises a first doped semiconductor layer, an active layer and a second doped semiconductor layer which are sequentially stacked on the substrate; an isolation groove is arranged between the first doped semiconductor layers of any two adjacent LED chips and is used for isolating the first doped semiconductor layers corresponding to the two adjacent LED chips; and a light blocking structure is arranged in each isolation groove and used for blocking a light path between the first doped semiconductor layers corresponding to the two adjacent LED chips.
Optionally, the LED chip further includes a first electrode disposed on a side of the second doped semiconductor layer away from the active layer; the light blocking structure is a conductive structure and is in contact with the adjacent first doped semiconductor layer; and the light blocking structure is multiplexed as a second electrode of the LED chip.
Optionally, the first doped semiconductor layer is step-shaped and comprises a first sub-layer and a second sub-layer; the size of the second sublayer is smaller than that of the first sublayer, the second sublayer is arranged on one side, far away from the substrate, of the first sublayer, and the second sublayer exposes the edge region of one face, far away from the substrate, of the first sublayer; the light blocking structure fills the isolation groove and covers at least part of the first sublayer at the edge region;
or the size of the active layer is smaller than that of one surface, close to the active layer, of the first doped semiconductor layer, and the active layer exposes the edge region of the first doped semiconductor layer; the light blocking structure fills the isolation groove and covers at least part of the first doped semiconductor layer at the edge region.
Optionally, the LED chip is further provided with a super-surface structure.
Optionally, the super-surface structure corresponding to the LED chip is configured to adjust the light emitting direction of the LED chip to shift toward the central region of the LED structure.
Optionally, a groove is formed in one side, close to the substrate, of the first doped semiconductor layer of the LED chip, and the super-surface structure is formed in a portion, close to the substrate, of the first doped semiconductor layer.
Optionally, the first doped semiconductor layer and the substrate are fixed by a colloid, and the colloid fills the groove.
Optionally, a super-surface structure layer is formed on one surface, close to the substrate, of the first doped semiconductor layer of the LED chip.
Optionally, a first ion implantation structure is formed on a portion, close to the substrate, of the first doped semiconductor layer of the LED chip, and the first ion implantation structure forms the super-surface structure.
Optionally, a second ion implantation structure is disposed at an edge of the second doped semiconductor layer.
Optionally, the LED chip further includes a first electrode disposed on a side of the second doped semiconductor layer away from the active layer; the first electrode is configured to: and the included angle between two line segments formed by the orthographic projection point of the central point of one surface close to the second doped semiconductor layer on one surface of the first doped semiconductor layer close to the substrate and the two points which are farthest away from one surface of the first electrode close to the second doped semiconductor layer is smaller than or equal to a preset value.
Optionally, a side of the substrate away from the LED chip is provided with a total reflection prevention film.
In a second aspect, an embodiment of the present invention further provides a method for manufacturing an LED structure, where the method includes: forming a substrate; forming a plurality of LED chips and light blocking structures, wherein each LED chip comprises a first doped semiconductor layer, an active layer and a second doped semiconductor layer which are sequentially stacked on the substrate; an isolation groove is arranged between the first doped semiconductor layers of any two adjacent LED chips and is used for isolating the first doped semiconductor layers corresponding to the two adjacent LED chips; and a light blocking structure is arranged in each isolation groove and used for blocking a light path between the first doped semiconductor layers corresponding to the two adjacent LED chips.
Optionally, the forming a plurality of LED chips and light blocking structures includes:
epitaxially forming a first doped semiconductor layer material, an active layer material and a second doped semiconductor layer material which are sequentially stacked; etching the second doped semiconductor layer material and the active layer material to form an isolation hole, wherein the first doped semiconductor layer material is exposed out of the isolation hole; continuously etching the first doped semiconductor layer material in the isolation hole to form the isolation groove; along the thickness direction of the LED structure, the orthographic projection of the isolation groove is overlapped with the orthographic projection of the isolation hole; forming the light blocking structure in the isolation groove;
or, epitaxially forming a first doped semiconductor layer material, an active layer material and a second doped semiconductor layer material which are sequentially stacked; etching the second doped semiconductor layer material and the active layer material to form an isolation hole, wherein the first doped semiconductor layer material is exposed out of the isolation hole; etching the first doped semiconductor layer material in the isolation hole to form the isolation groove, so that the isolation hole exposes the isolation groove and the edge region of the first doped semiconductor layer of the LED chip; forming the light blocking structure in the isolation hole and the isolation groove, wherein the light blocking structure fills the isolation groove and covers at least part of the first doped semiconductor layer at the edge region; the light blocking structure is a conductive structure;
or, epitaxially forming a first doped semiconductor layer material, an active layer material and a second doped semiconductor layer material which are sequentially stacked; etching the second doped semiconductor layer material, the active layer material and part of the first doped semiconductor layer material to form an isolation hole, wherein the first doped semiconductor layer material which is not etched is exposed out of the isolation hole; etching the first doped semiconductor layer material in the isolation hole to form a step-shaped first doped semiconductor layer formed by the isolation groove, wherein the isolation hole exposes the isolation groove and the edge region of the first doped semiconductor layer of the LED chip; forming the light blocking structure in the isolation hole and the isolation groove, wherein the light blocking structure fills the isolation groove and covers at least part of the first doped semiconductor layer at the edge region; the light blocking structure is a conductive structure.
Optionally, the preparation method further comprises: the method for forming the plurality of LED chips and the light blocking structure further comprises the following steps:
a super-surface structure corresponding to each LED chip is formed.
Optionally, the preparation method comprises:
forming a first temporary substrate; epitaxially forming a first doped semiconductor layer material, an active layer material and a second doped semiconductor layer material which are sequentially stacked on the first temporary substrate; bonding a second temporary substrate to one side of the second doped semiconductor layer material; removing the first temporary substrate to expose the first doped semiconductor layer material; etching the first doped semiconductor layer material to form the super-surface structure; fixing the substrate on one side of the super-surface structure; and removing the second temporary substrate;
alternatively, the preparation method comprises: forming a first temporary substrate; epitaxially forming a first doped semiconductor layer material, an active layer material and a second doped semiconductor layer material which are sequentially stacked on the first temporary substrate; bonding a second temporary substrate to one side of the second doped semiconductor layer material; removing the first temporary substrate to expose the first doped semiconductor layer material; forming a super-surface structure layer on one side, far away from the active layer material, of the first doped semiconductor layer material; etching the super-surface structure layer to form the super-surface structure; fixing the substrate on one side of the super-surface structure; and removing the second temporary substrate;
alternatively, the preparation method comprises: forming a first temporary substrate; epitaxially forming a first doped semiconductor layer material, an active layer material and a second doped semiconductor layer material which are sequentially stacked on the first temporary substrate; bonding a second temporary substrate to one side of the second doped semiconductor layer material; removing the first temporary substrate to expose the first doped semiconductor layer material; performing ion implantation on the first doped semiconductor layer material to form the super-surface structure; fixing the substrate on one side of the super-surface structure; and removing the second temporary substrate;
alternatively, the forming the super-surface structure includes: forming the substrate; forming a super-surface structure layer on the substrate; etching the material of the super-surface structure layer to form the super-surface structure; planarizing the super-surface structure.
In a third aspect, an embodiment of the present invention further provides a light field display system, where the light field display system includes the LED structure and the optical imaging lens described in the first aspect.
According to the technical scheme of the embodiment of the invention, the adopted LED structure comprises: a substrate; the LED chip comprises a plurality of LED chips, a plurality of light-emitting diode (LED) chips and a plurality of light-emitting diode (LED) chips, wherein each LED chip comprises a first doped semiconductor layer, an active layer and a second doped semiconductor layer which are sequentially stacked on a substrate; an isolation groove is arranged between the first doped semiconductor layers of any two adjacent LED chips and is used for isolating the first doped semiconductor layers corresponding to the two adjacent LED chips; and a light blocking structure is arranged in each isolation groove and used for blocking a light path between the first doped semiconductor layers corresponding to the two adjacent LED chips. The isolation groove divides an entire continuous first doped semiconductor layer on the substrate into first doped semiconductor layers corresponding to each LED chip; and the light blocking structure is arranged in the isolation groove, so that the continuity between the first doped semiconductors of different LED chips is cut off, namely, the optical waveguide is cut off, and the light emitted by different LED chips is prevented from being transmitted to other LED chips through the first doped semiconductor layer to cause optical crosstalk.
Drawings
Fig. 1 is a schematic structural diagram of an LED structure according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of an LED structure according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of another LED structure according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of another LED structure according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of another LED structure according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of another LED structure according to an embodiment of the present invention;
fig. 7 is a schematic structural diagram of another LED structure according to an embodiment of the present invention;
FIG. 8 is an enlarged view of an LED chip according to an embodiment of the present invention;
fig. 9 is a schematic structural diagram of another LED structure according to an embodiment of the present invention;
fig. 10 is a flowchart of a method for manufacturing an LED structure according to an embodiment of the present invention;
fig. 11 to fig. 29 are schematic structural diagrams correspondingly formed by main steps of a method for manufacturing an LED structure according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
As mentioned in the background of the invention, the problem of optical crosstalk occurs in the existing LED structure, and the inventors have found through careful study that the reason for this problem is that: for the Micro-LED with a flip-chip structure, it is necessary to electrically connect the driving IC by flip-chip bonding, and therefore, the anode and the cathode need to be made on the same side. Taking the common cathode chip as an example, when the Micro-LED is patterned, the etching depth is controlled, so that the light emitting layer is completely cut off, but the N-type doped layer with most thickness is remained, and a metal electrode is formed on the surface of the N-type doped layer to form a common cathode metal network layer. However, in this structure, the continuous N-doped layer forms an optical waveguide, which results in optical crosstalk between different LED chips.
Based on the technical problem, the invention provides the following solution:
fig. 1 is a schematic structural diagram of an LED structure according to an embodiment of the present invention, and referring to fig. 1, the LED structure includes: a substrate 10; a plurality of LED chips 11 disposed on the substrate 10, each LED chip 11 including a first doped semiconductor layer 111, an active layer 112, and a second doped semiconductor layer 113 sequentially stacked on the substrate 11; an isolation groove 12 is arranged between the first doped semiconductor layers 111 of any two adjacent LED chips, and the isolation groove 12 is used for isolating the first doped semiconductor layers 111 corresponding to the two adjacent LED chips 11; a light blocking structure 121 is disposed in each isolation groove 12, and the light blocking structure 121 is used to block a light path between the first doped semiconductor layers corresponding to two adjacent LED chips.
Specifically, the LED structure of this embodiment is a flip-chip structure, that is, the LED structure and the driving chip need to be soldered together by flip-chip bonding; the substrate 10 may be, for example, a diamond substrate or a sapphire substrate, and one surface of the substrate 10 may be a light exit surface, so that the substrate 10 may be a transparent substrate; each LED chip 11 may typically include a first doped semiconductor layer 111, an active layer 112, and a second doped semiconductor layer 113, and the first doped semiconductor layer 111 may be, for example, an N-type doped semiconductor layer, and further may be, for example, N-type GaN; the second doped semiconductor layer 113 may be, for example, a P-type doped semiconductor layer, and further may be, for example, P-type GaN; the light emitting principle of the LED chip is well known to those skilled in the art, and is not described herein; it should be noted that, depending on the material of the active layer 112, the LED chip 11 can emit light with different colors, and the LED chip can further include other functional layers, such as a reflective layer; in this embodiment, an isolation groove 12 is disposed between any two adjacent LED chips 11, and the isolation groove 12 separates the first doped semiconductor layer 111 of each LED chip 11 into an independent structure, in other words, the isolation groove 12 separates an entire continuous first doped semiconductor layer on the substrate 10 into first doped semiconductor layers corresponding to each LED chip 11; and the light blocking structure 121 is arranged in the isolation groove 12, so that continuity between the first doped semiconductors of different LED chips, that is, the optical waveguide is cut off, thereby preventing light emitted by different LED chips 11 from being transmitted to other LED chips through the first doped semiconductor layer 111 to cause optical crosstalk.
In the technical solution of this embodiment, the LED structure includes: a substrate; the LED chip comprises a plurality of LED chips, a plurality of light-emitting diode (LED) chips and a plurality of light-emitting diode (LED) chips, wherein each LED chip comprises a first doped semiconductor layer, an active layer and a second doped semiconductor layer which are sequentially stacked on a substrate; an isolation groove is arranged between the first doped semiconductor layers of any two adjacent LED chips and is used for isolating the first doped semiconductor layers corresponding to the two adjacent LED chips; and a light blocking structure is arranged in each isolation groove and used for blocking a light path between the first doped semiconductor layers corresponding to the two adjacent LED chips. The isolation groove divides an entire continuous first doped semiconductor layer on the substrate into first doped semiconductor layers corresponding to each LED chip; and the light blocking structure is arranged in the isolation groove, so that the continuity between the first doped semiconductors of different LED chips is cut off, namely, the optical waveguide is cut off, and the light emitted by different LED chips is prevented from being transmitted to other LED chips through the first doped semiconductor layer to cause optical crosstalk.
It should be noted that a buffer layer may be further included between the LED chip and the substrate, and the isolation trench may penetrate through the buffer layer.
In addition, it should be noted that the proportions of the structural layers in the drawings provided by the present invention are merely schematic, and do not represent the proportions of the structural layers in the actual structure.
Optionally, with continued reference to fig. 1, the LED chip further includes a first electrode 114 disposed on a side of the second doped semiconductor layer 113 away from the active layer 112; the light blocking structure 121 is a conductive structure, and the light blocking structure 121 is in contact with the adjacent first doped semiconductor layer 111; the light blocking structure 121 is multiplexed as a second electrode of the LED chip 11.
Specifically, each LED chip 11 needs two electrodes to be driven, and the material of the electrodes may be, for example, a single-layer metal or an alloy of multiple layers of metals; the first electrode 114 is in ohmic contact with the second doped semiconductor layer 113; in the embodiment, metal can be used as the second electrode, and due to the light-shielding property of the metal, the metal can be used as both the light-blocking structure and the second electrode of the LED chip, so that the second electrode and the light-blocking structure can be manufactured only by one process, and the manufacturing process is simplified. It should be noted that, in the LED structure, the light blocking structure may be in a grid shape, each LED chip 11 is defined in the grid formed by the grid-shaped structure, and at this time, the second electrodes of all the LED chips are in a connected state, that is, all the LED chips share the second electrode.
Of course, in other embodiments, the light blocking structure 121 may also be made of only the light blocking material, and the second electrode is made by other methods.
Illustratively, as shown in fig. 1, the first doped semiconductor layer 111 is step-shaped, and may specifically include a first sub-layer and a second sub-layer; the size of the second sublayer is smaller than that of the first sublayer, the second sublayer is arranged on one side, far away from the substrate, of the first sublayer, and the second sublayer exposes the edge region of one side, far away from the substrate, of the first sublayer; the light blocking structure fills the isolation trench and covers at least a portion of the first sublayer located at the edge region.
Specifically, in the present embodiment, the first doped semiconductor layer 111 is provided in a step shape, and the size of the second sub-layer is smaller than that of the first sub-layer, which can be understood as that, along the thickness direction of the LED chip, the orthographic area of the second sub-layer is smaller than that of the first sub-layer, so that the second sub-layer can expose the edge region of the first sub-layer; the conductive structure not only fills the isolation groove, but also covers at least part of the first sublayer located in the edge region, and due to the limitation of the manufacturing process of the conductive structure, the conductive structure and one surface of the first sublayer, which is far away from the substrate, can form good ohmic contact, so that the contact resistance can be reduced, and the power consumption can be reduced. In addition, since the first doped semiconductor layer 111 is generally thick, the thickness of the isolation trench can be reduced by setting the first doped semiconductor layer to be step-shaped in this embodiment, and the difficulty in filling the conductive structure can be reduced.
It should be noted that, in some other embodiments, the isolation trench may be filled with a conductive structure or a non-conductive structure, as long as the conductive structure is formed to form an ohmic contact with the first sub-layer.
Exemplarily, fig. 2 is a schematic structural diagram of an LED structure according to an embodiment of the present invention, and referring to fig. 2, a size of an active layer 112 is smaller than a size of a side of a first doped semiconductor layer 111 close to the active layer 112, and the active layer 112 exposes an edge region of the first doped semiconductor layer; the light blocking structure 121 fills the isolation trench 12 and covers at least a portion of the first doped semiconductor layer 111 located at the edge region.
Specifically, unlike the above-described embodiment, the first doped semiconductor layer in this embodiment is not stepped, and the whole of the first doped semiconductor layer and the active layer is stepped, and the thickness of the isolation trench 12 is the same as the thickness of the first doped semiconductor layer 111. As in the foregoing embodiment, the isolation trench may also be filled with a non-conductive structure, as long as an ohmic contact is subsequently formed between the conductive structure and the surface of the first doped semiconductor layer away from the substrate.
Exemplarily, as shown in fig. 3, fig. 3 is a schematic structural diagram of another LED structure according to an embodiment of the present invention, different from the above embodiments, in this embodiment, the orthographic projection areas of the first doped semiconductor layer, the active layer and the second doped semiconductor layer are all the same along the thickness direction of the LED chip, and at this time, a conductive structure may be formed in the isolation trench to contact with the sidewall of the first doped semiconductor layer so as to achieve electrical connection; the thickness of the conductive structure may be less than or equal to the thickness of the first doped semiconductor layer. According to the scheme of the embodiment, the second doped semiconductor layer, the active layer and the first doped semiconductor layer can be etched by only one etching, the number of required mask plates is small, the etching times are small, and therefore the process difficulty is favorably reduced.
Optionally, fig. 4 is a schematic structural diagram of another LED structure provided in an embodiment of the present invention, and referring to fig. 4, the LED chip is further provided with a super-surface structure 13.
In particular, LED structures need to have high luminance in some application scenarios, such as projection technology, as well as avoiding the problem of optical crosstalk. In the embodiment, by providing the super-surface structure 13, the super-surface structure 13 is a nano super-surface layer, and the nano super-surface structure can be disposed at an interface where there is a refractive index change (for example, a light-emitting surface of the first doped semiconductor layer). Through setting up the super surface structure of graphical nanometer, can change the phase place of light beam in interface department to change the propagation direction of light beam, not only can make originally by the light beam outgoing of restriction in the optical waveguide, can also be most light that the LED chip sent with narrow light beam outgoing, thereby can be received by the image device in the projection system light, thereby greatly improve the whole luminance of system. In addition, since almost all of the light beams can exit from the substrate waveguide, the super-surface structure can also greatly reduce far-field crosstalk due to light transmission in the substrate waveguide. The super-surface structure is a structure composed of a sub-wavelength structure array, and the phase, amplitude, polarization state and the like of incident light can be controlled by designing a proper sub-wavelength structure.
Illustratively, when the size of the light emitting surface (the side of the first doped semiconductor layer far away from the active layer) is 16 μm and the thickness of the first doped semiconductor layer is 4 μm, most of light beams emitted by the LED chip are incident on the super-surface structure, the propagation direction of the light beams is changed, the light beams are emitted to the outside of the LED structure as narrow light beams, the light beams can enter the imaging device, the light emitting angle of the light source of the LED structure effectively utilized is related to the LED structure, and according to the geometrical relationship, the light beams pass through the LED structure
The half angle of the effective light emitting angle can be calculated to be about 70 degrees; according to the calculation formula of the effective light receiving efficiency, eta (1-cos (70 °)) is 66%, and the effective light receiving efficiency is calculated to be 66%, compared with the LED structure without the nano super-surface structure (the light emitting efficiency calculation mode is similar to the above formula, the effective light emitting angle is calculated to be 6.4 °, the light emitting efficiency is about 0.62%), and the light emitting efficiency is improved by about 100 times.
In addition, it should be noted that the super-surface structure 13 corresponding to each LED chip is a patterned surface with nano-scale micro-structures arranged in a certain regular pattern. The nanopattern may be, for example, a cylinder, a truncated cone, a circular hole, or the like. The diameter and depth of the nano patterns can be designed at will, and the patterns are arranged according to a uniform period (sub-wavelength range) and can also be randomly distributed in a two-dimensional direction. The change of the diameter, depth (height) and arrangement mode of the nanometer pattern can bring different phase changes, so that the propagation direction of the light beam at the interface is changed, and the purpose of arbitrarily controlling the direction of the light beam can be realized.
Preferably, the super-surface structure corresponding to the LED chip is configured to adjust the light emitting direction of the LED chip to shift toward the central region of the LED structure. In other words, by adjusting the parameters of the super-surface structure corresponding to each LED chip, the light emitting directions of all the LED chips are close to the central region of the LED structure, so that the light emitting efficiency can be improved, the main propagation direction of the narrow light beam can be controlled, and most of the light energy emitted by the edge LED chip can be received into the imaging device. The whole light-emitting angle of the LED structure is narrow, and the LED structure is more favorable for application of technologies such as projection and the like.
In addition, the super-surface structure can improve the light efficiency and control the light beam propagation direction, and can regulate and control the light emitting performance of each LED chip, and the light field display effect can be realized by combining the technology with projection display. The microstructure of the super-surface structure is designed, parameters such as shape, period and depth can be included, the imaging depth, the imaging size and the imaging virtual and real of each LED chip can be controlled, and meanwhile, the polarization state of light emitted by the LED chips can also be controlled. The structure of the super-surface structure is designed according to the display requirement, a plurality of imaging surfaces with two polarization states can be simultaneously realized, and a good basis is provided for light field display. Under the condition, the display resolution can be reduced by forming a plurality of imaging surfaces on the LED chip, and the problem of insufficient resolution can be solved by combining galvanometer scanning and using a time-space conversion method, so that the light field display effect with high resolution and multiple layers of focusing planes can be realized at last.
Illustratively, as shown in fig. 4, a groove is formed on one side of the first doped semiconductor layer of the LED chip close to the substrate, and a super-surface structure is formed on a portion of the first doped semiconductor layer close to the substrate 10.
Specifically, in this embodiment, the super-surface structure 13 may be directly fabricated on the first doped semiconductor layer 111, and specifically, the first doped semiconductor layer 111 may be etched (which will be described in detail later), so that the overall thickness of the LED structure does not need to be increased, thereby facilitating the thinning of the LED structure.
Illustratively, with continued reference to fig. 4, in the groove formed by the first doped semiconductor layer, a colloid structure may be filled, so that the connection between the first doped semiconductor layer and the substrate is stronger. Of course, other structures can be filled in the groove. It should be noted that the parameters of the super-surface structure may be designed according to the refractive index characteristics of the material filled in the groove, for example, the depth of the groove may be set according to the refractive index characteristics.
Optionally, fig. 5 is a schematic structural diagram of another LED structure provided in an embodiment of the present invention, and referring to fig. 5, a super-surface structure layer 13 is formed on a surface, close to the substrate, of the first doped semiconductor layer 111 of the LED chip.
Specifically, different from the above embodiments, in the present embodiment, the super-surface structure 13 is formed outside the first doped semiconductor layer 111, and the super-surface structure is not formed by using the first doped semiconductor layer 111, and a specific forming manner will be described later, since it is not necessary to destroy the first doped semiconductor layer, the risk of damaging the LED chip due to destroying the first doped semiconductor layer can be reduced. In the present embodiment, the material of the super-surface structure 13 may be, for example, metal.
Optionally, fig. 6 is a schematic structural diagram of another LED structure according to an embodiment of the present invention, and referring to fig. 6, an ion implantation structure 131 is formed on a portion, close to the substrate, of the first doped semiconductor layer 111 of the LED chip, and the first ion implantation structure 131 forms the super-surface structure 13.
Specifically, in the present embodiment, the first doped semiconductor layer 111 is ion-implanted to a certain depth to form an ion column, so that the ion-implanted region forms a nano-patterned distribution. The ion implantation area has the function of locally breaking the consistency of the crystal, and the patterned ion implantation area can also modulate the phase of the light beam at the interface. The width, the period and the implantation depth of an ion beam implantation area and the concentration of implanted ions and ions are reasonably designed, and the propagation direction of the light beam at the interface can be well controlled. By means of ion implantation, the surface flatness of the first doped semiconductor layer 111 is not damaged, and the nano pattern region is not affected and the control effect of the nano pattern on the light beam is not affected in the substrate bonding (which will be described later).
Optionally, fig. 7 is a schematic structural diagram of another LED structure according to an embodiment of the present invention, and referring to fig. 7, a second ion implantation structure 1131 is disposed at an edge of the second doped semiconductor layer 113.
Specifically, the LED structure of the embodiment may be applied to the field of projection display, and the narrower the light emitting angle of each LED chip is, the better, therefore, ion implantation may be performed on the edge of the second doped semiconductor layer 113, specifically, ion implantation may be performed vertically before pixelation of each LED chip, or ion implantation may be performed from the side of the second doped semiconductor layer after pixelation of the LED chip, the ion implantation region is in a high resistance state, and the region does not carry out carrier coincidence, and therefore, does not emit light, and can reduce the effective light emitting area on the premise of not physically damaging the crystal structure, thereby reducing the light emitting angle. When the ion implantation is performed in the vertical implantation manner, the depth of the ion implantation may be controlled so that the ions are as close to the active layer as possible, but are not implanted into the active layer.
Illustratively, taking a blue LED chip as an example, in the Micro-LED structure provided by the present invention, the length of the light-emitting interface of the LED chip is 16um × 16um, the thickness of the first doped semiconductor layer is about 4um, and the thickness of the second doped semiconductor layer is about 300 nm. Because the resistivity of the second doped semiconductor layer is high, ion implantation can be performed from one side of the second doped semiconductor layer to the position, close to the active layer, of the second doped semiconductor layer in an ion implantation mode, the length and the width of an ion implantation area are respectively 12um and are smaller than the length of a light-emitting interface, and the effective light-emitting area is 4um x 4um at the moment.
Optionally, fig. 8 is an enlarged view of an LED chip provided in an embodiment of the present invention, and referring to fig. 8, the LED chip further includes a first electrode 114 disposed on a side of the second doped semiconductor layer 113 away from the active layer 112; the first electrode 114 is configured to: the included angle between two line segments formed by the orthographic projection point of the central point close to one side of the second doped semiconductor layer 113 on one side of the first doped semiconductor layer close to the substrate and the two points which are farthest away from one side of the first electrode 114 close to the second doped semiconductor layer 113 is less than or equal to a preset value.
Specifically, since the size of the first electrode 114 also affects the light-emitting angle of the LED chip, at a portion of the second doped semiconductor layer not contacting the first electrode, due to a higher resistivity, the active layer corresponding to the region does not have a large amount of carriers to be recombined, and thus the region does not form effective light-emitting or has little light-emitting. The central point of one surface of the first electrode close to the second doped semiconductor layer 113 is the geometric central point of the surface, and if the first electrode is cylindrical, the central point is a dot; the short-sighted orthographic projection point of the central point on the surface, close to the substrate, of the first doped semiconductor layer is the central point of the emergent light of the LED chip, the central point of the emergent light and two points which are farthest away on the surface, close to the second doped semiconductor layer, of the first electrode form two line segments, and the smaller the included angle between the two line segments is, the narrower the light-emitting angle of the LED chip is; the preset value may be smaller than or equal to a light-receiving angle of an imaging device in the projection system, for example, the preset value is 16 degrees. Of course, in other embodiments, the preset value may be other values, and the light emitting angle of the LED chip may be further reduced by limiting the size of the first electrode in this embodiment.
Optionally, fig. 9 is a schematic structural diagram of another LED structure provided in an embodiment of the present invention, and referring to fig. 9, the LED structure further includes a total reflection preventing film 14 disposed on a side of the substrate away from the LED chip. The total reflection preventing film is used for total reflection when light is emitted from the substrate to the outside of the LED structure, and the total reflection preventing film 14 may be, for example, an antireflection film or a graded-index film, so that light beams in the substrate are emitted as much as possible, and far-field crosstalk caused by light transmission in the substrate can be reduced while the light emitting efficiency is improved.
An embodiment of the present invention further provides a method for manufacturing an LED structure, fig. 10 is a flowchart of the method for manufacturing an LED structure according to the embodiment of the present invention, and with reference to fig. 10, the method for manufacturing an LED structure includes:
step S210, forming a substrate; step S220, forming a plurality of LED chips and light blocking structures, wherein each LED chip comprises a first doped semiconductor layer, an active layer and a second doped semiconductor layer which are sequentially stacked on a substrate; an isolation groove is arranged between the first doped semiconductor layers of any two adjacent LED chips and is used for isolating the first doped semiconductor layers corresponding to the two adjacent LED chips; and a light blocking structure is arranged in each isolation groove and used for blocking a light path between the first doped semiconductor layers corresponding to the two adjacent LED chips.
In the LED structure prepared in this embodiment, the isolation trench divides the entire continuous first doped semiconductor layer originally on the substrate into the first doped semiconductor layers corresponding to each LED chip; and the light blocking structure is arranged in the isolation groove, so that the continuity between the first doped semiconductors of different LED chips is cut off, namely, the optical waveguide is cut off, and the light emitted by different LED chips is prevented from being transmitted to other LED chips through the first doped semiconductor layer to cause optical crosstalk.
Optionally, fig. 11 to fig. 29 are schematic structural diagrams correspondingly formed in main steps of a method for manufacturing an LED structure according to an embodiment of the present invention;
forming a plurality of LED chips and a light blocking structure includes:
as shown in fig. 11, a first doped semiconductor layer material 1110, an active layer material 1120, and a second doped semiconductor layer material 1130 are epitaxially formed, which are sequentially stacked. The method of epitaxy may be, for example, MOCVD, etc., and it should be noted that the growth base for epitaxy is not necessarily the substrate 10 shown in fig. 11, and fig. 11 is illustrated by the substrate 10 alone.
As shown in fig. 12, the second doped semiconductor layer material and the active layer material are etched to form an isolation hole, which exposes the first doped semiconductor layer material; continuously etching the first doped semiconductor layer material in the isolation hole to form an isolation groove; along the thickness direction of the LED structure, the orthographic projection of the isolation groove is overlapped with the orthographic projection of the isolation hole; in the present embodiment, the second doped semiconductor layer and the active layer are taken as one integral structure, and the isolation hole can be understood as a portion between two adjacent integral structures; the isolation groove is a part between two adjacent first doped semiconductor layers; in the embodiment, one mask is used, the second doped semiconductor layer 113, the active layer 112 and the first doped semiconductor layer 111 can be completely etched by one-time etching, and the number of required masks and etching steps is small, so that the process steps are simplified, and the process cost is reduced.
Subsequently, a light blocking structure is formed in the isolation trench, and the light blocking structure may be, for example, a conductive structure, so as to be multiplexed as one electrode of the LED chip, and finally, the structure shown in fig. 3 is formed.
Alternatively, as shown in fig. 13, after the first doped semiconductor layer material, the active layer material and the second doped semiconductor layer material stacked in sequence are epitaxially formed, first etching may be performed, that is, etching the second doped semiconductor layer material and the active layer material to form an isolation hole 1131, where the first doped semiconductor layer material 1110 is exposed from the isolation hole 1131; subsequently, as shown in fig. 14, etching the first doped semiconductor layer material in the isolation hole to form an isolation trench 12, so that the isolation hole exposes the isolation trench and an edge region of the first doped semiconductor layer of the LED chip; in the scheme, the first doped semiconductor layer, the active layer and the second doped semiconductor layer can form an integral step structure through secondary etching; and then, forming a light blocking structure in the isolation hole and the isolation groove, filling the light blocking structure which can be a conductive structure in the isolation groove through two manufacturing processes, and then performing a second manufacturing process to manufacture a conductive structure which forms ohmic contact with the part of the first doped semiconductor layer positioned in the edge region in the isolation hole, so that the contact resistance is reduced, and the power consumption of the LED chip is reduced. This embodiment finally forms the structure shown in fig. 2.
Alternatively, as shown in fig. 15, after the first doped semiconductor layer material, the active layer material and the second doped semiconductor layer material stacked in sequence are epitaxially formed, the second doped semiconductor layer material, the active layer material and a portion of the first doped semiconductor layer material are etched to form an isolation hole 1131, and the first doped semiconductor layer material that is not etched is exposed out of the isolation hole 1131; in this embodiment, the second doped semiconductor layer material and the active layer material are etched through by using a one-time etching process, but only a part of the first doped semiconductor layer material is etched, so as to form a groove on the first doped semiconductor layer material;
subsequently, as shown in fig. 16, etching the first doped semiconductor layer material in the isolation hole to form a step-shaped first doped semiconductor layer 111, where the isolation hole exposes the isolation trench and the edge region of the first doped semiconductor layer of the LED chip; in this embodiment, the size of the isolation trench is smaller than that of the isolation hole, so that the first doped semiconductor layer 111 is step-shaped, and the depth of the isolation trench can be made smaller by two times of etching, which is convenient for compatibility with the existing metal manufacturing process.
Subsequently, as shown in fig. 1, through two manufacturing processes, for example, first filling the isolation trench with a conductive structure, and then forming a conductive structure in ohmic contact with the first doped semiconductor layer in the isolation hole, the structure shown in fig. 1 is formed.
Optionally, before forming the plurality of LED chips and the light blocking structure, further comprising:
a super-surface structure corresponding to each LED chip is formed.
Specifically, for a detailed description of the super-surface structure, reference may be made to the description of the LED structure portion in the embodiment of the present invention, and details are not repeated here.
Optionally, in this embodiment, before forming the substrate, forming the super-surface structure corresponding to each LED chip specifically includes:
as shown in fig. 17, a first temporary substrate 30 is formed; epitaxially forming a first doped semiconductor layer material 1110, an active layer material 1120, and a second doped semiconductor layer material 1130, which are sequentially stacked, on the first temporary substrate 30; the first temporary substrate 30 is used only for support and subsequent removal is required, so transparent or opaque substrates may be used; subsequently, as shown in fig. 18, the second temporary substrate 31 is bonded to the second doped semiconductor layer material 1130 side; the second temporary substrate 31 functions as the first temporary substrate 30, and also serves as a support, and thus a transparent or opaque substrate may be used; subsequently, as shown in fig. 19, the first temporary substrate is removed by lift-off, thereby exposing a side of the first doped semiconductor layer material 1110 away from the active layer material 1120; subsequently, as shown in fig. 20, a plurality of grooves are formed by etching the portion of the first doped semiconductor layer material corresponding to each LED chip, and the first doped semiconductor layer material forms a super-surface structure with respect to the un-etched portion of the groove; next, as shown in fig. 21, the substrate 10 is attached to the side of the first doped semiconductor layer material away from the active layer material by using a material such as a glue; and peeling off the second temporary substrate; finally, the preparation of the super-surface structure is completed, and then the steps of forming the LED chip and the light blocking structure can be executed; it should be noted that when the substrate is fixed on the first doped semiconductor layer material by using the colloid material, the colloid material is preferably arranged to fill the grooves on the first doped semiconductor layer material. The super surface structure of this scheme of adoption preparation can not increase the whole thickness of LED structure.
Alternatively, as shown in fig. 22, after the structure shown in fig. 19 is formed, the exposed first doped semiconductor layer material is not etched, and the super-surface structure layer 32 is formed on the side of the first doped semiconductor layer material away from the active layer material; the material of the super-surface structure layer 32 may be metal; subsequently, as shown in fig. 23, the super surface structure layer is etched to form a super surface structure 13; subsequently, as shown in fig. 24, the substrate 10 is fixed to one side of the super surface structure, and the second temporary base is removed. In this embodiment, since the first doped semiconductor layer is not required to be etched, the first doped semiconductor layer is not required to be damaged, and thus the risk of damage to the LED chip caused by damage to the first doped semiconductor layer can be reduced. The super-surface structure of the metal material may be fixed to the substrate by a colloid structure. For the infrared LED structure, a silicon material may be used to form the super-surface structure, the process steps are the same as the above method, except that the substrate 10 may be a silicon dioxide substrate, and when the super-surface structure 13 is bonded to the substrate 10, the silicon dioxide substrate and the super-surface structure may be directly pressurized for eutectic bonding. Preferably, when a eutectic bonding mode is adopted, some unclosed air flowing grooves need to be reserved when the super-surface structure is formed by etching, so that air cannot be confined between the two substrates after eutectic bonding, and separation between the substrates caused by air expansion when the substrates are heated is avoided.
Alternatively, as shown in fig. 25, after forming the structure shown in fig. 19, the first doped semiconductor layer material may be directly ion implanted to form the super-surface structure. Ion implantation is carried out for a certain depth to form an ion column, so that the ion implantation area forms nano-patterned distribution. The ion implantation area has the function of locally breaking the consistency of the crystal, and the patterned ion implantation area can also modulate the phase of the light beam at the interface. The width, the period and the implantation depth of an ion beam implantation area and the concentration of implanted ions and ions are reasonably designed, and the propagation direction of the light beam at the interface can be well controlled. By means of ion implantation, the surface flatness of the first doped semiconductor layer 111 is not damaged, and then as shown in fig. 26, the substrate is fixed on one side of the super-surface structure, and in the process of bonding the substrate 10 to one side of the first doped semiconductor layer material, since the side of the first doped semiconductor layer material, which is far away from the active layer material, is flat, the nano-pattern region is not affected in the bonding process, and the control effect of the nano-pattern on the light beam is not affected.
Alternatively, as shown in fig. 27, unlike the above embodiments, the present embodiment may directly form the super-surface structure on the substrate 10, and specifically may include: forming a super-surface structure layer 50 on a substrate 10; the material of the super-surface structure layer 50 may be metal, and is preferably the same material as the first doped semiconductor layer; subsequently, as shown in fig. 28, the super surface structure layer 50 is etched, thereby forming a super surface structure; as shown in fig. 29, since the first doped semiconductor layer material needs to be grown subsequently, it is necessary to ensure that the side of the super-surface structure away from the substrate 10 is flat, and the surface is flat by forming the planarization layer 520 between the super-surface structures 13, and the preferred planarization layer is only filled in the groove formed by the super-surface structure 13 and is flush with the super-surface structure, but due to the process limitation, the planarization layer may cover the super-surface structure 13, and at this time, the polishing may be performed by chemical polishing or mechanical polishing, so that the side of the LED structure away from the substrate is flat and exposed out of the super-surface structure. Subsequently, fig. 11 and subsequent steps may be performed again.
It should be noted that, when the super-surface structure is manufactured, the light-emitting angle of each LED chip can meet the requirement of the LED structure regarding the light-emitting angle by adjusting the etching depth and the refractive index of the material (colloid or planarization layer) filled in the groove.
The embodiment of the invention also provides a light field display system, and the light field display system comprises the LED structure and the optical imaging lens provided by any embodiment of the invention. The optical imaging lens may be a lens, for example, and the light field display system includes the LED structure provided in any embodiment of the present invention, so that the same advantageous effects are also provided, and further description is omitted here.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims (17)
1. An LED structure, comprising:
a substrate;
the LED chip comprises a plurality of LED chips, a plurality of light-emitting diode (LED) chips and a plurality of light-emitting diode (LED) chips, wherein each LED chip comprises a first doped semiconductor layer, an active layer and a second doped semiconductor layer which are sequentially stacked on the substrate;
an isolation groove is arranged between the first doped semiconductor layers of any two adjacent LED chips and is used for isolating the first doped semiconductor layers corresponding to the two adjacent LED chips;
and a light blocking structure is arranged in each isolation groove and used for blocking a light path between the first doped semiconductor layers corresponding to the two adjacent LED chips.
2. The LED structure of claim 1, wherein the LED chip further comprises a first electrode disposed on a side of the second doped semiconductor layer away from the active layer;
the light blocking structure is a conductive structure and is in contact with the adjacent first doped semiconductor layer;
and the light blocking structure is multiplexed as a second electrode of the LED chip.
3. The LED structure of claim 2, wherein the first doped semiconductor layer is stepped comprising a first sub-layer and a second sub-layer;
the size of the second sublayer is smaller than that of the first sublayer, the second sublayer is arranged on one side, far away from the substrate, of the first sublayer, and the second sublayer exposes the edge region of one face, far away from the substrate, of the first sublayer;
the light blocking structure fills the isolation groove and covers at least part of the first sublayer at the edge region;
or the size of the active layer is smaller than that of one surface, close to the active layer, of the first doped semiconductor layer, and the active layer exposes the edge region of the first doped semiconductor layer;
the light blocking structure fills the isolation groove and covers at least part of the first doped semiconductor layer at the edge region.
4. The LED structure of claim 1, wherein said LED chip is further provided with a super-surface structure.
5. The LED structure of claim 4, wherein the corresponding super-surface structure of the LED chip is configured to adjust the light-emitting direction of the LED chip to be shifted toward the central region of the LED structure.
6. The LED structure of claim 4, wherein a side of the first doped semiconductor layer of the LED chip close to the substrate is formed with a groove, and a portion of the first doped semiconductor layer close to the substrate forms the super-surface structure.
7. The LED structure of claim 6, wherein the first doped semiconductor layer is secured to the substrate by a glue, the glue filling the recess.
8. The LED structure of claim 4, wherein a super-surface structure layer is formed on the first doped semiconductor layer of the LED chip on the side close to the substrate.
9. The LED structure of claim 4, wherein a portion of the first doped semiconductor layer of the LED chip adjacent to the substrate is formed with a first ion implantation structure that forms the super-surface structure.
10. The LED structure of claim 1, wherein an edge of the second doped semiconductor layer is provided with a second ion implantation structure.
11. The LED structure of claim 1, wherein the LED chip further comprises a first electrode disposed on a side of the second doped semiconductor layer away from the active layer; the first electrode is configured to: and the included angle between two line segments formed by the orthographic projection point of the central point of one surface close to the second doped semiconductor layer on one surface of the first doped semiconductor layer close to the substrate and the two points which are farthest away from one surface of the first electrode close to the second doped semiconductor layer is smaller than or equal to a preset value.
12. The LED structure of claim 1, wherein a side of said substrate remote from said LED chip is provided with a total reflection preventing film.
13. A preparation method of an LED structure is characterized by comprising the following steps:
forming a substrate;
forming a plurality of LED chips and a light blocking structure, wherein each LED chip comprises a first doped semiconductor layer, an active layer and a second doped semiconductor layer which are sequentially stacked on the substrate; an isolation groove is arranged between the first doped semiconductor layers of any two adjacent LED chips and is used for isolating the first doped semiconductor layers corresponding to the two adjacent LED chips; and a light blocking structure is arranged in each isolation groove and used for blocking a light path between the first doped semiconductor layers corresponding to the two adjacent LED chips.
14. The method of claim 13, wherein the forming the plurality of LED chips and the light blocking structure comprises:
epitaxially forming a first doped semiconductor layer material, an active layer material and a second doped semiconductor layer material which are sequentially stacked;
etching the second doped semiconductor layer material and the active layer material to form an isolation hole, wherein the first doped semiconductor layer material is exposed out of the isolation hole;
continuously etching the first doped semiconductor layer material in the isolation hole to form the isolation groove; along the thickness direction of the LED structure, the orthographic projection of the isolation groove is overlapped with the orthographic projection of the isolation hole;
forming the light blocking structure in the isolation groove;
or, epitaxially forming a first doped semiconductor layer material, an active layer material and a second doped semiconductor layer material which are sequentially stacked;
etching the second doped semiconductor layer material and the active layer material to form an isolation hole, wherein the first doped semiconductor layer material is exposed out of the isolation hole;
etching the first doped semiconductor layer material in the isolation hole to form the isolation groove, so that the isolation hole exposes the isolation groove and the edge region of the first doped semiconductor layer of the LED chip; forming the light blocking structure in the isolation hole and the isolation groove, wherein the light blocking structure fills the isolation groove and covers at least part of the first doped semiconductor layer at the edge region; the light blocking structure is a conductive structure;
or, epitaxially forming a first doped semiconductor layer material, an active layer material and a second doped semiconductor layer material which are sequentially stacked;
etching the second doped semiconductor layer material, the active layer material and part of the first doped semiconductor layer material to form an isolation hole, wherein the first doped semiconductor layer material which is not etched is exposed out of the isolation hole;
etching the first doped semiconductor layer material in the isolation hole to form a step-shaped first doped semiconductor layer formed by the isolation groove, wherein the isolation hole exposes the isolation groove and the edge region of the first doped semiconductor layer of the LED chip; forming the light blocking structure in the isolation hole and the isolation groove, wherein the light blocking structure fills the isolation groove and covers at least part of the first doped semiconductor layer at the edge region; the light blocking structure is a conductive structure.
15. The method of claim 13, further comprising: the method for forming the plurality of LED chips and the light blocking structure further comprises the following steps:
a super-surface structure corresponding to each LED chip is formed.
16. The method of claim 15, wherein the method comprises:
forming a first temporary substrate; epitaxially forming a first doped semiconductor layer material, an active layer material and a second doped semiconductor layer material which are sequentially stacked on the first temporary substrate;
bonding a second temporary substrate to one side of the second doped semiconductor layer material;
removing the first temporary substrate to expose the first doped semiconductor layer material;
etching the first doped semiconductor layer material to form the super-surface structure;
fixing the substrate on one side of the super-surface structure; and removing the second temporary substrate;
alternatively, the preparation method comprises: forming a first temporary substrate; epitaxially forming a first doped semiconductor layer material, an active layer material and a second doped semiconductor layer material which are sequentially stacked on the first temporary substrate;
bonding a second temporary substrate to one side of the second doped semiconductor layer material;
removing the first temporary substrate to expose the first doped semiconductor layer material;
forming a super-surface structure layer on one side, far away from the active layer material, of the first doped semiconductor layer material;
etching the super-surface structure layer to form the super-surface structure;
fixing the substrate on one side of the super-surface structure; and removing the second temporary substrate;
or, before forming the substrate, the forming of the super-surface structure corresponding to each LED chip includes: forming a first temporary substrate; epitaxially forming a first doped semiconductor layer material, an active layer material and a second doped semiconductor layer material which are sequentially stacked on the first temporary substrate;
bonding a second temporary substrate to one side of the second doped semiconductor layer material;
removing the first temporary substrate to expose the first doped semiconductor layer material;
performing ion implantation on the first doped semiconductor layer material to form the super-surface structure;
fixing the substrate on one side of the super-surface structure; and removing the second temporary substrate;
alternatively, the forming the super-surface structure includes: forming the substrate; forming a super-surface structure layer on the substrate;
etching the material of the super-surface structure layer to form the super-surface structure;
planarizing the super-surface structure.
17. A light field display system comprising the LED structure of any one of claims 1-12 and an optical imaging lens.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210433738.1A CN114824043A (en) | 2022-04-24 | 2022-04-24 | LED structure, manufacturing method thereof and light field display system |
| PCT/CN2022/118648 WO2023206919A1 (en) | 2022-04-24 | 2022-09-14 | Led structure and preparation method therefor, and optical field display system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210433738.1A CN114824043A (en) | 2022-04-24 | 2022-04-24 | LED structure, manufacturing method thereof and light field display system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN114824043A true CN114824043A (en) | 2022-07-29 |
Family
ID=82506876
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202210433738.1A Pending CN114824043A (en) | 2022-04-24 | 2022-04-24 | LED structure, manufacturing method thereof and light field display system |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN114824043A (en) |
| WO (1) | WO2023206919A1 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116864598A (en) * | 2023-07-20 | 2023-10-10 | 深圳市思坦科技有限公司 | Light-emitting chip, preparation method and display device |
| WO2023206919A1 (en) * | 2022-04-24 | 2023-11-02 | 亿信科技发展有限公司 | Led structure and preparation method therefor, and optical field display system |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107331741B (en) * | 2017-07-20 | 2019-03-15 | 厦门乾照光电股份有限公司 | A kind of Micro LED chip and preparation method thereof, Micro LED array substrate |
| CN111403430B (en) * | 2020-04-02 | 2023-05-26 | 亿信科技发展有限公司 | Micro light-emitting diode device, manufacturing method thereof and display panel |
| CN114824043A (en) * | 2022-04-24 | 2022-07-29 | 亿信科技发展有限公司 | LED structure, manufacturing method thereof and light field display system |
-
2022
- 2022-04-24 CN CN202210433738.1A patent/CN114824043A/en active Pending
- 2022-09-14 WO PCT/CN2022/118648 patent/WO2023206919A1/en unknown
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2023206919A1 (en) * | 2022-04-24 | 2023-11-02 | 亿信科技发展有限公司 | Led structure and preparation method therefor, and optical field display system |
| CN116864598A (en) * | 2023-07-20 | 2023-10-10 | 深圳市思坦科技有限公司 | Light-emitting chip, preparation method and display device |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2023206919A1 (en) | 2023-11-02 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US10862010B2 (en) | Integrated colour LED micro-display | |
| US11804511B2 (en) | Light emitting device with LED stack for display and display apparatus having the same | |
| CN111524926A (en) | Display device having LED unit pixel | |
| CN114824043A (en) | LED structure, manufacturing method thereof and light field display system | |
| KR20120038539A (en) | Pixelated led | |
| CN115483327B (en) | Micro LED Micro display chip and manufacturing method thereof | |
| CN116072800B (en) | Micro-LED display chip and preparation method thereof | |
| US11482566B2 (en) | Light emitting device for display and display apparatus having the same | |
| US20230037604A1 (en) | Light emitting device for display and display apparatus having the same | |
| KR102054951B1 (en) | Display apparatus and method for manufacturing sub micro light emitting diode display | |
| KR100661716B1 (en) | Substrate for growing light emitting device, device having three dimentional structure light emitting layer and method for fabricating the same | |
| JP2014075486A (en) | Light emitting element and stereoscopic image display apparatus | |
| US10553640B2 (en) | Electrodeless light-emitting diode display and method for fabricating the same | |
| KR20230092671A (en) | Micro LED display apparatus and method for manufacturing the same | |
| CN114759058A (en) | Micro-LED display chip, manufacturing method thereof and related equipment | |
| US20230197693A1 (en) | Micro led display apparatus and method of manufacturing the same | |
| CN116914061B (en) | Micro LED display assembly and preparation method thereof | |
| US20240047622A1 (en) | Resonant cavity micro-led array using embedded reflector | |
| CN114744094A (en) | Micro light-emitting diode chip and preparation method thereof | |
| CN117096246A (en) | Micro light emitting diode display screen and preparation method thereof | |
| KR20230053015A (en) | Display device | |
| CN118136763A (en) | Chip packaging structure, manufacturing method thereof and light-emitting device | |
| CN117374097A (en) | Micro display unit and display device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| REG | Reference to a national code |
Ref country code: HK Ref legal event code: DE Ref document number: 40069333 Country of ref document: HK |