CN114823970B - 一种增加光刻胶在超晶格红外焦平面芯片上附着性的方法 - Google Patents
一种增加光刻胶在超晶格红外焦平面芯片上附着性的方法 Download PDFInfo
- Publication number
- CN114823970B CN114823970B CN202210304039.7A CN202210304039A CN114823970B CN 114823970 B CN114823970 B CN 114823970B CN 202210304039 A CN202210304039 A CN 202210304039A CN 114823970 B CN114823970 B CN 114823970B
- Authority
- CN
- China
- Prior art keywords
- chip
- focal plane
- superlattice
- infrared focal
- photoresist
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000000034 method Methods 0.000 title claims abstract description 27
- 229920002120 photoresistant polymer Polymers 0.000 title claims abstract description 24
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 claims abstract description 62
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 32
- 239000001301 oxygen Substances 0.000 claims abstract description 32
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 32
- 229910052786 argon Inorganic materials 0.000 claims abstract description 31
- 238000009832 plasma treatment Methods 0.000 claims description 24
- 239000000758 substrate Substances 0.000 claims description 13
- 238000009616 inductively coupled plasma Methods 0.000 claims description 5
- 238000001816 cooling Methods 0.000 claims description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 2
- 229910052710 silicon Inorganic materials 0.000 claims description 2
- 239000010703 silicon Substances 0.000 claims description 2
- 238000010438 heat treatment Methods 0.000 claims 1
- 238000001259 photo etching Methods 0.000 abstract description 11
- 239000002957 persistent organic pollutant Substances 0.000 abstract description 8
- 238000006243 chemical reaction Methods 0.000 abstract description 3
- 238000002360 preparation method Methods 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 10
- 239000000463 material Substances 0.000 description 8
- 230000003746 surface roughness Effects 0.000 description 4
- 238000005530 etching Methods 0.000 description 3
- 238000001459 lithography Methods 0.000 description 2
- 238000012876 topography Methods 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000000356 contaminant Substances 0.000 description 1
- 238000012217 deletion Methods 0.000 description 1
- 230000037430 deletion Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 238000004381 surface treatment Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/3065—Plasma etching; Reactive-ion etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
- H01L31/0352—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions
- H01L31/035236—Superlattices; Multiple quantum well structures
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Manufacturing & Machinery (AREA)
- Plasma & Fusion (AREA)
- Drying Of Semiconductors (AREA)
Abstract
本发明公开了一种增加光刻胶在超晶格红外焦平面芯片上附着性的方法。本发明是在超晶格红外焦平面芯片上通过等离子体处理芯片表面,从而增加光刻胶在芯片表面的粘附性,尤其针对较小光刻图形制备时。在超晶格红外焦平面芯片光刻前,首先采用氧等离子体与芯片上残余的有机污染物发生化学反应,生成气态的CO、C02和H20,从而达到去除芯片表面残余有机污染物的目的,其次采用氩等离子体轻微轰击芯片表面,增加芯片表面粗糙度。氧等离子体和氩等离子体先后作用在超晶格红外焦平面芯片上,增加了后续光刻胶在超晶格红外焦平面芯片上附着性,提高了图形完整性,降低了超晶格红外焦平面探测器盲元率。
Description
技术领域
本发明涉及半导体技术领域,具体涉及一种增加光刻胶在超晶格红外焦平面芯片上附着性的方法。
背景技术
超晶格红外焦平面芯片上的微小结构是通过光刻工艺和刻蚀工艺共同作用形成。常规的光刻工艺首先是在超晶格红外焦平面芯片上旋转涂覆光刻胶,然后将涂覆有光刻胶的超晶格红外焦平面芯片在光刻版下对光刻胶进行选择性曝光,接着进行显影工艺,保留在超晶格红外焦平面芯片上的光刻胶就形成了光刻图形,保护其所覆盖的区域在后续的刻蚀工艺中不被刻蚀。
随着超晶格红外焦平面芯片上关键尺寸的缩小,光刻图形也变得越小,因此光刻胶与超晶格红外焦平面芯片接触面积越来越小,常常由于光刻胶在超晶格红外焦平面芯片附着不牢,在显影过程中,显影液容易钻蚀到光刻胶下方,导致在下一步刻蚀工艺过程中光刻胶脱落,从而在脱落位置的图形缺失,最终表现在超晶格红外焦平面器件上形成盲元,降低超晶格红外焦平面性能。
因此,需要一种增加光刻胶在超晶格红外焦平面芯片上附着性的方法,能够增加小尺寸光刻胶与超晶格红外焦平面芯片粘附性。
发明内容
本发明的主要目的在于提供一种增加光刻胶在超晶格红外焦平面芯片上附着性的方法,以解决超晶格红外焦平面芯片上由于光刻胶附着不牢导致芯片上小尺寸图形缺失的问题。
为实现前述发明目的,本发明采用的技术方案为:一种增加光刻胶在超晶格红外焦平面芯片上附着性的方法,用于光刻前芯片表面处理,采用氧等离子体处理超晶格焦平面芯片表面,与芯片上有机污染物发生化学反应,生成气态的CO、C02和H20,从而去除芯片表面有机污染物;采用氩等离子体处理超晶格焦平面芯片表面,以增加芯片表面粗糙度,达到增加光刻胶在超晶格红外焦平面芯片上附着性的目的。
具体的,该方法包括以下步骤:
步骤S1:将超晶格焦平面芯片放置于感应耦合等离子体设备的基板上;
步骤S2:对基板降温处理,温度范围为10℃-15℃,达到10℃-15℃后持续时间为10min-15min;
步骤S3:设定氧气流量,氧气流量范围为50sccm-80sccm;设定功率的范围为30W-50W;设定压强的范围为20mTorr-40mTorr,设定氧等离子体处理的持续时间范围为30S-60S;
步骤S4:设定氩气流量,氩气流量范围为5sccm-10sccm;设定功率范围为5W-10W;设定压强范围为2mTorr-5mTorr,设定氩等离子体处理的持续时间范围为5S-10S;
步骤S5:先后完成氧等离子体和氩等离子体处理后,对基板进行升温处理,温度范围为20℃-22℃,达到20℃-22℃后持续时间为5min-10min。
与现有技术相比,本发明具有以下优点:
本发明通过氧等离子体处理步骤和氩等离子体处理步骤对超晶格焦平面芯片表面进行处理,首先将芯片上表面有机污染物完全去除,其次增加芯片表面粗糙度。同时,对氧等离子体和氩等离子体处理时的功率、温度、流量、压强和时间参数进行严格控制,避免了氧等离子体和氩等离子对超晶格材料的损伤。
附图说明
图1是处理前超晶格红外焦平面芯片的结构示意图。
图2是经过氧等离子处理后的超晶格红外焦平面芯片结构示意图。
图3是经过氩等离子处理后的超晶格红外焦平面芯片结构示意图。
图4a是未经氧、氩等离子体处理超晶格红外焦平面芯片的显微镜图。
图4b是经过氧、氩等离子体处理超晶格红外焦平面芯片光刻工艺后的显微镜图。
图5a是未经氧、氩等离子体处理超晶格红外焦平面芯片的盲元图。
图5b是经过氧、氩等离子体处理超晶格红外焦平面器件的盲元图。
其中:1-锑化镓衬底;2-超晶格材料;3-芯片表面残余物;4-表面较粗糙的超晶格材料。
具体实施方式
为使本发明的目的、内容和优点更加清楚,下面以长波640×512超晶格焦平面芯片为实施例,并结合附图对本发明的具体实施方式做进一步详细说明。
1)如图1所示为长波640×512超晶格红外焦平面芯片处理前的表面示意图。超晶格红外焦平面芯片存在有机污染物(芯片表面残余物3),同时无污染物的区域材料表面较光滑,在制备小图形时光刻胶附着不牢,显影后光刻胶容易脱落,导致光刻图形缺失,在超晶格红外焦平面器件上形成盲元,降低超晶格红外焦平面性能。
1-锑化镓衬底;2-超晶格材料;3-芯片表面残余物;4-表面较粗糙的超晶格材料
2)为解决上述问题,本发明提出在涂覆光刻胶前增加氧等离子体和氩等离子体处理步骤的方法,利用氧等离子体与芯片表面有机污染物反应,生成气态的CO,C02和H20,去除有机污染物(芯片表面残余物3)。其次,再利用氩等离子体轻微轰击芯片表面,增加芯片表面粗糙度,氧等离子体和氩等离子体是通过感应耦合等离子体设备产生,其等离子体的能量可通过压强、功率等参数调节,可避免其对超晶格材料造成损伤。具体的步骤包括:
步骤S1:将长波640×512超晶格红外焦平面芯片放置于感应耦合等离子体设备的硅片基板上;
步骤S2:对基板进行降温处理,温度为12℃,达到12℃后持续时间13min;
步骤S3:设定氧气流量为60sccm;设定功率为40W,设定压强为30mTorr,设定等离子体处理的持续时间为40S
步骤S4:设定氩气流量为7sccm;设定功率为6W,设定压强为3mTorr,设定等离子体处理的持续时间为8S;
步骤S5:完成氧等离子体处理后,对基板进行升温处理,温度为22℃,达到22℃后持续时间为10min。
3)用上述步骤对超晶格红外焦平面芯片进行氧等离子体和氩等离子处理,可以获得最佳效果,使得有机污染物完全去除(如图2所示),同时增加芯片表面粗糙度(如图3所示),在此过程中可有效避免氧等离子体和氩等离子体对超晶格材料造成损伤。
图4所示的是未经氧、氩等离子处理和经氧、氩等离子体处理的长波640×512超晶格芯片台面光刻后的显微镜图,图4a所示未经氧、氩等离子处理的形貌图,存在有台面图形缺失,图4b所示光刻图形前经本发明方法处理的形貌图,无台面图形缺失。
图5所示的是未经氧、氩等离子处理和经氧、氩等离子体处理的长波640×512超晶格器件信号响应图,图5a所示未经氧、氩等离子处理的器件响应信号图,信号图上存在较多的盲元,降低器件性能;图5b所示光刻图形前经本发明方法处理的器件响应信号图,信号图上基本无由于图形缺失造成的盲元,器件性能较好。
应当理解,前面所描述的具体实施例仅用以解释本发明,并不限定本发明。
本发明还可用于其它规格的超晶格焦平面芯片、双色焦平面芯片光刻前的表面处理。
Claims (2)
1.一种增加光刻胶在超晶格红外焦平面芯片上附着性的方法,其特征在于,该方法包括以下步骤:
步骤S1:将超晶格焦平面芯片放置于感应耦合等离子体设备的基板上;
步骤S2:对基板降温至10-15℃处理,达到10-15℃后维持时间10-15min;
步骤S3:采用氧等离子体处理超晶格焦平面芯片表面;在采用氧等离子体处理超晶格芯片表面过程中,氧气流量为50-80sccm,氧等离子体处理的功率为30-50W,压强为20-40mTorr,持续时间为30-60S;
步骤S4:采用氩等离子体处理超晶格焦平面芯片表面;在采用氩等离子体处理超晶格芯片表面过程中,氩气流量为5-10sccm,氩等离子体处理的功率为5-10W,压强为2-5mTorr,持续时间为5-10S;
步骤S5:对基板进行升温至20-22℃处理,达到20-22℃后持续时间为5-10min。
2.如权利要求1所述的方法,其特征在于,所述感应耦合等离子体设备基板为硅片基板。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202210304039.7A CN114823970B (zh) | 2022-03-25 | 2022-03-25 | 一种增加光刻胶在超晶格红外焦平面芯片上附着性的方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202210304039.7A CN114823970B (zh) | 2022-03-25 | 2022-03-25 | 一种增加光刻胶在超晶格红外焦平面芯片上附着性的方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN114823970A CN114823970A (zh) | 2022-07-29 |
CN114823970B true CN114823970B (zh) | 2023-06-20 |
Family
ID=82531298
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202210304039.7A Active CN114823970B (zh) | 2022-03-25 | 2022-03-25 | 一种增加光刻胶在超晶格红外焦平面芯片上附着性的方法 |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN114823970B (zh) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6143666A (en) * | 1998-03-30 | 2000-11-07 | Vanguard International Seminconductor Company | Plasma surface treatment method for forming patterned TEOS based silicon oxide layer with reliable via and interconnection formed therethrough |
CN101273443A (zh) * | 2005-09-26 | 2008-09-24 | 应用材料公司 | 改善光刻胶粘附性和重新使用一致性的氢处理方法 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6365062B1 (en) * | 1999-05-07 | 2002-04-02 | United Microelectronics Corp. | Treatment on silicon oxynitride |
US6423650B2 (en) * | 1999-08-09 | 2002-07-23 | Advanced Micro Devices, Inc. | Ultra-thin resist coating quality by increasing surface roughness of the substrate |
JP3937711B2 (ja) * | 2000-09-26 | 2007-06-27 | 松下電工株式会社 | フリップチップ実装方法 |
JP3671879B2 (ja) * | 2001-07-17 | 2005-07-13 | 松下電器産業株式会社 | 電子部品製造方法および電子部品 |
US7390753B2 (en) * | 2005-11-14 | 2008-06-24 | Taiwan Semiconductor Mfg. Co., Ltd. | In-situ plasma treatment of advanced resists in fine pattern definition |
US20080268632A1 (en) * | 2007-04-30 | 2008-10-30 | Fupo Electronics Corporation. | LED epiwafer pad manufacturing process & new construction thereof |
CN101374386B (zh) * | 2007-08-24 | 2011-03-23 | 富葵精密组件(深圳)有限公司 | 印刷电路板的制作方法 |
JP5006415B2 (ja) * | 2010-01-12 | 2012-08-22 | キヤノンアネルバ株式会社 | 酸化膜除去のための基板洗浄処理方法 |
-
2022
- 2022-03-25 CN CN202210304039.7A patent/CN114823970B/zh active Active
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6143666A (en) * | 1998-03-30 | 2000-11-07 | Vanguard International Seminconductor Company | Plasma surface treatment method for forming patterned TEOS based silicon oxide layer with reliable via and interconnection formed therethrough |
CN101273443A (zh) * | 2005-09-26 | 2008-09-24 | 应用材料公司 | 改善光刻胶粘附性和重新使用一致性的氢处理方法 |
Also Published As
Publication number | Publication date |
---|---|
CN114823970A (zh) | 2022-07-29 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6037243A (en) | Method for manufacturing silicon nanometer structure using silicon nitride film | |
JP2008300704A (ja) | レジスト除去方法、半導体製造方法、及びレジスト除去装置 | |
CN101651099B (zh) | 去除光刻胶层的方法 | |
WO2000024046A1 (fr) | Procede d'attaque au plasma | |
JP2014090192A (ja) | 通常の低k誘電性材料および/または多孔質の低k誘電性材料の存在下でのレジスト剥離のための方法 | |
WO2010008967A2 (en) | Improvement of organic line width roughness with h2 plasma treatment | |
TWI525692B (zh) | Plasma etching method, control program and computer memory media | |
JP2003023000A5 (zh) | ||
US6955177B1 (en) | Methods for post polysilicon etch photoresist and polymer removal with minimal gate oxide loss | |
CN114823970B (zh) | 一种增加光刻胶在超晶格红外焦平面芯片上附着性的方法 | |
EP0010138A1 (en) | A method of treating aluminium microcircuits | |
TW201011805A (en) | Chamber plasma-cleaning process scheme | |
US20070202446A1 (en) | Semiconductor device fabrication method having step of removing photo-resist film or the like, and photo-resist film removal device | |
JPS63216346A (ja) | 有機物のエツチング方法 | |
TWI786101B (zh) | 蝕刻後處理以預防圖案崩塌 | |
JP5642427B2 (ja) | プラズマ処理方法 | |
JPS6236826A (ja) | アツシング方法 | |
US20060138085A1 (en) | Plasma etching method with reduced particles production | |
JP2000012521A (ja) | プラズマアッシング方法 | |
JP4464342B2 (ja) | レジスト除去方法 | |
JP4078935B2 (ja) | プラズマアッシング方法 | |
JP7202489B2 (ja) | プラズマ処理方法 | |
CN106298494B (zh) | 一种多晶硅刻蚀方法 | |
CN114141919B (zh) | 半导体衬底及其制备方法、半导体器件及其制备方法 | |
US6726800B2 (en) | Ashing apparatus, ashing methods, and methods for manufacturing semiconductor devices |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |