CN114823349A - Metal oxide thin film transistor based on active layer processed by plasma and preparation method thereof - Google Patents
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
- H01L21/42—Bombardment with radiation
- H01L21/423—Bombardment with radiation with high-energy radiation
- H01L21/425—Bombardment with radiation with high-energy radiation producing ion implantation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
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Abstract
The invention discloses a metal oxide thin film transistor based on a plasma processing active layer and a preparation method thereof, belonging to the technical field of transistors. The preparation method comprises the following steps: depositing and etching a semiconductor active layer on a substrate by using metal oxide; depositing a gate insulating layer on the active semiconductor layer; injecting a low-concentration plasma beam into the semiconductor active layer through the gate insulating layer; depositing and etching on the gate insulating layer to form a gate electrode; injecting low-concentration plasma beams into the semiconductor active layer through the gate insulating layer so as to manufacture a channel region, a source region and a drain region; depositing again to form a passivation insulating layer to protect the whole device; opening a lead hole to expose the gate electrode, the source region and the drain region; and depositing metal on each lead hole and etching to form a metal electrode. The method has simple process and low cost, can simultaneously realize depletion type and enhancement type transistors, and the prepared transistor has excellent electrical properties such as high mobility, high stability and the like.
Description
Technical Field
The invention belongs to the technical field of semiconductor transistors, and particularly relates to a metal oxide thin film transistor based on a plasma processing active layer and a preparation method thereof.
Background
In recent years, with the development of internet of things, biosensing, and flexible electronic blowout and the rapid change of flat panel display technologies, metal oxide transparent thin film transistors are rapidly becoming popular in the scientific and industrial fields due to their low cost, highly compatible processes, and diversified application scenarios. In the application of integrated circuits, the metal oxide transparent thin film transistor can be prepared on various substrates through low-temperature deposition, a large-area, highly transparent and highly flexible patch circuit can be realized, and the traditional silicon-based circuit is limited by a preparation process and a transfer process and is difficult to greatly expand in the aspects of biosensing and flexible electronics. In the flat panel display, since the mobility of the conventional amorphous silicon thin film transistor is lower than 1cm 2 And the transistors in the high-definition pixels are small in size, so that the turn-on current is small, the charge-discharge delay time is long, the response speed of a display screen is seriously influenced, and meanwhile, the amorphous silicon thin film transistor is high in working voltage, large in power consumption and serious in heat generation, and is very unfavorable for application of mobile equipment. The small-size high-resolution display screen used at present is mainly driven by a low-temperature polycrystalline silicon thin film transistor, although the mobility of the low-temperature polycrystalline silicon thin film transistor is very high (100 cm) 2 Vs), but it requires laser scanning annealing, the process manufacturing cost is high, and it is difficult to realize a large-sized screen. Metal oxide thin film transistors combine the advantages of both amorphous silicon and polysilicon: has higher mobility of 10-120cm 2 Vs, high aperture ratio and low power consumption; compatible with amorphous silicon thin film transistor process, simple process and low preparation temperature<300 ℃; the amorphous structure has good uniformity and is suitable for being used as a large-size high-resolution screen.
However, the metal oxide transparent thin film transistor lacks a corresponding P-type thin film transistor, and the circuit can be realized only by adopting the design method of the NMOS. At present, the most widely used method is to adopt a depletion type metal oxide transparent thin film transistor and an enhancement type metal oxide transparent thin film transistor to construct a circuit. How to realize the process compatibility of enhancement mode and depletion mode transistors, and modulating the threshold voltage of the transistors with the lowest cost and the fastest step becomes a great obstacle for the application of metal oxide transparent thin film transistors in biosensing and flexible electronics. On the other hand, the metal oxide semiconductor thin film has many intrinsic defects including oxygen vacancies, zinc gaps, and the like, and grain boundary defects, so that the electrical properties of the device, such as mobility, reliability, and the like, are reduced. In addition, since next generation televisions will employ the 3840 × 2160 display panel with ultra-high definition resolution, even the multi-view naked-eye 3D technology, there is an increasing demand for higher speed thin film transistors.
Disclosure of Invention
The invention provides a metal oxide thin film transistor based on a plasma processing active layer and a preparation method thereof, in order to obtain a piezoelectric material with higher piezoelectric constant and electromechanical coupling coefficient. The threshold voltage of the metal oxide thin film transistor is modulated by plasma treatment, so that the obtained metal oxide thin film transistor can realize wide-range threshold voltage modulation and excellent electrical properties such as high mobility, high stability and the like.
According to a first aspect of the present invention, there is provided a method of fabricating a metal oxide thin film transistor based on plasma treatment of an active layer, comprising the steps of:
the deposition method is one of a chemical vapor method, a physical vapor method, an electrochemical method or a sol-gel method.
Preferably, the semiconductor active layer is at least one of the following oxides: zinc oxide, indium oxide, copper oxide, tin oxide; or the semiconductor active layer is a composite oxide composed of two or more of the following elements: zinc, indium, tin, gallium, titanium, aluminum, silver, or copper.
Preferably, the structure of the metal oxide in the semiconductor active layer is an amorphous, polycrystalline or single crystal structure, and the thickness of the semiconductor active layer is between 10nm and 2000 nm.
Preferably, the plasma beam comprises one or more of hydrogen, deuterium, oxygen, nitrogen, nitrous oxide, and the like.
Preferably, the middle region and the two side regions in the semiconductor source layer are formed by deposition of the same metal oxide; or the middle area and the two side areas in the semiconductor source layer are formed by deposition of different metal oxides.
Preferably, the concentration of doping atoms in the source region and the drain region is greater than 1 × 10 by implanting plasma beam 20 cm -3 (ii) a The concentration of doping atoms in the channel region is less than 5 x 10 after the plasma beam is injected 19 cm -3 And is greater than 1X 10 12 cm -3 。
Preferably, the substrate is one of glass, polymer, insulated stainless steel, amorphous silicon, polycrystalline silicon, or monocrystalline silicon containing a prefabricated conventional integrated circuit; furthermore, an electric insulating layer is coated on the substrate.
Preferably, the conductive film is a metal in an amorphous or polycrystalline form, a transparent conductive oxide, or a combination thereof.
Preferably, the passivation insulating layer and the gate insulating layer are made of one of silicon dioxide, silicon oxynitride, silicon nitride or a high-dielectric-constant insulating material.
According to another aspect of the present invention, there is also provided a metal oxide thin film transistor prepared by the above method.
Compared with the prior art, the invention has the following advantages: the threshold voltage of the metal oxide transparent thin film transistor is modulated by plasma beam processing, so that the large-range threshold voltage modulation of the metal oxide thin film transistor is realized, the resistivity of a source region and a drain region is reduced, the carrier mobility of a channel region is improved, and the on-state current, the field effect mobility and the switching speed of the thin film transistor are improved; the process has simple steps and low cost, and can simultaneously realize depletion type and enhancement type transistors and realize a high-performance NMOS circuit.
Drawings
FIG. 1 is a schematic cross-sectional view of a metal oxide thin film transistor according to the present invention.
Fig. 2 is a schematic cross-sectional view of the active layer after the pattern has been transferred onto the substrate.
Fig. 3 is a schematic cross-sectional view illustrating a plasma beam implantation process after depositing a gate insulating layer on an active layer.
Fig. 4 is a schematic cross-sectional view of the plasma beam implanted source and drain regions after deposition and etching of a gate electrode on the gate insulator layer.
Fig. 5 is a schematic cross-sectional view of the device after opening a wire hole through the gate insulating layer and the passivation insulating layer.
In the figure, 1, a substrate; 2. a source region; 3. a drain region; 4. a channel region; 5. a gate insulating layer; 6. a gate electrode; 7. passivating the insulating layer; 8. metal electrode, 9, photoresist; 10. A semiconductor active layer.
Detailed Description
The technical solution of the present invention will be further described in detail with reference to specific embodiments. It is to be understood that the following examples are only illustrative and explanatory of the present invention and should not be construed as limiting the scope of the present invention. All the technologies realized based on the above-mentioned contents of the present invention are covered in the protection scope of the present invention.
Example 1:
referring to fig. 2-5, cross-sectional views of the process flow of the method for fabricating a metal oxide thin film transistor based on plasma treatment of the active layer are shown. The method comprises the following specific steps:
the metal oxide thin film transistor is formed by plasma processing an active layer as shown in fig. 1, and has a structure including a substrate 1, a source region 2, a drain region 3, a channel region 4, a gate insulating layer 5, a gate electrode 6, a passivation insulating layer 7, and a metal electrode 8.
As shown, the substrate 1 is located at the lowest layer, and its material includes but is not limited to the following: polymer, glass, stainless steel, amorphous silicon, polycrystalline silicon or monocrystalline silicon containing pre-fabricated conventional integrated circuits, the substrate 1 may comprise an electrically insulating cover layer.
The source region 2, the drain region 3 and the channel region 4 are the same active layer, the material of the active layer is a metal oxide semiconductor processed by plasma beam, wherein the doping atom concentration of the source region 2 and the drain region 3 after being implanted by the plasma beam is higher than that of the channel region 4. It should be noted that the source region 2, the drain region 3, and the channel region 4 may be deposited on the substrate 1 by using the same material, or the channel region 4 may be deposited on the substrate 1 by using a material different from that of the source region 2 and the drain region 3. However, whatever material is deposited, the material selection category is as follows: an oxide of zinc, indium, copper or tin, or an oxide of an alloy of at least two elements of zinc, tin, indium, gallium, aluminum, titanium, silver and copper.
The gate insulating layer 5 is covered on the active layer and the substrate 1, and is made of one of silicon dioxide, silicon oxynitride, silicon nitride or high dielectric constant insulating material.
A gate electrode 6, which may be any amorphous or polycrystalline form of metals and metal alloys, transparent conductive oxides such as indium tin oxide, doped zinc oxide, etc., is disposed on the gate insulator layer 5 directly above the channel region 4.
A passivation insulating layer 7, which is also composed of one of silicon dioxide, silicon oxynitride, silicon nitride or a high dielectric constant insulating material, covers the gate electrode 6 and the gate insulating layer 5.
Lead holes penetrating through the gate insulating layer 5 and the passivation insulating layer 7 are formed in the positions, above the source region 2 and the drain region 3, of the gate insulating layer 5 and the passivation insulating layer 7, lead holes penetrating through the passivation insulating layer 7 are formed in the positions, above the gate electrode 6, of the passivation insulating layer 7, and metal electrodes 8 are formed in the lead holes through metal deposition and etching.
Referring to fig. 2-5, cross-sectional views of the process flow of the method for fabricating a metal oxide thin film transistor based on plasma treatment of an active layer are shown, and a cross-sectional view of a finished product is shown in fig. 1. The method comprises the following specific steps:
and 8, depositing copper on each lead hole and etching to form a metal electrode 8, wherein the metal electrode 8 is positioned at each lead hole and is respectively connected with the gate electrode 6, the source region 2 and the drain region 3, and thus the metal oxide thin film transistor based on the plasma processing active layer is manufactured. The deposition method in the above steps adopts a chemical vapor phase method, and the etching adopts photoresist 9 for etching.
Example 2:
the process flow of the present example is shown in example 1, and the specific process steps are as follows:
and 8, depositing aluminum on each lead hole and etching to form a metal electrode 8, wherein the metal electrode 8 is positioned at each lead hole and is respectively connected with the gate electrode 6, the source region 2 and the drain region 3, and thus the metal oxide thin film transistor based on the plasma processing active layer is manufactured. The deposition method in the above steps adopts an electrochemical method, and the etching adopts photoresist 9 for etching.
Example 3:
the process flow of the present example is shown in example 1, and the specific process steps are as follows:
and 8, depositing copper on each lead hole and etching to form a metal electrode 8, wherein the metal electrode 8 is positioned at each lead hole and is respectively connected with the gate electrode 6, the source region 2 and the drain region 3, and thus the metal oxide thin film transistor based on the plasma processing active layer is manufactured. The deposition method in the above steps adopts a physical vapor phase method, and the etching adopts photoresist 9 for etching.
Example 4:
the process flow of the present example is shown in example 1, and the specific process steps are as follows:
and 8, depositing silver on each lead hole and etching to form a metal electrode 8, wherein the metal electrode 8 is positioned at each lead hole and is respectively connected with the gate electrode 6, the source region 2 and the drain region 3, and thus the metal oxide thin film transistor based on the plasma processing active layer is manufactured. The deposition method in the above steps adopts a physical vapor phase method, and the etching adopts photoresist 9 for etching.
In the embodiments, the metal oxide thin film transistor is plasma-treated with one or more gases such as hydrogen, deuterium, oxygen, nitrous oxide, etc., wherein the active layer is a metal oxide semiconductor containing doping atoms. The content and the function of doping atoms in the source drain region and the channel region 4 are different: the source-drain resistance is reduced by taking the high-concentration doped source-drain region as a donor; doping the channel region 4 at a low concentration to modulate the threshold voltage of the metal oxide thin film transistor and passivate the channel reduces defects to improve device performance. Table 1 shows the threshold variation of the metal oxide thin film transistor plasma-treated with hydrogen, deuterium, oxygen, nitrous oxide gases.
TABLE 1
As can be seen from Table 1, the threshold voltage of the metal oxide transparent thin film transistor is modulated by the plasma containing hydrogen, deuterium, oxygen and nitrous oxide gases, defects in the metal oxide semiconductor thin film are passivated, and a high-performance thin film transistor is prepared. For example, according to the previous experimental results, the mobility of the hydrogenated zinc oxide thin film transistor can reach up to 280cm 2 Vs, approaching the highest Hall mobility of 300cm of the zinc oxide single crystal material tested at present 2 Vs. The method has simple process steps and low cost, and can simultaneously realize depletion type and enhancement type transistors and realize a high-performance NMOS circuit.
The specific embodiments described herein are merely illustrative of the spirit of the invention. Various modifications or additions may be made to the described embodiments or alternatives may be employed by those skilled in the art without departing from the spirit or ambit of the invention as defined in the appended claims.
Claims (10)
1. A preparation method of a metal oxide thin film transistor based on plasma processing of an active layer comprises the following steps:
1) depositing a semiconductor film on a substrate (1) by using metal oxide, and etching the semiconductor film into a semiconductor active layer (10);
2) depositing a gate insulating layer (5) on the active semiconductor layer, and enabling the gate insulating layer (5) to cover the semiconductor active layer (10) and the substrate (1);
3) introducing a low-concentration plasma beam through the gate insulating layer (5) so as to be injected into the semiconductor active layer (10);
4) depositing and forming a conductive film on the gate insulating layer (5), and forming a gate electrode (6) after etching, wherein the gate electrode (6) is positioned above the middle part of the semiconductor active layer (10);
5) introducing high-concentration plasma beams to a semiconductor active layer (10) through a gate insulating layer (5), wherein the middle of the semiconductor active layer (10) is blocked by a gate electrode (6) and the high-concentration plasma beams cannot be injected to form a channel region (4), and a source region (2) and a drain region (3) are respectively formed on two sides of the channel region (4);
6) depositing again on the basis of the step 5 to form a passivation insulating layer (7) to protect the whole device;
7) lead holes are formed in the passivation insulating layer (7) and the gate insulating layer (5) to expose the gate electrode (6), the source region (2) and the drain region (3);
8) depositing metal on each lead hole and etching to form a metal electrode (8), wherein the metal electrode (8) is positioned at each lead hole and is respectively connected with the gate electrode (6), the source region (2) and the drain region (3),
the deposition method is one of a chemical vapor method, a physical vapor method, an electrochemical method or a sol-gel method.
2. The method of claim 1, wherein the semiconductor active layer (10) is at least one of the following oxides: zinc oxide, indium oxide, copper oxide, tin oxide; or the semiconductor active layer (10) is a composite oxide composed of two or more of the following elements: zinc, indium, tin, gallium, titanium, aluminum, silver, or copper.
3. The method according to claim 1 or 2, wherein the metal oxide structure in the semiconductor active layer (10) is amorphous, polycrystalline or single crystal, and the thickness of the semiconductor active layer (10) is between 10nm and 2000 nm.
4. The method of claim 1 or 2, wherein the plasma beam comprises one or more of hydrogen, deuterium, oxygen, nitrogen, nitrous oxide, and the like.
5. The method according to claim 1 or 2, wherein the semiconductor source layer is formed by depositing the same metal oxide in the middle region and the two side regions; or the middle area and the two side areas in the semiconductor source layer are formed by deposition of different metal oxides.
6. The method according to claim 1 or 2, wherein the source region (2) and the drain region (3) are doped with ions having a concentration of more than 1 x 10 atoms after the plasma implantation 20 cm -3 (ii) a The concentration of post-doped atoms in the channel region (4) is less than 5 x 10 by injecting plasma beams 19 cm -3 And is greater than 1X 10 12 cm -3 。
7. The method of claim 1 or 2, wherein the substrate (1) is one of glass, polymer, insulating stainless steel, amorphous silicon, polysilicon, or single crystal silicon comprising a prefabricated conventional integrated circuit.
8. The method of claim 1 or 2, wherein the conductive film is an amorphous or polycrystalline form of metal, a transparent conductive oxide, or a combination thereof.
9. The method of claim 1 or 2, wherein the passivation insulating layer (7) and the gate insulating layer (5) are made of one of silicon dioxide, silicon oxynitride, silicon nitride or high-k insulating material.
10. A metal oxide thin film transistor prepared by the method of any one of claims 1 to 9.
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