CN114784102B - 一种具有混合导电模式的ligbt - Google Patents

一种具有混合导电模式的ligbt Download PDF

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CN114784102B
CN114784102B CN202210479779.4A CN202210479779A CN114784102B CN 114784102 B CN114784102 B CN 114784102B CN 202210479779 A CN202210479779 A CN 202210479779A CN 114784102 B CN114784102 B CN 114784102B
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陈万军
夏云
程峥
孙瑞泽
刘超
郑崇芝
张波
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University of Electronic Science and Technology of China
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
    • H01L29/7394Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET on an insulating layer or substrate, e.g. thin film device or device isolated from the bulk substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
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    • H01L29/0642Isolation within the component, i.e. internal isolation
    • H01L29/0649Dielectric regions, e.g. SiO2 regions, air gaps
    • H01L29/0653Dielectric regions, e.g. SiO2 regions, air gaps adjoining the input or output region of a field-effect device, e.g. the source or drain region
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
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    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234Bipolar junction transistors [BJT]
    • H01L29/66325Bipolar junction transistors [BJT] controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
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Abstract

本发明属于功率半导体技术领域,具体涉及一种具有混合导电模式的LIGBT器件。本发明器件内存在第一绝缘介质隔离层和第二绝缘介质隔离层;第二绝缘介质隔离层从器件表面穿过N型缓冲层延伸到N型外延层内,并将阳极结构的P阳极区和N阳极区隔离;第一绝缘介质隔离层完全位于N型外延层内,其一侧与栅极结构的绝缘介质接触,另一侧与第二绝缘介质隔离层接触。本发明器件利用缘介质隔离层来分离阳极P+以及阳极N+结构,使这两个结构在器件导通时分别导通,分别为双极型导通模式和单极型导通模式,从而消除了由单极型导通模式向双极型导通模式切换导致的电压折回现象。

Description

一种具有混合导电模式的LIGBT
技术领域
本发明属于功率半导体技术领域,具体涉及一种具有混合导电模式的LIGBT器件。
背景技术
横向绝缘栅双极晶体管(LIGBT)是智能功率集成电路中一个非常重要的元器件。在大多数应用中,需要为其反向并联一个续流二极管来导通电路中的反向电流。为减小芯片面积以及降低反向并联带来的寄生电感,逆导型LIGBT被提出。其通过在阳极侧引入N+阳极结构,实现了在LIGBT内集成续流二极管,从而实现逆导能力。但是引入的N+阳极结构使器件在正向导通时需要从单极型导通向双极型导通切换,从而导致因导通电阻的骤降带来的电压折回现象,这不利于器件的应用。
发明内容
本发明的目的,就是针对这一问题,提出一种具有混合导电模式的LIGBT器件。
本发明的技术方案:一种具有混合导电模式的LIGBT,其元胞结构包括P型衬底1、在P型衬底1上的埋氧2、在埋氧2上的N型外延层3、位于N型外延层3上表面的P型外延层16以及位于N型外延层3上表面的沟槽栅极结构、阳极结构以及阴极结构。
所述沟槽栅极结构由绝缘介质7和位于绝缘介质7之中的导电材料6构成;所述导电材料6的引出端为器件的栅极G;所述沟槽栅结构从器件表面一直延伸入N型外延层3中。
所述阴极结构由第一P型阱区8、第一N+阴极10、第一P+阴极9以及第一阴极金属11、第二P型阱区15、第二N+阴极12、第二P+阴极14以及第二阴极金属13构成;所述第一P型阱区8与第二P型阱区15位于绝缘介质7的两侧,其中第一P型阱区8位于远离阳极的一侧,而第二P型阱区15位于靠近阳极的一侧;所述第一P型阱区8位于N型外延层3的上表面,其侧面与绝缘介质7的侧面接触;所述第一N+阴极10位于第一P型阱区8上表面,其侧面与绝缘介质7接触;所述第一P+阴极9位于第一P型阱区8上表面;所述第一阴极金属11位于第一N+阴极10以及第一P+阴极9的上表面;所述第二P型阱区15位于N型外延层3的上表面,其侧面与绝缘介质7的侧面接触;所述第二N+阴极12位于第一P型阱区15上表面,其侧面与绝缘介质7接触;所述第二P+阴极14位于第二P型阱区15上表面;所述第二阴极金属13位于第二N+阴极12以及第二P+阴极14的上表面;所述第一阴极金属11和第二阴极金属13的引出端为器件的阴极K。
所述阳极结构由N型缓冲层17、P+阳极18、N+阳极5以及阳极金属19构成;所述N型缓冲层17位于N型外延层3的上表面;所述P+阳极18和N+阳极5位于N型缓冲层17的上表面;所述阳极金属19位于P+阳极18和N+阳极5的上表面,其引出端为器件的阳极A。
其特征在于,器件内存在第一绝缘介质隔离层20和第二绝缘介质隔离层21;所述第二绝缘介质隔离层21从器件表面穿过N型缓冲层17延伸到N型外延层3内,P+阳极18位于第二绝缘介质隔离层21靠近阴极的一侧;N+阳极5位于第二绝缘介质隔离层21远离阴极的一侧;所述第一绝缘介质隔离层20完全位于N型外延层3内,其一侧与绝缘介质7的下端接触,另一侧与第二绝缘介质隔离层21的下端接触。
本发明的有益效果为,本发明器件利用缘介质隔离层来分离阳极P+以及阳极N+结构,使这两个结构在器件导通时分别导通,分别为双极型导通模式和单极型导通模式,从而消除了由单极型导通模式向双极型导通模式切换导致的电压折回现象。
附图说明
图1是本发明具有混合导电模式的LIGBT器件剖面结构图;
图2是本发明具有混合导电模式的LIGBT的等效电路图;
图3是常规LIGBT的器件剖面结构图;
图4是常规LIGBT的等效电路图;
图5是常规逆导型LIGBT的器件剖面结构图;
图6是常规逆导型LIGBT的等效电路图;
具体实施方式
下面结合附图对本发明进行详细的描述。
图1为本发明提出的一种具有混合导电模式的LIGBT器件结构,其等效电路图如图2所示,从图中可以看出,器件被第一绝缘介质隔离层20、第二绝缘介质隔离层21以及绝缘介质7分成了两部分,上半部分与图3所示的常规LIGBT类似,而下半部分为LDMOS结构。
本发明器件在正向导通时,栅极开启、阳极接正电位以及阴极接地,上半部分由于P+阳极/N+阳极这个PN结还未开启,因此上半部分未导通,只有下半部分开启,仅电子参与导电,此时器件工作在单极型导通模式下。随着阳极电压增加,上半部分的P+阳极/N+阳极这个PN结开启,上半部分开始进入双极型导电模式。因此,本发明结构在完全导通时,器件内部同时存在完全单极型导通模式的下半部分以及双极型导电模式的上半部分,具有混合导通模式。本发明器件不存在由单极型导通模式向双极型导通模式切换导致的电压折回现象。
本发明器件在反向导通时,栅极阴极接地,阳极接负电位,反向电流仅从下半部分导通。

Claims (1)

1.一种具有混合导电模式的LIGBT,其元胞结构包括P型衬底(1)、在P型衬底(1)上的埋氧(2)、在埋氧(2)上的N型外延层(3)、位于N型外延层(3)上表面的P型外延层(16)以及位于N型外延层(3)上表面的沟槽栅极结构、阳极结构以及阴极结构;
所述沟槽栅极结构由绝缘介质(7)和位于绝缘介质(7)之中的导电材料(6)构成;所述导电材料(6)的引出端为器件的栅极(G);所述沟槽栅结构从器件表面垂直延伸入N型外延层(3)中;
所述阴极结构由第一P型阱区(8)、第一N+阴极(10)、第一P+阴极(9)以及第一阴极金属(11)、第二P型阱区(15)、第二N+阴极(12)、第二P+阴极(14)以及第二阴极金属(13)构成;所述第一P型阱区(8)与第二P型阱区(15)位于绝缘介质(7)的两侧,其中第一P型阱区(8)位于远离阳极的一侧,而第二P型阱区(15)位于靠近阳极的一侧;所述第一P型阱区(8)位于N型外延层(3)的上表面,其侧面与绝缘介质(7)的侧面接触;所述第一N+阴极(10)和第一P+阴极(9)并列位于第一P型阱区(8)上表面,且第一N+阴极(10)的侧面与绝缘介质(7)接触;所述第一阴极金属(11)位于第一N+阴极(10)以及第一P+阴极(9)的上表面;所述第二P型阱区(15)位于N型外延层(3)的上表面,其侧面与绝缘介质(7)的侧面接触;所述第二N+阴极(12)和第二P+阴极(14)并列位于第二P型阱区(15)上表面,且第二N+阴极(12)的侧面与绝缘介质(7)接触;所述第二阴极金属(13)位于第二N+阴极(12)以及第二P+阴极(14)的上表面;所述第一阴极金属(11)和第二阴极金属(13)的引出端为器件的阴极(K);
所述阳极结构由N型缓冲层(17)、P+阳极(18)、N+阳极(5)以及阳极金属(19)构成;所述N型缓冲层(17)位于N型外延层(3)的上表面;所述P+阳极(18)和N+阳极(5)位于N型缓冲层(17)的上表面,且N+阳极(5)位于远离阴极结构的一侧;所述阳极金属(19)位于P+阳极(18)和N+阳极(5)的上表面,其引出端为器件的阳极(A);
其特征在于,在N型外延层(3)中具有第一绝缘介质隔离层(20)和第二绝缘介质隔离层(21);所述第二绝缘介质隔离层(21)沿器件表面垂直贯穿入N型外延层(3)中,且将P+阳极(18)和N+阳极(5)隔离开;所述第一绝缘介质隔离层(20)位于N型外延层(3)内,其一侧与绝缘介质(7)接触,另一侧与第二绝缘介质隔离层(21)接触。
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