CN114759882B - Dual-frequency coupling low-noise amplification circuit and amplifier - Google Patents
Dual-frequency coupling low-noise amplification circuit and amplifier Download PDFInfo
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- CN114759882B CN114759882B CN202210486517.0A CN202210486517A CN114759882B CN 114759882 B CN114759882 B CN 114759882B CN 202210486517 A CN202210486517 A CN 202210486517A CN 114759882 B CN114759882 B CN 114759882B
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/26—Modifications of amplifiers to reduce influence of noise generated by amplifying elements
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/56—Modifications of input or output impedances, not otherwise provided for
- H03F1/565—Modifications of input or output impedances, not otherwise provided for using inductive elements
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/189—High frequency amplifiers, e.g. radio frequency amplifiers
- H03F3/19—High frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
- H03F3/193—High frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only with field-effect devices
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/294—Indexing scheme relating to amplifiers the amplifier being a low noise amplifier [LNA]
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/451—Indexing scheme relating to amplifiers the amplifier being a radio frequency amplifier
Abstract
The application discloses dual-frequency coupling low noise amplifier circuit and amplifier includes: the input frequency division circuit, the high-frequency amplifying circuit, the low-frequency amplifying circuit and the output coupling circuit; the input frequency division circuit comprises a first duplexer, a first capacitor and a second capacitor, and the output coupling circuit comprises a second duplexer, a third capacitor and a fourth capacitor; the input frequency division circuit divides a received radio frequency signal into a high frequency signal and a low frequency signal, the high frequency signal is input to the high frequency amplification circuit for power amplification, the low frequency signal is input to the low frequency amplification circuit for power amplification, and the high frequency signal and the low frequency signal after power amplification are coupled and output through the output coupling circuit. The multi-frequency processing method and the multi-frequency processing device can achieve multi-frequency processing of signals on the premise that the adjusting feedback switch is not used, and reduce circuit loss.
Description
Technical Field
The invention relates to the technical field of wireless communication, in particular to a dual-frequency coupling low-noise amplification circuit and an amplifier.
Background
With the continuous advance of the construction of the fifth generation mobile communication network, the millimeter wave band has the advantages of wider spectrum resources, faster transmission speed and the like, so that the millimeter wave can be applied to more communication fields. The performance of the low noise amplifier, which is used as a front-end module of the signal receiver, directly affects the sensitivity, linearity, etc. of the entire receiver, and further affects the performance of the entire communication system. Nowadays, a wireless communication device is often faced with specific requirements or different communication standards, resulting in more and more amplifier circuits being required in communication terminal devices, and the requirements are difficult to be met by traditional single-frequency amplifier circuits. Therefore, a dual-frequency amplifier structure which can reduce the chip area and the loss and can be compatible in more complex working environments becomes a research hotspot of the communication technology industry.
As shown in fig. 1, fig. 1 is a schematic diagram of applying a FET adjusting feedback switch to a conventional dual-band amplifier, and the FET adjusting feedback switch is switched to adjust input switch matching and output switch matching to implement a dual-band amplification function, but the circuit for adjusting the feedback switch generates a large amount of extra power consumption, which causes a large noise of the whole circuit. And each regulation feedback switch requires an additional power supply, which increases circuit cost and complexity. If the regulation feedback switch is not used, the amplifying circuit cannot realize power amplification under the condition of multiple frequency bands, and the practicability is reduced.
Disclosure of Invention
In view of the above problems, the present application has been made to provide a dual-frequency-coupled low-noise amplification circuit and an amplifier, which can realize multi-frequency processing of signals without using a regulation feedback switch, while reducing circuit loss.
The specific scheme is as follows:
a dual frequency coupled low noise amplification circuit, comprising: the input frequency division circuit, the high-frequency amplifying circuit, the low-frequency amplifying circuit and the output coupling circuit;
the input frequency division circuit comprises a first duplexer, a first capacitor and a second capacitor, the first capacitor is connected in parallel to a through port of the first duplexer, the second capacitor is connected in parallel to an isolation port of the first duplexer, the input end of the high-frequency amplification circuit is connected with a coupling port of the first duplexer, and the input end of the low-frequency amplification circuit is connected with the through port of the first duplexer;
the output coupling circuit comprises a second duplexer, a third capacitor and a fourth capacitor, the third capacitor is connected to an isolation port of the second duplexer in parallel, the fourth capacitor is connected to a through port of the second duplexer in parallel, an output end of the high-frequency amplifying circuit is connected with a coupling port of the second duplexer, and an output end of the low-frequency amplifying circuit is connected with an input port of the second duplexer;
the input frequency division circuit separates a received radio frequency signal into a high frequency signal and a low frequency signal, inputs the high frequency signal to the high frequency amplification circuit for power amplification, inputs the low frequency signal to the low frequency amplification circuit for power amplification, and couples and outputs the high frequency signal and the low frequency signal after power amplification through the output coupling circuit.
Preferably, the high-frequency amplification circuit comprises a first amplification sub-circuit, a second amplification sub-circuit and a third amplification sub-circuit, and the first amplification sub-circuit, the second amplification sub-circuit and the third amplification sub-circuit are electrically connected in sequence.
Preferably, the first amplification sub-circuit comprises a first field effect transistor, a fifth capacitor, a sixth capacitor, a first inductor, a second inductor and a third inductor;
one end of the fifth capacitor is electrically connected with the coupling port of the first duplexer, and the other end of the fifth capacitor is connected with the grid electrode of the first field effect transistor;
one electrical end of the first inductor is connected with the fifth capacitor and the middle node of the first field effect transistor, and the other electrical end of the first inductor is connected with a bias voltage;
one end of the second inductor is connected with the source level of the first field effect transistor, and the other end of the second inductor is grounded;
the third inductor and the sixth capacitor are connected in parallel and then electrically connected to the drain electrode of the first field effect transistor, and the third inductor is further connected to a working voltage.
Preferably, the second amplification sub-circuit comprises a second field effect transistor, a seventh capacitor, a fourth inductor, a fifth inductor and a sixth inductor;
one end of the fourth inductor is electrically connected with the grid electrode of the second field effect transistor, and the other end of the fourth inductor is connected with bias voltage;
one end of the fifth inductor is connected with the source electrode of the second field effect transistor, and the other end of the fifth inductor is grounded;
the sixth inductor and the seventh capacitor are electrically connected in parallel to the drain of the second field effect transistor, and the sixth inductor is further connected with a working voltage.
Preferably, the third amplification sub-circuit comprises a third field effect transistor, an eighth capacitor, a ninth capacitor, a tenth capacitor, a seventh inductor, an eighth inductor, a ninth inductor and a first resistor;
one end of the seventh inductor is connected with the grid electrode of the third field effect transistor, and the other end of the seventh inductor is connected with bias voltage;
one end of the first resistor is electrically connected with one end of the eighth capacitor, the other end of the first resistor is connected with one end of the eighth inductor, the other end of the eighth inductor is connected with a working voltage, and the other end of the eighth capacitor is electrically connected with a middle node between the seventh inductor box and the third field effect transistor;
one end of the ninth inductor is connected with the source electrode of the third field effect transistor, and the other end of the ninth inductor is grounded;
the eighth inductor and the ninth capacitor are connected in parallel and then connected with the drain of the third field effect transistor, the ninth capacitor is further electrically connected with the coupling port of the second duplexer, and the tenth capacitor is electrically connected to an intermediate node between the ninth capacitor and the second duplexer.
Preferably, the low-frequency amplifying circuit includes a fourth amplifying sub-circuit and a fifth amplifying sub-circuit, and the fourth amplifying sub-circuit and the fifth amplifying sub-circuit are electrically connected.
Preferably, the fourth amplification sub-circuit comprises a fourth field effect transistor, an eleventh capacitor, a twelfth capacitor, a tenth inductor, an eleventh inductor, a twelfth inductor and a thirteenth inductor;
one end of the eleventh capacitor is connected with a through port of the first duplexer, the other end of the eleventh capacitor is connected with a middle node between the eleventh capacitor and the first duplexer, and the eleventh capacitor is further electrically connected to a gate of the fourth field-effect transistor;
one end of the tenth inductor is electrically connected to a middle node between the first duplexer and the eleventh capacitor, and the other end of the tenth inductor is further grounded,
one end of the eleventh inductor is connected with a middle node between the eleventh capacitor and the fourth field effect transistor, and the other end of the eleventh inductor is connected with a bias voltage;
one end of the twelfth inductor is connected with the source electrode of the fourth field effect transistor, and the other end of the twelfth inductor is grounded;
the twelfth capacitor is electrically connected to the drain electrode of the fourth field effect transistor;
one end of the thirteenth inductor is electrically connected to a middle node between the twelfth capacitor and the fourth field effect transistor, and the other end of the thirteenth inductor is further connected to a working voltage.
Preferably, the fifth amplifying sub-circuit comprises a fifth field effect transistor, a thirteenth capacitor, a fourteenth inductor, a fifteenth inductor, a sixteenth inductor and a second resistor;
one end of the fourteenth inductor is connected with the grid electrode of the fifth field effect transistor, and the other end of the fourteenth inductor is connected with bias voltage;
one end of the fifteenth inductor is connected with the source electrode of the fifth field effect transistor, and the other end of the fifteenth inductor is grounded;
the second resistor and the thirteenth capacitor form a parallel end, one end of the parallel end is electrically connected to the drain of the fifth field effect transistor, and the other end of the parallel end is electrically connected to the output port of the second duplexer after being connected in series with the fourteenth capacitor;
one end of the sixteenth inductor is electrically connected to the intermediate node between the parallel end and the fifth field effect transistor, and the other end of the sixteenth inductor is connected to a working voltage.
Preferably, one end of each of the first capacitor, the second capacitor, the third capacitor and the fourth capacitor is grounded.
A dual frequency coupled low noise amplifier, the amplifier comprising a circuit as described above.
By means of the technical scheme, the dual-frequency coupling low-noise amplification circuit and the amplifier comprise an input frequency division circuit, a high-frequency amplification circuit, a low-frequency amplification circuit and an output coupling circuit, wherein the input frequency division circuit can be used for separating a received radio-frequency signal into a high-frequency signal and a low-frequency signal, inputting the high-frequency signal into the high-frequency amplification circuit for power amplification, inputting the low-frequency signal into the low-frequency amplification circuit for power amplification, and coupling the high-frequency signal and the low-frequency signal after power amplification through the output coupling circuit and then outputting the coupled high-frequency signal and the low-frequency signal. Compared with the use of the adjusting feedback switch, the high loss caused by the frequency band selection switch can be avoided, so that the generation of overlarge noise can be avoided, the multi-frequency low-loss low-noise processing of signals can be realized on the premise that the adjusting feedback switch is not used, and the practicability is improved.
Drawings
Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the application. Also, like reference numerals are used to refer to like parts throughout the drawings. In the drawings:
FIG. 1 is a schematic diagram of a prior art dual frequency amplifier;
FIG. 2 is a schematic diagram of a dual-band coupled low noise amplifier circuit according to an embodiment of the present disclosure;
fig. 3 is a schematic structural diagram of a dual-band coupled low-noise amplifier circuit according to an embodiment of the present disclosure;
fig. 4-5 are graphs showing electromagnetic simulation results of a dual-band coupled low-noise amplifier circuit according to an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The existing dual-band amplifier is generally controlled by adopting an FET regulation feedback switch, and the dual-band amplification function is realized by switching the FET regulation feedback switch, regulating input switch matching and output switch matching. If the regulation feedback switch is not used, the amplifying circuit cannot realize power amplification under the condition of multiple frequency bands, and the practicability is reduced.
Therefore, in order to solve the above problems, the present application provides a dual-frequency coupling low noise amplifier circuit, which can implement multi-frequency processing of signals without using a regulation feedback switch, and generate less noise.
Referring to fig. 2, fig. 2 is a schematic diagram of a dual-band coupled low-noise amplifier circuit provided in an embodiment of the present invention, which includes an input frequency divider circuit, a high-frequency amplifier circuit, a low-frequency amplifier circuit, and an output coupling circuit.
The input end of the input frequency dividing circuit is used for receiving an input radio frequency signal RFin, and the output end of the output coupling circuit is used for outputting a processed output radio frequency signal RFout.
The input frequency division circuit comprises a first duplexer DUPLEX1, a first capacitor C1 and a second capacitor C2, the first capacitor C1 is connected in parallel to a through port of the first duplexer DUPLEX1, the second capacitor C2 is connected in parallel to an isolation port of the first duplexer DUPLEX1, the input end of the high-frequency amplification circuit is connected with a coupling port of the first duplexer DUPLEX1, and the input end of the low-frequency amplification circuit is connected with the through port of the first duplexer DUPLEX 1.
The output coupling circuit comprises a second duplexer DUPLEX2, a third capacitor C3 and a fourth capacitor C4, the third capacitor C3 is connected in parallel to an isolation port of the second duplexer DUPLEX2, the fourth capacitor C4 is connected in parallel to a through port of the second duplexer DUPLEX2, an output end of the high-frequency amplification circuit is connected with a coupling port of the second duplexer DUPLEX2, and an output end of the low-frequency amplification circuit is connected with an input port of the second duplexer DUPLEX 2.
The input frequency division circuit separates a received radio frequency signal into a high frequency signal and a low frequency signal, inputs the high frequency signal to the high frequency amplification circuit for power amplification, inputs the low frequency signal to the low frequency amplification circuit for power amplification, and couples and outputs the high frequency signal and the low frequency signal after power amplification through the output coupling circuit.
It should be noted that, for general radio frequency signals, the low frequency indicates a signal frequency of 30 to 300kHz, and the high frequency indicates a signal frequency of 3 to 30 MHz. However, the concepts of "high frequency" and "low frequency" in the embodiments of the present application are only used for distinguishing radio frequency signals of different frequencies, and the division rule of the frequencies is not specifically specified. Similarly, in some other embodiments, the invention can also be applied to multi-frequency rf signal amplification, not limited to high frequency and low frequency.
According to the technical scheme, the dual-frequency coupling low-noise amplification circuit and the amplifier comprise the input frequency division circuit, the high-frequency amplification circuit, the low-frequency amplification circuit and the output coupling circuit, wherein the input frequency division circuit can separate a received radio-frequency signal into a high-frequency signal and a low-frequency signal, then inputs the high-frequency signal into the high-frequency amplification circuit for power amplification, inputs the low-frequency signal into the low-frequency amplification circuit for power amplification, and couples and outputs the high-frequency signal and the low-frequency signal after power amplification through the output coupling circuit. Compared with the regulation feedback switch, the input frequency division circuit and the output coupling circuit can avoid high loss caused by the frequency band selection switch, so that overlarge noise can be avoided, the multi-frequency low-loss low-noise processing of signals can be realized on the premise that the regulation feedback switch is not used, and the practicability is improved. Meanwhile, an extra power supply does not need to be additionally arranged in the circuit without using a regulation feedback switch, so that the cost and the complexity of the circuit can be reduced.
Specifically, the first duplexer DUPLEX1 and the second duplexer DUPLEX2 described above are respectively coupled by a transmission line, which may be a microstrip line.
The first capacitor C1 and the second capacitor C2 are parallel ground capacitors of the first duplexer DUPLEX1, and are used for compensating a phase difference between a high-frequency signal and a low-frequency signal and improving coupling power.
The third capacitor C3 and the fourth capacitor C4 are parallel-connected ground capacitors of the second duplexer DUPLEX2, and are used for compensating a phase difference between a high-frequency signal and a low-frequency signal and improving coupling power.
Next, the high-frequency amplifying circuit will be described in detail. As shown in fig. 3, the high-frequency amplifying circuit includes a first amplifying sub-circuit, a second amplifying sub-circuit and a third amplifying sub-circuit, and the first amplifying sub-circuit, the second amplifying sub-circuit and the third amplifying sub-circuit are electrically connected in sequence.
Specifically, the first amplification sub-circuit, the second amplification sub-circuit and the third amplification sub-circuit are respectively a high-frequency first-stage amplification circuit, a high-frequency second-stage amplification circuit and a high-frequency third-stage amplification circuit of the high-frequency amplification circuit. Because of the skin effect of the circuit under radio frequency conditions, unlike direct current, current flows in the entire conductor under direct current conditions, while current flows on the surface of the conductor under high frequency conditions. As a result, the ac resistance at high frequencies is greater than the dc resistance. In addition, there is an electromagnetic radiation effect in the high frequency circuit, that is, as the frequency increases, the circuit becomes a radiator when the wavelength is comparable to the circuit size. In this case, various coupling effects are generated between circuits, between circuits and an external environment, thereby causing many interference problems, and thus three-stage amplification is required to overcome these problems. In some other embodiments, the high-frequency amplifying circuit may also include a high-frequency one-stage amplifying circuit or a high-frequency multi-stage amplifying circuit.
The first amplification sub-circuit comprises a first field effect transistor M1, a fifth capacitor C5, a sixth capacitor C6, a first inductor L1, a second inductor L2 and a third inductor L3.
One end of the fifth capacitor C5 is electrically connected to the coupling port of the first duplexer DUPLEX1, and the other end is connected to the gate of the first fet M1.
One electrical end of the first inductor L1 is connected to the fifth capacitor C5 and the middle node of the first field effect transistor M1, and the other end is connected to the bias voltage Vbias.
One end of the second inductor L2 is connected with the source of the first field effect transistor M1, and the other end of the second inductor L is grounded.
Specifically, the first amplification sub-circuit adopts a common source structure, and the second inductor L2 is a source degeneration inductor of the first field effect transistor M1, which can improve the linearity of operation.
The third inductor L3 and the sixth capacitor C6 are electrically connected in parallel to the drain of the first field effect transistor M1, and the third inductor L3 is further connected to a working voltage Vdd.
The second amplification sub-circuit comprises a second field effect transistor M2, a seventh capacitor C7, a fourth inductor L4, a fifth inductor L5 and a sixth inductor L6.
One electrical end of the fourth inductor L4 is connected to the gate of the second field-effect transistor M2, and the other end is connected to the bias voltage Vbias.
One end of the fifth inductor L5 is connected to the source of the second fet M2, and the other end is grounded.
Specifically, the second amplification sub-circuit adopts a common source structure, and the fifth inductor L5 is a source degeneration inductor of the second field effect transistor M2, which can improve the linearity of operation.
The sixth inductor L6 and the seventh capacitor C7 are electrically connected in parallel to the drain of the second field effect transistor M2, and the sixth inductor L6 is further connected to a working voltage Vdd.
The third amplification sub-circuit comprises a third field effect transistor M3, an eighth capacitor C8, a ninth capacitor C9, a tenth capacitor C10, a seventh inductor L7, an eighth inductor L8, a ninth inductor L9 and a first resistor R1.
One end of the seventh inductor L7 is connected to the gate of the third field-effect transistor M3, and the other end is connected to the bias voltage Vbias.
One end of the first resistor R1 is electrically connected to one end of the eighth capacitor C8, the other end of the first resistor R1 is connected to one end of the eighth inductor L8, the other end of the eighth inductor L8 is connected to a working voltage Vdd, and the other end of the eighth capacitor C8 is electrically connected to a middle node between the seventh inductor L7 and the third field effect transistor M3.
Specifically, the first resistor R1 and the eighth capacitor C8 form an RC negative feedback structure, and the gain is flattened and the stability is improved through a feedback loop.
One end of the ninth inductor L9 is connected to the source of the third field effect transistor M3, and the other end is grounded.
Specifically, the ninth inductor L9 is a source degeneration inductor of the third field effect transistor M3, which can improve the linearity of operation.
The eighth inductor L8 and the ninth capacitor C9 are connected in parallel and then connected to the drain of the third fet M3, the ninth capacitor C9 is further electrically connected to the coupling port of the second duplexer DUPLEX2, and the tenth capacitor C10 is electrically connected to an intermediate node between the ninth capacitor C9 and the second duplexer DUPLEX 2.
Specifically, the connection mode among the first amplification sub-circuit, the second amplification sub-circuit and the third amplification sub-circuit is as follows: one end of the sixth capacitor C6 is electrically connected to the gate of the second field-effect transistor M2; one end of the seventh capacitor C7 is electrically connected to the gate of the third fet M3.
It can be understood that there are many ways to amplify the power of the radio frequency signal, and accordingly, there may be many ways to amplify the high frequency signal, and this embodiment of the present application is only one of the implementations that can achieve the technical effect, and in some other embodiments, the form of the high frequency signal amplifying circuit may also be other implementations, and this should not be considered as a limitation to the specific form of the circuit.
The low frequency amplifying circuit will be described in detail below. As shown in fig. 3, the low frequency amplifying circuit includes a fourth amplifying sub-circuit and a fifth amplifying sub-circuit, and the fourth amplifying sub-circuit is electrically connected to the fifth amplifying sub-circuit.
Specifically, the fourth amplification sub-circuit and the fifth amplification sub-circuit are respectively a low-frequency first-stage amplification circuit and a low-frequency second-stage amplification circuit of the low-frequency amplification circuit. In some other embodiments, the low frequency amplification circuit may be a low frequency one-stage amplification circuit or a low frequency multi-stage amplification circuit.
The fourth amplification sub-circuit comprises a fourth field effect transistor M4, an eleventh capacitor C11, a twelfth capacitor C12, a tenth inductor L10, an eleventh inductor L11, a twelfth inductor L12 and a thirteenth inductor L13.
One end of the eleventh capacitor C11 is connected to the through port of the first duplexer DUPLEX1, the other end of the eleventh capacitor C11 is connected to the middle node between the eleventh capacitor C11 and the first duplexer DUPLEX1, and the eleventh capacitor C11 is further electrically connected to the gate of the fourth field effect transistor M4.
One end of the tenth inductor L10 is electrically connected to a middle node between the first duplexer DUPLEX1 and the eleventh capacitor C11, and the other end of the tenth inductor L10 is further grounded.
One end of the eleventh inductor L11 is connected to a middle node between the eleventh capacitor C11 and the fourth field effect transistor M4, and the other end is connected to the bias voltage Vbias.
One end of the twelfth inductor L12 is connected to the source of the fourth field effect transistor M4, and the other end is grounded.
Specifically, the low-frequency first-stage amplifying circuit adopts a common source structure, and the twelfth inductor L12 is a source degeneration inductor of the fourth field-effect transistor M4, so that the working linearity can be improved.
The twelfth capacitor C12 is electrically connected to the drain of the fourth field effect transistor M4.
One end of the thirteenth inductor L13 is electrically connected to the middle node between the twelfth capacitor C12 and the fourth field effect transistor M4, and the other end of the thirteenth inductor L13 is further connected to a working voltage Vdd.
The fifth amplification sub-circuit comprises a fifth field effect transistor M5, a thirteenth capacitor C13, a fourteenth capacitor C14, a fourteenth inductor L14, a fifteenth inductor L15, a sixteenth inductor L16 and a second resistor R2.
One end of the fourteenth inductor L14 is connected to the gate of the fifth field effect transistor M5, and the other end is connected to the bias voltage Vbias.
One end of the fifteenth inductor L15 is connected to the source of the fifth field effect transistor M5, and the other end is grounded.
Specifically, the fifteenth inductor L15 is a source degeneration inductor of the fifth field effect transistor M5, which can improve the linearity of operation.
The second resistor R2 and the thirteenth capacitor C13 form a parallel end, one end of the parallel end is electrically connected to the drain of the fifth fet M5, and the other end of the parallel end is electrically connected to the output port of the second duplexer DUPLEX2 after being connected in series with the fourteenth capacitor C14.
Specifically, the second resistor R2 and the thirteenth capacitor C13 form an LC parallel network, which can enhance the circuit stability.
One end of the sixteenth inductor L16 is electrically connected to the middle node between the parallel end and the fifth field-effect transistor M5, and the other end is connected to a working voltage Vdd.
Specifically, the connection relationship between the fourth amplification sub-circuit and the fifth amplification sub-circuit is as follows: one end of the twelfth capacitor C12 is electrically connected to the gate of the fifth fet M5.
It should be understood that there are various power amplification manners for the radio frequency signal, and accordingly, there may be various forms of the low frequency signal amplification circuit, and this application embodiment is only one of the implementations that can achieve the technical effect, and in some other embodiments, the form of the low frequency signal amplification circuit may also be other implementations, and this should not be construed as limiting the specific form of the circuit.
Fig. 4-5 show the electromagnetic simulation results of a dual-band coupled lna circuit according to the embodiment of the present invention, and it can be seen that, as shown in fig. 4, compared with a single-band lna circuit, the dual-band coupled lna circuit according to the embodiment of the present invention can achieve similar effects in terms of performance. As shown in FIG. 5, the noise figure is lower than 1.75dB in the frequency band of 4.5-7 GHz; in the frequency band of 24-30GHz, the noise coefficient is lower than 2.85dB.
The embodiment of the application further provides a dual-frequency coupling low-noise amplifier, which comprises the dual-frequency coupling low-noise amplifying circuit.
It can be understood that the dual-frequency coupling low noise amplifier provided by the embodiment of the present application has the following advantages:
1. the amplifier of the embodiment of the application adopts a transmission line coupling mode, so that input signals can be separated and then coupled, the amplifying circuits of two different frequency bands only need to be matched under corresponding single frequency bands, and the circuit architecture of the amplifier can be suitable for other different working frequency bands by optimizing the coupling line matching and improving the amplifier structure;
2. the switching of the two working frequency bands of the amplifier of the embodiment of the application does not need a switch, and the dual-band operation of the LNA (low noise amplifier) can be controlled by closing the drain voltage of the unused single-band transistor, namely the circuit can work in a single frequency or simultaneously work in a dual frequency;
3. the amplifier of the embodiment of the application improves the noise performance of the amplifier by optimizing the structure of the multi-frequency amplifier, so that the performance of the dual-frequency LNA can be compared with that of a single-frequency LNA under a corresponding frequency band.
Finally, it should also be noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrases "comprising a," "8230," "8230," or "comprising" does not exclude the presence of additional like elements in a process, method, article, or apparatus that comprises the element.
In the present specification, the embodiments are described in a progressive manner, each embodiment focuses on differences from other embodiments, the embodiments may be combined as needed, and the same and similar parts may be referred to each other.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (10)
1. A dual-frequency coupled low noise amplification circuit, comprising: the input frequency division circuit, the high-frequency amplifying circuit, the low-frequency amplifying circuit and the output coupling circuit;
the input frequency division circuit comprises a first duplexer, a first capacitor and a second capacitor, the first capacitor is connected in parallel to a through port of the first duplexer, the second capacitor is connected in parallel to an isolation port of the first duplexer, the input end of the high-frequency amplification circuit is connected with a coupling port of the first duplexer, the input end of the low-frequency amplification circuit is connected with the through port of the first duplexer, and the first capacitor and the second capacitor are grounded in parallel;
the output coupling circuit comprises a second duplexer, a third capacitor and a fourth capacitor, the third capacitor is connected in parallel to an isolation port of the second duplexer, the fourth capacitor is connected in parallel to a through port of the second duplexer, an output end of the high-frequency amplifying circuit is connected with a coupling port of the second duplexer, an output end of the low-frequency amplifying circuit is connected with an input port of the second duplexer, and the third capacitor and the fourth capacitor are connected in parallel and grounded;
the input frequency division circuit separates a received radio frequency signal into a high frequency signal and a low frequency signal, inputs the high frequency signal to the high frequency amplification circuit for power amplification, inputs the low frequency signal to the low frequency amplification circuit for power amplification, and couples and outputs the high frequency signal and the low frequency signal after power amplification through the output coupling circuit.
2. The circuit of claim 1, wherein the high-frequency amplification circuit comprises a first amplification sub-circuit, a second amplification sub-circuit, and a third amplification sub-circuit, and the first amplification sub-circuit, the second amplification sub-circuit, and the third amplification sub-circuit are electrically connected in sequence.
3. The circuit of claim 2, wherein the first amplification sub-circuit comprises a first field effect transistor, a fifth capacitor, a sixth capacitor, a first inductor, a second inductor, and a third inductor;
one end of the fifth capacitor is electrically connected with the coupling port of the first duplexer, and the other end of the fifth capacitor is connected with the grid electrode of the first field effect transistor;
one end of the first inductor is electrically connected with the fifth capacitor and the middle node of the first field effect transistor, and the other end of the first inductor is connected with a bias voltage;
one end of the second inductor is connected with the source level of the first field effect transistor, and the other end of the second inductor is grounded;
the third inductor and the sixth capacitor are connected in parallel and then electrically connected to the drain of the first field effect transistor, and the third inductor is further connected to a working voltage.
4. The circuit of claim 2, wherein the second amplification sub-circuit comprises a second field effect transistor, a seventh capacitor, a fourth inductor, a fifth inductor, and a sixth inductor;
one electrical end of the fourth inductor is connected with the grid electrode of the second field effect transistor, and the other electrical end of the fourth inductor is connected with bias voltage;
one end of the fifth inductor is connected with the source electrode of the second field effect transistor, and the other end of the fifth inductor is grounded;
the sixth inductor and the seventh capacitor are connected in parallel and then electrically connected to the drain of the second field effect transistor, and the sixth inductor is further connected to a working voltage.
5. The circuit of claim 2, wherein the third amplification sub-circuit comprises a third fet, an eighth capacitor, a ninth capacitor, a tenth capacitor, a seventh inductor, an eighth inductor, a ninth inductor, and a first resistor;
one end of the seventh inductor is connected with the grid electrode of the third field effect transistor, and the other end of the seventh inductor is connected with bias voltage;
one end of the first resistor is electrically connected with one end of the eighth capacitor, the other end of the first resistor is connected with one end of the eighth inductor, the other end of the eighth inductor is connected with a working voltage, and the other end of the eighth capacitor is electrically connected with a middle node between the seventh inductor box and the third field effect transistor;
one end of the ninth inductor is connected with the source electrode of the third field effect transistor, and the other end of the ninth inductor is grounded;
the eighth inductor and the ninth capacitor are connected in parallel and then connected with the drain of the third field effect transistor, the ninth capacitor is further electrically connected with the coupling port of the second duplexer, and the tenth capacitor is electrically connected to an intermediate node between the ninth capacitor and the second duplexer.
6. The circuit of claim 1, wherein the low frequency amplification circuit comprises a fourth amplification sub-circuit and a fifth amplification sub-circuit, and the fourth amplification sub-circuit and the fifth amplification sub-circuit are electrically connected.
7. The circuit of claim 6, wherein the fourth amplification sub-circuit comprises a fourth field effect transistor, an eleventh capacitor, a twelfth capacitor, a tenth inductor, an eleventh inductor, a twelfth inductor, and a thirteenth inductor;
one end of the eleventh capacitor is connected with a through port of the first duplexer, the other end of the eleventh capacitor is connected with a middle node between the eleventh capacitor and the first duplexer, and the eleventh capacitor is further electrically connected to a gate of the fourth field-effect transistor;
one end of the tenth inductor is electrically connected to a middle node between the first duplexer and the eleventh capacitor, and the other end of the tenth inductor is further grounded,
one end of the eleventh inductor is connected with a middle node between the eleventh capacitor and the fourth field effect transistor, and the other end of the eleventh inductor is connected with a bias voltage;
one end of the twelfth inductor is connected with the source electrode of the fourth field effect transistor, and the other end of the twelfth inductor is grounded;
the twelfth capacitor is electrically connected to the drain electrode of the fourth field effect transistor;
one end of the thirteenth inductor is electrically connected to a middle node between the twelfth capacitor and the fourth field effect transistor, and the other end of the thirteenth inductor is further connected to a working voltage.
8. The circuit of claim 6, wherein the fifth amplification sub-circuit comprises a fifth field effect transistor, a thirteenth capacitor, a fourteenth inductor, a fifteenth inductor, a sixteenth inductor, and a second resistor;
one end of the fourteenth inductor is connected with the grid electrode of the fifth field effect transistor, and the other end of the fourteenth inductor is connected with bias voltage;
one end of the fifteenth inductor is connected with the source electrode of the fifth field effect transistor, and the other end of the fifteenth inductor is grounded;
the second resistor and the thirteenth capacitor form a parallel end, one end of the parallel end is electrically connected to the drain of the fifth field-effect transistor, and the other end of the parallel end is electrically connected to the output port of the second duplexer after being connected in series with the fourteenth capacitor;
one end of the sixteenth inductor is electrically connected to the intermediate node between the parallel end and the fifth field effect transistor, and the other end of the sixteenth inductor is connected to a working voltage.
9. The circuit of claim 1, wherein one end of each of the first capacitor, the second capacitor, the third capacitor, and the fourth capacitor is grounded.
10. A dual frequency coupled low noise amplifier, characterized in that the amplifier comprises a circuit according to any of claims 1 to 9.
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| CN202210486517.0A CN114759882B (en) | 2022-05-06 | 2022-05-06 | Dual-frequency coupling low-noise amplification circuit and amplifier |
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| CN202210486517.0A CN114759882B (en) | 2022-05-06 | 2022-05-06 | Dual-frequency coupling low-noise amplification circuit and amplifier |
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| CN106559100A (en) * | 2015-09-28 | 2017-04-05 | 中国科学院上海微系统与信息技术研究所 | A kind of communication RF front-end module and communication means |
| CN207200889U (en) * | 2017-07-12 | 2018-04-06 | 杭州华泰光纤技术有限公司 | Satellite TV signal fibre optic receiver |
| CN114024512B (en) * | 2021-10-11 | 2023-07-21 | 电子科技大学 | Ultra-wideband low noise amplifier of frequency division duplex |
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