CN114551221A - 一种在半导体衬底上制备氮化硅薄膜的方法 - Google Patents
一种在半导体衬底上制备氮化硅薄膜的方法 Download PDFInfo
- Publication number
- CN114551221A CN114551221A CN202111619653.4A CN202111619653A CN114551221A CN 114551221 A CN114551221 A CN 114551221A CN 202111619653 A CN202111619653 A CN 202111619653A CN 114551221 A CN114551221 A CN 114551221A
- Authority
- CN
- China
- Prior art keywords
- silicon nitride
- nitride film
- semiconductor substrate
- nitrogen
- content ratio
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Plasma & Fusion (AREA)
- Chemical Vapour Deposition (AREA)
- Formation Of Insulating Films (AREA)
Abstract
本发明公开了一种在半导体衬底上制备氮化硅薄膜的方法,该方法采用分步制备的方式,其步骤包括:一、准备干净的半导体衬底材料;二、在所述半导体衬底上制备一层满足预设Si/N含量比的富氮型氮化硅;三、在所述富氮型氮化硅上制备一层满足预设Si/N含量比的富硅型氮化硅;四、对所述氮化硅进行低温退火。本发明能够获得低应力、高硬度、耐腐蚀的氮化硅薄膜。
Description
技术领域
本发明属于半导体器件材料技术领域,涉及一种采用等离子体在半导体衬底上制备氮化硅薄膜的方法。
背景技术
氮化硅薄膜具有优异的物理、化学稳定性,较高的致密性、介电常数,并且具有可靠的耐热耐腐蚀性能和优异的机械性能,在微电子工艺中被常用于器件的钝化、隔离、保护层。
目前的氮化硅薄膜制备方法有PVD(磁控溅射)、高温CVD、LPCVD、PECVD、以及ICP-CVD等。不同的制备方法和沉积条件制备的氮化硅薄膜的组成成分含量、应力类型及大小、致密性等性能存在差异。在半导体器件和集成电路的研制中,氮化硅常用于器件之间以及布线之间电气隔离,因此需要低应力、耐腐蚀。
ICP-CVD技术是利用高频电流产生诱导电场使电子加速,维持等离子体,它可以在低温(低于150℃)、低压的条件下形成大面积、高电子密度的均匀的等离子体,制备的氮化硅均匀性好、致密性高、耐腐蚀性强,但容易因应力较大引起薄膜起泡或开裂。因此,亟需设计一种氮化硅薄膜制备方法,能够突破现有技术以降低薄膜应力,同时不影响薄膜耐腐蚀的性能。
发明内容
(一)发明目的
本发明的目的是:提供一种在半导体衬底上制备氮化硅薄膜的方法,鉴于减小薄膜应力和提高薄膜耐腐蚀性而提出,针对现有技术的不足,从氮化硅材料的组成出发,解决ICPCVD制备的氮化硅薄膜无法同时实现低应力、高耐腐蚀性能的技术问题。
(二)技术方案
为了解决上述技术问题,本发明提供一种在半导体衬底上制备氮化硅薄膜的方法,其中包括:
步骤S1、准备干净半导体衬底材料;
步骤S2、在所述衬底上制备一层满足预设Si/N含量比的富氮型氮化硅;
步骤S3、在所述富氮型氮化硅上再次制备预设Si/N含量比的富硅型氮化硅;
步骤S4、对所述氮化硅进行低温退火。
进一步地,所述步骤S2中满足预设Si/N含量比的富氮型氮化硅为SiNx,其中x≥1.33;
进一步地,所述步骤S2使用ICPCVD制备所述满足预设Si/N含量比的富氮性氮化硅;
进一步地,所述步骤S3中富硅型氮化硅为SiNx,其中x≤1.33;
进一步地,所述骤三使用ICPCVD制备所述满足预设Si/N含量比的富硅型氮化硅;
进一步地,所述步骤S4的低温退火温度不高于450℃;
进一步地,所述步骤S4中使用20分钟以上炉管退火或2分钟以上快速退火方式进行低温退火。
(三)有益效果
上述技术方案所提供的在半导体衬底上制备氮化硅薄膜的方法,通过沉积满足不同Si/N含量比的氮化硅,采用分步沉积以及低温退火的方式,能够获得低应力、高耐腐蚀性的氮化硅薄膜。
附图说明
图1为本发明实施例提供的氮化硅薄膜制备方法流程图。
具体实施方式
为使本发明的目的、内容和优点更加清楚,下面结合附图和实施例,对本发明的具体实施方式作进一步详细描述。
如图1所示,本实施例在半导体衬底上制备氮化硅薄膜的方法包括四个步骤,其中:
步骤S1:提供干净的半导体衬底材料。
步骤S2:采用ICPCVD法在上述衬底材料上沉积满足预设Si/N含量比的富氮型氮化硅,典型的,满足预设Si/N含量比的富氮型氮化硅为SiNx,其中x≥1.33。特别的,满足预设Si/N含量比的富氮型氮化硅薄膜厚度范围为10nm-2000nm。
具体的,满足预设Si/N含量比的富氮型氮化硅是通过调节反应气体比例实现的,沉积氮化硅的反应气体包括含氮类气体和含硅类气体。其中,含氮类气体包括但不限于例如氨气、氮气等;含硅类气体包括但不限于例如硅烷、二氯硅烷等。
步骤S3:采用ICPCVD法在上述富氮型氮化硅上沉积满足预设Si/N含量比的富硅型氮化硅,形成复合型氮化硅薄膜,典型的,满足预设Si/N含量比的富硅型氮化硅为SiNx,其中x≤1.33。特别的,满足预设Si/N含量比的富氮型氮化硅薄膜厚度范围为10nm-2000nm。
具体的,满足预设Si/N含量比的富硅型氮化硅是通过调节反应气体比例实现的,沉积氮化硅的反应气体包括含氮类气体和含硅类气体。其中,含氮类气体包括但不限于例如氨气、氮气等;含硅类气体包括但不限于例如硅烷、二氯硅烷等。
进一步的,为了减小富氮型氮化硅薄膜和富硅型氮化硅薄膜间的界面差异,并减小所述复合氮化硅薄膜的应力,增强材料硬度,提高耐腐蚀性;
步骤S4:对所述复合氮化硅薄膜进行低温退火。
具体的,低温退火的退火温度不高于450℃。低温退火方式包括但不限于管式炉退火、快速退火炉退火等,其中管式炉退火的时间不少于20分钟,快速退火炉的退火时间不少于2分钟。
典型的进行分步沉积后的氮化硅应力范围可维持在-200MPa-200MPa之间。
本发明实施例提供的氮化硅薄膜的制备方法,通过分步分别沉积满足预设Si/N含量比的富氮型氮化硅和富硅型氮化硅,使得氮化硅应力抵消减小;再通过低温退火,使氮化硅材料保持在低应力的情况下,提高耐腐蚀性能。
以上所述仅是本发明的优选实施方式,应当指出,对于本技术领域的普通技术人员来说,在不脱离本发明技术原理的前提下,还可以做出若干改进和变形,这些改进和变形也应视为本发明的保护范围。
Claims (10)
1.一种在半导体衬底上制备氮化硅薄膜的方法,其特征在于,包括四个步骤:
步骤S1、准备干净半导体衬底材料;
步骤S2、在所述衬底上制备一层满足预设Si/N含量比的富氮型氮化硅;
步骤S3、在所述富氮型氮化硅上再次制备一层满足预设Si/N含量比的富硅型氮化硅;
步骤S4、对复合氮化硅薄膜进行低温退火。
2.如权利要求1所述的在半导体衬底上制备氮化硅薄膜的方法,其特征在于,步骤S2中,采用ICPCVD法在衬底材料上沉积满足预设Si/N含量比的富氮型氮化硅。
3.如权利要求2所述的在半导体衬底上制备氮化硅薄膜的方法,其特征在于,步骤S2中,满足预设Si/N含量比的富氮型氮化硅为SiNx,其中x≥1.33。
4.如权利要求3所述的在半导体衬底上制备氮化硅薄膜的方法,其特征在于,步骤S2中,满足预设Si/N含量比的富氮型氮化硅厚度范围为10nm-2000nm。
5.如权利要求4所述的在半导体衬底上制备氮化硅薄膜的方法,其特征在于,步骤S2中,满足预设Si/N含量比的富氮型氮化硅通过调节反应气体比例实现,沉积氮化硅的反应气体包括含氮类气体和含硅类气体。
6.如权利要求5所述的在半导体衬底上制备氮化硅薄膜的方法,其特征在于,步骤S3中,采用ICPCVD法在富氮型氮化硅上沉积满足预设Si/N含量比的富硅型氮化硅,形成复合型氮化硅薄膜。
7.如权利要求6所述的在半导体衬底上制备氮化硅薄膜的方法,其特征在于,步骤S3中,满足预设Si/N含量比的富硅型氮化硅为SiNx,其中x≤1.33。
8.如权利要求7所述的在半导体衬底上制备氮化硅薄膜的方法,其特征在于,步骤S3中,满足预设Si/N含量比的富氮型氮化硅薄膜厚度范围为10nm-2000nm。
9.如权利要求8所述的在半导体衬底上制备氮化硅薄膜的方法,其特征在于,步骤S3中,满足预设Si/N含量比的富硅型氮化硅通过调节反应气体比例实现,沉积氮化硅的反应气体包括含氮类气体和含硅类气体。
10.如权利要求9所述的在半导体衬底上制备氮化硅薄膜的方法,其特征在于,步骤S4中,低温退火的退火温度不高于450℃,低温退火方式为管式炉退火或快速退火炉退火,其中管式炉退火的时间不少于20分钟,快速退火炉的退火时间不少于2分钟。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202111619653.4A CN114551221A (zh) | 2021-12-27 | 2021-12-27 | 一种在半导体衬底上制备氮化硅薄膜的方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202111619653.4A CN114551221A (zh) | 2021-12-27 | 2021-12-27 | 一种在半导体衬底上制备氮化硅薄膜的方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
CN114551221A true CN114551221A (zh) | 2022-05-27 |
Family
ID=81669438
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202111619653.4A Pending CN114551221A (zh) | 2021-12-27 | 2021-12-27 | 一种在半导体衬底上制备氮化硅薄膜的方法 |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN114551221A (zh) |
-
2021
- 2021-12-27 CN CN202111619653.4A patent/CN114551221A/zh active Pending
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6967405B1 (en) | Film for copper diffusion barrier | |
US8575033B2 (en) | Carbosilane precursors for low temperature film deposition | |
US8415259B2 (en) | Method of depositing dielectric film by modified PEALD method | |
US6150258A (en) | Plasma deposited fluorinated amorphous carbon films | |
US20120301706A1 (en) | METHOD OF PE-ALD OF SiNxCy AND INTEGRATION OF LINER MATERIALS ON POROUS LOW K SUBSTRATES | |
US20110086516A1 (en) | METHOD OF DEPOSITING DIELECTRIC FILM HAVING Si-N BONDS BY MODIFIED PEALD METHOD | |
EP0936282A2 (en) | Low-k fluorinated amorphous carbon dielectric and method of making the same | |
US6252295B1 (en) | Adhesion of silicon carbide films | |
JPH0697661B2 (ja) | 高品質二酸化シリコン層の付着方法 | |
CN113832432B (zh) | 一种二维化合物半导体薄膜的制备方法 | |
CN102301454A (zh) | 成膜方法和等离子体成膜装置 | |
WO1994019509A1 (en) | Film forming method and film forming apparatus | |
Zhou et al. | Low-hydrogen-content silicon nitride deposited at room temperature by inductively coupled plasma deposition | |
KR20030057938A (ko) | 반도체 소자의 실리콘 질화막 제조방법 | |
US20060079100A1 (en) | High density plasma grown silicon nitride | |
JPH06283453A (ja) | 半導体装置製造方法 | |
KR20030017388A (ko) | 반도체 장치의 제조 방법 | |
JPS62156822A (ja) | 絶縁薄膜とその形成方法及び形成装置 | |
CN114551221A (zh) | 一种在半导体衬底上制备氮化硅薄膜的方法 | |
CN107749394B (zh) | 一种氮化硅薄膜制备方法 | |
CN100590810C (zh) | 介质层的形成方法及双镶嵌结构的制造方法 | |
CN112760615A (zh) | 一种二氧化硅薄膜及其低温制备方法 | |
CN114864662B (zh) | 基于TiN/TaN模板的肖特基结构及其制备方法和应用 | |
US20230142684A1 (en) | Single Precursor Low-K Film Deposition and UV Cure for Advanced Technology Node | |
JP3399624B2 (ja) | 水素含有無定形炭素の製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination |