CN114422063A - Timestamp pulse synchronization method - Google Patents
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- H—ELECTRICITY
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- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/04—Speed or phase control by synchronisation signals
- H04L7/041—Speed or phase control by synchronisation signals using special codes as synchronising signal
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- H04L7/0008—Synchronisation information channels, e.g. clock distribution lines
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- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
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- H04L7/0079—Receiver details
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- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
- H04J3/0658—Clock or time synchronisation among packet nodes
- H04J3/0661—Clock or time synchronisation among packet nodes using timestamps
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- H—ELECTRICITY
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- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/04—Speed or phase control by synchronisation signals
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Abstract
The application discloses a timestamp pulse synchronization method, and belongs to the technical field of programmable logic devices. Sampling a first timestamp pulse signal input to a message sending end to a source clock, wherein the first timestamp pulse signal is used for indicating the position of a message header in the message data transmission process of the message sending end; sampling a second timestamp pulse signal input to a message receiving end to a source clock, wherein the second timestamp pulse signal is used for indicating the position of a reference point in the message data transmission process of the message receiving end; generating a gray code in a source clock, wherein the source clock is a clock for generating the first time stamp pulse signal and the second time stamp pulse signal; and synchronizing the first time stamp pulse signal, the second time stamp pulse signal and the Gray code to a user clock. The problems of poor duty ratio and low precision caused by the existing timestamp synchronization technology are solved, and high precision is obtained in timestamp pulse signal synchronization in a programmable logic device.
Description
Technical Field
The invention relates to the technical field of programmable logic devices, in particular to a timestamp pulse synchronization method.
Background
IEEE 1588 is called as a precision clock synchronization protocol of a networked measurement and control system, and is often applied to time synchronization in ethernet and can also be applied to timestamp synchronization of programmable logic devices.
However, inside the programmable logic device, the frequency of the user clock ptp _ clk is 1GHz, the highest precision is 500ps (picosecond), and the precision of the timestamp synchronization is too low by using the current conventional clock synchronization method based on IEEE 1588 protocol, because the timestamp synchronization method uses a high-speed clock to perform double-edge sampling on the timestamp pulse signal during sampling, which may cause low precision during clock synchronization and also cause a duty cycle (duty cycle) difference due to the limitation of the user clock ptp _ clk inside the programmable logic device.
Disclosure of Invention
In view of the above problems, the present invention provides a timestamp pulse synchronization method to solve the above technical problems.
The technical scheme of the invention is as follows:
there is provided a time stamp pulse synchronization method including:
sampling a first timestamp pulse signal input to a message sending end to a source clock, wherein the first timestamp pulse signal is used for indicating the position of a message header in the message data transmission process of the message sending end;
sampling a second timestamp pulse signal input to the message receiving end to a source clock, wherein the second timestamp pulse signal is used for indicating the position of a reference point in the message data transmission process of the message receiving end;
generating a gray code in a source clock, wherein the source clock is a clock for generating a first time stamp pulse signal and a second time stamp pulse signal;
and synchronizing the first time stamp pulse signal, the second time stamp pulse signal and the Gray code to a user clock.
Further, the step of sampling the first timestamp pulse signal input to the message sending end to the source clock includes:
inputting a first timestamp pulse signal generated by a source clock to a user data input interface of a message sending end, wherein the first timestamp pulse signal is attached to message data of the message sending end;
a Serdes sending port of the message sending end indicates a first time stamp pulse signal, and is a serializer and deserializer sending port;
outputting a first time stamp pulse signal indicated by a Serdes sending port through a user data output interface of a message sending end;
and respectively sampling a first timestamp pulse signal output by a user data output interface of a message sending end through a rising edge and a falling edge of a source clock.
Further, the step of inputting the first timestamp pulse signal generated by the source clock to the user data input interface of the message sending end further includes:
the method comprises the steps of generating a first bit position signal at a user data input interface of a message sending end, wherein the first bit position signal is used for indicating the bit position of a message header in the message data transmission process of the message sending end, and the first bit position signal is attached to the message data of the message sending end.
Further, the step of sampling the second timestamp pulse signal input to the message receiving end to the source clock comprises:
detecting a reference point of message data of a message receiving end by a reference point searching module of the message receiving end, wherein the reference point is 1bit data after a special code word of the message data of the message receiving end specified by an IEEE 1588 protocol;
inputting a second timestamp pulse signal generated by a source clock to a reference point searching module of a message receiving end, wherein the second timestamp pulse signal is attached to message data of the message receiving end;
and respectively sampling the message data of the message sending end at a second timestamp pulse signal of the data output module through the rising edge and the falling edge of the source clock.
Further, the step of inputting the second timestamp pulse signal generated by the source clock to the reference point searching module of the message receiving end further includes:
generating a second bit position signal at a reference point searching module of the message receiving end, wherein the second bit position signal is used for indicating the bit position of the reference point in the message data transmission process of the message receiving end, and the second bit position signal is attached to the message data of the message receiving end;
and inputting a second timestamp pulse signal and a second bit position signal to a real-time clock module of the message receiving end, wherein the real-time clock module is used for determining the time of a reference point when the message data of the message receiving end searches for the reference point module.
Further, the step of sampling the message data at the message sending end by the rising edge and the falling edge of the source clock before the step of outputting the second timestamp pulse signal of the data output module comprises:
in the multi-channel message data transmission, a channel alignment module at a message receiving end selects a second timestamp pulse signal and a second bit position signal of a channel, synchronizes the second timestamp pulse signals and the second bit position signals of all the channels into the selected second timestamp pulse signal and the selected second bit position signal of the channel, and attaches to the message data at the message receiving end of the corresponding channel.
Further, the step of synchronizing the first time stamp pulse signal, the second time stamp pulse signal and the gray code to the user clock further comprises:
gray codes corresponding to the first time stamp pulse signals and gray codes corresponding to the second time stamp pulse signals are respectively generated in the source clock;
selecting a first time stamp pulse signal and a second time stamp pulse signal sampled at a rising edge or a falling edge according to the trend of the synchronous gray codes, wherein the trend of the synchronous gray codes comprises the difference change of two closest gray codes when the rising edges of a source clock and a user clock are aligned;
when the rising edges of the source clock and the user clock are not aligned, the difference value of the two closest Gray codes is unchanged.
Further, the step of selecting the first time stamp pulse signal and the second time stamp pulse signal sampled at the rising edge or the falling edge according to the trend of the synchronized gray code includes:
when the rising edges of the source clock and the user clock are aligned, selecting a first pulse signal and a second pulse signal sampled by the rising edges;
after the rising edges of the source clock and the user clock are aligned for half of the time interval twice, the first pulse signal and the second pulse signal sampled by the falling edges are selected.
Further, the step of synchronizing the first time stamp pulse signal, the second time stamp pulse signal and the gray code to the user clock comprises:
determining a time difference A between a second timestamp pulse signal transmitted to an Emac XGMII interface along with message data by a message receiving end and a second timestamp pulse signal which is synchronized to a user clock and selected by Gray code trend judgment, wherein the Emac XGMII interface is a 10Gb media-independent interface of an Ethernet media access module;
determining the message head time of the message data of the message receiving end on the Emac XGMII interface and the time difference B of a second timestamp pulse signal of the message receiving end transmitted to the Emac XGMII interface along with the message data;
and obtaining the time stamp of the message header of the message data of the message receiving end as the sum of the time difference A and the time difference B.
The invention has the beneficial effects that:
the invention provides a timestamp pulse synchronization method, which comprises the steps of synchronizing a first pulse signal of a message sending end, a second pulse signal of a message receiving end and a Gray code generated in a source clock, which are respectively sampled by a rising edge and a falling edge of the source clock, to a user clock, and then selecting a first pulse signal of the message sending end and a second pulse signal of the message receiving end which are sampled at the rising edge or the falling edge according to the trend change of the user clock gray code, and finally obtaining a message header timestamp of the message data of the message receiving end in an Emac XGMII interface according to the first pulse signal of the message sending end and the second pulse signal of the message receiving end which are sampled at the rising edge or the falling edge.
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In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained based on these drawings without creative efforts.
FIG. 1 is a diagram illustrating a method for sampling a clock signal and a synchronization clock signal according to an embodiment of the present invention;
fig. 2 is a flow chart of a transmission path of message data at a message sending end according to an embodiment of the present application;
fig. 3 is a transmission path diagram of message data at a message receiving end according to an embodiment of the present application;
Detailed Description
The technical solution in the embodiment of the present invention is described in detail below with reference to the accompanying drawings. It should be understood that the described embodiments are only a few embodiments of the invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The embodiment of the present application provides a timestamp pulse synchronization method, and as shown in fig. 1, the specific implementation process is as follows:
the method comprises the steps that a rising edge and a falling edge of a source clock src _ clk are respectively sampled and input to a first timestamp pulse signal txpma _ sfd _ flag of a message sending end, wherein the first timestamp pulse signal txpma _ sfd _ flag is used for indicating the position of a message header in the message data transmission process of the message sending end, namely indicating the specific beat number of the message header in the message sending end;
a rising edge and a falling edge of a source clock src _ clk are respectively sampled and input to a second timestamp pulse signal rx _ base _ ts _ flag of a message receiving end, the second timestamp pulse signal rx _ base _ ts _ flag is used for indicating a reference point position in a message data transmission process of the message receiving end, namely indicating a specific beat number of the reference point in the message data of the message receiving end, the reference point of the message data of the message receiving end is 1bit message data after a special code word in the message data, and in an IEEE 1588 protocol, the special code word of the message data of the message receiving end is clearly specified, so that description is not repeated;
meanwhile, a 4-bit gray code corresponding to a first timestamp pulse signal txpma _ sfd _ flag and a 4-bit gray code corresponding to a second timestamp pulse signal rx _ base _ ts _ flag are respectively generated in a source clock src _ clk, and specifically, the first timestamp pulse signal txpma _ sfd _ flag and the second timestamp pulse signal rx _ base _ ts _ flag are both generated by the source clock src _ clk and input to a message sending end and a message receiving end;
the first time stamp pulse signal txpma _ sfd _ flag, the second time stamp pulse signal rx _ base _ ts _ flag, and the 4-bit gray code generated by the source clock src _ clk, which are sampled by the rising edge and the falling edge of the source clock src _ clk, are synchronized to the user clock ptp _ clk 2.
In this embodiment, as to the processing of the first timestamp pulse signal txpma _ sfd _ flag at the message sending end, specifically, as in the message data transmission flow chart of the message sending end shown in fig. 1:
inputting a first time stamp pulse signal txpma _ sfd _ flag generated by a source clock src _ clk at a user data input interface of a message sending end, wherein the first time stamp pulse signal txpma _ sfd _ flag is attached to message data of the message sending end and is transmitted together with the message data of the message sending end, and in the message data transmission process of a message receiving end, when the first time stamp pulse signal txpma _ sfd _ flag is pulled up, message header position information in the message data of the message sending end can be indicated;
meanwhile, a first bit position signal txpma _ sfd _ offset [ i-1:0] is generated along with the input of a first timestamp pulse signal txpma _ sfd _ flag, the first bit position signal txpma _ sfd _ offset [ i-1:0] is a bit position used for indicating a message header to be at a specific beat number in the message data transmission process of a message sending end, and the first bit position signal txpma _ sfd _ offset [ i-1:0] is also attached to the message data of the message sending end and is transmitted together with the message data of the message sending end;
as shown in fig. 2, the message data of the message sending end runs to a Serdes (serializer/deserializer) sending end through a media access control sending end, a physical coding sublayer sending end and a physical media connection sublayer sending end, and a Serdes sending port of the message sending end indicates a first timestamp pulse signal txpma _ sfd _ flag and a first bit position signal txpma _ sfd _ offset [ i-1:0 ]; after the Serdes sending port indicates, and before the message data of the message sending end is input to the Serdes sending end, the first timestamp pulse signal txpma _ sfd _ flag and the first bit position signal txpma _ sfd _ flag indicated at the Serdes sending port are output through a user data output interface of the message sending end, and then the rising edge and the falling edge of the source clock src _ clk respectively sample the first timestamp pulse signal txpma _ sfd _ flag output by the user data output interface of the message sending end.
In this embodiment, as to the processing of the second timestamp pulse signal rx _ base _ ts _ flag at the message receiving end, specifically, as in the message data transmission flow chart of the message receiving end shown in fig. 3:
when the message data of the message receiving end runs to the module for searching the reference point, the reference point of the message data of the message receiving end is detected;
after a reference point of the message data of the message receiving end is detected, inputting a second timestamp pulse signal rx _ base _ ts _ flag generated by a source clock src _ clk to a reference point searching module of the message receiving end, wherein the second timestamp pulse signal rx _ base _ ts _ flag is to be attached to the message data of the message receiving end and transmitted together with the message data of the message receiving end;
meanwhile, along with the input of the second timestamp pulse signal rx _ base _ ts _ flag, the reference point searching module at the message receiving end generates a second bit position signal rx _ base _ ui _ offset, which is used for indicating the bit position of the reference point in the message data transmission process of the message receiving end, and the second bit position signal rx _ base _ ui _ offset is attached to the message data at the message receiving end and is transmitted together with the message data at the message receiving end;
after inputting the second timestamp pulse signal rx _ base _ ts _ flag and generating the second bit position signal rx _ base _ ui _ offset into the reference point searching module at the message receiving end, in order to record the time of the reference point when the message data at the message receiving end is searching for the reference point module, the second timestamp pulse signal rx _ base _ ts _ flag and the second bit position signal rx _ base _ ui _ offset are input into the real-time clock module at the message receiving end, and the real-time clock records the time of the reference point when the message data at the message receiving end is searching for the reference point module.
The second timestamp pulse signal rx _ base _ ts _ flag and the second bit position signal rx _ base _ ui _ offset continue to be attached to the message data of the message receiving end to be transmitted along the transmission path of the message data until the message data runs to each channel alignment module;
specifically, in the multi-channel message data transmission, in the channel alignment module at the message receiving end, the user selects the second timestamp pulse signal rx _ base _ ts _ flag and the second bit position signal rx _ base _ ui _ offset of a channel depending on the channel message data, and then synchronizes the second timestamp pulse signal rx _ base _ ts _ flag and the second bit position signal rx _ base _ ui _ offset of all other channels depending on the corresponding channel message data into the second timestamp pulse signal rx _ base _ ts _ flag and the second bit position signal rx _ base _ ui _ offset depending on the user-selected channel message data of the user-selected channel, so that the second timestamp pulse signal rx _ base _ ts _ flag and the second bit position signal rx _ base _ ui _ offset of all channels are in the corresponding channel message The positions in the data are consistent. Each channel is provided with a corresponding message sending end, a corresponding message receiving end, a corresponding user clock 'ptp _ clk and a user clock ptp _ clk2, and when the user clock ptp _ clk2 needs to be divided by two, the frequency of the user clock is one time of the user clock' ptp _ clk.
After passing through the channel alignment module, after the message data of the message receiving end runs to the data output module, the rising edge and the falling edge of the source clock respectively sample a second timestamp pulse signal rx _ base _ ts _ flag of the message data of the message receiving end at the data output module.
In this embodiment, for the first timestamp pulse signal txpma _ sfd _ flag, the second timestamp pulse signal rx _ base _ ts _ flag, and the gray code generated by the source clock src _ clk, which are sampled by the rising edge and the falling edge of the source clock src _ clk, to be synchronized to the user clock ptp _ clk2, the following processing is specifically performed: .
Determining to select according to the trend of synchronous 4-bit gray codes corresponding to the first time stamp pulse signal txpma _ sfd _ flag and the second time stamp pulse signal rx _ base _ ts _ flag: the first and second timestamp pulse signals txpma _ sfd _ flag and rx _ base _ ts _ flag sampled at the leading edge, or the first and second timestamp pulse signals txpma _ sfd _ flag and rx _ base _ ts _ flag sampled at the trailing edge are selected, specifically, the trend of the synchronized 4-bit gray code is: when the rising edges of the source clock src _ clk and the user clock ptp _ clk2 are aligned, the difference value of the two closest Gray codes changes;
when the rising edges of the source clock src _ clk and the user clock ptp _ clk2 are not aligned, the difference between the two closest gray codes is not changed.
Specifically, when rising edges of the source clock src _ clk and the user clock ptp _ clk2 are aligned, the user clock ptp _ clk2 selects the first time stamp pulse signal txpma _ sfd _ flag and the second time stamp pulse signal rx _ base _ ts _ flag sampled by the rising edge;
after twice aligning the rising edges of the source clock src _ clk and the user clock ptp _ clk2 for half of the time interval, the user clock ptp _ clk2 selects the first and second timestamp pulse signals txpma _ sfd _ flag and rx _ base _ ts _ flag sampled at the falling edges.
In this embodiment, after synchronizing the first timestamp pulse signal txpma _ sfd _ flag, the second timestamp pulse signal rx _ base _ ts _ flag, and the 4bit gray code to the user clock ptp _ clk2, determining the header time of the header data at the message receiving end includes the following steps:
determining a time difference A between a second time stamp pulse signal rx _ base _ ts _ flag transmitted to an Emac XGMII interface by a message receiving end along with message data and a second time stamp pulse signal rx _ base _ ts _ flag selected by 4-bit Gray code trend change and synchronized to a user clock, namely determining a reference point time of the message receiving end transmitted to the Emac XGMII interface along with the message data and a time difference A between reference point times of the message data of the message receiving end in a data output module, wherein the Emac XGMII interface is a 10Gb media-independent interface of an Ethernet media access module;
determining the time difference B between the message head time of the message data of the message receiving end on the Emac XGMII interface and the time difference B between the message head time of the message data of the message receiving end transmitted to the second timestamp pulse signal of the Emac XGMII interface along with the message data, namely determining the time difference B between the message head time of the message data of the message receiving end on the Emac XGMII interface and the reference point time of the message receiving end transmitted to the Emac XGMII interface along with the message data;
the obtained timestamp of the message header of the message data of the message receiving end is the sum of the time difference A and the time difference B, namely the time used by the message data of the message receiving end from the data output module to the message receiving end on the Emac XGMII interface.
In an embodiment of this embodiment, as shown in the synchronization method diagram shown in fig. 3, des _ data is a generic term of the sampled first timestamp pulse txpma _ sfd _ flag, the sampled second timestamp rx _ base _ ts _ flag, and the sampled gray code, wherein the first timestamp pulse txpma _ sfd _ flag and the sampled second timestamp rx _ base _ ts _ flag are synchronized separately in the same process, so that the des _ data refers to a pulse signal sampled by the source clock src _ clk;
when the frequency division by two is not needed, the frequency of the user clock ptp _ clk2 is equal to that of the user clock ptp _ clk, and the high four bits of des _ data are not needed, namely des _ data [7:4] reservation;
des _ data [3] is a timestamp pulse signal sampled by the rising edge of the source clock src _ clk, des _ data [2] is a timestamp pulse signal sampled by the falling edge of the source clock src _ clk, des _ data [1:0] is the variation trend time of two sets of gray codes generated by the source clock src _ clk, and the timestamp pulse signal to be selected is determined according to the gray code trend of the above embodiment.
When the divide-by-two module is enabled, the frequency of the user clock ptp _ clk2 is twice that of the user clock ' ptp _ clk, that is, the user clock ptp _ clk2 goes through two cycles, and the user clock ' ptp _ clk only goes through one cycle, that is, des _ data [7] is a time stamp pulse signal sampled by the rising edge of the source clock src _ clk when the user clock ' ptp _ clk is 1;
des _ data [6] is a timestamp pulse signal sampled by the falling edge of the source clock src _ clk when the user clock' ptp _ clk is 1;
des _ data [5:4] is the variation trend of two groups of gray codes generated by the source clock src _ clk when the user clock' ptp _ clk is 1;
des _ data [3] is a timestamp pulse signal sampled by the rising edge of the source clock src _ clk when the user clock' ptp _ clk is 0;
des _ data [2] is a timestamp pulse signal sampled by the falling edge of the source clock src _ clk when the user clock' ptp _ clk is 0;
des _ data [1:0] is the variation trend of two groups of gray codes generated by the source clock src _ clk when the user clock' ptp _ clk is equal to 0;
the time stamp pulse signal to be selected is judged according to the gray code trend of the above embodiment.
It should be clear that the time that can be directly obtained is only the second timestamp pulse signal rx _ base _ ts _ flag synchronized with the user clock ptp _ clk2 at the data output module, and for example, the second timestamp pulse signal rx _ base _ ts _ flag transmitted to the Emac XGMII interface along with the message data, and the message data at the message receiving end at the message header time of the Emac XGMII interface can be implemented by using the conventional method such as a counter, but of course, the use of the counter is not limited thereto, and similarly, the names of the first timestamp pulse signal txpma _ sfd _ flag, the first bit position signal txpma _ sfd _ offset [ i-1:0], the second timestamp pulse signal rx _ base _ ts _ flag, the second bit position signal rx _ base _ ui _ offset in this embodiment should not be limited to only txpma _ sfd _ flag, txpma _ sfd _ flag _ 1:0], txpma _ base _ offset _ 1:0, and txpma _ base _ offset _ flag rx _ base _ ui _ offset, rx _ base _ ui _ offset.
The foregoing is a more detailed description of the present invention that is presented in conjunction with specific embodiments, and the present invention is not to be considered as limited to these descriptions. For those skilled in the art to which the invention pertains, several simple deductions or substitutions can be made without departing from the spirit of the invention, and all shall be considered as the protection scope of the invention.
Claims (9)
1. A method of time stamp pulse synchronization, comprising:
sampling a first timestamp pulse signal input to a message sending end to a source clock, wherein the first timestamp pulse signal is used for indicating the position of a message header in the message data transmission process of the message sending end;
sampling a second timestamp pulse signal input to a message receiving end to a source clock, wherein the second timestamp pulse signal is used for indicating the position of a reference point in the message data transmission process of the message receiving end;
generating a gray code within a source clock, the source clock being a clock that generates the first and second time-stamped pulse signals;
synchronizing the first time stamp pulse signal, the second time stamp pulse signal, and the gray code to a user clock.
2. The timestamp pulse synchronization method of claim 1, wherein the step of sampling the first timestamp pulse signal input to the message sender to the source clock comprises:
inputting a first timestamp pulse signal generated by the source clock to a user data input interface of the message sending end, wherein the first timestamp pulse signal is attached to message data of the message sending end;
the Serdes sending port of the message sending end indicates the first time stamp pulse signal, and is a serializer and deserializer sending port;
outputting the first timestamp pulse signal indicated by the Serdes sending port through a user data output interface of the message sending end;
and respectively sampling the first timestamp pulse signal output by a user data output interface of the message sending end through a rising edge and a falling edge of a source clock.
3. The timestamp pulse synchronization method of claim 2, wherein said step of inputting the first timestamp pulse signal generated by said source clock to a user data input interface of said message sender further comprises:
generating a first bit position signal at a user data input interface of the message sending end, wherein the first bit position signal is used for indicating a bit position of a message header in a message data transmission process of the message sending end, and the first bit position signal is attached to the message data of the message sending end.
4. The timestamp pulse synchronization method of claim 1, wherein said step of sampling a second timestamp pulse signal input to a message receiving end to a source clock comprises:
detecting a reference point of message data of a message receiving end by a reference point searching module of the message receiving end, wherein the reference point is 1bit data after a special code word of the message data of the message receiving end specified by an IEEE 1588 protocol;
inputting a second timestamp pulse signal generated by the source clock to a reference point searching module of a message receiving end, wherein the second timestamp pulse signal is attached to message data of the message receiving end;
and respectively sampling the second timestamp pulse signal of the message data of the message receiving end in the data output module through the rising edge and the falling edge of the source clock.
5. The method for time stamp pulse synchronization according to claim 4, wherein the step of inputting the second time stamp pulse signal generated by the source clock to a reference point searching module at a message receiving end further comprises:
generating a second bit position signal at a reference point searching module of a message receiving end, wherein the second bit position signal is used for indicating the bit position of the reference point in the message data transmission process of the message receiving end, and the second bit position signal is attached to the message data of the message receiving end;
and inputting the second timestamp pulse signal and the second bit position signal to a real-time clock module of the message receiving end, wherein the real-time clock module is used for determining the time of the reference point of the message data of the message receiving end when the reference point module is searched.
6. The timestamp pulse synchronization method of claim 4, wherein said sampling the message data of the message sender by the rising and falling edges of the source clock before the second timestamp pulse signal step of the data output module comprises:
in the multi-channel message data transmission, a channel alignment module at a message receiving end selects a second timestamp pulse signal and a second bit position signal of a channel, synchronizes the second timestamp pulse signals and the second bit position signals of all the channels into the selected second timestamp pulse signal and the selected second bit position signal of the channel, and attaches to the message data at the message receiving end of the corresponding channel.
7. The timestamp pulse synchronization method of claim 1, wherein said step of synchronizing said first timestamp pulse signal, said second timestamp pulse signal, and said gray code to a user clock further comprises:
a gray code corresponding to the first timestamp pulse signal and a gray code corresponding to the second timestamp pulse signal are respectively generated in the source clock;
selecting the first time stamp pulse signal and the second time stamp pulse signal sampled at the rising edge or the falling edge according to the trend change of the synchronous gray code, wherein the trend of the synchronous gray code comprises the difference change of two closest gray codes when the rising edges of a source clock and a user clock are aligned;
when the rising edges of the source clock and the user clock are not aligned, the difference value of the two closest Gray codes is unchanged.
8. The timestamp pulse synchronization method of claim 7, wherein the step of selecting the first timestamp pulse signal and the second timestamp pulse signal sampled at a rising edge or a falling edge according to a trend change of the synchronized gray code comprises:
selecting the first pulse signal and the second pulse signal sampled by the rising edge when the rising edges of the source clock and the user clock are aligned;
and after the rising edges of the source clock and the user clock are aligned for half of the time interval twice, selecting the first pulse signal and the second pulse signal sampled by the falling edge.
9. The timestamp pulse synchronization method of claim 8, wherein said step of synchronizing said first timestamp pulse signal, said second timestamp pulse signal, and said gray code to a user clock comprises:
determining a time difference A between a second timestamp pulse signal transmitted to an Emac XGMII interface by a message receiving end along with message data and a second timestamp pulse signal which is synchronized to a user clock and selected by Gray code trend change, wherein the Emac XGMII interface is a 10Gb media-independent interface of an Ethernet media access module;
determining the message head time of the message data of the message receiving end on the Emac XGMII interface and the time difference B of a second timestamp pulse signal of the message receiving end transmitted to the Emac XGMII interface along with the message data;
and obtaining the time stamp of the message header of the message data of the message receiving end as the sum of the time difference A and the time difference B.
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| KR1020247015101A KR20240118752A (en) | 2021-12-13 | 2022-08-02 | Methods, devices, electronic equipment and storage media for pulse synchronization of time stamps |
| PCT/CN2022/109647 WO2023109147A1 (en) | 2021-12-13 | 2022-08-02 | Timestamp pulse synchronization method and apparatus, and electronic device and storage medium |
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| WO2023109147A1 (en) * | 2021-12-13 | 2023-06-22 | 深圳市紫光同创电子有限公司 | Timestamp pulse synchronization method and apparatus, and electronic device and storage medium |
| CN116915540A (en) * | 2023-06-14 | 2023-10-20 | 山东科技大学 | Distributed battery management system and signal synchronization method |
| CN117254872A (en) * | 2023-11-17 | 2023-12-19 | 江苏信而泰智能装备有限公司 | Method, system, equipment and storage medium for acquiring high-precision time stamp |
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