CN114415776B - Band gap reference voltage source circuit and electronic device - Google Patents
Band gap reference voltage source circuit and electronic device Download PDFInfo
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- CN114415776B CN114415776B CN202011173865.XA CN202011173865A CN114415776B CN 114415776 B CN114415776 B CN 114415776B CN 202011173865 A CN202011173865 A CN 202011173865A CN 114415776 B CN114415776 B CN 114415776B
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
- G05F1/567—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for temperature compensation
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Abstract
The application discloses a band gap reference voltage source circuit and an electronic device. The band-gap reference voltage source circuit can realize that the band-gap reference voltage is not limited by the change influence of the process, the temperature and the like, and the range of the band-gap reference voltage can be adjusted within a certain range, so that the design flexibility of the band-gap reference voltage source circuit is enhanced. Meanwhile, the range of the band-gap reference voltage is larger, and the adjustable range of the output voltage of the band-gap reference voltage source circuit is correspondingly larger, so that the yield of the circuit is improved. In addition, the branch current of the output branch of the band gap reference voltage source circuit is relatively large, so that noise resistance can be improved. Furthermore, the plurality of selection switches arranged in the output branch circuit adopt NMOS tubes, so that the circuit and connection can be simplified. The same is true of the electronic device employing the circuit.
Description
Technical Field
The present disclosure relates to the field of electronic technologies, and in particular, to a bandgap reference voltage source circuit and an electronic device.
Background
The reference voltage source is typically used to provide a stable reference voltage for other circuits, and the voltage reference value provided by it is less affected by process, temperature and power supply variations. Therefore, the reference voltage source plays a very important role in chip circuit design. A common reference voltage source is, for example, a bandgap reference voltage source. In power supply applications where the output voltage is relatively high, such as 2.5V or 1.8V, the bandgap reference voltage is typically 1.2V. With low voltage applications of supply voltages, bandgap reference voltage source circuits are also being improved continuously to enable lower power consumption and lower voltage value bandgap reference voltages (or reference voltages, hereinafter the same), for example bandgap reference voltages below 1V. In practical industrial applications, the bandgap reference voltage needs to have a flexible and tunable range in order to increase the yield of the product.
However, in practice, the existing low-voltage bandgap reference voltage range cannot be flexibly adjusted due to the process parameters of the electronic components.
In view of this, how to realize the capability of flexibly adjusting the bandgap reference voltage range has become an important research project for related researchers or developers.
Disclosure of Invention
The embodiment of the application provides a band gap reference voltage source circuit and an electronic device. The band-gap reference voltage source circuit can adjust the size of the band-gap reference voltage in a certain range, so that the design flexibility of the band-gap reference voltage source circuit is enhanced. Meanwhile, the range of the output voltage is relatively large based on the relatively large range of the band-gap reference voltage, and the adjustable range of the output voltage is correspondingly large when the band-gap reference voltage source circuit is produced in quantity, so that the yield of the circuit is improved. In addition, the branch current of the output branch of the band gap reference voltage source circuit is relatively large, so that noise resistance can be improved. Furthermore, the plurality of selection switches arranged in the output branch circuit adopt NMOS tubes, so that the circuit and connection can be simplified. The same is true of the electronic device employing the circuit.
According to a first aspect of the present application there is provided a bandgap reference voltage source circuit comprising: the reference current generation module is used for outputting a reference current positively correlated with temperature; a first resistor; a transistor, a first pole of which is connected with an output node of the reference current generation module through the first resistor; and a second resistor, wherein a first end of the second resistor is connected with the control electrode of the transistor, and a second end of the second resistor and a second electrode of the transistor are connected with a common potential.
Based on the technical scheme, the method can be further improved.
Optionally, the second terminal of the second resistor and the second diode of the transistor are grounded.
Optionally, the second resistor is an adjustable resistor.
Optionally, the transistor is a PMOS transistor.
Optionally, the transistor is a PNP transistor, the first pole of the transistor is an emitter, and the second pole of the transistor is a collector.
Optionally, the second resistor includes a plurality of second sub-resistors connected in series between the control electrode and the second electrode of the transistor, and a bypass path bypassing at least one of the plurality of second sub-resistors based on a selection signal.
Optionally, the bypass path includes a plurality of bypass switches controlled by a selection signal, a first end of each bypass switch is connected to a first end of a corresponding second sub-resistor, and a second end of each bypass switch is connected to a second end of the corresponding second sub-resistor.
Optionally, the bypass path includes a plurality of bypass switches controlled by a selection signal, each of the second sub-resistors having a first end near the control pole of the transistor and a second end near the second pole of the transistor, each of the first ends of the bypass switches being connected to the second pole of the transistor, each of the second ends of the bypass switches being connected to the first end of the corresponding second sub-resistor.
Optionally, the bypass path includes a plurality of bypass switches controlled by a selection signal, each of the second sub-resistors having a first end near the control pole of the transistor and a second end near the second pole of the transistor, each of the first ends of the bypass switches being connected to the control pole of the transistor, each of the second ends of the bypass switches being connected to the second end of the corresponding second sub-resistor.
Optionally, the bypass switch is a MOS transistor switch.
Optionally, the bandgap reference voltage source circuit further comprises a third resistor, a first end of the third resistor is connected with the output node of the reference current generation module, and a second end of the third resistor is connected with the control electrode of the transistor.
Optionally, the bandgap reference voltage source circuit further comprises a plurality of third sub-resistors connected in series between the output node of the reference current generating module and the control electrode of the transistor, each of the third sub-resistors comprising a first end close to the output node of the reference current generating module and a second end close to the control electrode of the transistor.
Optionally, the bandgap reference voltage source circuit further includes a plurality of selection switches, a first end of each selection switch is connected to a first end of a corresponding third sub-resistor, and a second end of each selection switch is connected to a common node, where the common node is a connection node between the second resistor and the third sub-resistor near the control electrode of the transistor.
Optionally, the reference current generation module includes a proportional to absolute temperature current generation circuit.
Optionally, the proportional to absolute temperature current generation circuit includes a transistor operating in a subthreshold region.
According to a second aspect of the present application, there is also provided a bandgap reference voltage source circuit comprising: a proportional to absolute temperature current generation circuit; a first branch; and a second branch connected in parallel between the output node of the proportional-to-absolute-temperature current generation circuit and ground, the first branch including a first resistor and a transistor for providing a voltage complementary to absolute temperature, a first end of the first resistor being connected to the output node of the proportional-to-absolute-temperature current generation circuit, a second end of the first resistor being connected to a first pole of the transistor, a second pole of the transistor being grounded, the second branch including a second resistor and a third resistor connected in series between the output node of the proportional-to-absolute-temperature current generation circuit and ground, a control pole of the transistor being connected to a common node of the second resistor and the third resistor.
Optionally, the second resistor is an adjustable resistor.
According to a third aspect of the present application, there is also provided an electronic device comprising the bandgap reference voltage source circuit described above.
Optionally, the electronic device is a non-volatile memory.
The band-gap reference voltage source circuit can realize that the band-gap reference voltage is not limited by the change influences of process, temperature and the like, and the range of the band-gap reference voltage can be adjusted at will in a certain range, so that the design flexibility of the band-gap reference voltage source circuit is enhanced. And the adjustable range of the output voltage is correspondingly larger when the band-gap reference voltage source circuit is produced in quantity based on the larger range of the band-gap reference voltage, so that the yield of the circuit is improved. In addition, the branch current of the output branch of the band gap reference voltage source circuit is relatively large, and noise resistance can be improved. Furthermore, the plurality of selection switches arranged in the output branch circuit adopt NMOS tubes, so that the circuit and connection can be simplified. The same is true of the electronic device employing the circuit.
Drawings
Technical solutions and other advantageous effects of the present application will be made apparent from the following detailed description of specific embodiments of the present application with reference to the accompanying drawings.
Fig. 1 is a schematic diagram of a bandgap reference voltage source circuit in an embodiment of the application.
Fig. 2A is a schematic diagram of a bandgap reference voltage source circuit according to another embodiment of the disclosure.
Fig. 2B is another schematic diagram of a bandgap reference voltage source circuit according to another embodiment of the disclosure.
Fig. 2C is a schematic diagram of another configuration of a bandgap reference voltage source circuit according to another embodiment of the application.
Fig. 3 is a schematic structural diagram of a bandgap reference voltage source circuit according to another embodiment of the application.
Fig. 4 is a schematic structural diagram of another embodiment of the reference current generating module shown in fig. 1.
Fig. 5 is a schematic structural diagram of a further embodiment of the reference current generating module shown in fig. 1.
Fig. 6 is a schematic diagram showing the effect of the bandgap reference voltage source circuit in the embodiment described herein.
Fig. 7 is a schematic diagram showing the effect of the bandgap reference voltage source circuit in the embodiment described herein.
Fig. 8 is a schematic structural diagram of an electronic device according to an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It will be apparent that the described embodiments are only some, but not all, of the embodiments of the present application. All other embodiments, which can be made by those skilled in the art based on the embodiments herein without making any inventive effort, are intended to be within the scope of the present application.
In the description of the present application, it should be noted that, unless explicitly specified and limited otherwise, the terms "connected," "connected," and "connected" are to be construed broadly, and may be either fixedly connected, detachably connected, or integrally connected, for example; can be mechanically connected, electrically connected or can be communicated with each other; can be directly connected or indirectly connected through an intermediate medium, and can be communicated with the inside of two elements or the interaction relationship of the two elements. The specific meaning of the terms in this application will be understood by those of ordinary skill in the art as the case may be.
The following disclosure provides many different embodiments or examples for implementing different structures of the present application. In order to simplify the disclosure of the present application, the components and arrangements of specific examples are described below. Of course, they are merely examples and are not intended to limit the present application. Furthermore, the present application may repeat reference numerals and/or letters in the various examples, which are for the purpose of brevity and clarity, and which do not in themselves indicate the relationship between the various embodiments and/or arrangements discussed. In addition, the present application provides examples of various specific processes and materials, but one of ordinary skill in the art may recognize the application of other processes and/or the use of other materials.
The application provides a bandgap reference voltage source circuit, which comprises: the reference current generation module is used for outputting a reference current positively correlated with temperature; a first resistor; a transistor, a first pole of which is connected with an output node of the reference current generating module through the first resistor, and a second pole of which is grounded; and a second resistor, wherein a first end of the second resistor is connected with the control electrode of the transistor, and a second end of the second resistor is connected with the second electrode of the transistor. Wherein the first resistor and the transistor may constitute a first branch and the second resistor may constitute a second branch (or output branch, hereinafter the same). In some embodiments, the connection relation between the first resistor in the first branch and the second resistor in the second branch is reasonably designed, so that the size of the band-gap reference voltage is correspondingly adjusted by changing the resistance value of the second resistor, and the temperature coefficient of the band-gap reference voltage is not influenced, thereby enabling the setting of the band-gap reference voltage to have great flexibility. In addition, the second resistor is improved and designed to be used by matching a plurality of second sub-resistors and a plurality of bypass switches, so that the branch current of the second branch is adjusted to be a larger current value, and the noise-resistant performance is better. In addition, by providing a plurality of third sub-resistors and a plurality of selection switches in the second branch, the output voltage related to the bandgap reference voltage can be brought to the design target value by performing the trimming operation even though the bandgap reference voltage may deviate from the predetermined value due to process variation. Furthermore, the selection switch for performing trimming operation can use NMOS tube, so as to simplify circuit and connection.
In one embodiment of the present application, a bandgap reference voltage source circuit is provided, which includes: the reference current generation module, the first resistor, the transistor and the second resistor. The reference current generation module is used for outputting a reference current positively correlated with temperature. The first resistor is connected in series with the transistor and forms a first branch. A first end of the first resistor is connected to the output node of the reference current generating module, and a second end of the first resistor is connected to a first pole of a transistor. The second and control electrodes of the transistor are grounded. The first end of the second resistor is connected with the control electrode of the transistor, and the second end of the second resistor is connected with the second electrode of the transistor.
Specifically, in this embodiment, the transistor may be a PNP transistor. That is, the first pole of the transistor is the emitter and the second pole of the transistor is the collector. Of course, in other embodiments, the transistors may be other types of transistors, such as PMOS transistors, as described below, but not limited thereto.
Further, in this embodiment, the second resistor may be connected to the output node of the reference current generating module through a third resistor. That is, a first end of the third resistor is connected to the output node of the reference current generating module, and a second end of the third resistor is connected to a first end of the second resistor. The second terminal of the second resistor is connected to a second pole (here the collector) of the transistor. The second resistor and the third resistor form a second branch. The resistance of the branch resistance (i.e., the equivalent resistance) of the second branch is equal to the sum of the resistance of the second resistance and the resistance of the third resistance.
Since the proportional-to-absolute-temperature current generation circuit in the reference current generation module generates a reference current positively correlated with temperature (i.e., positive temperature coefficient), and the transistor in the first branch connected to the output node of the reference current generation module can generate a voltage complementary to the positive temperature coefficient, the bandgap reference voltage source circuit can generate a bandgap reference voltage (or referred to as reference voltage, hereinafter the same) with zero temperature coefficient. The bandgap reference voltage is equal to a sum of a voltage generated by the first resistor and a voltage generated by the transistor.
Further, by utilizing different taps of the third resistor, an output voltage associated with the bandgap reference voltage and having a certain adjustable range can be generated.
It is found that, in the bandgap reference voltage source circuit of this embodiment, the output voltage of the second branch has a certain adjustable range. But the resistance of the branch resistor in the second branch is very large, for example, 3 mega ohms or more, which occupies a large area of the circuit layout. Furthermore, the current value of the branch current in the second branch is very small, e.g. less than 0.2 μa, about a quarter of the proportion of the reference current (here 0.8 μa), which is susceptible to circuit noise. In order to increase the current value of the branch current of the second branch, if the branch resistance of the second branch is reduced to about 1 megaohm, it is ensured that the current value of the branch current of the second branch is relatively large, approximately exceeding half of the reference current, but the output voltage is 0.51V at this time. In consideration of process deviation of the transistors in the first branch, if the voltage value of the output voltage is too small, the use in the actual current is limited, and thus the use of the subsequent circuit is inconvenient.
Accordingly, the bandgap reference voltage source circuit described above is further improved upon and provided as described below.
Referring to fig. 1, in an embodiment of the present application, the bandgap reference voltage source circuit 100 includes: a reference current generating module 110 having a proportional to absolute temperature (Proportional to absolute temperature, PTAT for short, hereinafter the same) current generating circuit, a first leg 120 and a second leg 130. Specifically, the bandgap reference voltage source circuit 100 includes: a PTAT current generation circuit, a first leg 120 and a second leg 130. The first branch 120 and the second branch 130 are connected in parallel between the output node a of the PTAT current generation circuit and the ground GND, and the first branch 120 includes a first resistor R1 connected in series and a transistor P4 for providing a voltage complementary to absolute temperature. The first end of the first resistor R1 is connected with the output node A of the PTAT current generation circuit, and the second end of the first resistor R1 is connected with the first pole of the transistor P4. That is, the first pole of the transistor P4 is connected to the output node a of the PTAT current generation circuit through the first resistor R1. Further, the second pole of the transistor P4 is grounded GND. In this embodiment, the transistor P4 is a PMOS transistor, that is, the source and the substrate of the transistor P4 are connected to the second terminal of the first resistor R1, the drain of the transistor P4 is grounded, and the gate of the transistor P4 is connected to the first terminal of the second resistor R2 described below. Transistor P4 operates in the saturation region. In other embodiments, the transistor P4 may be a PNP transistor, the branch current flowing through the second branch is greater than the branch current flowing through the first branch, the amplification factor (β) of the PNP transistor is large enough, and the base current is much smaller than the branch current of the second branch.
With continued reference to fig. 1, the second branch 130 includes a second resistor R2 and a third resistor R3 connected in series between the output node a of the reference current generating module 110 and ground GND, and the control electrode of the transistor P4 is connected to a common node B of the second resistor R2 and the third resistor R3. Specifically, a first end of the second resistor R2 is connected to the control electrode of the transistor P4 and the third resistor R3, respectively, and a second end of the second resistor R2 is connected to the second electrode of the transistor P4. The second terminal of the transistor P4 is grounded, and therefore, the second terminal of the second resistor R2 is also grounded. The resistance of the branch resistance Rt (i.e., equivalent resistance) of the second branch 130 is equal to the sum of the resistance of the second resistor R2 and the resistance of the third resistor R3.
Referring to fig. 1, the voltage Vbgh at the first end of the first resistor R1 is equal to the sum of the voltage across the first resistor R1, the source-gate voltage of the transistor P4 and the gate-drain voltage of the transistor P4. The source-gate voltage of transistor P4 has a negative temperature coefficient. In this embodiment, the second resistor R2 is an adjustable resistor. When the second resistor R2 is adjusted, the voltage between the gate and the drain of the transistor P4 is also changed accordingly, thereby changing the voltage Vbgh.
Preferably, the second resistor R2 includes a plurality of second sub resistors (R2 a, R2b, R2c, etc.) and a bypass path 131. The plurality of second sub-resistors (R2 a, R2b, R2c, etc.) are connected in series between a control electrode (here, a gate electrode) and a second electrode (here, a drain electrode) of the transistor P4, and the bypass path 131 bypasses at least one of the plurality of second sub-resistors (R2 a, R2b, R2c, etc.) based on a selection signal.
As shown in connection with fig. 2A, in some embodiments, the bypass path 131 includes a plurality of bypass switches (S1, S2 … Sn) controlled by a selection signal. The first end of each bypass switch (S1, S2 … Sn) is connected with the first end of the corresponding second sub-resistor, and the second end of each bypass switch (S1, S2 … Sn) is connected with the second end of the corresponding second sub-resistor.
In some embodiments, as shown in fig. 2B, the bypass path 131 includes a plurality of bypass switches (S1, S2 … Sn) controlled by the selection signal, each of the second sub-resistors (R2 a, R2B, R2c, etc.) has a first end adjacent to the control electrode of the transistor P4 and a second end adjacent to the second electrode of the transistor P4, the first end of each of the bypass switches (S1, S2 … Sn) is connected to the second electrode of the transistor P4, and the second end of each of the bypass switches (S1, S2 … Sn) is connected to the first end of the corresponding second sub-resistor (R2 a, R2B, R2c, etc.).
In some other embodiments, as shown in fig. 2C, the bypass path 131 includes a plurality of bypass switches (S1, S2 … Sn) controlled by the selection signal, each of the second sub-resistors (R2 a, R2b, R2C, etc.) has a first end adjacent to the control electrode of the transistor P4 and a second end adjacent to the second electrode of the transistor P4, the first end of each of the bypass switches (S1, S2 … Sn) is connected to the control electrode of the transistor P4, and the second end of each of the bypass switches (S1, S2 … Sn) is connected to the second end of the corresponding second sub-resistor (R2 a, R2b, R2C, etc.).
As shown in fig. 2A, 2B, and 2C, different configurations of the bypass path 131 are shown. Further, in the above embodiment, the bypass switch (S1, S2 … Sn) may be a MOS transistor switch, and the resistance of the equivalent resistor has almost no effect on the resistance of the branch resistor Rt (or equivalent resistor) corresponding to the second branch 130. Of course, in other embodiments, the bypass switch (S1, S2, … Sn) may also be another switch with a very low resistance value, so as to avoid affecting the resistance value of the branch resistor Rt corresponding to the second branch 130.
In the present embodiment, the transistor P4 is a PMOS transistor, compared to the transistor in the first branch 120 described above, and the voltage between the source and the gate of the PMOS transistor has a negative temperature coefficient, so that the output voltage Vbgh independent of temperature can be obtained, and Vbgh can be adjusted by the second resistor.
With continued reference to fig. 1, in this embodiment, the PTAT current generation circuit may generate a current proportional to absolute temperature (Proportional To Absolute Temperature, PTAT for short). The circuit comprises a first P-type current mirror and a first N-type current mirror; the first end of the first P-type current mirror is connected with a power supply end VDD, and the second end of the first P-type current mirror is connected with the first end of the first N-type current mirror; the second end of the first N-type current mirror is grounded. Further, the first P-type current mirror comprises a first PMOS transistor P1, a second PMOS transistor P2 and a third PMOS transistor P3; the first N-type current mirror comprises a first NMOS tube N1 and a second NMOS tube N2; the PTAT circuit also includes a reference resistor Rref; one end of the reference resistor Rref is connected with the source electrode of the second NMOS tube N2, and the other end of the reference resistor Rref is grounded; the drain electrode of the first NMOS tube N1 is respectively connected with the drain electrode of the first PMOS tube P1, the grid electrode of the first NMOS tube N1 and the grid electrode of the second NMOS tube N2; the drain electrode of the second NMOS tube N2 is respectively connected with the grid electrode of the first PMOS tube P1, the grid electrode of the second PMOS tube P2, the drain electrode of the second PMOS tube P2 and the grid electrode of the third PMOS tube P3; the drain of the third PMOS transistor P3 is connected to the output node a of the proportional to absolute temperature current generation (PTAT) circuit. In some embodiments, the bandgap reference voltage source circuit further comprises a start-up (start-up) circuit for generating an initial voltage of node PB and an initial voltage of node NB. It should be noted that, the output node a of the PTAT current generation circuit serves as the output node of the reference current generation module 110.
Of course, the form of the PTAT current generation circuit is not limited to that shown in fig. 1, and other forms may be adopted as long as it can generate a positive temperature coefficient current. In other embodiments, the first PMOS transistor P1 and the second PMOS transistor P2 may have a cascode structure to improve the effect of the channel length adjustment, as shown in fig. 4. Alternatively, in other embodiments, the current proportional to absolute temperature is generated by a PMOS transistor, and the first NMOS transistor N1 and the second NMOS transistor N2 are in a cascode structure, as shown in fig. 5.
Specifically, referring to fig. 4, the PTAT current generation circuit 140 includes a first P-type current mirror and a first N-type current mirror. The first P-type current mirror comprises 3 branches. The first branch comprises a first PMOS tube P1 and a fifth PMOS tube P5, the second branch comprises a second PMOS tube P2 and a sixth PMOS tube P6, and the third branch comprises a third PMOS tube P3 and a seventh PMOS tube P7. The source electrodes of the first PMOS tube P1, the second PMOS tube P2 and the third PMOS tube P3 are connected with the power supply end VDD, and the grid electrodes of the first PMOS tube P1, the second PMOS tube P2 and the third PMOS tube P3 are connected with the public node PB1. The source electrode of the fifth PMOS tube P5 is connected with the drain electrode of the first PMOS tube P1, the source electrode of the sixth PMOS tube P6 is connected with the drain electrode of the second PMOS tube P2, the source electrode of the seventh PMOS tube P7 is connected with the drain electrode of the third PMOS tube P3, the gates of the fifth PMOS tube P5, the sixth PMOS tube P6 and the seventh PMOS tube P7 are connected with the public node PB2. The first N-type current mirror includes a first NMOS transistor N1, a second NMOS transistor N2, and a reference resistor Rref. The drain electrode of the first NMOS tube N1 is connected with the drain electrode of the fifth PMOS tube P5, and the drain electrode of the second NMOS tube N2 is connected with the drain electrode of the sixth fifth PMOS tube P6. The grid electrode of the first NMOS tube N1, the grid electrode of the second NMOS tube N2, and the drain electrode of the second NMOS tube N2 is connected with the common node NB. The source electrode of the first NMOS tube N1 is grounded. One end of the reference resistor Rref is connected with the source electrode of the second NMOS tube N2, and the other end of the reference resistor Rref is grounded. The drain of the seventh PMOS transistor P7 is connected to the output node a of the PTAT current generation circuit 140.
In addition, as shown in fig. 4, the reference current generating module 110 with the PTAT current generating circuit 140 further includes a self-bias voltage generating circuit 150. The PTAT current generation circuit 140 is connected to the self-bias voltage generation circuit 150. Specifically, the first output end of the self-bias voltage generating circuit 150 is connected to the gate of the first PMOS transistor P1, the gate of the second PMOS transistor P2, and the gate of the third PMOS transistor P3, respectively; the second output end of the self-bias voltage generating circuit 150 is connected to the gate of the fifth PMOS transistor P5, the gate of the sixth PMOS transistor P6, and the gate of the seventh PMOS transistor P7, respectively; the input end of the self-bias voltage generating circuit 150 is connected to the drain of the first NMOS transistor N1 and the drain of the fifth PMOS transistor P5, respectively. The self-bias voltage generating circuit 150 is configured to obtain a drain voltage of the first NMOS transistor N1, and output a first bias power supply voltage PB1 and a second bias power supply voltage PB2, respectively. Further, the bias voltage NB acts on a connection point between the gate of the first NMOS transistor N1 and the gate of the second NMOS transistor N2.
Specifically, referring to fig. 5, the PTAT current generation circuit 140 includes: the first PMOS tube P1, the second PMOS tube P2, the third PMOS tube P3, the first NMOS tube N1, the second NMOS tube N2, the third NMOS tube N3, the fourth NMOS tube N4 and the reference resistor Rref. The source electrode of the first PMOS transistor P1 is connected to the power supply terminal VDD, one end of the reference resistor Rref, and the source electrode of the third PMOS transistor respectively, the gate electrode of the first PMOS transistor is connected to the gate electrode of the second PMOS transistor P2, the drain electrode of the second PMOS transistor P2, and the drain electrode of the fourth NMOS transistor N4 respectively, and the drain electrode of the first PMOS transistor P1 is connected to the drain electrode of the third NMOS transistor. The grid electrode of the third NMOS tube N3 is connected with the grid electrode of the fourth NMOS tube N4, and the source electrode of the third NMOS tube N3 is connected with the drain electrode of the first NMOS tube N1. The grid electrode of the first NMOS tube N1 is connected with the grid electrode of the second NMOS tube N2, and the source electrode of the first NMOS tube N1 is grounded. One end of the reference resistor Rref is connected with the power supply end VDD, and the other end of the reference resistor Rref is connected with the source electrode of the second PMOS tube P2. The grid electrode of the second PMOS tube P2 is respectively connected with the drain electrode of the second PMOS tube P2 and the drain electrode of the fourth NMOS tube N4, and the drain electrode of the second PMOS tube P2 is connected with the drain electrode of the fourth NMOS tube N4. The source electrode of the fourth NMOS tube N4 is connected with the drain electrode of the second NMOS tube N2. The source electrode of the second NMOS tube N2 is grounded. The source of the third PMOS transistor P3 is connected to the power supply VDD. The drain of the third PMOS transistor P3 is connected to the output node a of the PTAT current generation circuit 140.
In addition, as shown in fig. 5, the reference current generating module 110 with the PTAT current generating circuit 140 further includes a self-bias voltage generating circuit 150. The PTAT current generation circuit 140 is connected to the self-bias voltage generation circuit 150. Specifically, the first output end of the self-bias voltage generating circuit 150 is connected to the gate of the third NMOS transistor N3, the gate of the fourth NMOS transistor N4, and the gate of the third PMOS transistor P3, respectively; the second output end of the self-bias voltage generating circuit 150 is connected to the gate of the first NMOS transistor N1 and the gate of the second NMOS transistor N2, respectively; the input end of the self-bias voltage generating circuit 150 is connected to the drain of the first PMOS P1 and the drain of the third NMOS N3, respectively. The self-bias voltage generating circuit 150 is configured to adjust the bias voltage NB and the gate voltage of the third PMOS transistor P3 according to the source voltage of the first PMOS transistor P1. In addition, the bias voltage PB acts on the connection point between the gate of the first PMOS transistor P1 and the gate of the second PMOS transistor P2.
With continued reference to fig. 1, in this embodiment, the PTAT current generation circuit includes a first P-type current mirror including a first PMOS transistor P1, a second PMOS transistor P2, and a third PMOS transistor P3. Specifically, since the first PMOS transistor P1, the second PMOS transistor P2 and the third PMOS transistor P3 are in a common gate structure, the ratio of the current flowing through the third PMOS transistor P3 to the current flowing through the second PMOS transistor P2 is equal to the width-to-length ratio of the third PMOS transistor P3 to the width-to-length ratio of the second PMOS transistor P2. If the length of the third PMOS tube P3 is equal to the length and the width of the second PMOS tube P2, the current flowing through the third PMOS tube P3 is equal to the current flowing through the second PMOS tube P2.
The PTAT current generation circuit further comprises a first N-type current mirror, wherein the first N-type current mirror comprises a first NMOS tube N1 and a second NMOS tube N2. The first NMOS transistor N1 and the second NMOS transistor N2 generate a current I0, where the current I0 is a PATA current. Therefore, the current I0 can be copied to the third PMOS transistor P3 through the first P-type current mirror and the first N-type current mirror.
It is assumed that when the current flowing through the third PMOS transistor P3 is equal to the current flowing through the second PMOS transistor P2, the first NMOS transistor N1 and the second NMOS transistor N2 operate in the sub-threshold region. Thus, the bandgap reference voltage Vbgh on the output node a of PTAT current generation circuit 140 is equal to the sum of the source-drain voltage of transistor P4 and the voltage generated by the first resistor. Further, the source-drain voltage of the transistor P4 is equal to the source-gate voltage of the transistor P4 and the gate-drain voltage of the transistor P4, and the gate-drain voltage of the transistor P4 is equal to the voltage generated by the second resistor R2. In other words, the bandgap reference voltage
Vbgh＝I1*R1+VGS4+R2*It＝(I0-It)*R1+VGS4+R2*It＝(Rt*(I0+VGS4/R1)+
Rt/R1 x VOS)/(1+rt/R1), where vos=r2/Rt x Vbgh, VOS is the voltage of the common node B of the second resistor R2 and the third resistor R3, R2 is the second resistor, rt is the branch resistor (or equivalent resistor) of the second branch 130, VGS4 is the voltage between the source and the gate of the transistor P4, R1 is the first resistor, i0=ηvt/Rref x ln (K2/K1), K2/K1 represents the channel width ratio of the second NMOS tube and the first NMOS tube, η is a fixed number, vt is a thermoelectric potential, and there is a positive temperature coefficient. According to the above formula of the bandgap reference voltage, the bandgap reference voltage Vbgh with zero temperature coefficient can be obtained by reasonably selecting the relevant resistance in the formula. The voltage VOS at the common node B is also independent of temperature, and is only a proportional value of the bandgap reference voltage Vbgh (i.e., the ratio of the branch resistance Rt to the second resistance R2, i.e., R2/Rt). As described above, when the resistance value of the second resistor R2 is changed, the voltage value of the band-gap reference voltage Vbgh can be arbitrarily changed within a certain range without affecting the temperature coefficient of the band-gap reference voltage Vbgh, so that the setting of the band-gap reference voltage Vbgh has great flexibility.
Referring to fig. 1 and 3, fig. 3 is a schematic diagram of a bandgap reference voltage source circuit in a further embodiment of the application. In this embodiment, the remaining circuit configuration is the same as the circuit configuration shown in fig. 1 or the circuit configuration shown in fig. 2A to 2C except for the form of the third resistor R3 in the second branch 130. In this embodiment, the second resistor R2 may take the form of the second resistor R2 shown in fig. 1 or take the form of the second resistor R2 shown in fig. 2A to 2C. The form of the second resistor R2 will not be described in detail here.
In this embodiment, a first end of the third resistor R3 is connected to the output node of the reference current generating module 110 (i.e., the output node a of the PTAT current generating circuit), and a second end of the third resistor R3 is connected to the control electrode of the transistor P4. When the transistor P4 is a PMOS transistor, the second end of the third resistor R3 is connected to the gate of the transistor P4.
Preferably, the third resistor R3 includes a plurality of third sub-resistors (R3 a, R3b, R3c, etc.) connected in series between the output node of the reference current generating module 110 and the control electrode of the transistor P4. Each of the third sub-resistors (R3 a, R3b, R3c, etc.) includes a first terminal near the output node a of the reference current generating module 110 and a second terminal near the control electrode of the transistor P4. Meanwhile, the bandgap reference voltage source circuit 100 further includes a plurality of selection switches (K1, K2 … Kn), wherein a first terminal of each of the selection switches (K1, K2 … Kn) is connected to a first terminal of a corresponding third sub-resistor (R3 a, R3b, R3c, etc.), and a second terminal of each of the selection switches (K1, K2 … Kn) is connected to a common node, wherein the common node is a connection node between the second resistor and the third sub-resistor adjacent to the control electrode of the transistor. Therefore, by selecting the selection switch (K1, K2 … Kn), one of the plurality of selection switches (K1, K2 … Kn) is brought into a closed state, thereby adjusting the output voltage Vbg. Even when the bandgap reference voltage Vbgh of the reference current generation module 110 deviates from a predetermined value due to process variation of the circuit device, the voltage value of the output voltage Vbg is made to reach the design target value by the plurality of selection switches described above.
In this embodiment, as shown in fig. 3, when the first selection switch K1 is closed and the other selection switches are off, the voltage value of the output voltage Vbg is equal to the voltage value of the bandgap reference voltage Vbgh. When the nth selection switch Kn is closed and the other selection switches are turned off, the voltage value of the output voltage Vbg is equal to a value obtained by the product of the ratio of the first equivalent resistor to the second equivalent resistor and the voltage value of the band gap reference voltage Vbgh, wherein the first equivalent resistor is the total resistor of the first third sub resistor R3a to the N-1 th third sub resistor R3 (N-1); the second equivalent resistance is the total resistance of the second resistor R2 and the third resistor R3.
In addition, in the embodiment shown in fig. 3, the selection switches (K1, K2, … Kn) are CMOS transistor switches capable of delivering high and low voltages and providing an output voltage Vbg. When CMOS tube switches are used, only one CMOS tube is closed at a time, and the other CMOS tube switches are off. The type of the selection switch is not limited to a CMOS tube switch, and can be a PMOS tube switch or an NMOS tube switch. When the PMOS tube switch or the NMOS tube switch is adopted, the selection function can be completed by only a single PMOS tube or NMOS tube, and compared with the CMOS tube switch, the design can save the area of a circuit layout and simplify the connection.
Furthermore, in the embodiment shown in fig. 3, the number of adjustable gears of the output voltage Vbg may be determined according to design requirements, for example, 8 th gear or 16 th gear.
As described above, when the bandgap reference voltage source circuit 100 is designed to include: the reference current generation module 110, a first resistor R1, a transistor P4 and a second resistor R2, wherein the first resistor R1 and the transistor P4 are arranged in series, a first end of the first resistor R1 is connected to an output node of the reference current generation module 110, and a second end of the first resistor R1 is connected to a first pole of the transistor P4. The second and control poles of the transistor P4 are grounded, and a second resistor R2 is connected between the output node of the reference current generating module 110 and ground. When the transistor P4 is a PMOS transistor, in this case, the output voltage Vbg is 0.51V, which may be lower than the target value of some output voltages. When the bandgap reference voltage source circuit 100 is designed as the circuit structure shown in fig. 1, the voltage of the transistor P4 is greater than or equal to 0.1V by selecting the appropriate second resistor R2, so that the output voltage Vbg is greater than or equal to 0.6V, thereby meeting the requirement of the target value of the output voltage. At the same time, the current value of the branch current It of the second branch 130 may be maintained to be more than half of the reference current, thereby improving noise immunity. Referring specifically to the waveform shown in fig. 6 (in which the abscissa is temperature and the ordinate is voltage), when the output voltage Vbg increases to 0.651V, the branch current It of the second branch 130 remains 0.455 μa, and the voltage of the common node B is 0.14V. The temperature coefficient of the output voltage Vbg remains substantially uniform. If the output voltage Vbg with a larger voltage value needs to be provided, the resistance value of the second resistor R2 in the second branch 130 needs to be increased.
Also, referring to fig. 7 (in which the abscissa is temperature and the ordinate is voltage), if the resistance of the second resistor R2 in the second branch 130 is changed, for example, from 310K ohms to 645K ohms, and the other circuit device parameters of the bandgap reference voltage source circuit 100 are unchanged, the voltage value of the output voltage Vbg may be changed from 0.651V to 0.801V; the current value of the reference current I3 in fig. 7 is substantially the same as the current value of the reference current I3 in fig. 6, and thus, the current value of the branch current in fig. 7 is 0.460 μa, which is not much different from the current value of the branch current 0.455 μa in fig. 6; the trend of the output voltage Vbg with temperature in fig. 7 is also substantially the same as that of the output voltage Vbg with temperature in fig. 6.
The bandgap reference voltage source circuit 100 can realize that the reference voltage is not limited by the change of process, temperature and the like, and the range of the bandgap reference voltage can be adjusted at will within a certain range, so that the design flexibility of the bandgap reference voltage source circuit is enhanced. And the adjustable range of the output voltage Vbg is correspondingly larger when the band-gap reference voltage source circuit is mass-produced based on the larger range of the band-gap reference voltage, so that the yield of the circuit is improved. In addition, the second branch 130 of the bandgap reference voltage source circuit 100 has a relatively large branch current, which can improve noise immunity. Furthermore, the plurality of selection switches disposed in the second branch 130 are NMOS transistors, so as to simplify the circuit and connection.
Referring to fig. 8, the present application further provides an electronic device 800, where the electronic device 800 includes the bandgap reference voltage source circuit 100 described above, and is not described herein again. Therefore, the electronic device 800 can generate a stable bandgap reference voltage, the voltage value of the bandgap reference voltage Vbgh is little influenced by the variations of the process, the temperature and the power supply, and even the influence thereof can be ignored, and the range size of the bandgap reference voltage Vbgh can be arbitrarily adjusted within a certain range, thereby enhancing the design flexibility of the bandgap reference voltage source circuit 100. The range of the band-gap reference voltage Vbgh is relatively large, and the adjustable range of the output voltage Vbg when the band-gap reference voltage source circuit 100 is mass-produced is also relatively large, so that the designed target value is satisfied.
In some embodiments, the electronic device 800 is a non-volatile memory. A nonvolatile memory refers to a memory that can retain data after power-off, i.e., the stored data is not lost after power-off.
In the foregoing embodiments, the descriptions of the embodiments are emphasized, and for parts of one embodiment that are not described in detail, reference may be made to related descriptions of other embodiments.
The above describes in detail a bandgap reference voltage source circuit and an electronic device provided in the embodiments of the present application, and specific examples are applied herein to illustrate the principles and implementations of the present application, where the above description of the embodiments is only for helping to understand the technical solution and core ideas of the present application; those of ordinary skill in the art will appreciate that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application.
Claims (17)
1. A bandgap reference voltage source circuit, comprising:
the reference current generation module is used for outputting a reference current positively correlated with temperature;
a first resistor;
a transistor, a first pole of which is connected with an output node of the reference current generation module through the first resistor; and
the first end of the second resistor is connected with the control electrode of the transistor, the second end of the second resistor and the second electrode of the transistor are connected with a common potential, and the second resistor is an adjustable resistor.
2. The bandgap reference voltage source circuit according to claim 1, wherein the second terminal of said second resistor and the second diode of said transistor are grounded.
3. The bandgap reference voltage source circuit of claim 1, wherein said transistor is a PMOS transistor.
4. The bandgap reference voltage source circuit according to claim 1, wherein said transistor is a PNP transistor, a first pole of said transistor is an emitter, and a second pole of said transistor is a collector.
5. The bandgap reference voltage source circuit of claim 1, wherein said second resistor comprises a plurality of second sub-resistors connected in series between a control electrode and a second electrode of said transistor, and a bypass path bypassing at least one of said plurality of second sub-resistors based on a selection signal.
6. The bandgap reference voltage source circuit according to claim 5, wherein said bypass path comprises a plurality of bypass switches controlled by a selection signal, a first terminal of each of said bypass switches being connected to a first terminal of a corresponding one of said second sub-resistors, a second terminal of each of said bypass switches being connected to a second terminal of a corresponding one of said second sub-resistors.
7. The bandgap reference voltage source circuit of claim 5, wherein said bypass path comprises a plurality of bypass switches controlled by a selection signal, each of said second sub-resistors having a first end adjacent to a control pole of said transistor and a second end adjacent to a second pole of said transistor, each of said bypass switches having a first end connected to said second pole of said transistor and a second end connected to a first end of a corresponding second sub-resistor.
8. The bandgap reference voltage source circuit of claim 5, wherein said bypass path comprises a plurality of bypass switches controlled by a selection signal, each of said second sub-resistors having a first end adjacent to a control electrode of said transistor and a second end adjacent to a second electrode of said transistor, each of said bypass switches having a first end connected to said control electrode of said transistor and a second end connected to a second end of a corresponding second sub-resistor.
9. The bandgap reference voltage source circuit according to any of claims 6-8, wherein said bypass switch is a MOS transistor switch.
10. The bandgap reference voltage source circuit according to claim 1, further comprising a third resistor, a first terminal of the third resistor being connected to the output node of the reference current generation module, a second terminal of the third resistor being connected to the control electrode of the transistor.
11. The bandgap reference voltage source circuit of claim 1, further comprising a plurality of third sub-resistors connected in series between the output node of the reference current generating module and the control electrode of the transistor, each of said third sub-resistors comprising a first end adjacent to the output node of the reference current generating module and a second end adjacent to the control electrode of the transistor.
12. The bandgap reference voltage source circuit of claim 11, further comprising a plurality of selection switches, a first terminal of each of said selection switches being connected to a first terminal of a corresponding third sub-resistor, a second terminal of each of said selection switches being connected to a common node, wherein the common node is a connection node between the second resistor and the third sub-resistor adjacent to the control electrode of the transistor.
13. The bandgap reference voltage source circuit of claim 1, wherein said reference current generation module comprises a proportional to absolute temperature current generation circuit.
14. The bandgap reference voltage source circuit of claim 13, wherein said proportional to absolute temperature current generation circuit comprises a transistor operating in a subthreshold region.
15. A bandgap reference voltage source circuit, comprising:
a proportional to absolute temperature current generation circuit;
a first branch; and
a second branch of the first branch,
the first branch circuit and the second branch circuit are connected in parallel between the output node of the proportional-to-absolute-temperature current generation circuit and the ground, the first branch circuit comprises a first resistor and a transistor for providing a voltage complementary to absolute temperature, a first end of the first resistor is connected with the output node of the proportional-to-absolute-temperature current generation circuit, a second end of the first resistor is connected with a first pole of the transistor, a second pole of the transistor is grounded, the second branch circuit comprises a second resistor and a third resistor which are connected in series between the output node of the proportional-to-absolute-temperature current generation circuit and the ground, a control pole of the transistor is connected with a common node of the second resistor and the third resistor, and the second resistor is an adjustable resistor.
16. An electronic device comprising the bandgap reference voltage source circuit of any one of claims 1 to 15.
17. The electronic device of claim 16, wherein the electronic device is a non-volatile memory.
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