CN114415776B - Band gap reference voltage source circuit and electronic device - Google Patents

Abstract

The application discloses a band gap reference voltage source circuit and an electronic device. The band-gap reference voltage source circuit can realize that the band-gap reference voltage is not limited by the change influence of the process, the temperature and the like, and the range of the band-gap reference voltage can be adjusted within a certain range, so that the design flexibility of the band-gap reference voltage source circuit is enhanced. Meanwhile, the range of the band-gap reference voltage is larger, and the adjustable range of the output voltage of the band-gap reference voltage source circuit is correspondingly larger, so that the yield of the circuit is improved. In addition, the branch current of the output branch of the band gap reference voltage source circuit is relatively large, so that noise resistance can be improved. Furthermore, the plurality of selection switches arranged in the output branch circuit adopt NMOS tubes, so that the circuit and connection can be simplified. The same is true of the electronic device employing the circuit.

Description

Bandgap reference voltage source circuit and electronic device

Technical field

The present application relates to the field of electronic technology, and in particular to a bandgap reference voltage source circuit and an electronic device.

Background technique

The reference voltage source is generally used to provide a stable reference voltage for other circuits, and the voltage reference value it provides is rarely affected by changes in process, temperature and power supply. Therefore, the reference voltage source plays a very important role in chip circuit design. A common reference voltage source is, for example, a bandgap reference voltage source. In power supply applications with relatively high output voltages, such as 2.5V or 1.8V output voltage applications, the bandgap reference voltage is usually 1.2V. With the low-voltage application of power supply voltage, bandgap reference voltage source circuits are also constantly being improved to produce bandgap reference voltages (or reference voltages, the same below) with lower power consumption and lower voltage values, such as Bandgap reference voltage below 1V. In actual industrial applications, in order to improve product yield, the bandgap reference voltage needs to have a flexible and adjustable range.

However, in practice, the existing low-voltage bandgap reference voltage range cannot be flexibly adjusted due to limitations of process parameters of electronic components.

In view of this, how to flexibly adjust the bandgap reference voltage range has become an important research project for relevant researchers or developers.

Contents of the invention

Embodiments of the present application provide a bandgap reference voltage source circuit and an electronic device. The bandgap reference voltage source circuit can adjust the size of the bandgap reference voltage within a certain range, thereby enhancing the design flexibility of the bandgap reference voltage source circuit. At the same time, based on the relatively large range of the bandgap reference voltage, the adjustable range of the output voltage during mass production of the bandgap reference voltage source circuit is also correspondingly large, thereby improving the circuit yield. In addition, the branch current of the output branch of the bandgap reference voltage source circuit is relatively large, which can improve the anti-noise performance. Furthermore, the multiple selection switches provided in the output branch adopt NMOS tubes, which can simplify the circuit and connections. The same is true for the electronic device using this circuit in this application.

According to a first aspect of the present application, the present application provides a bandgap reference voltage source circuit, which includes: a reference current generation module to output a reference current that is positively related to temperature; a first resistor; and a transistor. The first pole is connected to the output node of the reference current generating module through the first resistor; and a second resistor, the first end of the second resistor is connected to the control electrode of the transistor, and the second end of the second resistor is connected to the control electrode of the transistor. The two terminals and the second pole of the transistor are connected to a common potential.

On the basis of the above technical solution, further improvements can be made.

Optionally, the second terminal of the second resistor and the second pole of the transistor are grounded.

Optionally, the second resistor is an adjustable resistor.

Optionally, the transistor is a PMOS transistor.

Optionally, the transistor is a PNP transistor, a first pole of the transistor is an emitter, and a second pole of the transistor is a collector.

Optionally, the second resistor includes a plurality of second sub-resistors and a bypass path. The plurality of second sub-resistors are connected in series between the control electrode and the second electrode of the transistor. The bypass path is based on The selection signal bypasses at least one of the plurality of second sub-resistors.

Optionally, the bypass path includes a plurality of bypass switches controlled by a selection signal, a first end of each bypass switch is connected to a first end corresponding to the second sub-resistor, and each bypass switch is connected to a first end of the second sub-resistor. The second end of the circuit switch is connected to the second end corresponding to the second sub-resistor.

Optionally, the bypass path includes a plurality of bypass switches controlled by a selection signal, and each of the second sub-resistors has a first end close to the control electrode of the transistor and a second end close to the control electrode of the transistor. The second end of each bypass switch is connected to the second pole of the transistor, and the second end of each bypass switch is connected to the first end of the corresponding second sub-resistor.

Optionally, the bypass path includes a plurality of bypass switches controlled by a selection signal, and each of the second sub-resistors has a first end close to the control electrode of the transistor and a second end close to the control electrode of the transistor. The second end of each bypass switch is connected to the control electrode of the transistor, and the second end of each bypass switch is connected to the second end of the corresponding second sub-resistor.

Optionally, the bypass switch is a MOS transistor switch.

Optionally, the bandgap reference voltage source circuit further includes a third resistor, a first end of the third resistor is connected to the output node of the reference current generation module, and a second end of the third resistor is connected to the output node of the transistor. Control pole.

Optionally, the bandgap reference voltage source circuit further includes a plurality of third sub-resistors connected in series between the output node of the reference current generation module and the control electrode of the transistor, each of the third sub-resistors includes a A first terminal of the output node of the reference current generating module and a second terminal close to the control electrode of the transistor.

Optionally, the bandgap reference voltage source circuit further includes a plurality of selection switches, the first end of each selection switch is connected to the first end corresponding to the third sub-resistor, and the second end of each selection switch A common node is connected, where the common node is a connection node between the second resistor and the third sub-resistor close to the control electrode of the transistor.

Optionally, the reference current generation module includes a current generation circuit proportional to absolute temperature.

Optionally, the proportional to absolute temperature current generating circuit includes a transistor operating in a sub-threshold region.

According to the second aspect of the application, the application also provides a bandgap reference voltage source circuit, which includes: a current generation circuit proportional to the absolute temperature; a first branch; and a second branch, the first branch The circuit and the second branch are connected in parallel between the output node of the proportional to absolute temperature current generating circuit and ground, the first branch includes a first resistor and a transistor for providing a voltage complementary to the absolute temperature, the The first end of the first resistor is connected to the output node of the proportional to absolute temperature current generating circuit, the second end of the first resistor is connected to the first pole of the transistor, and the second pole of the transistor is grounded. The second branch includes a second resistor and a third resistor connected in series between the output node of the proportional to absolute temperature current generating circuit and ground, and the control electrode of the transistor is connected to the second resistor and the third resistor. public node.

Optionally, the second resistor is an adjustable resistor.

According to a third aspect of the present application, the present application also provides an electronic device, which includes the above-mentioned bandgap reference voltage source circuit.

Optionally, the electronic device is a non-volatile memory.

The bandgap reference voltage source circuit described in this application can realize that the bandgap reference voltage is not limited by changes in process, temperature, etc., and the range of the bandgap reference voltage can be adjusted arbitrarily within a certain range, thereby enhancing the bandgap reference voltage. Source circuit design flexibility. Moreover, since the range of the bandgap reference voltage is relatively large, the adjustable range of the output voltage when mass-producing the bandgap reference voltage source circuit is correspondingly large, thereby improving the circuit yield. In addition, the branch current of the output branch of the bandgap reference voltage source circuit is relatively large, which can improve the anti-noise performance. Furthermore, the multiple selection switches provided in the output branch adopt NMOS tubes, which can simplify the circuit and connections. The same is true for the electronic device using this circuit in this application.

Description of the drawings

The technical solutions and other beneficial effects of the present application will be apparent through a detailed description of the specific embodiments of the present application in conjunction with the accompanying drawings.

FIG. 1 is a schematic structural diagram of a bandgap reference voltage source circuit in an embodiment of the present application.

FIG. 2A is a schematic structural diagram of a bandgap reference voltage source circuit in another embodiment of the present application.

FIG. 2B is another structural schematic diagram of a bandgap reference voltage source circuit in another embodiment of the present application.

FIG. 2C is another schematic structural diagram of a bandgap reference voltage source circuit in another embodiment of the present application.

FIG. 3 is a schematic structural diagram of a bandgap reference voltage source circuit in yet another embodiment of the present application.

FIG. 4 is a schematic structural diagram of another embodiment of the reference current generation module shown in FIG. 1 .

FIG. 5 is a schematic structural diagram of another embodiment of the reference current generation module shown in FIG. 1 .

FIG. 6 is a schematic diagram of the effect of the bandgap reference voltage source circuit in the embodiment of the present application.

FIG. 7 is a schematic diagram of the effect of the bandgap reference voltage source circuit in the embodiment of the present application.

FIG. 8 is a schematic structural diagram of an electronic device in an embodiment of the present application.

Detailed ways

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, but not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without making creative efforts fall within the scope of protection of this application.

In the description of this application, it should be noted that, unless otherwise clearly stated and limited, the terms "connected" and "connected" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection. Ground connection; it can be a mechanical connection, an electrical connection, or mutual communication; it can be a direct connection, or an indirect connection through an intermediate medium, or an internal connection between two components or an interaction between two components. For those of ordinary skill in the art, the specific meanings of the above terms in this application can be understood according to specific circumstances.

The following disclosure provides many different embodiments or examples for implementing the various structures of the present application. To simplify the disclosure of the present application, the components and arrangements of specific examples are described below. Of course, they are merely examples and are not intended to limit the application. Furthermore, this application may repeat reference numbers and/or reference letters in different examples, such repetition being for the purposes of simplicity and clarity and does not by itself indicate a relationship between the various embodiments and/or arrangements discussed. In addition, this application provides examples of various specific processes and materials, but one of ordinary skill in the art will recognize the application of other processes and/or the use of other materials.

This application provides a bandgap reference voltage source circuit, which includes: a reference current generation module to output a reference current that is positively related to temperature; a first resistor; a transistor, the first pole of the transistor passes through the third A resistor is connected to the output node of the reference current generating module, and the second electrode of the transistor is grounded; and a second resistor, the first end of the second resistor is connected to the control electrode of the transistor, and the second resistor is connected to the control electrode of the transistor. The second terminal is connected to the second pole of the transistor. The first resistor and the transistor may form a first branch, and the second resistor may form a second branch (or output branch, the same below). In some embodiments, by rationally designing the connection relationship between the first resistor in the first branch and the transistor and the second resistor in the second branch, the band gap can be adjusted accordingly by changing the resistance of the second resistor. The size of the reference voltage does not affect the temperature coefficient of the bandgap reference voltage, making the setting of the bandgap reference voltage extremely flexible. In addition, the second resistor can be improved and designed to be used in conjunction with multiple second sub-resistors and multiple bypass switches to adjust the branch current of the second branch to a larger current value, thereby having better resistance. Noise performance. In addition, by arranging a plurality of third sub-resistors and a plurality of selection switches in the second branch, the output voltage of the second branch is trimmed, even though the bandgap reference voltage may deviate due to process deviations. A predetermined value, but the trimming operation can also be performed so that the output voltage related to the bandgap reference voltage reaches the design target value. Furthermore, the selector switch that performs the trimming operation can use an NMOS tube, thereby simplifying the circuit and connections.

An embodiment of the present application provides a bandgap reference voltage source circuit, which includes: a reference current generation module, a first resistor, a transistor, and a second resistor. Among them, the reference current generating module is used to output a reference current that is positively related to temperature. The first resistor and the transistor are arranged in series and form a first branch. The first terminal of the first resistor is connected to the output node of the reference current generating module, and the second terminal of the first resistor is connected to the first pole of the transistor. The second electrode and the control electrode of the transistor are connected to ground. The first end of the second resistor is connected to the control electrode of the transistor, and the second end of the second resistor is connected to the second electrode of the transistor.

Specifically, in this embodiment, the transistor may be a PNP transistor. That is, the first pole of the transistor is the emitter, and the second pole of the transistor is the collector. Of course, in other embodiments, the transistors may be other types of transistors, such as PMOS transistors described below, but are not limited thereto.

Further, in this embodiment, the second resistor may be connected to the output node of the reference current generating module through a third resistor. That is, the first end of the third resistor is connected to the output node of the reference current generating module, and the second end of the third resistor is connected to the first end of the second resistor. The second terminal of the second resistor is connected to the second electrode of the transistor (here the collector). The second resistor and the third resistor form a second branch. The resistance value of the branch resistance (ie equivalent resistance) of the second branch is equal to the sum of the resistance value of the second resistor and the resistance value of the third resistor.

Since the proportional to absolute temperature current generating circuit in the reference current generating module generates a reference current that is positively related to temperature (ie, positive temperature coefficient), the transistor in the first branch connected to the output node of the reference current generating module can generate It has a voltage that is complementary to a positive temperature coefficient. Therefore, the bandgap reference voltage source circuit described in this application can generate a bandgap reference voltage (or reference voltage, the same below) with zero temperature coefficient. The bandgap reference voltage is equal to the sum of the voltage produced by the first resistor and the voltage produced by the transistor.

Furthermore, by utilizing different taps of the third resistor, an output voltage associated with the bandgap reference voltage and having a certain adjustable range can be generated.

After research, it is found that in the bandgap reference voltage source circuit of this embodiment, the output voltage of the second branch has a certain adjustable range. However, the resistance of the branch resistor in the second branch is very large, for example, more than 3 megaohms, which will occupy a large area of the circuit layout. Moreover, the current value of the branch current in the second branch is very small, for example, less than 0.2 μA, which is about a quarter of the ratio of the reference current (here, 0.8 μA), which makes it susceptible to circuit noise interference. In order to increase the current value of the branch current of the second branch, if the branch resistance of the second branch is reduced to about 1 megohm, it can ensure that the current value of the branch current of the second branch is relatively large. About half the reference current is exceeded, but the output voltage is now 0.51V. Considering the process deviation of the transistor in the first branch, if the voltage value of the output voltage is too small, the use in the actual current will be limited, which will not be convenient for the use of subsequent circuits.

Therefore, on the basis of the bandgap reference voltage source circuit described above, it is further improved and a bandgap reference voltage source circuit as described below is provided.

Referring to FIG. 1 , in one embodiment of the present application, the bandgap reference voltage source circuit 100 includes: a reference current having a proportional to absolute temperature (PTAT) current generation circuit. A module 110, a first branch 120 and a second branch 130 are generated. Specifically, the bandgap reference voltage source circuit 100 includes: a PTAT current generating circuit, a first branch 120 and a second branch 130 . Among them, the first branch 120 and the second branch 130 are connected in parallel between the output node A of the PTAT current generating circuit and the ground GND. The first branch 120 includes a first resistor R1 connected in series and is used to provide a voltage complementary to the absolute temperature. of transistor P4. The first terminal of the first resistor R1 is connected to the output node A of the PTAT current generating circuit, and the second terminal of the first resistor R1 is connected to the first pole of the transistor P4. That is, the first pole of the transistor P4 is connected to the output node A of the PTAT current generating circuit through the first resistor R1. In addition, the second electrode of the transistor P4 is connected to the ground GND. In this embodiment, the transistor P4 is a PMOS transistor, that is, the source and substrate terminals of the transistor P4 are connected to the second terminal of the first resistor R1, the drain of the transistor P4 is grounded, and the gate of the transistor P4 is connected to the following resistor. The first terminal of the second resistor R2. Transistor P4 operates in the saturation region. In other embodiments, the transistor P4 may be a PNP transistor. The branch current flowing through the second branch is greater than the branch current flowing through the first branch. The amplification factor (β) of the PNP transistor is large enough and the base current is far away from the first branch. Less than the branch current of the second branch.

Continuing to refer to FIG. 1 , the second branch 130 includes a second resistor R2 and a third resistor R3 connected in series between the output node A of the reference current generating module 110 and ground GND. The control electrode of the transistor P4 is connected to The common node B of the second resistor R2 and the third resistor R3. Specifically, the first end of the second resistor R2 is connected to the control electrode of the transistor P4 and the third resistor R3 respectively, and the second end of the second resistor R2 is connected to the second electrode of the transistor P4. The second pole of the transistor P4 is grounded, so the second terminal of the second resistor R2 is also grounded. The resistance of the branch resistor Rt (ie, the equivalent resistance) of the second branch 130 is equal to the sum of the resistance of the second resistor R2 and the resistance of the third resistor R3.

Referring to FIG. 1 , the voltage Vbgh at the first end of the first resistor R1 is equal to the sum of the voltage on the first resistor R1 , the source-gate voltage of the transistor P4 and the gate-drain voltage of the transistor P4 . The source-to-gate voltage of transistor P4 has a negative temperature coefficient. In this embodiment, the second resistor R2 is an adjustable resistor. When the second resistor R2 is adjusted, the voltage between the gate and the drain of the transistor P4 also changes accordingly, thereby changing the voltage Vbgh.

Preferably, the second resistor R2 includes a plurality of second sub-resistors (R2a, R2b, R2c, etc.) and a bypass path 131. The plurality of second sub-resistors (R2a, R2b, R2c, etc.) are connected in series between the control electrode (gate here) and the second electrode (drain here) of the transistor P4, and the bypass Path 131 bypasses at least one of the plurality of second sub-resistors (R2a, R2b, R2c, etc.) based on the selection signal.

As shown in FIG. 2A , in some embodiments, the bypass path 131 includes a plurality of bypass switches (S1, S2...Sn) controlled by a selection signal. The first terminal of each bypass switch (S1, S2...Sn) is connected to the first terminal corresponding to the second sub-resistor, and the second terminal of each bypass switch (S1, S2...Sn) is connected to Corresponding to the second end of the second sub-resistor.

As shown in FIG. 2B , in some embodiments, the bypass path 131 includes a plurality of bypass switches (S1, S2...Sn) controlled by a selection signal, and each of the second sub-resistances (R2a, R2b, R2c, etc.) has a first end close to the control pole of the transistor P4 and a second end close to the second pole of the transistor P4, and the first end of each bypass switch (S1, S2...Sn) is connected The second terminal of the transistor P4 and the second terminal of each bypass switch (S1, S2...Sn) are connected to the first terminal of the corresponding second sub-resistor (R2a, R2b, R2c, etc.).

As shown in FIG. 2C , in other embodiments, the bypass path 131 includes a plurality of bypass switches (S1, S2...Sn) controlled by a selection signal, and each of the second sub-resistances (R2a, R2b , R2c, etc.) has a first end close to the control pole of the transistor P4 and a second end close to the second pole of the transistor P4, a first end of each bypass switch (S1, S2...Sn) The control electrode of the transistor P4 is connected, and the second end of each bypass switch (S1, S2...Sn) is connected to the second end of the corresponding second sub-resistor (R2a, R2b, R2c, etc.).

As shown in FIG. 2A, FIG. 2B, and FIG. 2C, different configurations of the bypass path 131 are shown. Furthermore, in the above embodiment, the bypass switches (S1, S2...Sn) may be MOS tube switches, the resistance of which is equivalent to the branch resistance Rt (or equivalent) corresponding to the second branch 130. The resistance value of the effective resistor (effective resistor) has almost no effect. Of course, in other embodiments, the bypass switches (S1, S2...Sn) can also use other switches with extremely low resistance to avoid affecting the resistance of the branch resistor Rt corresponding to the second branch 130. .

Compared with the above-mentioned transistor in the first branch 120 using a PNP transistor, in this embodiment, the transistor P4 uses a PMOS transistor. Considering that the voltage between the source and the gate of the PMOS transistor has a negative Temperature coefficient, therefore, a temperature-independent output voltage Vbgh can be obtained, and Vbgh can be adjusted through the second resistor.

Continuing to refer to 1, in this embodiment, the PTAT current generating circuit can generate a current proportional to the absolute temperature (Proportional To Absolute Temperature, referred to as PTAT). The circuit includes a first P-type current mirror and a first N-type current mirror; the first end of the first P-type current mirror is connected to a power supply terminal VDD, and the second end of the first P-type current mirror is connected to The first end of the first N-type current mirror; the second end of the first N-type current mirror is grounded. Further, the first P-type current mirror includes a first PMOS transistor P1, a second PMOS transistor P2 and a third PMOS transistor P3; the first N-type current mirror includes a first NMOS transistor N1 and a third PMOS transistor P3. Two NMOS transistors N2; the PTAT circuit also includes a reference resistor Rref; wherein one end of the reference resistor Rref is connected to the source of the second NMOS transistor N2, and the other end of the reference resistor Rref is connected to ground; the first NMOS The drain of the tube N1 is respectively connected to the drain of the first PMOS tube P1, the gate of the first NMOS tube N1 and the gate of the second NMOS tube N2; the drain of the second NMOS tube N2 The gate of the first PMOS transistor P1, the gate of the second PMOS transistor P2, the drain of the second PMOS transistor P2 and the gate of the third PMOS transistor P3 are respectively connected; the third The drain of the PMOS transistor P3 is connected proportionally to the output node A of the absolute temperature current generation (PTAT) circuit. In some embodiments, the bandgap reference voltage source circuit further includes a startup circuit configured to generate an initial voltage of node PB and an initial voltage of node NB. It should be noted that the output node A of the PTAT current generating circuit serves as the output node of the reference current generating module 110 .

Of course, the form of the PTAT current generating circuit is not limited to the form shown in Figure 1, and other forms can also be adopted as long as it can generate a current with a positive temperature coefficient. In some other embodiments, the first PMOS transistor P1 and the second PMOS transistor P2 may adopt a cascode structure to improve the impact of trench length adjustment, as shown in FIG. 4 . Or, in some other embodiments, the current proportional to the absolute temperature is generated through the PMOS transistor, and the first NMOS transistor N1 and the second NMOS transistor N2 adopt a cascode structure, as shown in FIG. 5 .

Specifically, referring to FIG. 4 , the PTAT current generating circuit 140 includes a first P-type current mirror and a first N-type current mirror. Wherein, the first P-type current mirror includes three branches. The first branch includes the first PMOS transistor P1 and the fifth PMOS transistor P5, the second branch includes the second PMOS transistor P2 and the sixth PMOS transistor P6, and the third branch includes the third PMOS transistor P3 and the seventh PMOS transistor P7. . The sources of the first PMOS transistor P1, the second PMOS transistor P2 and the third PMOS transistor P3 are connected to the power supply terminal VDD, and the gates of the first PMOS transistor P1, the second PMOS transistor P2 and the third PMOS transistor P3 are connected to the common node PB1. The source of the fifth PMOS transistor P5 is connected to the drain of the first PMOS transistor P1, the source of the sixth PMOS transistor P6 is connected to the drain of the second PMOS transistor P2, and the source of the seventh PMOS transistor P7 is connected to the third PMOS transistor P3. The drains and gates of the fifth PMOS transistor P5, the sixth PMOS transistor P6 and the seventh PMOS transistor P7 are connected to the common node PB2. The first N-type current mirror includes a first NMOS transistor N1, a second NMOS transistor N2 and a reference resistor Rref. The drain of the first NMOS transistor N1 is connected to the drain of the fifth PMOS transistor P5, and the drain of the second NMOS transistor N2 is connected to the drain of the sixth and fifth PMOS transistor P6. The gate of the first NMOS transistor N1, the gate of the second NMOS transistor N2, and the drain of the second NMOS transistor N2 are connected to the common node NB. The source of the first NMOS transistor N1 is grounded. One end of the reference resistor Rref is connected to the source of the second NMOS transistor N2, and the other end of the reference resistor Rref is connected to ground. The drain of the seventh PMOS transistor P7 is connected to the output node A of the PTAT current generating circuit 140 .

In addition, as shown in FIG. 4 , the reference current generation module 110 with the PTAT current generation circuit 140 also includes a self-bias voltage generation circuit 150 . The PTAT current generating circuit 140 is connected to the self-bias voltage generating circuit 150 . Specifically, the first output terminal of the self-bias voltage generating circuit 150 is respectively connected to the gate of the first PMOS transistor P1, the gate of the second PMOS transistor P2, and the gate of the third PMOS transistor P3. The second output terminal of the self-bias voltage generating circuit 150 is respectively connected to the gate of the fifth PMOS transistor P5, the gate of the sixth PMOS transistor P6 and the gate of the seventh PMOS transistor P7. ; The input terminals of the self-bias voltage generating circuit 150 are respectively connected to the drain of the first NMOS transistor N1 and the drain of the fifth PMOS transistor P5. The self-bias voltage generating circuit 150 is used to obtain the drain voltage of the first NMOS transistor N1 and output the first bias power supply voltage PB1 and the second bias power supply voltage PB2 respectively. In addition, the bias voltage NB acts on the connection point between the gate of the first NMOS transistor N1 and the gate of the second NMOS transistor N2.

Specifically, referring to FIG. 5 , the PTAT current generating circuit 140 includes: a first PMOS transistor P1, a second PMOS transistor P2, a third PMOS transistor P3, a first NMOS transistor N1, a second NMOS transistor N2, and a third NMOS transistor. N3, the fourth NMOS transistor N4 and the reference resistor Rref. Wherein, the source of the first PMOS transistor P1 is respectively connected to the power supply terminal VDD, one end of the reference resistor Rref, and the source of the third PMOS transistor. The gate of the first PMOS transistor is connected to the gate of the second PMOS transistor P2 and the second PMOS transistor P2. The drain of the PMOS transistor P2 and the drain of the fourth NMOS transistor N4, and the drain of the first PMOS transistor P1 are connected to the drain of the third NMOS transistor. The gate of the third NMOS transistor N3 is connected to the gate of the fourth NMOS transistor N4, and the source of the third NMOS transistor N3 is connected to the drain of the first NMOS transistor N1. The gate of the first NMOS transistor N1 is connected to the gate of the second NMOS transistor N2, and the source of the first NMOS transistor N1 is connected to the ground. One end of the reference resistor Rref is connected to the power supply terminal VDD, and the other end of the reference resistor Rref is connected to the source of the second PMOS transistor P2. The gate of the second PMOS transistor P2 is connected to the drain of the second PMOS transistor P2 and the drain of the fourth NMOS transistor N4 respectively, and the drain of the second PMOS transistor P2 is connected to the drain of the fourth NMOS transistor N4. The source of the fourth NMOS transistor N4 is connected to the drain of the second NMOS transistor N2. The source of the second NMOS transistor N2 is grounded. The source of the third PMOS transistor P3 is connected to the power terminal VDD. The drain of the third PMOS transistor P3 is connected to the output node A of the PTAT current generating circuit 140 .

In addition, as shown in FIG. 5 , the reference current generation module 110 with the PTAT current generation circuit 140 also includes a self-bias voltage generation circuit 150 . The PTAT current generating circuit 140 is connected to the self-bias voltage generating circuit 150 . Specifically, the first output terminal of the self-bias voltage generating circuit 150 is respectively connected to the gate of the third NMOS transistor N3, the gate of the fourth NMOS transistor N4, and the gate of the third PMOS transistor P3. pole; the second output terminal of the self-bias voltage generating circuit 150 is respectively connected to the gate of the first NMOS transistor N1 and the gate of the second NMOS transistor N2; the self-bias voltage generating circuit 150 The input terminals are respectively connected to the drain of the first PMOS transistor P1 and the drain of the third NMOS transistor N3. The self-bias voltage generating circuit 150 is used to adjust the bias voltage NB and the gate voltage of the third PMOS transistor P3 according to the source voltage of the first PMOS transistor P1. In addition, the bias voltage PB acts on the connection point between the gate of the first PMOS transistor P1 and the gate of the second PMOS transistor P2.

Continuing to refer to Figure 1, in this embodiment, the PTAT current generation circuit includes a first P-type current mirror, which includes a first PMOS transistor P1, a second PMOS transistor P2, and a third PMOS transistor P3. . Specifically, since the first PMOS transistor P1, the second PMOS transistor P2 and the third PMOS transistor P3 have a common gate structure, the ratio of the current flowing through the third PMOS transistor P3 to the current flowing through the second PMOS transistor P2 is equal to The width-to-length ratio of the third PMOS transistor P3 is compared with the width-to-length ratio of the second PMOS transistor P2. If the length and width of the third PMOS transistor P3 are equal to the length and width of the second PMOS transistor P2, the current flowing through the third PMOS transistor P3 is equal to the current flowing through the second PMOS transistor P2.

The PTAT current generating circuit further includes a first N-type current mirror, which includes a first NMOS transistor N1 and a second NMOS transistor N2. The first NMOS transistor N1 and the second NMOS transistor N2 generate a current I0, and the current I0 is a PATA current. Therefore, through the first P-type current mirror and the first N-type current mirror, the current I0 can be copied to the third PMOS transistor P3.

It is assumed that when the current flowing through the third PMOS transistor P3 is equal to the current flowing through the second PMOS transistor P2, the first NMOS transistor N1 and the second NMOS transistor N2 operate in the sub-threshold region. Therefore, the bandgap reference voltage Vbgh on the output node A of the PTAT current generating circuit 140 is equal to the sum of the source-drain voltage of the transistor P4 and the voltage generated by the first resistor. Furthermore, the source-drain voltage of the transistor P4 is equal to the source-gate voltage of the transistor P4 and the gate-drain voltage of the transistor P4, and the gate-drain voltage of the transistor P4 is equal to the voltage generated by the second resistor R2. In other words, the bandgap reference voltage

Vbgh＝I1*R1+VGS4+R2*It＝(I0-It)*R1+VGS4+R2*It＝(Rt*(I0+VGS4/R1)+

Rt/R1*VOS)/(1+Rt/R1), where VOS=R2/Rt*Vbgh, VOS is the voltage of the common node B of the second resistor R2 and the third resistor R3, R2 is the second resistor, and Rt is The branch resistance (or equivalent resistance) of the second branch 130, VGS4 is the voltage between the source and gate of the transistor P4, R1 is the first resistance, I0 = ηVt/Rref*ln (K2/K1) , K2/K1 represents the ratio of channel width to length of the second NMOS tube and the first NMOS tube, eta is a fixed number, Vt is the thermoelectric potential, and has a positive temperature coefficient. According to the above band gap reference voltage formula, it can be known that by reasonably selecting the relevant resistors in the formula, the band gap reference voltage Vbgh with zero temperature coefficient can be obtained. The voltage VOS of the common node B has nothing to do with temperature, and is only a proportional value of the bandgap reference voltage Vbgh (that is, the ratio of the branch resistance Rt to the second resistance R2, that is, R2/Rt). As mentioned above, when the resistance of the second resistor R2 is changed, the voltage value of the bandgap reference voltage Vbgh can be changed arbitrarily within a certain range without affecting the temperature coefficient of the bandgap reference voltage Vbgh, so that the bandgap reference voltage The setting of Vbgh has great flexibility.

Referring to FIGS. 1 and 3 , FIG. 3 is a schematic structural diagram of a bandgap reference voltage source circuit in yet another embodiment of the present application. In this embodiment, except for the different form of the third resistor R3 in the second branch 130, the rest of the circuit structure is the same as the circuit structure shown in FIG. 1 or the circuit structure shown in FIGS. 2A to 2C. In this embodiment, the second resistor R2 may be in the form of the second resistor R2 as shown in FIG. 1 or in the form of the second resistor R2 as shown in FIGS. 2A to 2C . Here, the form of the second resistor R2 will not be described in detail.

In this embodiment, the first end of the third resistor R3 is connected to the output node of the reference current generating module 110 (ie, the output node A of the PTAT current generating circuit), and the second end of the third resistor R3 is connected to the The control electrode of transistor P4. When the transistor P4 is a PMOS transistor, the second end of the third resistor R3 is connected to the gate of the transistor P4.

Preferably, the third resistor R3 includes a plurality of third sub-resistors (R3a, R3b, R3c, etc.) connected in series between the output node of the reference current generating module 110 and the control electrode of the transistor P4. Each third sub-resistor (R3a, R3b, R3c, etc.) includes a first end close to the output node A of the reference current generating module 110 and a second end close to the control electrode of the transistor P4. At the same time, the bandgap reference voltage source circuit 100 also includes a plurality of selection switches (K1, K2...Kn), and the first end of each selection switch (K1, K2...Kn) is connected to a corresponding third sub-resistor. (R3a, R3b, R3c, etc.) and the second end of each selection switch (K1, K2...Kn) are connected to a common node, where the common node is the second resistor and the third resistor close to the control electrode of the transistor. The connection node between the three sub-resistors. Therefore, by selecting the selector switch (K1, K2...Kn), one of the selector switches (K1, K2...Kn) is in a closed state, thereby adjusting the output voltage Vbg. Even when the bandgap reference voltage Vbgh of the reference current generating module 110 deviates from a predetermined value due to process deviations of circuit devices, the voltage value of the output voltage Vbg reaches the design target value through the above-mentioned plurality of selection switches.

In this embodiment, as shown in FIG. 3 , when the first selection switch K1 is in a closed state and the other selection switches are in an off state, the voltage value of the output voltage Vbg is equal to the voltage value of the band gap reference voltage Vbgh. When the Nth selection switch Kn is closed and the other selection switches are off, the voltage value of the output voltage Vbg is equal to the voltage value of the ratio of the first equivalent resistance and the second equivalent resistance to the band gap reference voltage Vbgh. The value obtained by the product of The total resistance of resistor R2 and third resistor R3.

In addition, in the embodiment shown in Figure 3, the selection switches (K1, K2...Kn) are CMOS tube switches, capable of transmitting high and low voltages and providing the output voltage Vbg. When using CMOS tube switches, only one CMOS tube is closed at a time, and the other CMOS tube switches are off. The type of the selector switch is not limited to a CMOS transistor switch, and may also be a PMOS transistor switch or an NMOS transistor switch. When a PMOS tube switch or an NMOS tube switch is used, only a single PMOS tube or NMOS tube is needed to complete the selection function. Compared with using a CMOS tube switch, this design can save the area of the circuit layout and simplify the connections.

In addition, in the embodiment shown in FIG. 3 , the number of adjustable gears of the output voltage Vbg can be determined according to design requirements, such as 8 gears or 16 gears.

As mentioned above, when the bandgap reference voltage source circuit 100 is designed to include: the reference current generating module 110, the first resistor R1, the transistor P4 and the second resistor R2, where the first resistor R1 and the transistor P4 are arranged in series, so The first terminal of the first resistor R1 is connected to the output node of the reference current generating module 110 , and the second terminal of the first resistor R1 is connected to the first pole of the transistor P4. The second electrode and the control electrode of the transistor P4 are connected to the ground, and the second resistor R2 is connected between the output node of the reference current generating module 110 and the ground. When the transistor P4 is a PMOS transistor, in this case, the output voltage Vbg is 0.51V, which may be lower than some target values of the output voltage. When the bandgap reference voltage source circuit 100 is designed with the circuit structure as shown in Figure 1, by selecting an appropriate second resistor R2, the voltage of the transistor P4 is greater than or equal to 0.1V, so that the output voltage Vbg is greater than or equal to 0.6V. , thereby meeting the requirements of the target value of the output voltage. At the same time, the current value of the branch current It of the second branch 130 can be maintained at more than half of the reference current, thereby improving the anti-noise performance. Specifically refer to the waveform shown in 6 (where the abscissa is temperature and the ordinate is voltage), when the output voltage Vbg increases to 0.651V, the branch current It of the second branch 130 remains at 0.455μA, and the common node B The voltage is 0.14V. The temperature coefficient of the output voltage Vbg remains basically the same. If it is necessary to provide an output voltage Vbg with a larger voltage value, it is only necessary to increase the resistance value of the second resistor R2 in the second branch 130 .

Similarly, referring to Figure 7 (where the abscissa is temperature and the ordinate is voltage), if the resistance of the second resistor R2 in the second branch 130 is changed, for example, from 310K ohms to 645K ohms, and the band gap reference When other circuit device parameters of the voltage source circuit 100 remain unchanged, the voltage value of the output voltage Vbg can change from 0.651V to 0.801V; the current value of the reference current I3 in Figure 7 is the same as the current value of the reference current I3 in Figure 6 Roughly the same, so, the current value of the branch current in Figure 7 is 0.460μA, which is not much different from the current value of the branch current in Figure 6, 0.455μA; the trend of the output voltage Vbg changing with temperature in Figure 7 is the same as that in Figure 7 The trend of the output voltage Vbg changing with temperature in 6 is basically the same.

The bandgap reference voltage source circuit 100 described in the present application can realize that the reference voltage is not limited by changes in process, temperature, etc., and can adjust the range of the bandgap reference voltage arbitrarily within a certain range, thereby enhancing the bandgap reference voltage source. Circuit design flexibility. Moreover, since the range of the bandgap reference voltage is relatively large, the adjustable range of the output voltage Vbg is also correspondingly large when mass-producing the bandgap reference voltage source circuit, thereby improving the yield of the circuit. In addition, the branch current of the second branch 130 of the bandgap reference voltage source circuit 100 is relatively large, which can improve the anti-noise performance. Furthermore, the plurality of selection switches provided in the second branch 130 use NMOS transistors to simplify the circuit and connections.

Referring to FIG. 8 , the present application also provides an electronic device 800 . The electronic device 800 includes the above-mentioned bandgap reference voltage source circuit 100 , which will not be described again here. Therefore, the electronic device 800 can also generate a stable bandgap reference voltage. The voltage value of the bandgap reference voltage Vbgh is minimally affected by changes in process, temperature, and power supply. The impact can even be ignored, and can be achieved within a certain range. The range of the bandgap reference voltage Vbgh can be adjusted arbitrarily, thereby enhancing the design flexibility of the bandgap reference voltage source circuit 100 . Moreover, since the range of the bandgap reference voltage Vbgh is relatively large, the adjustable range of the output voltage Vbg is also correspondingly large when the bandgap reference voltage source circuit 100 is mass-produced, thereby meeting the design target value.

In some embodiments, the electronic device 800 is a non-volatile memory. Non-volatile memory refers to a type of memory that can retain data even after a power outage, that is, the stored data will not be lost after a power outage.

In the above embodiments, each embodiment is described with its own emphasis. For parts that are not described in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments.

The above is a detailed introduction to a bandgap reference voltage source circuit and electronic device provided by the embodiments of the present application. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only for To help understand the technical solutions and core ideas of this application; those of ordinary skill in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent substitutions for some of the technical features; and these modifications Or substitution does not cause the essence of the corresponding technical solution to depart from the scope of the technical solution of each embodiment of the present application.

Claims (17)

1. A bandgap reference voltage source circuit, characterized in that it includes: A reference current generation module is used to output a reference current that is positively related to temperature; first resistor; a transistor, a first pole of which is connected to the output node of the reference current generating module through the first resistor; and A second resistor. The first end of the second resistor is connected to the control electrode of the transistor. The second end of the second resistor and the second electrode of the transistor are connected to a common potential. The second resistor is adjustable. resistance. 2. The bandgap reference voltage source circuit according to claim 1, wherein the second end of the second resistor and the second pole of the transistor are grounded. 3. The bandgap reference voltage source circuit according to claim 1, wherein the transistor is a PMOS transistor. 4. The bandgap reference voltage source circuit according to claim 1, wherein the transistor is a PNP transistor, the first pole of the transistor is an emitter, and the second pole of the transistor is a collector. 5. The bandgap reference voltage source circuit according to claim 1, wherein the second resistor includes a plurality of second sub-resistors and a bypass path, and the plurality of second sub-resistors are connected in series to the transistor. Between the control pole and the second pole, the bypass path bypasses at least one of the plurality of second sub-resistors based on the selection signal. 6. The bandgap reference voltage source circuit according to claim 5, wherein the bypass path includes a plurality of bypass switches controlled by a selection signal, and the first end of each bypass switch is connected to a corresponding The first end of the second sub-resistor and the second end of each bypass switch are connected to the second end of the corresponding second sub-resistor. 7. The bandgap reference voltage source circuit according to claim 5, wherein the bypass path includes a plurality of bypass switches controlled by a selection signal, and each of the second sub-resistors has a resistor close to the transistor. The first end of the control pole and the second end close to the second pole of the transistor, the first end of each bypass switch is connected to the second pole of the transistor, and the third end of each bypass switch The two-terminal connection corresponds to the first terminal of the second sub-resistor. 8. The bandgap reference voltage source circuit according to claim 5, wherein the bypass path includes a plurality of bypass switches controlled by a selection signal, and each of the second sub-resistors has a resistor close to the transistor. The first end of the control electrode and the second end close to the second electrode of the transistor, the first end of each bypass switch is connected to the control electrode of the transistor, and the second end of each bypass switch The terminal is connected to the second terminal corresponding to the second sub-resistor. 9. The bandgap reference voltage source circuit according to any one of claims 6 to 8, characterized in that the bypass switch is a MOS transistor switch. 10. The bandgap reference voltage source circuit according to claim 1, characterized in that the bandgap reference voltage source circuit further includes a third resistor, the first end of the third resistor is connected to the output of the reference current generating module. node, the second end of the third resistor is connected to the control electrode of the transistor. 11. The bandgap reference voltage source circuit according to claim 1, characterized in that the bandgap reference voltage source circuit further comprises a plurality of circuits connected in series between the output node of the reference current generation module and the control electrode of the transistor. and a third sub-resistor, each of which includes a first end close to the output node of the reference current generating module and a second end close to the control electrode of the transistor. 12. The bandgap reference voltage source circuit according to claim 11, characterized in that the bandgap reference voltage source circuit further includes a plurality of selection switches, and the first end of each selection switch is connected to a corresponding third sub-switch. The first end of the resistor and the second end of each selection switch are connected to a common node, where the common node is the connection node between the second resistor and the third sub-resistor close to the control electrode of the transistor. 13. The bandgap reference voltage source circuit according to claim 1, wherein the reference current generating module includes a proportional to absolute temperature current generating circuit. 14. The bandgap reference voltage source circuit according to claim 13, wherein the proportional to absolute temperature current generating circuit includes a transistor operating in a sub-threshold region. 15. A bandgap reference voltage source circuit, characterized by comprising: Proportional to absolute temperature current generation circuit; first branch; and The second branch, The first branch and the second branch are connected in parallel between the output node of the proportional to absolute temperature current generating circuit and ground, and the first branch includes a first resistor and is used to provide a voltage complementary to the absolute temperature. a transistor, the first end of the first resistor is connected to the output node of the proportional to absolute temperature current generating circuit, the second end of the first resistor is connected to the first pole of the transistor, and the third end of the transistor is Two poles are grounded, the second branch includes a second resistor and a third resistor connected in series between the output node of the proportional to absolute temperature current generating circuit and ground, and the control electrode of the transistor is connected to the second The common node of the resistor and the third resistor, the second resistor being an adjustable resistor. 16. An electronic device, characterized in that the electronic device includes the bandgap reference voltage source circuit according to any one of claims 1 to 15. 17. The electronic device of claim 16, wherein the electronic device is a non-volatile memory.