CN114401584A - High-density interconnected circuit board interlayer interconnection structure and processing technology - Google Patents
High-density interconnected circuit board interlayer interconnection structure and processing technology Download PDFInfo
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- CN114401584A CN114401584A CN202111284469.9A CN202111284469A CN114401584A CN 114401584 A CN114401584 A CN 114401584A CN 202111284469 A CN202111284469 A CN 202111284469A CN 114401584 A CN114401584 A CN 114401584A
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- 239000011229 interlayer Substances 0.000 title claims abstract description 16
- 238000012545 processing Methods 0.000 title claims abstract description 15
- 238000005516 engineering process Methods 0.000 title claims abstract description 10
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 107
- 239000010949 copper Substances 0.000 claims abstract description 99
- 229910052802 copper Inorganic materials 0.000 claims abstract description 99
- 239000010410 layer Substances 0.000 claims abstract description 96
- 230000000149 penetrating effect Effects 0.000 claims abstract description 7
- 238000000034 method Methods 0.000 claims description 27
- 238000009713 electroplating Methods 0.000 claims description 16
- 239000012792 core layer Substances 0.000 claims description 14
- 238000005553 drilling Methods 0.000 claims description 6
- 239000011889 copper foil Substances 0.000 description 8
- 238000007747 plating Methods 0.000 description 4
- 238000005498 polishing Methods 0.000 description 3
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 2
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 238000010030 laminating Methods 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 238000007429 general method Methods 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 238000007731 hot pressing Methods 0.000 description 1
- 238000003754 machining Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 239000004745 nonwoven fabric Substances 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
- H05K1/0298—Multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/022—Processes for manufacturing precursors of printed circuits, i.e. copper-clad substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
The invention discloses an interlayer interconnection structure of a high-density interconnection circuit board, which comprises a core board layer, wherein the core board layer is provided with a through hole penetrating through the upper surface and the lower surface of the core board layer; the through holes are filled with copper, and copper layers are covered on the upper surface and the lower surface of the core plate layer; the copper layer is in contact with the copper in the via hole so that the two are electrically conducted, and the surface of the copper layer is flat. According to the interlayer interconnection structure of the high-density interconnection circuit board, the blind holes can be processed at the positions corresponding to the through holes, so that the wiring density is improved. The invention also discloses a processing technology of the interlayer interconnection structure of the high-density interconnection circuit board.
Description
Technical Field
The invention relates to a circuit board, in particular to an interlayer interconnection structure of a high-density interconnection circuit board and a processing technology.
Background
In the traditional multilayer board, a plurality of substrates formed with circuits and adhesive material layers are alternately stacked and formed by hot pressing, and then the connection and conduction functions among the circuits of each layer are achieved by utilizing the processes of drilling and metallization in holes. Under the premise that electronic products tend to have multiple functions and complicated structures, the contact distance of integrated circuit components is reduced, the signal transmission speed is relatively increased, the number of connecting wires is increased, the length of wiring among the points is locally shortened, and high-density circuit arrangement and micro-via technology are required to achieve the aim. However, as the circuit density increases, the packaging method of the components is continuously updated, and in order to allow a limited PCB area to accommodate more components with higher performance, the aperture is further reduced in addition to the narrower the circuit width. In recent years, consumer electronic products are becoming more and more complex in multi-function, light, thin, short and small, and therefore, high-density interconnection printed circuit boards must be introduced in power design to meet the development requirements.
A general method of manufacturing a high density interconnect printed circuit board (HDI board) is as follows: firstly, an inner layer circuit is manufactured, then the inner layer circuit is conveyed to a laminating station to be superposed with a thermosetting semi-curing (B Stage) film and a copper foil for first laminating to obtain a core plate layer, after a blind hole and a through hole are drilled on the core plate layer, the blind hole and the through hole are simultaneously electroplated to form electric conduction of multiple layers of the core plate layer, at the moment, the through hole is not completely filled, resin is required to be adopted to fill the through hole, then other copper foil layers are continuously laminated on the core plate layer, and the blind hole is continuously drilled and electroplated to fill the blind hole to electrically conduct the other copper foil layers and the core plate layer.
Disclosure of Invention
In order to overcome the defects of the prior art, the invention aims to provide an interlayer interconnection structure of a high-density interconnection circuit board, and the invention aims to provide a processing technology of the interlayer interconnection structure of the high-density interconnection circuit board, which can process blind holes at positions corresponding to through holes so as to improve the wiring density.
One of the purposes of the invention is realized by adopting the following technical scheme:
an interlayer interconnection structure of a high-density interconnection circuit board comprises a core board layer, wherein a through hole penetrating through the upper surface and the lower surface of the core board layer is formed in the core board layer; the through holes are filled with copper, and copper layers are covered on the upper surface and the lower surface of the core plate layer; the copper layer is in contact with the copper in the through hole so that the copper layer and the through hole are electrically conducted, and the surface of the copper layer is flat.
The second purpose of the invention is realized by adopting the following technical scheme:
a processing technology of an interlayer interconnection structure of a high-density interconnection circuit board comprises the following steps:
step S1: a through hole penetrating through the upper surface and the lower surface of the core plate layer is formed in the core plate layer;
step S2: electroplating copper in the through hole by adopting an electroplating copper process to fill the through hole, and enabling the copper to cover the upper surface and the lower surface of the core plate layer to form copper layers;
step S3: and flattening the surface of the copper layer.
Further, in step S1, the through hole is processed by laser drilling.
Further, after step S1 and before step S2, the core board layers are subjected to desmearing processing.
Further, after step S1 and before step S2, the core board layers are subjected to deburring and burring.
Further, the surface of the copper layer is planarized by grinding in step S3.
Further, the copper layer is thinned in step S3.
Further, the surface of the copper layer is flattened to be thinner, and/or the copper layer is thinned by a copper thinning process after the surface of the copper layer is flattened in step S3.
Further, after step S1 and before step S2, the through holes of the core layer are electroless plated with copper, followed by flash plating the through holes with an effective forward current density of 4ASD and a reverse current density of 10-20 ASD.
Further, in step S2, the electroplating is performed with an effective forward current density of 4-6ASD, a reverse current density of 35-40ASD, and a reverse pulse time of 4 seconds.
Compared with the prior art, the invention has the beneficial effects that:
according to the high-density interconnected circuit board interlayer interconnection structure, the through holes are filled with copper, the surfaces of the copper layers which cover the upper surface and the lower surface of the core plate layer and are in through contact with the through holes are smooth, so that the copper foil layers are continuously pressed outside the copper layers in the follow-up process, blind holes are processed at the positions corresponding to the through holes, the problems of poor hole patterns of the blind holes and reliability caused by the influence of depressions and protrusions formed by copper filling on the follow-up blind holes are avoided, and therefore the wiring density and the processing reliability are improved.
According to the processing technology of the high-density interconnected circuit board interlayer interconnection structure, the through hole is filled with the electroplated copper, and the surface of the copper layer formed in the electroplating process is leveled, so that the subsequent copper foil layer is directly pressed and the blind hole is processed at the position corresponding to the through hole, and the problems of poor hole pattern of the blind hole and reliability caused by the influence of the depression and the protrusion formed by filling the copper on the subsequent blind hole opening are avoided, and therefore, the wiring density and the processing reliability are improved.
Drawings
FIG. 1 is a schematic structural view of a core layer of the present invention;
FIG. 2 is a schematic structural diagram of an interconnection structure between layers of the high-density interconnection circuit board according to the present invention;
fig. 3 is an enlarged view of a portion a of fig. 2 according to the present invention.
In the figure: 10. a core layer; 20. a through hole; 30. a copper layer; 40. a copper foil layer; 50. and (4) blind holes.
Detailed Description
Referring to fig. 2-3, the invention discloses an interlayer interconnection structure of a high-density interconnection circuit board, which comprises a core layer 10, wherein the core layer 10 is provided with a through hole 20 penetrating through the upper surface and the lower surface of the core layer; the through holes 20 are filled with copper, and the upper surface and the lower surface of the core plate layer 10 are covered with copper layers 30; the copper layer 30 is in contact with copper within the via 20 so that both are electrically conductive; the surface of the copper layer 30 is smooth; thus, the through holes 20 are filled with copper, and the surface of the copper layer 30 is smooth, so that the copper foil layer 40 can be directly pressed outside the copper layer 30 subsequently, and the blind holes 50 can be processed at the positions corresponding to the through holes 20, thereby avoiding the problems of poor hole patterns of the blind holes 50 and reliability caused by the influence of the pits and the bulges formed by filling copper on the subsequent opening of the blind holes 50, and further improving the wiring density and the processing reliability.
Referring to fig. 1-3, the invention also discloses a processing technology of the interlayer interconnection structure of the high-density interconnection circuit board, which comprises the following steps:
step S1: a through hole 20 penetrating through the upper surface and the lower surface of the core board layer 10 is formed;
step S2: electroplating copper in the through holes 20 by using an electroplating copper process to fill the through holes 20 and make the copper cover the upper and lower surfaces of the core layer 10 to form copper layers 30, it can be understood that, during electroplating, the through holes 20 are filled and the copper layers 30 are formed, and the copper layers 30 are in contact with the copper in the through holes 20 to realize electric conduction; in actual processing, when copper is filled into the through hole 20, the electroplating time is preferably long until the through hole 20 is filled to a position where the height of the formed recess or protrusion is not more than 15 um;
step S3: the surface of the copper layer 30 is planarized to avoid the formation of bumps or pits in the filled hole region.
In the process, the through hole 20 is filled with the electroplated copper, and the surface of the copper layer 30 formed in the electroplating process is leveled, so that the subsequent direct pressing of the copper foil layer 40 is facilitated, the blind hole 50 is processed at the position corresponding to the through hole 20, and the problems of poor hole shape of the blind hole 50 and reliability caused by the influence of the depression and the protrusion formed by filling the copper on the subsequent opening of the blind hole 50 are avoided, so that the wiring density and the processing reliability are improved.
Meanwhile, compared with the existing staggered arrangement mode, the through holes 20 and the blind holes 50 which are arranged in an overlapped mode can improve the heat dissipation capacity of the structure.
In the step S1, the through hole 20 is drilled by laser, and at this time, the laser drilling efficiency is high and is beneficial to machining a hole with a small aperture, and in practical application, the aperture of the through hole 20 is usually 0.2-0.25 mm.
Since dirt is generated after laser drilling, in the embodiment, after the step S1 and before the step S2, the core layer 10 is subjected to desmearing treatment, so that copper can be stably attached to the core layer 10 during subsequent copper electroplating; here, desmearing treatment may be performed through a desmear process.
Since laser drilling is adopted, after the step S1 and before the step S2, the core board layer 10 is subjected to deburring and burr removing operations, so as to ensure the flatness of the surface of the subsequent copper layer 30 and the firmness of copper attached to the core board layer 10; specifically, grinding is adopted to remove burrs and rough edges; more specifically, the grinding may be performed using a nonwoven fabric.
In step S3, the surface of copper layer 30 may be flattened by grinding, which is convenient for operation, and specifically, copper layer 30 may be ground by a ceramic grinding plate with high hardness to ensure effective grinding of copper layer 30.
In the operation, since the copper layer 30 formed by electroplating may have a thickness higher than the desired thickness of the copper layer 30, the copper layer 30 is also thinned in step 3 of the present embodiment.
Specifically, the surface of the copper layer 30 is leveled to make the copper layer 30 thinner, and it is understood that the thinning of the copper layer 30 is achieved at the same time as the leveling, specifically, when the polishing leveling is adopted, the copper can be eliminated by polishing the copper layer 30, and then the thinning is achieved, but the polishing thinning can only achieve the coarse thinning; therefore, in this embodiment, and/or after the surface of the copper layer 30 is planarized in step S3, the copper layer 30 is thinned through a copper thinning process, specifically, the copper thinning process is implemented by consuming copper through a chemical reaction between sulfuric acid or hydrochloric acid and copper; here, it is necessary to perform leveling before the copper thinning process to directly form a smooth surface after the subsequent copper thinning process is performed, and if the copper thinning process is performed after the copper thinning process is performed, the copper layer 30 cannot be well controlled to a desired thickness.
In the present embodiment, after step S1 and before step S2, the through hole 20 of the core layer 10 is electroless plated with copper, and then the through hole 20 is flash-plated with an effective forward current density of 4ASD and a reverse current density of 10-20 ASD; at this time, the flash plating is favorable for copper to be attached to the core plate layer 10 during subsequent copper electroplating; it should be understood that, in the flash plating, a flash layer is formed on the core layer 10, and in practice, the flash plating is preferably continued for a period of time of 4-5 um.
In this embodiment, the electroplating is performed at step S2 with an effective forward current density of 4-6ASD, a reverse current density of 35-40ASD, and a reverse pulse duration of 4 seconds to ensure that the through hole 20 can be filled.
The above embodiments are only preferred embodiments of the present invention, and the protection scope of the present invention is not limited thereby, and any insubstantial changes and substitutions made by those skilled in the art based on the present invention are within the protection scope of the present invention.
Claims (10)
1. An interlayer interconnection structure of a high-density interconnection circuit board is characterized by comprising a core board layer (10), wherein the core board layer (10) is provided with a through hole (20) penetrating through the upper surface and the lower surface of the core board layer; the through holes (20) are filled with copper, and the upper surface and the lower surface of the core plate layer (10) are covered with copper layers (30); the copper layer (30) is in contact with copper in the through-hole (20) so that both are electrically conducted, and the surface of the copper layer (30) is flat.
2. A processing technology of an interlayer interconnection structure of a high-density interconnection circuit board is characterized by comprising the following steps:
step S1: a through hole (20) penetrating through the upper surface and the lower surface of the core board layer (10) is formed;
step S2: electroplating copper in the through hole (20) by adopting a copper electroplating process to fill the through hole (20), and enabling the copper to cover the upper surface and the lower surface of the core plate layer (10) to form a copper layer (30);
step S3: the surface of the copper layer (30) is planarized.
3. The process for fabricating an interconnection structure between high-density interconnected circuit boards as claimed in claim 2, wherein the through holes (20) are processed by laser drilling in step S1.
4. The process for fabricating an interconnection structure between high-density interconnected circuit boards as claimed in claim 3, wherein the core layer (10) is desmeared after step S1 and before step S2.
5. The process for fabricating an interconnection structure between high-density interconnected circuit boards according to claim 4, wherein after step S1 and before step S2, the core layer (10) is deburred and burred.
6. The process for fabricating an interconnection structure between high-density interconnected circuit boards as claimed in claim 1, wherein the surface of the copper layer (30) is planarized by grinding in step S3.
7. The process for fabricating an interconnection structure between high-density interconnected circuit boards as claimed in claim 1, wherein the copper layer (30) is further thinned in step S3.
8. The process for fabricating an interconnection structure between high-density interconnected circuit boards as claimed in claim 7, wherein the copper layer (30) is further thinned when the surface of the copper layer (30) is planarized, and/or the copper layer (30) is thinned by a thinning copper process after the surface of the copper layer (30) is planarized in step S3.
9. The process of fabricating an interconnection structure between high-density interconnection circuit boards according to claim 1, wherein after step S1 and before step S2, the through holes (20) of the core layer (10) are electroless plated with copper, and then the through holes (20) are flash plated with an effective forward current density of 4ASD and a reverse current density of 10-20 ASD.
10. The process of fabricating an interconnection structure between high-density interconnection circuit boards according to claim 1, wherein the electroplating is performed at an effective forward current density of 4-6ASD, a reverse current density of 35-40ASD, and a reverse pulse time of 4 seconds in step S2.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111284469.9A CN114401584A (en) | 2021-11-01 | 2021-11-01 | High-density interconnected circuit board interlayer interconnection structure and processing technology |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111284469.9A CN114401584A (en) | 2021-11-01 | 2021-11-01 | High-density interconnected circuit board interlayer interconnection structure and processing technology |
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| Publication Number | Publication Date |
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| CN114401584A true CN114401584A (en) | 2022-04-26 |
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| CN202111284469.9A Pending CN114401584A (en) | 2021-11-01 | 2021-11-01 | High-density interconnected circuit board interlayer interconnection structure and processing technology |
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102595799A (en) * | 2011-12-30 | 2012-07-18 | 柏承科技(昆山)股份有限公司 | Manufacturing method of high-density interconnected printed circuit board |
| CN104754854A (en) * | 2013-12-30 | 2015-07-01 | 比亚迪股份有限公司 | Flexible circuit board and preparation method thereof |
| CN112261788A (en) * | 2020-10-22 | 2021-01-22 | 江门崇达电路技术有限公司 | Manufacturing method of thick copper high-density interconnection printed board |
| WO2021032775A1 (en) * | 2019-08-19 | 2021-02-25 | Atotech Deutschland Gmbh | Manufacturing sequences for high density interconnect printed circuit boards and a high density interconnect printed circuit board |
| CN113543493A (en) * | 2021-07-12 | 2021-10-22 | 上海嘉捷通电路科技股份有限公司 | Preparation method of Z-direction interconnection printed circuit board |
-
2021
- 2021-11-01 CN CN202111284469.9A patent/CN114401584A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102595799A (en) * | 2011-12-30 | 2012-07-18 | 柏承科技(昆山)股份有限公司 | Manufacturing method of high-density interconnected printed circuit board |
| CN104754854A (en) * | 2013-12-30 | 2015-07-01 | 比亚迪股份有限公司 | Flexible circuit board and preparation method thereof |
| WO2021032775A1 (en) * | 2019-08-19 | 2021-02-25 | Atotech Deutschland Gmbh | Manufacturing sequences for high density interconnect printed circuit boards and a high density interconnect printed circuit board |
| CN112261788A (en) * | 2020-10-22 | 2021-01-22 | 江门崇达电路技术有限公司 | Manufacturing method of thick copper high-density interconnection printed board |
| CN113543493A (en) * | 2021-07-12 | 2021-10-22 | 上海嘉捷通电路科技股份有限公司 | Preparation method of Z-direction interconnection printed circuit board |
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