CN114334323A

CN114334323A - Chip NTC thermistor and manufacturing method thereof

Info

Publication number: CN114334323A
Application number: CN202111682791.7A
Authority: CN
Inventors: 何宝家; 郭海; 易新龙; 陈先仁
Original assignee: Shenzhen Sunlord Electronics Co Ltd
Current assignee: Shenzhen Sunlord Electronics Co Ltd
Priority date: 2021-12-30
Filing date: 2021-12-30
Publication date: 2022-04-12
Anticipated expiration: 2041-12-30
Also published as: CN114334323B

Abstract

The application discloses a chip NTC thermistor and a manufacturing method thereof. The chip NTC thermistor comprises. This application is through setting up the mutual overlap of wide narrow electrode, when stromatolite technology or equipment fluctuation lead to certain layer electrode or multilayer electrode to appear along porcelain body length direction or porcelain body width direction's off normal, benefit from the mutual overlap of wide narrow electrode, effective overlapping area keeps unchangeable between layer and the layer to eliminate or reduce stromatolite technology or equipment fluctuation to the influence of unit resistance, keep the overall stability of unit resistance, promote the uniformity of product resistance and the stability of product, reliability.

Description

Chip NTC thermistor and manufacturing method thereof

Technical Field

The application relates to the technical field of electronic elements, in particular to a chip NTC thermistor and a manufacturing method thereof.

Background

Currently, the industry has a chip NTC thermistor for mass high-density mounting, which is widely used for temperature detection and temperature compensation. Among such chip components, there is a stacked-type multi-layer internal electrode NTC thermistor. Such an NTC thermistor includes a ceramic body in which a plurality of ceramic resistance layers and a plurality of internal electrodes are laminated, and terminal electrodes at both ends of the ceramic body. When the laminating process or equipment slightly fluctuates, a certain layer of electrode or a plurality of layers of electrodes may deviate along the length direction or the width direction of the ceramic body, and the unit resistor is influenced by the change of the opposite area of the adjacent electrode layers, so that the consistency of the resistance value of the product and the stability and the reliability of the product are influenced.

Disclosure of Invention

In view of the above, embodiments of the present application provide a chip NTC thermistor and a method for manufacturing the same to solve the above-mentioned problems in the background art.

The application provides a pair of piece formula NTC thermistor, include the ceramic layer and contain internal electrode layer and the termination electrode that a plurality of overlaps in the ceramic layer were arranged, the internal electrode layer with termination electrode electrical connection, adjacent two the width of internal electrode layer is different.

Optionally, the plurality of inner electrode layers include a first inner electrode layer, a third inner electrode layer and a second inner electrode layer disposed therebetween, which are arranged in an overlapping manner;

the first internal electrode layer comprises two wide electrodes which are separately arranged, the second internal electrode layer comprises one narrow electrode, and the third internal electrode layer comprises two wide electrodes which are separately arranged;

the two wide electrodes of the first internal electrode layer and the narrow electrodes of the second internal electrode layer are overlapped to form a unit resistor, and the narrow electrodes of the second internal electrode layer and the two wide electrodes of the third internal electrode layer are overlapped to form a unit resistor.

the first internal electrode layer comprises two narrow electrodes which are separately arranged, the second internal electrode layer comprises one wide electrode, and the third internal electrode layer comprises two narrow electrodes which are separately arranged;

the two narrow electrodes of the first internal electrode layer and the wide electrodes of the second internal electrode layer are overlapped to form a unit resistor, and the wide electrodes of the second internal electrode layer and the two narrow electrodes of the third internal electrode layer are overlapped to form a unit resistor.

the first internal electrode layer includes a narrow electrode and a wide electrode which are separately provided, the second internal electrode layer includes a wide electrode and a narrow electrode which are electrically connected, and the third internal electrode layer includes a narrow electrode and a wide electrode which are separately provided;

the narrow electrode of the first inner electrode layer and the wide electrode of the second inner electrode layer are overlapped to form a unit resistor, the wide electrode of the first inner electrode layer and the narrow electrode of the second inner electrode layer are overlapped to form a unit resistor, the wide electrode of the second inner electrode layer and the narrow electrode of the third inner electrode layer are overlapped to form a unit resistor, and the narrow electrode of the second inner electrode layer and the wide electrode of the third inner electrode layer are overlapped to form a unit resistor.

Optionally, the inner electrode layer is a silver palladium alloy layer.

Optionally, the inner layer of the terminal electrode is a silver layer, the middle layer is a nickel layer, and the outer layer is a tin layer.

Optionally, the ceramic layer is composed of two or more transition metal oxides.

The application provides a manufacturing method of a chip NTC thermistor, which comprises the following steps:

mixing two or more transition metal oxides to prepare slurry;

preparing the slurry into a substrate by a tape casting process;

printing a wide electrode pattern on one part of the substrate and printing a narrow electrode pattern on the other part of the substrate by a screen printing process to respectively obtain a wide electrode substrate printed with the wide electrode pattern and a narrow electrode substrate printed with the narrow electrode pattern or a substrate combined with the wide electrode pattern and the narrow electrode pattern;

laminating the residual substrate and the substrate printed with the electrode to form an electrode structure, and applying pressure to form an integral bar block;

and cutting the bar block into single NTC thermistors, sintering at high temperature, and then carrying out electroplating after the two ends are capped with electrodes.

Optionally, the substrate has a thickness of 10-100 μm.

The embodiment of the application provides a chip NTC thermistor and a manufacturing method thereof, and by arranging the mutual overlapping of the wide and narrow electrodes, when the fluctuation of the laminating process or equipment causes the deviation of a certain layer of electrode or a plurality of layers of electrodes along the length direction or the width direction of a ceramic body, the mutual overlapping of the wide and narrow electrodes is benefited, and the effective overlapping area between the layers is kept unchanged, so that the influence of the fluctuation of the laminating process or the equipment on the unit resistor is eliminated or reduced, the integral stability of the unit resistor is kept, and the consistency of the resistance of the product and the stability and reliability of the product are improved.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and together with the description, serve to explain the principles of the application. In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.

Fig. 1 is a schematic structural diagram of a chip NTC thermistor in the prior art;

FIG. 2 is a schematic structural diagram of another chip NTC thermistor in the prior art;

fig. 3 is a schematic structural view of a chip NTC thermistor according to a first embodiment of the present application;

fig. 4 is a schematic structural view of a chip NTC thermistor according to a second embodiment of the present application;

fig. 5 is a schematic structural view of a chip NTC thermistor according to a third embodiment of the present application.

The implementation, functional features and advantages of the objectives of the present application will be further explained with reference to the accompanying drawings. With the above figures, there are shown specific embodiments of the present application, which will be described in more detail below. These drawings and written description are not intended to limit the scope of the inventive concepts in any manner, but rather to illustrate the inventive concepts to those skilled in the art by reference to specific embodiments.

Detailed Description

In order to make the objects, technical solutions and advantages of the present application more clear, the technical solutions of the present application will be described below in conjunction with the embodiments and the accompanying drawings. It is to be understood that the embodiments described are only a few embodiments, and not all embodiments. Based on the embodiments in the present application, the following respective embodiments and technical features thereof may be combined with each other without conflict.

Currently, there is a chip type NTC thermistor available for high-density mass mounting, which is widely used for temperature detection and compensation, and among such chip components, there is a stacked type multi-layer inner electrode NTC thermistor. When the laminating process or equipment of the NTC thermistor slightly fluctuates, a certain layer of electrode or a plurality of layers of electrodes may deviate along the length direction of the ceramic body or the width direction of the ceramic body, and the unit resistor is influenced by the change of the opposite area of the adjacent electrode layers, so that the consistency of the resistance value of the product and the stability and reliability of the product are influenced.

Fig. 1 is a schematic structural diagram of a chip NTC thermistor in the prior art, which includes a front view, a side view and a top view. Referring to fig. 1, first layer internal electrodes 1a and 1b, second layer

internal electrodes

2a and 2b, and third layer

internal electrodes

3a and 3b are included in a ceramic body 4. In the whole sintering process, a plurality of middle thermal resistance layers 9 (which can be ceramic resistance layers) are integrally sintered, and the

end electrodes

7 and 8 are respectively arranged at two ends of the porcelain body 4 to wrap the end of the porcelain body. The surface thermistor layer 10 (which may be a ceramic resistor layer) mainly ensures the mechanical strength of the ceramic body 4 and protects the internal resistance of the ceramic body from the external environment. The number of layers and the thickness of the middle thermistor layer 9 can play a role in adjusting the resistance of the NTC thermistor.

One end of the first-layer internal electrode 1a and one end of the first-layer internal electrode 1b are on the same plane with a gap 1c therebetween. The other end of the first-layer internal electrode 1a is electrically connected to the terminal electrode 7, and the other end of the first-layer internal electrode 1b is electrically connected to the terminal electrode 8.

One end of the second layer internal electrode 2a and one end of the second layer internal electrode 2b are on the same plane, and a gap 2c is provided therebetween. The other end of the second internal electrode 2a is electrically connected to the terminal electrode 7, and the other end of the second internal electrode 2b is electrically connected to the terminal electrode 8.

One end of the third-layer internal electrode 3a and one end of the third-layer internal electrode 3b are on the same plane with a gap 3c therebetween. The other end of the third-layer internal electrode 3a is electrically connected to the terminal electrode 7, and the other end of the third-layer internal electrode 3b is electrically connected to the terminal electrode 8.

In the porcelain body 4, the

gaps

1c, 2c, 3c are alternately arranged along the direction in which the plurality of thermistor layers 9 are laminated. Further, the

gaps

1c, 2c, and 3c are arranged in a direction substantially perpendicular to the lamination direction of the porcelain body 4.

In the porcelain body 4, 5 and 6 are unit resistors, and the unit resistor 5 and the unit resistor 6 are connected in parallel with each other to form the main internal resistance of the porcelain body. Fig. 1 is a relatively common and basic electrode structure, but the disadvantage is also relatively obvious, that is, when slight fluctuation occurs in the lamination process or equipment, a certain layer of electrode or multiple layers of electrodes may have deviation along the length direction of the ceramic body or the width direction of the ceramic body, and the unit resistance is affected by the change of the facing area of the adjacent electrode layers, thereby affecting the consistency of the resistance value of the product and the stability and reliability of the product.

Fig. 2 is a schematic structural view of another chip NTC thermistor in the prior art, which includes a front view, a side view and a top view. Referring to fig. 2, first layer

internal electrodes

11a and 11b, second layer internal electrodes 12a, and third layer

internal electrodes

13a and 13b are included in a ceramic body 14. In the whole sintering process, the plurality of thermistor layers 19 are integrally sintered, and the

terminal electrodes

17 and 18 are respectively arranged at the two ends of the porcelain body 14 to wrap the end of the porcelain body. The surface thermal resistor layer 20 mainly ensures the mechanical strength of the porcelain body 14 and protects the internal resistance of the porcelain body from the external environment. The number and thickness of the intermediate thermistor layers 19 can play a role in adjusting the resistance of the NTC thermistor.

One end of the first-layer internal electrode 11a and one end of the first-layer internal electrode 11b are on the same plane with a gap 11c therebetween. The other end of the first-layer internal electrode 11a is electrically connected to the terminal electrode 17, and the other end of the first-layer internal electrode 11b is electrically connected to the terminal electrode 18.

The second internal electrode 12a is not electrically connected to the terminal electrode 17 or the terminal electrode 18. A gap 12b is provided between one end of the second internal electrode 12a and the terminal electrode 17, and a gap 12c is provided between the other end of the second internal electrode 12a and the terminal electrode 18.

One end of the third-layer internal electrode 13a and one end of the third-layer internal electrode 13b are on the same plane with a gap 13c therebetween. The other end of the third-layer internal electrode 13a is electrically connected to the terminal electrode 17, and the other end of the third-layer internal electrode 13b is electrically connected to the terminal electrode 18.

In the porcelain body 14, the

gaps

11c, 12b, 12c, and 13c are alternately arranged along the direction in which the plurality of thermistor layers 19 are laminated. Further, the

gaps

11c, 12b, 12c, and 13c are arranged in a direction substantially perpendicular to the lamination direction of the porcelain body 14.

In the

porcelain body

14, 15a, 15b and 16a, 16b are unit resistors, the unit resistor 15a is connected in series with the unit resistor 15b, the unit resistor 16a is connected in series with the unit resistor 16b, and the unit resistor 15a and the unit resistor 15b are connected in parallel with the unit resistor 16a and the unit resistor 16b, which constitute the main internal resistance of the porcelain body. Fig. 2 has certain advantages over fig. 1 because when a layer or multiple layers of electrodes are deviated along the length direction of the ceramic body, the

unit resistances

15a and 15b, and the

unit resistances

16a and 16b have an increase and a decrease in their facing areas, so that the unit resistances are increased and decreased, thereby ensuring the overall stability of the layer of unit resistances. However, the structure still cannot reduce or avoid the electrical influence caused by the deviation of the porcelain body in the width direction.

In order to solve the above problems, the present application provides a chip NTC thermistor capable of eliminating or reducing the influence of lamination process or device fluctuation on unit resistance based on the electrode structure shown in fig. 1 and 2, and a method of manufacturing the same. When the fluctuation of the lamination process or equipment causes the deviation of a certain layer of electrode or a plurality of layers of electrodes along the length direction of the ceramic body or the width direction of the ceramic body, the effective overlapping area between the layers is kept unchanged due to the mutual overlapping of the wide and narrow electrodes, so that the influence of the fluctuation of the lamination process or the equipment on the unit resistor is eliminated or reduced, the integral stability of the unit resistor is kept, and the consistency of the resistance value of the product and the stability and the reliability of the product are improved.

In a first aspect, embodiments of the present application provide a chip NTC thermistor. The chip NTC thermistor comprises a ceramic layer, a plurality of internal electrode layers and end electrodes, wherein the internal electrode layers and the end electrodes are contained in the ceramic layer and are arranged in an overlapped mode, the internal electrode layers are electrically connected with the end electrodes, and the width of every two adjacent internal electrode layers is different, namely the width of every two adjacent internal electrode layers is overlapped.

The embodiment of the application has the advantages that the wide and narrow electrodes are overlapped with each other, when the fluctuation of the lamination process or equipment causes a certain layer of electrode or multiple layers of electrodes to deviate along the length direction or the width direction of the ceramic body, the wide and narrow electrodes are overlapped with each other, the effective overlapping area between layers is kept unchanged, the influence of the fluctuation of the lamination process or equipment on the unit resistor is eliminated or reduced, the whole stability of the unit resistor is kept, and the consistency of the resistance value of the product and the stability and reliability of the product are improved. Specific overlapping structures of the wide and narrow electrodes will be described in detail in the following embodiments.

Fig. 3 is a schematic structural view of a chip NTC thermistor according to a first embodiment of the present application, including a front view, a side view, and a plan view. Referring to fig. 3, the electrode structure includes a first inner electrode layer, a third inner electrode layer and a second inner electrode layer disposed therebetween. The first internal electrode layer includes two

wide electrodes

21a and 21b (hereinafter referred to as first-layer internal electrodes) separately provided, the second internal electrode layer includes one narrow electrode 22a (hereinafter referred to as second-layer internal electrodes), and the third internal electrode layer includes two

wide electrodes

23a and 23b (hereinafter referred to as third-layer internal electrodes) separately provided.

The first

internal electrodes

21a and 21b, the second internal electrodes 22a, the third

internal electrodes

23a and 23b, the intermediate thermistor layers 29, and the surface thermistor layers 30 are laminated and contained in ceramic layers to form a ceramic body 24, and the terminal electrodes 27 and 28 are respectively provided at both ends of the ceramic body 24 to surround the ends of the ceramic body.

One end of the first-layer internal electrode 21a and one end of the first-layer internal electrode 21b are on the same plane with a gap 21c therebetween. The other end of the first-layer internal electrode 21a is electrically connected to the terminal electrode 27, and the other end of the first-layer internal electrode 21b is electrically connected to the terminal electrode 28.

The second internal electrode 22a is not electrically connected to the terminal electrode 27 and the terminal electrode 28, a gap 22b is provided between one end of the second internal electrode 22a and the terminal electrode 27, and a gap 22c is provided between the other end of the second internal electrode 22a and the terminal electrode 28.

One end of the third-layer internal electrode 23a and one end of the third-layer internal electrode 23b are on the same plane with a gap 23c therebetween. The other end of the third-layer internal electrode 23a is electrically connected to the terminal electrode 27, and the other end of the third-layer internal electrode 23b is electrically connected to the terminal electrode 28.

In the porcelain body 24,

gaps

21c, 22b, 22c, and 23c are alternately arranged along the direction in which the plurality of thermistor layers 29 are laminated. Further, the

gaps

21c, 22b, 22c, and 23c are arranged in a direction substantially perpendicular to the lamination direction of the porcelain body 24.

In the porcelain body 24, the first-layer

internal electrodes

21a and 21b overlap with the second-layer internal electrodes 22a to form the

unit resistors

25a and 25b, and the second-layer internal electrodes 22a overlap with the third-layer

internal electrodes

23a and 23b to form the

unit resistors

26a and 26 b. The unit resistor 25a is connected in series with the unit resistor 25b, the unit resistor 26a is connected in series with the unit resistor 26b, and the unit resistor 25a and the unit resistor 25b are connected in parallel with the unit resistor 26a and the unit resistor 26b to form the main internal resistance of the porcelain body. Although the

gaps

21c, 22b, 22c, and 23c are also unit resistors, since their facing areas are extremely small, the resistance values are relatively large, and thus contribute little to the overall internal resistance.

In the porcelain 24, the functions of the surface thermistor layer 30 and the intermediate thermistor layer 29 are also different. The surface thermistor layer 30 mainly ensures the mechanical strength of the porcelain 24 and protects the internal resistance of the porcelain from the external environment. The number and thickness of the intermediate thermistor layers 29 may serve to adjust the resistance of the NTC thermistor.

In the electrode structure shown in fig. 3, if a certain layer of electrode or multiple layers of electrodes are deviated along the length direction or the width direction of the ceramic body, because the width electrodes of the adjacent electrode layers are opposite, the overlapping area can be kept unchanged to a certain extent, so that the influence of the lamination process or equipment fluctuation on the unit resistor is eliminated or reduced, the integral stability of the unit resistor is kept, and the consistency of the product resistance and the stability and reliability of the product are improved.

Fig. 4 is a schematic structural view of a chip NTC thermistor according to a second embodiment of the present application, including a front view, a side view, and a top view. Referring to fig. 4, the electrode structure includes a first inner electrode layer, a third inner electrode layer and a second inner electrode layer disposed therebetween. The first internal electrode layer includes two narrow electrodes 31a and 31b (hereinafter referred to as first-layer internal electrodes) separately provided, the second internal electrode layer includes one wide electrode 32a (hereinafter referred to as second-layer internal electrodes), and the third internal electrode layer includes two

narrow electrodes

33a and 33b (hereinafter referred to as third-layer internal electrodes) separately provided.

The first internal electrodes 31a and 31b, the second internal electrodes 32a, the third

internal electrodes

33a and 33b, the intermediate thermistor layers 39, and the surface thermistor layers 40 are laminated and contained in ceramic layers to form a ceramic body 34, and the

terminal electrodes

37 and 38 are respectively provided at both ends of the ceramic body 34 to wrap the ends of the ceramic body.

One end of the first-layer internal electrode 31a and one end of the first-layer internal electrode 31b are on the same plane with a gap 31c therebetween. The other end of the first-layer internal electrode 31a is electrically connected to the terminal electrode 37, and the other end of the first-layer internal electrode 31b is electrically connected to the terminal electrode 38.

The second internal electrode 32a is not electrically connected to the terminal electrode 37 and the terminal electrode 38, a gap 32b is provided between one end of the second internal electrode 32a and the terminal electrode 37, and a gap 32c is provided between the other end of the second internal electrode 32a and the terminal electrode 38.

One end of the third-layer internal electrode 33a and one end of the third-layer internal electrode 33b are on the same plane with a gap 33c therebetween. The other end of the third-layer internal electrode 33a is electrically connected to the terminal electrode 37, and the other end of the third-layer internal electrode 33b is electrically connected to the terminal electrode 38.

In the porcelain 34, the

gaps

31c, 32b, 32c, and 33c are alternately arranged along the direction in which the plurality of thermistor layers 39 are laminated. Further, the

gaps

31c, 32b, 32c, and 33c are arranged in a direction substantially perpendicular to the lamination direction of the porcelain body 34.

In the porcelain 34, the first-layer internal electrodes 31a and 31b overlap the second-layer internal electrodes 32a to form

unit resistors

35a and 35b, and the second-layer internal electrodes 32a overlap the third-layer

internal electrodes

33a and 33b to form

unit resistors

36a and 36 b. The unit resistor 35a is connected in series with the unit resistor 35b, the unit resistor 36a is connected in series with the unit resistor 36b, and the unit resistor 35a and the unit resistor 35b are connected in parallel with the unit resistor 36a and the unit resistor 36b to form the main internal resistor of the porcelain body. Although the

gaps

31c, 32b, 32c, and 33c are also unit resistors, since their facing areas are extremely small, the resistance values are relatively large, and thus contribute less to the overall internal resistance.

In the porcelain 34, the functions of the surface thermistor layer 40 and the intermediate thermistor layer 39 are also different. The surface thermistor layer 40 mainly ensures the mechanical strength of the porcelain 34 and protects the internal resistance of the porcelain from the external environment. The number and thickness of the intermediate thermistor layers 39 can play a role in adjusting the resistance of the NTC thermistor.

In the electrode structure shown in fig. 4, if a certain layer of electrode or multiple layers of electrodes are deviated along the length direction or the width direction of the ceramic body, because the width electrodes of the adjacent electrode layers are opposite, the overlapping area of the electrodes can be kept unchanged to a certain extent, so that the influence of the lamination process or equipment fluctuation on the unit resistor is eliminated or reduced, the integral stability of the unit resistor is kept, and the consistency of the product resistance and the stability and reliability of the product are improved.

Fig. 5 is a schematic structural view of a chip NTC thermistor according to a third embodiment of the present application, including a front view, a side view, and a plan view. Referring to fig. 5, the liquid crystal display device includes a first internal electrode layer, a third internal electrode layer and a second internal electrode layer disposed therebetween. The first internal electrode layer includes a narrow electrode 41a and a wide electrode 41b (hereinafter referred to as first-layer internal electrodes) separately provided, the second internal electrode layer includes a wide electrode 42a and a narrow electrode 42b electrically connected, and the third internal electrode layer includes a narrow electrode 43a and a wide electrode 43b (hereinafter referred to as third-layer internal electrodes) separately provided.

The first

internal electrodes

41a and 41b, the second

internal electrodes

42a and 42b, the third

internal electrodes

43a and 43b, the intermediate thermistor layers 49, and the surface thermistor layer 50 are laminated and contained in ceramic layers to form a ceramic body 44, and the

terminal electrodes

47 and 48 are respectively provided at both ends of the ceramic body 44 to wrap the ends of the ceramic body.

One end of the first-layer internal electrode 41a and one end of the first-layer internal electrode 41b are on the same plane with a gap 41c therebetween. The other end of the first-layer internal electrode 41a is electrically connected to the terminal electrode 47, and the other end of the first-layer internal electrode 41b is electrically connected to the terminal electrode 48.

The second

internal electrodes

42a and 42b are not electrically connected to the

terminal electrodes

47 and 48. The second layer

internal electrodes

42a and 42b are on the same plane. A gap 42c is provided between one end of the second internal electrode 42a and the terminal electrode 47, the other end of the second internal electrode 42a is electrically connected to the terminal electrode 42b, and a gap 42d is provided between the other end of the second internal electrode 42b and the terminal electrode 48.

One end of the third-layer internal electrode 43a and one end of the third-layer internal electrode 43b are on the same plane with a gap 43c therebetween. The other end of the third-layer internal electrode 43a is electrically connected to the terminal electrode 47, and the other end of the third-layer internal electrode 43b is electrically connected to the terminal electrode 48.

In the porcelain 44, the

gaps

41c, 42d, and 43c are alternately arranged along the direction in which the plurality of thermistor layers 49 are laminated. Further, the

gaps

41c, 42d, and 43c are arranged in a direction substantially perpendicular to the lamination direction of the porcelain body 44.

In the porcelain 44, the first-layer internal electrodes 41a and the second-layer internal electrodes 42a overlap to form the unit resistors 45a, and the first-layer internal electrodes 41b and the second-layer internal electrodes 42b overlap to form the unit resistors 45 b. The second layer internal electrode 42a and the third layer internal electrode 43a overlap to form a cell resistor 46a, and the second layer internal electrode 42b and the third layer internal electrode 43b overlap to form a cell resistor 46 b. The unit resistor 45a is connected in series with the unit resistor 45b, the unit resistor 46a is connected in series with the unit resistor 46b, and the unit resistor 45a and the unit resistor 45b are connected in parallel with the unit resistor 46a and the unit resistor 46b, which constitute the main internal resistor of the porcelain body. Although the

gaps

41c, 42d, and 43c are also unit resistors, since their facing areas are extremely small, the resistance values are relatively large, and thus contribute less to the overall internal resistance.

In the porcelain 44, the surface thermistor layer 50 and the intermediate thermistor layer 49 also have different functions. The surface thermistor layer 50 mainly ensures the mechanical strength of the porcelain 44 and protects the internal resistance of the porcelain from the external environment. The number and thickness of the intermediate thermistor layers 49 may serve to adjust the resistance of the NTC thermistor.

In the electrode structure shown in fig. 5, if a certain layer of electrode or multiple layers of electrodes are deviated along the length direction or the width direction of the ceramic body, the overlapping area of the adjacent electrode layers can be kept unchanged to a certain extent due to the fact that the width electrodes of the adjacent electrode layers are opposite, so that the influence of the lamination process or equipment fluctuation on the unit resistor is eliminated or reduced, the integral stability of the unit resistor is kept, and the consistency of the product resistance and the stability and reliability of the product are improved.

The electrode structures shown in fig. 3, 4, and 5 are all exemplified by three-layer electrodes. In practical application, the number of layers of the electrodes, the length and width of the electrodes and the thickness or number of layers of the middle ceramic resistance layer can be adjusted correspondingly according to needs.

In some embodiments, the inner electrode layers (including the first inner electrode layer, the second inner electrode layer and the third inner electrode layer) are silver-palladium alloy layers, and the conductivity is good.

In some embodiments, the terminal electrode has good conductivity because the inner layer is a silver layer, the middle layer is a nickel layer, and the outer layer is a tin layer.

In some embodiments, the ceramic layer is comprised of two or more transition metal oxides. The transition metal oxide comprises a transition metal and an oxide material. The transition metal may be manganese Mn, cobalt Co, nickel Ni, or the like. Most of transition metal oxides are insulators, which not only can play an insulating role, but also have various physical properties (including ferroelectricity, ferromagnetism, superconductors, thermoelectric effect, semiconductors, photoelectric effect, piezoelectric effect, magnetostriction, magnetoelasticity, magnetoelectric coupling, superfluid and the like), and can improve the stability and reliability of products.

The embodiment of the application also provides a manufacturing method of the chip NTC thermistor, which can be used for manufacturing the chip NTC thermistor in the embodiment. The method comprises the following steps:

(1) two or more transition metal oxides are mixed to prepare a slurry.

Through ball milling process, powder of mixed two or more transition metal oxides of Mn, Co, Ni, etc., plasticizer, adhesive and dispersant are prepared into slurry with excellent flowability in certain proportion.

(2) And preparing the slurry into a substrate through a tape casting process.

The film layer with the thickness of 10-100 μm is made into a square shape by a dry tape casting process and is used as a substrate.

(3) And printing a wide electrode pattern on one part of the substrate and printing a narrow electrode pattern on the other part of the substrate by a screen printing process to respectively obtain the wide electrode substrate printed with the wide electrode pattern and the narrow electrode substrate printed with the narrow electrode pattern or the substrate combined with the wide electrode pattern.

Taking the NTC thermistor shown in fig. 3 as an example, wide and long stripe-shaped electrodes for the

internal electrodes

21a, 21b, 23a and 23b are printed on one part of the substrate by a screen printing process, and narrow and long stripe-shaped electrodes for the internal electrode 22a are printed on the other part of the substrate, that is, it is necessary to print two kinds of stripe-shaped electrode patterns at minimum. After printing, a wide electrode substrate on which the

internal electrodes

21a, 21b, 23a, and 23b are printed and a narrow electrode substrate on which the internal electrodes 22a are printed, respectively, can be obtained.

It is understood that step (3) of the NTC thermistor shown in fig. 4 is the same as above, and is not described herein again.

It can also be understood that, in the NTC thermistor shown in fig. 5, in comparison with fig. 3 and 4, the combined electrodes of the wide and narrow strips for the

internal electrodes

42a and 42b are printed on the substrate by the screen printing process, and it is only necessary to print such an electrode at a minimum, and the overlapping property of the wide and narrow electrodes between layers can be realized by setting the shift amount at the time of lamination.

(4) The remaining substrate and the substrate with the printed electrodes are laminated to form an electrode structure and pressure is applied to form an integral bar.

And laminating the residual substrate, the wide electrode substrate and the narrow electrode substrate according to the required resistance specification and the structure shown in the figure 3 or the figure 4 or the figure 5, and applying certain pressure to press the residual substrate, the wide electrode substrate and the narrow electrode substrate to form an integral bar block.

(5) And cutting the bar block into single NTC thermistors, sintering at high temperature, and then carrying out electroplating after the two ends are capped with electrodes.

The bars are cut into individual semi-finished products according to a marking line previously made on the surface of the bars. The bar block is not sintered, so that the material is soft and easy to process, and various cutting schemes can be adopted for cutting. The semi-finished products are sintered at high temperature at the temperature of 1000-1300 ℃ to form the porcelain body. And (3) sealing the electrodes at two ends of the porcelain body, sintering the electrodes at high temperature and then electroplating. The NTC thermistor can be manufactured by adopting a common electroplating process, namely firstly plating nickel and then plating tin, and then cleaning and drying.

Taking the manufacture of the NTC thermistor shown in fig. 5 as an example:

the step (1) is the same as the step (1).

In the step (2), a six-inch thermal sensitive ceramic material film having a resistivity of 165. omega. m and a thickness of 30 μm was prepared as a substrate.

And (4) printing the combined electrode of the wide strip and the narrow strip for the internal electrode in the step (3), wherein the electrical design target is 100k omega. The wide electrode pattern printing width was 40 μm wider than the narrow electrode pattern printing width.

In the step (4), the substrate is normally laminated, the electrodes are three layers of electrodes shown in fig. 5, and when the electrode patterns are combined wide and narrow electrode patterns, in order to simulate the difference of the electrode structure shown in fig. 5 in resistance to lamination deviation in the width direction of the porcelain body compared with the electrode structure shown in fig. 2, the following three groups of test schemes are designed: the second layer of electrodes do not deviate towards the width direction of the ceramic body; secondly, the second layer of electrodes is manually deviated by 20 microns towards the width direction of the ceramic body; and thirdly, the second layer of electrodes is artificially deviated by 40 microns towards the width direction of the ceramic body. When the electrode pattern uses a common strip electrode pattern, the following three groups of test schemes are designed: the second layer of electrodes do not deviate towards the width direction of the ceramic body; artificially offsetting the second layer of electrode by 20 microns towards the width direction of the ceramic body; sixthly, artificially offsetting the second layer of electrode by 40 mu m towards the width direction of the ceramic body.

In step (5) the bars of the 6 different test protocols were cut into individual semi-finished products.

Step (6) is the same as step (6) described above.

The results obtained by testing the above 6 different test protocols are shown in the following table one:

table showing the rate of change of resistance values of different electrode structures at the same degree of deflection

Since the wide electrode pattern is 40 μm wider than the narrow electrode pattern during printing, the narrow electrode can tolerate a shift change of 20 μm in the width direction of the ceramic body. Therefore, theoretically, the deviation within 20 μm does not cause significant change in the electrical characteristics of the wide and narrow electrode structure.

As can be seen from the table I, when the experimental group and the control group were both artificially shifted by 20 μm, the resistance value change rate of the experimental group was-0.61%, the change rate was extremely small, and the resistance value of the control group was 3.91%. When the deviation is 40 μm, although the deviation exceeds the allowable value of 20 μm for the experimental wide and narrow electrode design, the resistance change rate is still small, only 1.66%, while the resistance change rate is as high as 9.58% when the deviation is 40 μm for the control group.

As described above, the wide-narrow electrode pattern according to the embodiment of the present application realizes the stability of the resistance value when the ceramic body is deviated in the width direction (the stability of the resistance value can be also maintained when the ceramic body is deviated in the length direction) by designing the wide-narrow overlap on the electrode structure, so as to improve the consistency of the resistance value of the NTC thermistor and the stability and reliability of the product.

The electrode structure and the test data shown in the examples of the present application are the NTC thermistor as an example, but the electrode structure can be applied to a PTC thermistor and other stacked resistance elements, and the examples of the present application are not particularly limited thereto.

Although the application has been shown and described with respect to one or more implementations, equivalent alterations and modifications will occur to others skilled in the art based upon a reading and understanding of this specification and the annexed drawings. This application is intended to embrace all such modifications and variations and is limited only by the scope of the appended claims. In particular regard to the various functions performed by the above described components, the terms used to describe such components are intended to correspond, unless otherwise indicated, to any component which performs the specified function of the described component (e.g., that is functionally equivalent), even though not structurally equivalent to the disclosed structure which performs the function in the herein illustrated exemplary implementations of the specification.

That is, the above description is only a part of the embodiments of the present application, and not intended to limit the scope of the present application, and all equivalent structural changes made by using the contents of the present specification and the drawings are included in the scope of the present application.

Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element, and that elements, features, or elements having the same designation in different embodiments may or may not have the same meaning as that of the other elements, and that the particular meaning will be determined by its interpretation in the particular embodiment or by its context in further embodiments.

The terms "or" and/or "are to be construed as inclusive or meaning any one or any combination. An exception to this definition will occur only when a combination of elements, functions, steps or operations are inherently mutually exclusive in some way.

In addition, although the terms "first, second, third, etc. are used herein to describe various information, such information should not be limited to these terms. These terms are only used to distinguish one type of information from another. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well. The terms "or" and/or "are to be construed as inclusive or meaning any one or any combination. An exception to this definition will occur only when a combination of elements, functions, steps or operations are inherently mutually exclusive in some way.

In this application, the word "in some embodiments" is used to mean "serving as an example, instance, or illustration. Any embodiment described herein as "in some embodiments" is not necessarily to be construed as preferred or advantageous over other embodiments. The previous description is provided to enable any person skilled in the art to make and use the present application. In the foregoing description, various details have been set forth for the purpose of explanation. It will be apparent to one of ordinary skill in the art that the present application may be practiced without these specific details. In other instances, well-known structures and processes are not shown in detail to avoid obscuring the description of the present application with unnecessary detail. Thus, the present application is not intended to be limited to the embodiments shown, but is to be accorded the widest scope consistent with the principles and features disclosed herein.

Claims

1. The chip NTC thermistor is characterized by comprising a ceramic layer, a plurality of internal electrode layers and end electrodes, wherein the internal electrode layers and the end electrodes are contained in the ceramic layer and are arranged in an overlapped mode, the internal electrode layers are electrically connected with the end electrodes, and the width of every two adjacent internal electrode layers is different.

2. The chip NTC thermistor according to claim 1, wherein the plurality of inner electrode layers comprise a first inner electrode layer, a third inner electrode layer and a second inner electrode layer disposed therebetween in an overlapping arrangement;

3. The chip NTC thermistor according to claim 1, wherein the plurality of inner electrode layers comprise a first inner electrode layer, a third inner electrode layer and a second inner electrode layer disposed therebetween in an overlapping arrangement;

4. The chip NTC thermistor according to claim 1, wherein the plurality of inner electrode layers comprise a first inner electrode layer, a third inner electrode layer and a second inner electrode layer disposed therebetween in an overlapping arrangement;

5. The chip NTC thermistor according to any of claims 1 to 4, characterized in that the inner electrode layer is a silver palladium alloy layer.

6. The chip NTC thermistor according to any of claims 1 to 4, characterized in that the inner layer of the terminal electrode is a silver layer, the middle layer is a nickel layer and the outer layer is a tin layer.

7. The chip NTC thermistor according to any of claims 1 to 4, characterized in that the ceramic layer is composed of two or more transition metal oxides.

8. A method for manufacturing a chip NTC thermistor is characterized by comprising the following steps:

mixing two or more transition metal oxides to prepare slurry;

preparing the slurry into a substrate by a tape casting process;

9. The method of claim 8, wherein the substrate has a thickness of 10-100 μm.