CN114325094B - Phase information measuring device and method - Google Patents
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- CN114325094B CN114325094B CN202111681561.9A CN202111681561A CN114325094B CN 114325094 B CN114325094 B CN 114325094B CN 202111681561 A CN202111681561 A CN 202111681561A CN 114325094 B CN114325094 B CN 114325094B
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Abstract
The invention provides a phase information measuring device and method, the measuring device includes: at least one path of phase information measuring circuit, wherein the phase information measuring circuit comprises: the power divider is used for performing power distribution on the input signal to generate a first power dividing signal and a second power dividing signal; the peak detection circuit is connected with the first output end of the power divider and used for extracting the peak voltage of the first power dividing signal and converting the peak voltage into a digital signal; the device comprises a field programmable gate array, a threshold control circuit, a high-speed discriminator, a first time calibration circuit, a zero-crossing detection circuit, a high-speed trigger, a second time calibration circuit, a selector and a counter. The phase information measuring device can comprise a multi-path phase information measuring circuit, converts phase information into time information, measures time by using the principle of amplitude and phase conversion of periodic signals, and can measure signals below 200MHz with high precision.
Description
Technical Field
The present invention relates to the field of electronic technologies, and in particular, to a phase information measuring device and method.
Background
Phase is a parameter describing the position of a particular waveform in a periodic cycle at a time, a scale of whether it is at a peak, trough or some point in between. Phase is generally one of the measures describing the variation of the waveform, generally in degrees (angle), also referred to as phase angle. The traditional phase measurement technology mainly uses an analog signal test method, such as direct measurement by using an oscilloscope, and multi-waveform display under linear scanning by using the oscilloscope is the most intuitive and simplest method, however, the method is simple and feasible but is limited by a test instrument, so that the measurement precision is low, and the current precision requirement cannot be met gradually. In addition, a digital method mainly uses a digital dedicated circuit, a microprocessor, a Field Programmable Gate Array (FPGA)/Complex Programmable Logic Device (CPLD), a Digital Signal Processor (DSP) and the like to form a phase measurement system, so that the precision of phase measurement is improved compared with the conventional analog method, and the method is widely applied to the current high-precision phase measurement, wherein a zero-crossing detection method is a conventional detection method implemented based on hardware in digital measurement, but because factors such as harmonic waves and noise interference have large influence on a measurement result, the application of the method in high-precision phase difference detection is limited. Therefore, in the existing phase measurement methods, in general, in the analog test method such as the oscilloscope test technology, the frequency is usually calculated according to the period, the phase measurement is actually the measurement of the phase difference, and the phase difference of two paths of signals is generally measured, so that the accurate initial phase information cannot be obtained, and meanwhile, the measurement accuracy is generally poor; the conventional zero-crossing detection method commonly used in the digital test method is susceptible to various interference factors, and the measurement accuracy is limited to a certain extent.
Therefore, how to improve the accuracy of phase information measurement has become one of the problems to be solved urgently by those skilled in the art.
Disclosure of Invention
In view of the above-mentioned shortcomings of the prior art, the present invention provides a phase information measuring device and method for obtaining accurate initial phase information and realizing high-precision phase measurement.
To achieve the above and other related objects, the present invention provides a phase information measuring device, comprising: at least one path of phase information measuring circuit, wherein the phase information measuring circuit comprises:
the power divider is used for carrying out power distribution on the input signal to generate a first power dividing signal and a second power dividing signal;
the peak detection circuit is connected with the first output end of the power divider and used for extracting the peak voltage of the first power dividing signal and converting the peak voltage into a digital signal;
the field programmable gate array is connected with the output end of the peak detection circuit and is used for compensating the time delay of the output signal of the peak detection circuit;
the threshold control circuit is connected with the output end of the field programmable gate array and outputs a threshold voltage based on a control signal of the field programmable gate array; wherein the threshold voltage is greater than zero and less than the peak voltage;
the high-speed discriminator is connected with the second output end of the power divider at a first input end, connected with the output end of the threshold control circuit at a second input end, and outputs a pulse when the second power dividing signal rises to the threshold voltage according to the voltage identification capability;
the first time calibration circuit is connected with the output end of the high-speed discriminator and is used for calibrating the time when the pulse is generated;
the zero-crossing detection circuit is used for monitoring the zero point of the input signal in real time;
the high-speed trigger is connected with the output end of the zero-crossing detection circuit and generates a trigger signal based on the zero point of the input signal;
the input end of the second time calibration circuit is connected with the output end of the high-speed trigger and is used for calibrating an initial phase when a zero-point event occurs;
the first selector is connected with the output ends of the first time calibration circuit and the second time calibration circuit and used for selecting one path of signal to be output;
and the counter is connected with the output end of the first selector and used for counting.
Optionally, the phase information measuring apparatus further includes: the standard reference clock circuit inputs a reference clock signal, and the output end of the standard reference clock circuit is connected with the second time calibration circuit and used for generating a standard clock signal; and the second time calibration circuit calibrates the initial phase when the zero time occurs based on the standard clock signal.
Optionally, the distribution ratio of the power divider is 1:1.
optionally, the phase information measuring device includes a second selector and at least two paths of the phase information measuring circuits; the output ends of the two paths of phase information measuring circuits are connected to the input end of the second selector, the output end of the second selector is connected with the counter, and the input signals of the two paths of phase information measuring circuits are the same.
More optionally, an output end of the first time calibration circuit in each of the phase information measurement circuits is connected to a first selector in another path of the phase information measurement circuits.
More optionally, the phase information measuring apparatus further includes a calculating unit, connected to the output end of the counter, for calculating a phase difference of signals output by the first time scaling circuit in different phase information measuring circuits, a phase difference of zero signals output by the second time scaling circuit in different phase information measuring circuits, and an average value of signals output by the first time scaling circuit in different phase information measuring circuits.
Optionally, the frequency of the input signal is not higher than a preset frequency.
Optionally, when the frequency of the input signal is higher than a preset frequency, the phase information measuring device further includes a down-conversion circuit; the frequency reducing circuit receives the input signal, and the output end of the frequency reducing circuit is connected with the power divider.
A phase information measuring method, comprising:
marking the initial phase time when the zero event occurs through a zero-crossing detection circuit;
performing power division processing on an input signal to generate a first power division signal and a second power division signal;
the first power division signal is input to a first input end of the high-speed discriminator; adjusting the threshold voltage of the first power division signal, outputting a pulse and recording the arrival time of the pulse when the second power division signal rises to the threshold voltage through the high-speed discriminator;
selecting initial phase information to be output through the first selector, and generating an initial phase event record through the counter; the phase information output of the threshold event is selected by a selector, and a threshold event record is generated by the counter.
Optionally, the threshold voltage satisfies formula (1)
Wherein V represents the value of the threshold voltage; v P Represents a voltage peak; n denotes the number of segments for the target measurement accuracy.
More optionally, the number of segments N satisfies formula (2)
Wherein T represents the period of the signal; t represents the measurement accuracy.
More optionally, when the phase information measuring circuit has at least two paths, the measurement accuracy can be improved by calculating the average output value of the first time calibration circuit and the second time calibration circuit in the multiple paths of the phase information measuring circuits.
More optionally, when the phase information measuring circuits are at least two paths, the phase difference of the signals output by the first time calibration circuit in different phase information measuring circuits is calculated to correct the phase when the event occurs.
More optionally, when the phase information measuring circuits are at least two paths, the phase difference of the signals output by the second time calibration circuit in different phase information measuring circuits is calculated to correct the initial phase.
As described above, the phase information measuring apparatus and method of the present invention have the following advantageous effects:
the phase information measuring device can comprise a multi-channel phase information measuring circuit, converts phase information into time information, measures time by using the principle of amplitude and phase conversion of periodic signals, and can measure signals below 200MHz with high precision.
2, the phase information measuring device of the invention can access the power divider after superheterodyne frequency conversion of signals exceeding 200MHz through the frequency reduction circuit, and has wide application range.
Drawings
Fig. 1 is a schematic structural diagram of a phase information measuring apparatus according to the present invention.
Description of the element reference
1. Power divider
2. Peak detection circuit
3. Field programmable gate array
4. Threshold control circuit
5. High-speed discriminator
6a first time calibration circuit
7. Zero-crossing detection circuit
8. High speed flip-flop
6b second time scaling circuit
9. Standard reference clock
10. First selector
11. Counter with a memory
12. Second selector
Detailed Description
The following embodiments of the present invention are provided by way of specific examples, and other advantages and effects of the present invention will be readily apparent to those skilled in the art from the disclosure herein. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.
Please refer to fig. 1. It should be noted that the drawings provided in the present embodiment are only for illustrating the basic idea of the present invention, and the drawings only show the components related to the present invention rather than being drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of each component in actual implementation may be changed arbitrarily, and the layout of the components may be more complicated.
Example one
As shown in fig. 1, the present embodiment provides a phase information measuring apparatus, which includes at least one phase information measuring circuit, where the phase information measuring circuit includes: the circuit comprises a power divider 1, a peak detection circuit 2, a field programmable gate array 3, a threshold control circuit 4, a high-speed discriminator 5, a first time calibration circuit 6a, a zero-crossing detection circuit 7, a high-speed trigger 8, a second time calibration circuit 6b, a first selector 10 and a counter 11.
As shown in fig. 1, the power divider 1 is configured to perform power distribution on an input signal to generate a first power division signal and a second power division signal.
Specifically, the distribution ratio of the power divider 1 is 1:1, the first power division signal and the second power division signal are the same.
More specifically, the frequency of the input signal is not higher than a preset frequency, and when the frequency of the input signal is higher than the preset frequency, the phase information measuring device further comprises a frequency reduction circuit; the frequency reduction circuit receives the input signal, and the output end of the frequency reduction circuit is connected with the power divider, so that the phase information measuring device is wider in application range. As an example, the preset frequency includes, but is not limited to, 50MHz, 100MHz, 150MHz, 200MHz, or 250MHz, and the value of the preset frequency may be selected according to a specific circuit, which is not limited to the embodiment.
As shown in fig. 1, the peak detection circuit 2 is connected to the first output terminal of the power divider 1, and is configured to extract a peak voltage of the first power division signal and convert the peak voltage into a digital signal.
Specifically, the peak detection circuit 2 outputs a peak voltage, and sends the peak voltage to the fpga for signal processing.
As shown in fig. 1, the field programmable gate array 3 is connected to the output end of the peak detection circuit 2, and is used for compensating the delay of the output signal of the peak detection circuit 2.
Specifically, the field programmable gate array 3 compensates for linear electrical delays of different frequencies corresponding to different input signals caused by a signal transmission link, and compensates for weak delays caused by the high-speed trigger 8 by an order of magnitude, thereby improving the accuracy of measurement.
As shown in fig. 1, the threshold control circuit 4 is connected to an output terminal of the field programmable gate array 3, and outputs a threshold voltage based on a control signal of the field programmable gate array 3. Wherein the threshold voltage is greater than zero and less than the peak voltage.
As shown in fig. 1, a first input end of the high-speed discriminator 5 is connected to a second output end of the power divider 1, a second input end of the high-speed discriminator is connected to an output end of the threshold control circuit 4, and a pulse is output when the second power division signal rises to the threshold voltage according to the voltage identification capability.
Specifically, the field programmable gate array 3 controls the threshold control circuit 4 to output the required threshold voltage with the peak voltage as a reference; the high-speed discriminator 5 outputs a pulse when the second power division signal rises to the threshold voltage by virtue of the voltage identification capability, and generates phase information by combining with the timestamp of the first time calibration circuit 6a, so as to obtain the phase information of the measured point; the phase information of the detected signal is obtained by converting the decomposition of the amplitude variation in the signal period into the phase characteristics at different time points.
As shown in fig. 1, the first time calibration circuit 6a is connected to the output end of the high-speed discriminator 5, and is used for calibrating the time when the pulse is generated.
As shown in fig. 1, the zero-crossing detection circuit 7 is used for monitoring the zero point of the input signal in real time.
As shown in fig. 1, the high-speed flip-flop 8 is connected to an output terminal of the zero-cross detection circuit 7, and generates a trigger signal based on a zero point of the input signal.
As shown in fig. 1, the input terminal of the second time scaling circuit 6b is connected to the output terminal of the high-speed flip-flop 8, and scales the initial phase when the zero point event occurs based on the trigger signal.
As shown in fig. 1, the first selector 10 is connected to the output ends of the first time scaling circuit 6a and the second time scaling circuit 6b, and is configured to select a signal output.
As shown in fig. 1, the counter 11 is connected to the output terminal of the first selector 10 for counting.
Specifically, during each measurement, the measured point generates an event record through the counter 11, the measured point and the time in the event record correspond to each other one by one, so that the uniqueness of the measurement result is ensured, and the comparison of event stamps is performed within a period with 1/f as the period, so as to ensure that cycle ambiguity can be resolved when cycles are repeated during the measurement process of the periodic signal. Wherein f represents the frequency of the input signal.
As an implementation manner of this embodiment, the phase information measuring apparatus further includes a standard reference time 9, which inputs a reference clock signal, and an output end of the standard reference time is connected to the second time calibration circuit 6b, for generating a standard clock signal; the second time calibration circuit 6b calibrates an initial phase when the zero point time occurs, based on the standard clock signal, where the initial phase is a unique and irreversible absolute position.
As another implementation manner of this embodiment, the phase information measuring apparatus includes a second selector 12 and at least two paths of the phase information measuring circuits; the output ends of the two paths of phase information measuring circuits are connected to the input end of the second selector 12, the output end of the second selector 12 is connected to the counter 11, and the input signals of the two paths of phase information measuring circuits are the same.
Specifically, the output end of the first time scaling circuit 6a in each phase information measuring circuit is connected to the first selector 10 in another path of the phase information measuring circuit; the output end of the first selector 10 in the two paths of phase information measuring circuits is connected with the input end of the second selector 12. Through setting up the multichannel phase information measuring circuit, calculate the output average value, reduce the error for the measuring result is more accurate.
As another implementation manner of this embodiment, the phase information measuring apparatus further includes a calculating unit, connected to the output end of the counter 11, for calculating a phase difference of signals output by the first time scaling circuit 6a in different phase information measuring circuits, a phase difference of zero signals output by the second time scaling circuit 6b in different phase information measuring circuits, and an average value of signals output by the first time scaling circuit 6a in different phase information measuring circuits. As shown in fig. 1, the calculating unit calculates an average value of the phases output by the first time calibration circuit 6a in the two paths of phase information measuring circuits, so as to reduce errors and make the measuring result more accurate; and calculating the phase difference of the zero initial phase output by the second time calibration circuit 6b in the two paths of phase information measuring circuits, and correcting the initial phase information of the input signal through the phase difference. The same first selector 10 is used for selecting the first time marking point circuit 6a in different phase information measuring circuits to carry out phase output, so that the delay of circuit signals can be reduced, and the time marking is more accurate.
The phase information measuring device can comprise a multi-path phase information measuring circuit, converts phase information into time information, measures time by using the principle of periodic signal amplitude phase conversion, and can measure signals below 200MHz with high precision; for signals exceeding 200MHz, the power divider can be accessed after superheterodyne frequency conversion through a frequency reduction circuit, and the application range is wide.
Example two
The embodiment provides a phase information measuring method, which is implemented based on the phase information measuring device of the embodiment, and includes the following steps:
the initial phase time at which the zero event occurs is marked by the zero crossing detection circuit 7.
Specifically, the zero-crossing detection circuit 7 monitors the zero point of the input signal in real time, and the high-speed trigger 8 triggers the second time calibration circuit 6b to calibrate the initial phase time of the input signal when the zero point occurs.
And performing power division processing on the input signal to generate a first power division signal and a second power division signal.
Specifically, the power divider 1 performs power distribution on an input signal to generate the first power division signal and the second power division signal of 1:1.
The first power division signal is input to a first input end of the high-speed discriminator 5; adjusting a threshold voltage of the first power division signal; and outputting a pulse and recording the arrival time of the pulse by the high-speed discriminator 5 when the rising edge amplitude of the second power division signal is equal to the threshold voltage.
Specifically, the field programmable gate array 3 controls the threshold control circuit 4 to output a required threshold with a peak voltage as a reference; the high-speed discriminator 5 outputs a pulse when the second power division signal rises to the threshold voltage by virtue of the voltage identification capability, and generates phase information by combining with the timestamp of the first time calibration circuit 6a, so as to obtain the phase information of the measured point; the phase information of the detected signal is obtained by converting the decomposition of the amplitude variation in the signal period into the phase characteristics at different time points.
More specifically, the threshold voltage satisfies formula (1)
Wherein V represents the value of the threshold voltage; v P Represents a voltage peak; n denotes the number of segments for the target measurement accuracy.
More specifically, the number of segments N satisfies formula (2)
Wherein T represents the period of the signal; t represents the measurement accuracy.
Selecting initial phase information output through the first selector 10, and generating an initial phase event record through the counter 11; the phase information output of the threshold event is selected by the first selector 10 and a threshold event record is generated by the counter 11.
Specifically, the first selector 10 selects the zero-crossing detection circuit 7, the high-speed trigger 8 and the second time calibration circuit 6b for output, and records the initial phase time when the zero-point event occurs; and selecting one path of output where the power divider 1 is located by the first selector 10, recording the time when the initial phase event occurs and the time when the threshold event occurs, and generating a record.
As an implementation manner of this embodiment, when the phase information measuring circuit has at least two paths, the measurement accuracy can be improved by calculating the average output values of the first time calibration circuit 6a and the second time calibration circuit 6b in the multiple paths of the phase information measuring circuits. By calculating the average value of the phases output by the first time calibration circuit 6a in the multi-path phase information measuring circuit, the error is reduced, and the measuring result is more accurate.
As another implementation manner of this embodiment, when the phase information measurement circuits have at least two paths, the phase difference of the signal output by the first time calibration circuit 6a in different phase information measurement circuits is calculated to correct the phase when the event occurs, so that the phase measurement result is more accurate.
As another implementation manner of this embodiment, when the phase information measuring circuit has at least two paths, the phase difference of the zero-point initial phase output by the second time scaling circuit 6b in the multiple paths of phase information measuring circuits is calculated, and the initial phase information of the input signal is corrected by the phase difference. The same first selector 10 is used for selecting the first time marking point circuit 6a in different phase information measuring circuits to output the phase, so that the delay of circuit signals can be reduced, and the time marking is more accurate.
In summary, the present invention provides a phase information measuring apparatus and method, wherein the measuring apparatus includes: at least one path of phase information measuring circuit, the phase information measuring circuit includes: the power divider is used for performing power distribution on the input signal to generate a first power dividing signal and a second power dividing signal; the peak detection circuit is connected with the first output end of the power divider and used for extracting the peak voltage of the first power dividing signal and converting the peak voltage into a digital signal; the field programmable gate array is connected with the output end of the peak value detection circuit and is used for compensating the signal delay output by the peak value detection circuit; the threshold control circuit is connected with the output end of the field programmable gate array and outputs a threshold voltage based on a control signal of the field programmable gate array; wherein the threshold voltage is greater than zero and less than the peak voltage; the high-speed discriminator is connected with the second output end of the power divider at a first input end, connected with the output end of the threshold control circuit at a second input end, and outputs a pulse when the second power dividing signal rises to the threshold voltage according to the voltage identification capability; the first time calibration circuit is connected with the output end of the high-speed discriminator and is used for calibrating the time when the pulse is generated; the zero-crossing detection circuit is used for monitoring the zero point of the input signal in real time; the high-speed trigger is connected with the output end of the zero-crossing detection circuit and generates a trigger signal based on the zero point of the input signal; the input end of the second time calibration circuit is connected with the output end of the high-speed trigger and is used for calibrating the initial phase when the zero event occurs; the selector is connected with the output ends of the first time calibration circuit and the second time calibration circuit and is used for selecting one path of signal to be output; and the counter is connected with the output end of the first selector and used for counting. The high-precision phase information measuring device can comprise a multi-path phase information measuring circuit, converts phase information into time information, measures time by using the principle of amplitude and phase conversion of periodic signals, and can measure signals below 200MHz in high precision. Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which may be made by those skilled in the art without departing from the spirit and scope of the present invention as defined in the appended claims.
Claims (12)
1. A phase information measuring apparatus, characterized by comprising: at least one path of phase information measuring circuit, the phase information measuring circuit includes:
the power divider is used for carrying out power distribution on the input signal to generate a first power dividing signal and a second power dividing signal;
the peak value detection circuit is connected with the first output end of the power divider and used for extracting the peak voltage of the first power dividing signal and converting the peak voltage into a digital signal;
the field programmable gate array is connected with the output end of the peak detection circuit and is used for compensating the time delay of the output signal of the peak detection circuit;
the threshold control circuit is connected with the output end of the field programmable gate array and outputs a threshold voltage based on a control signal of the field programmable gate array; wherein the threshold voltage is greater than zero and less than the peak voltage; wherein the threshold voltage satisfies formula (1)
V represents the value of the threshold voltage; v P Represents a voltage peak; n represents the number of segments for the target measurement accuracy;
the number of segments N satisfies the formula (2)
T represents the period of the signal; t represents the measurement accuracy;
the high-speed discriminator is connected with the second output end of the power divider at a first input end, connected with the output end of the threshold control circuit at a second input end, and outputs a pulse when the second power dividing signal rises to the threshold voltage according to the voltage identification capability;
the first time calibration circuit is connected with the output end of the high-speed discriminator and is used for calibrating the time when the pulse is generated;
the zero-crossing detection circuit is used for monitoring the zero point of the input signal in real time;
the high-speed trigger is connected with the output end of the zero-crossing detection circuit and generates a trigger signal based on the zero point of the input signal;
the input end of the second time calibration circuit is connected with the output end of the high-speed trigger and is used for calibrating the initial phase when the zero event occurs;
the first selector is connected with the output ends of the first time calibration circuit and the second time calibration circuit and used for selecting one path of signal to be output;
and the counter is connected with the output end of the first selector and used for counting.
2. The phase information measuring apparatus according to claim 1, characterized in that: the phase information measuring apparatus further includes:
the standard reference clock circuit inputs a reference clock signal, and the output end of the standard reference clock circuit is connected with the second time calibration circuit and used for generating a standard clock signal; and the second time calibration circuit calibrates the initial phase when zero time occurs based on the standard clock signal.
3. The phase information measuring apparatus according to claim 1, characterized in that: the distribution ratio of the power divider is 1:1.
4. the phase information measuring apparatus according to claim 1, characterized in that: the phase information measuring device comprises a second selector and at least two paths of phase information measuring circuits; the output ends of the two paths of phase information measuring circuits are connected to the input end of the second selector, the output end of the second selector is connected with the counter, and the input signals of the two paths of phase information measuring circuits are the same.
5. The phase information measuring apparatus according to claim 4, characterized in that: the output end of the first time calibration circuit in each phase information measuring circuit is connected with a first selector in the other path of phase information measuring circuit.
6. The phase information measuring apparatus according to claim 4, characterized in that: the phase information measuring device also comprises a calculating unit which is connected with the output end of the counter and is used for calculating the phase difference of the signals output by the first time calibration circuit in different phase information measuring circuits, the phase difference of the zero point signals output by the second time calibration circuit in different phase information measuring circuits and the average value of the signals output by the first time calibration circuit in different phase information measuring circuits.
7. The phase information measuring apparatus according to claim 1, characterized in that: the frequency of the input signal is not higher than a preset frequency.
8. The phase information measuring apparatus according to claim 1, characterized in that: when the frequency of the input signal is higher than the preset frequency, the phase information measuring device further comprises a frequency reduction circuit; the frequency reducing circuit receives the input signal, and the output end of the frequency reducing circuit is connected with the power divider.
9. A phase information measuring method implemented according to the phase information measuring apparatus of any one of claims 1 to 8, characterized by comprising the steps of:
marking the initial phase time when the zero event occurs through a zero-crossing detection circuit;
performing power division processing on an input signal to generate a first power division signal and a second power division signal;
the first power division signal is input to a first input end of the high-speed discriminator; adjusting the threshold voltage of the first power division signal, outputting a pulse and recording the arrival time of the pulse when the second power division signal rises to the threshold voltage through the high-speed discriminator;
selecting initial phase information to be output through the first selector, and generating an initial phase event record through the counter; the phase information output of the threshold event is selected by a selector, and a threshold event record is generated by the counter.
10. The phase information measuring method according to claim 9, characterized in that: when the phase information measuring circuit has at least two paths, the output average value of the first time calibration circuit and the second time calibration circuit in the multiple paths of phase information measuring circuits is calculated, so that the measuring accuracy is improved.
11. The phase information measuring method according to claim 9, characterized in that: and when the phase information measuring circuits are at least two paths, the phase difference of signals output by the first time calibration circuit in different phase information measuring circuits is calculated, so that the phase when an event occurs is corrected.
12. The phase information measuring method according to claim 9, characterized in that: and when the phase information measuring circuits are at least two paths, the phase difference of signals output by the second time calibration circuit in different phase information measuring circuits is calculated to correct the initial phase.
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| DE1240169B (en) * | 1962-09-03 | 1967-05-11 | Siemens Ag | Phase comparator |
| JP3099312B2 (en) * | 1993-07-21 | 2000-10-16 | 株式会社東芝 | Phase detection circuit |
| JP2904396B2 (en) * | 1994-10-06 | 1999-06-14 | 日本物理探鑛株式会社 | Phase difference measuring device and its zero adjusting device and method |
| CN101545929A (en) * | 2008-03-26 | 2009-09-30 | 中国科学院电子学研究所 | Phase detection method based on only amplitude detection |
| CN101871965B (en) * | 2010-06-11 | 2012-01-04 | 威胜集团有限公司 | Method for detecting zero crossing time, frequency and phase difference of power sinusoidal signals |
| CN102901874B (en) * | 2012-11-08 | 2014-12-03 | 江苏凌创电气自动化股份有限公司 | Phase- and time mark measurement-based electronic transformer absolute delay detection method |
| CN106768318A (en) * | 2016-11-09 | 2017-05-31 | 中国科学院高能物理研究所 | Single-photon detection system |
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